US20130266094A1 - Receiver, receiving method and computer program - Google Patents

Receiver, receiving method and computer program Download PDF

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US20130266094A1
US20130266094A1 US13/995,812 US201113995812A US2013266094A1 US 20130266094 A1 US20130266094 A1 US 20130266094A1 US 201113995812 A US201113995812 A US 201113995812A US 2013266094 A1 US2013266094 A1 US 2013266094A1
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reg
unit
pdcch
phich
mapped
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Masao Orio
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NTT Docomo Inc
NEC Casio Mobile Communications Ltd
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NEC Casio Mobile Communications Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2649—Demodulators
    • H04L27/2653—Demodulators with direct demodulation of individual subcarriers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables

Definitions

  • the present invention relates to a receiver, a receiving method, and a computer program.
  • Orthogonal Frequency Division Multiplexing Access is applied as a wireless communication method of Downlink.
  • FIG. 15 is a block diagram showing an outlined configuration of a conventional communication system.
  • a transmission side is explained below at first.
  • error correction encoding, error detection encoding, and size adjustment are carried out for each user datum in an encode unit 101 .
  • encoded data supplied from the encode unit 101 is assigned to each point on an IQ plane, corresponding to each type of modulation method, and furthermore precoding of spatial multiplexing, transmitter diversity, and the like are timely executed in order to create data for each transmission antenna.
  • a modulation unit output datum supplied from the modulation unit 102 is mapped to each resource element (RE) on a frequency axis, for each transmission antenna.
  • an output from the map unit 103 is transformed into a datum on a time axis, for each transmission antenna, in an Inverse Fast Fourier Transform (IFFT) unit 104 .
  • IFFT Inverse Fast Fourier Transform
  • a carrier wave modulation unit 105 an output from the IFFT unit 104 is carrier-wave-modulated for each transmission antenna, and transmitted as transmission data from each transmission antenna (not shown).
  • a map unit on a frequency axis is called ‘RE’ and a unit of time for executing an IFFT is called ‘OFDM symbol.’
  • a datum on a time axis is taken out from received data in a carrier wave demodulation unit 106 .
  • the datum on a time axis is transformed into a datum on a frequency axis, in a Fast Fourier Transform (FFT) unit 107 .
  • FFT Fast Fourier Transform
  • a demap unit 108 a datum mapped in each RE is taken out.
  • the datum taken out is demodulated, corresponding to each modulation method, in a demodulation unit 109 .
  • error detection and error correction are carried out in a decode unit 110 .
  • PCFICH Physical Control Format Indicator Channel
  • PHICH Physical HARQ Indicator Channel
  • PDCCH Physical Downlink Control Channel
  • PCFICH, PHICH, and PDCCH are mapped while Resource Element Group (REG) being used as a unit.
  • REG Resource Element Group
  • FIG. 16 is a diagram showing an outline of mapping PCFICH, PHICH, and PDCCH.
  • each square having diagonal lines represents an RE in which a Reference Signal (RS) of each transmission antenna is placed.
  • RS is a pilot signal.
  • One REG is composed of six REs in the case of an OFDM symbol having an RS, as “A” represents in FIG. 16 .
  • one REG is composed of four REs in the case of an OFDM symbol having no RS, as “B” represents in FIG. 16 .
  • RS mapping positions are based on a cycle of six REs, for all transmission antennas.
  • a mapping offset position is determined according to a cell ID of a base station. Incidentally, any RS is removed in the course of mapping in an REG.
  • mapping information of PHICH and PCFICH is required for mapping PDCCH.
  • FIG. 17 shows an outline of the mapping. Using an REG as a unit, PDCCH is mapped at a position without PCFICH and PHICH, for each OFDM symbol in a time-wise direction. Furthermore, such mapping is carried out sequentially in a direction from a low-frequency side to a high-frequency side. Incidentally, a number written in each REG in FIG. 17 is a PDCCH symbol-quadruplet number.
  • mapping PDCCH specified in paragraph 6.8.5 in NPL 1
  • FIG. 18 A workflow of mapping PDCCH, specified in paragraph 6.8.5 in NPL 1, is shown in a flowchart of FIG. 18 .
  • a PDCCH symbol-quadruplet number m′′ is initialized to be zero, and an RE number k′ is initialized to be zero.
  • an OFDM symbol number l′ is initialized to be zero.
  • k′ of the REG index pair is a multiple number of 6 or 4 when there exists an RS or not, respectively.
  • Step S 104 In the case where it is judged at Step S 103 that the array (k′, l′) is equal to the REG index pair, operation progresses to Step S 104 in order to judge whether or not PCFICH is mapped to the REG (k′, l′).
  • Step S 104 If it is judged at Step S 104 that PCFICH is not mapped to the REG (k′, l′), operation progresses to Step S 105 in order to judge whether or not PHICH is mapped to the REG (k′, l′).
  • Step S 105 If it is judged at Step S 105 that PHICH is not mapped to the REG (k′, l′), operation progresses to Step S 106 in order to map PDCCH symbol-quadruplet to the REG (k′, l′). Then, a PDCCH symbol-quadruplet number m′′ is incremented by only 1 at Step S 107 , and operation progresses to Step S 108 .
  • Step S 104 In any one of the cases where it is judged at Step S 103 that the array (k′, l′) is not equal to the REG index pair, it is judged at Step S 104 that PCFICH is mapped to the REG (k′, l′), and it is judged at Step S 105 that PHICH is mapped to the REG (k′, l′); operation progresses to Step S 108 .
  • Step S 108 the OFDM symbol number l′ is incremented by only 1.
  • Step S 109 it is judged whether or not the OFDM symbol number l′ is less than a number ‘L’; namely whether or not the symbol number has reached a maximum OFDM symbol (the number ‘L’) at which PDCCH is mapped.
  • Step S 109 In the case where it is judged at Step S 109 that the OFDM symbol number l′ is less than the number ‘L’, the symbol number has not yet reached the maximum OFDM symbol (the number ‘L’) at which PDCCH is mapped, and therefore operation returns to Step S 103 to repeat the steps described above.
  • Step S 109 In the case where it is judged at Step S 109 that the OFDM symbol number l′ is not less than the number ‘L,’ the symbol number has reached the maximum OFDM symbol (the number ‘L’) at which PDCCH is mapped, and therefore operation progresses to Step S 110 to increment the RE number k′ by 1.
  • Step S 111 it is judged whether or not the RE number k′ has reached a maximum RE at which PDCCH is mapped. In the case where it is judged that the RE number k′ has not yet reached the maximum RE at which PDCCH is mapped, operation returns to Step S 102 to repeat the steps described above.
  • Step S 111 If it is judged at Step S 111 that the RE number k′ has reached the maximum RE at which PDCCH is mapped, operation of mapping PDCCH finishes.
  • PDCCH is mapped on the basis of the RE number.
  • mapping PDCCH in LTE is carried out for each OFDM symbol in a time-wise direction from the low-frequency side, and the operation sequentially proceeds in a frequency-wise direction.
  • the operation of mapping PDCCH needs to be carried out, while staying away from any REG where PCFICH and PHICH are mapped.
  • demapping of PDCCH can be done only after receiving all the OFDM symbols in the time-wise direction. Therefore, an overhead for process time becomes greater. Furthermore, a memory unit for storing Raw RE (RRE) data requires a memory space for at most four OFDM symbols so that a scale of a circuit becomes enlarged.
  • RRE Raw RE
  • An inventor of the present invention has invented a receiver, a receiving method and a computer program that give a solution to the issues described above, and make it possible to demap PDCCH with a small overhead of process time and by means of a small-scale circuit or a small-scale memory, and the inventor has already had a patent application on the invention (Japanese patent application number: 2010-116104, applied on May 20, 2010; hereinafter, called “the prior application”). Unfortunately, deinterleaving and cyclic deshifting of PDCCH, for which cyclic shifting and interleaving have been carried out, are not taken into consideration in the prior application.
  • Deinterleaving of PDCCH in LTE is carried out together with cyclic shifting, for data of all OFDM symbols. Therefore, in a naive notion, the operation can be carried out only after demodulation data of all the OFDM symbols become prepared, and accordingly the process time becomes greater.
  • a receiver for receiving a signal according to LTE, for which interleaving and cyclic shifting are carried out, the signal being mapped for each transmission antenna with an RE on a frequency-wise axis being as a unit, the receiver comprising: a PDCCH demap unit for demapping PDCCH mapped to an OFDM symbol; and a PDCCH deinterleave and cyclic deshift unit for carrying out cyclic deshifting and deinterleaving on a demodulation datum obtained by the PDCCH demap unit; wherein the PDCCH demap unit includes: a judgment means for making a judgment, with respect to an REG, which is a group of the RE and provided with a serial number, in order of the serial number, on whether or not neither PCFICH nor PHICH are mapped to an attention-receiving REG that is watched at the time, and furthermore, on whether or not the serial number provided to the attention-receiving REG is correspondent to
  • a receiving method for receiving a signal according to LTE, for which interleaving and cyclic shifting are carried out, the signal being mapped for each transmission antenna with an RE on a frequency-wise axis being as a unit, the receiving method comprising execution of a first judgment step for making a judgment, with respect to an REG, which is a group of the RE and provided with a serial number, in order of the serial number, on whether or not at least either of PCFICH and PHICH is mapped to an attention-receiving REG that is watched at the time, a second judgment step for making a judgment on whether or not the serial number provided to the attention-receiving REG is correspondent to the OFDM symbol number at present, which is input each time when an OFDM symbol is received; and a PDCCH demapping step for demapping PDCCH of the attention-receiving REG, in the case where neither PCFICH nor PHICH are mapped to the attention-receiving
  • a computer program to operate a computer of a receiver for receiving a signal according to LTE, for which interleaving and cyclic shifting are carried out, the signal being mapped for each transmission antenna with an RE on a frequency-wise axis being as a unit, the computer program comprising execution of a first judgment step for making a judgment, with respect to an REG, which is a group of the RE and provided with a serial number, in order of the serial number, on whether or not at least either of PCFICH and PHICH is mapped to an attention-receiving REG that is watched at the time, a second judgment step for making a judgment on whether or not the serial number provided to the attention-receiving REG is correspondent to the OFDM symbol number at present, which is input each time when an OFDM symbol is received; and a PDCCH demapping step for demapping PDCCH of the attention-receiving REG, in the case where neither PCFICH nor PHICH are
  • FIG. 1 is a block diagram showing a configuration example of a receiver according to an embodiment of the present invention.
  • FIG. 2 is a drawing that shows an example of a re-arrangement pattern within rows of REGs of PDCCH by an interleaving process.
  • FIG. 3 is a diagram that shows an example of re-arrangement by using the re-arrangement pattern, shown in FIG. 2 , of REGs of PDCCH by an interleaving process.
  • FIG. 4 is a drawing for explaining an example of a processing operation by a counter initial value calculation unit in the receiver shown in FIG. 1 , with reference to a source code of a computer program.
  • FIG. 5 is a drawing for explaining an example of a processing operation by a deinterleave unit in the receiver shown in FIG. 1 , with reference to a source code of a computer program.
  • FIG. 6 is a diagram that shows an REG arrangement.
  • FIG. 7 is a diagram that shows an REG arrangement.
  • FIG. 8 is a flowchart for explaining a demapping operation of PDCCH.
  • FIG. 9 is a flowchart for explaining details of a process for one RB in the flowchart shown in FIG. 8 .
  • FIG. 10 is a diagram that shows a mapping image of PCFICH.
  • FIG. 11 is a diagram that shows a mapping image of PHICH.
  • FIG. 12 is a diagram that shows a mapping image of PHICH.
  • FIG. 13 is a drawing that explains a demapping operation by using an OFDM symbol number lnow′ at present.
  • FIG. 14 is a block diagram showing a configuration example of hardware of a computer that executes a series of processes by way of a computer program.
  • FIG. 15 is a block diagram showing an outlined configuration of a conventional communication system.
  • FIG. 16 is a diagram that shows an outline of mapping PCFICH, PHICH, and PDCCH.
  • FIG. 17 is a diagram that shows mapping information of PHICH and PCFICH required for mapping PDCCH.
  • FIG. 18 is a flowchart for explaining a conventional workflow of mapping PDCCH.
  • FIG. 1 is a block diagram showing a configuration example of a receiver according to an embodiment of the present invention. Being used in a mobile phone, for example, this receiver includes a PCFICH demap unit 11 , a PHICH demap unit 12 , a PDCCH demap unit 13 , and a PDCCH cyclic deshift and deinterleave unit 14 .
  • the PCFICH demap unit 11 outputs an REG number of an REG where PCFICH is mapped.
  • the PHICH demap unit 12 outputs an REG number of an REG where PHICH symbol-quadruplet is mapped.
  • the PDCCH demap unit 13 outputs an REG number of an REG where PDCCH is mapped.
  • the PDCCH cyclic deshift and deinterleave unit 14 carries out a cyclic deshift and deinterleaving for a demodulation datum (REG number) to be obtained by the PDCCH demap unit 13 .
  • the PCFICH demap unit 11 and the PHICH demap unit 12 output a parameter for demapping PDCCH, to the PDCCH demap unit 13 .
  • a memory unit 21 , an internal parameter storing unit 22 , an REG counter 23 , a comparator 24 , a counter 25 , an REG pair unit 26 , and a control unit 27 are provided in the PDCCH demap unit 13 .
  • the PDCCH demap unit 13 is invoked each time when an OFDM symbol is received, and an OFDM symbol number l′now at present is given as a parameter at the time of invoking.
  • the memory unit 21 stores various parameters that the PCFICH demap unit 11 and the PHICH demap unit 12 output.
  • the internal parameter storing unit 22 stores a PCFICH symbol quadruplet-number:
  • the REG counter 23 counts REGs of each CH.
  • the comparator 24 makes a judgment on an REG. Namely, the comparator 24 makes a judgment with respect to an REG provided with a serial number l′, in order of the serial number l′, on whether or not neither PCFICH nor PHICH are mapped to an attention-receiving REG that is watched at the time, and furthermore, on whether or not the serial number l′ provided to the attention-receiving REG is correspondent to the OFDM symbol number l′now at present, which is input each time when an OFDM symbol is received.
  • the counter 25 counts the PDCCH number and the OFDM symbol number l′.
  • the REG pair unit 26 demaps PDCCH of the attention-receiving REG, in the case where neither PCFICH nor PHICH are mapped to the attention-receiving REG, and furthermore the serial number l′ provided to the attention-receiving REG is correspondent to the OFDM symbol number l′ at present.
  • the control unit 27 controls an entire section of the PDCCH demap unit 13 .
  • the PCFICH demap unit 11 demaps PCFICH. Moreover, at this time, the PCFICH demap unit 11 searches for the PCFICH symbol quadruplet-number (Math. 1) correspondent to a minimum REG number where PCFICH is mapped, for demapping PDCCH, and outputs the PCFICH symbol quadruplet-number.
  • the PCFICH symbol quadruplet-number (Math. 1) is stored in the memory unit 21 of the PDCCH demap unit 13 .
  • the PHICH demap unit 12 demaps PHICH. Moreover, at this time, the PHICH demap unit 12 searches for the PHICH symbol quadruplet-number (Math. 2) correspondent to a minimum REG number where PHICH is mapped, and the PHICH map unit number (Math. 3), for demapping PDCCH, and outputs those numbers.
  • the PHICH symbol quadruplet-number (Math. 2) and the PHICH mapping unit number (Math. 3) are stored in the memory unit 21 of the PDCCH demap unit 13 .
  • the internal parameter storing unit 22 initializes the following numbers as parameters; namely, a PCFICH symbol quadruplet-number:
  • Step S 24 the internal parameter storing unit 22 updates each parameter.
  • the REG counter 23 counts a REG number for PCFICH, PHICH, and PDCCH.
  • the REG counter 23 is initialized with an internal parameter after the initializing operation.
  • the REG counter 23 Being controlled by the control unit 27 , the REG counter 23 carries out an update in regard to PCFICH and an update in regard to PHICH, at the updating operation (Step S 24 ) in regard to PCFICH, and at the updating operation (Step S 26 ) in regard to PHICH, both the operations being explained with reference to the flowchart of FIG. 9 . Furthermore, being provided for each OFDM symbol, the REG counter 23 that counts a REG number for PDCCH is controlled by the control unit 27 to timely increment the REG number by 1.
  • the REG counter 23 counts a REG number for each of PCFICH, PHICH, and PDCCH so that each count value of the REG counter 23 represents each corresponding REG number.
  • the comparator 24 receives the REG count value for PDCCH from the REG counter 23 , and makes a judgment on whether the REG represented by the REG number is a REG for PDCCH, or not. The judgment is made by way of an operation of Step S 22 to be explained with reference to the flowchart of FIG. 9 . If once it is judged to be the REG, the comparator 24 subsequently receives the REG count value for PCFICH from the REG counter 23 , and makes a judgment on whether or not the REG count value for PCFICH is the same as the REG count value for PDCCH, and then returns the result to the control unit 27 .
  • the comparator 24 receives the REG count value for PHICH from the REG counter 23 ; and in the same way, makes a judgment on whether or not the REG count value for PHICH is the same as the REG count value for PDCCH, and then returns the result to the control unit 27 . If the REG count value for PDCCH is neither the same as the REG count value for PCFICH nor the same as the REG count value for PHICH, the REG represented by the REG count value for PDCCH can be deemed to be a REG where PDCCH is mapped. Then, the result is output to the REG pair unit 26 .
  • the counter 25 counts a PDCCH symbol-quadruplet number m′′ and an OFDM symbol number F. According to control by the control unit 27 , timely the counter 25 either initializes the PDCCH symbol-quadruplet number m′′ and the OFDM symbol number l′, or increments those numbers only by 1.
  • the OFDM symbol number l′ according to the counter 25 is compared to the OFDM symbol number l′now at present. When these values agree with each other, the comparator 24 outputs the result to the REG pair unit 26 .
  • the OFDM symbol number l′now at present is input into the PDCCH demap unit 13 every time when an OFDM symbol is received, and then the OFDM symbol number l′now at present is supplied to the comparator 24 by the intermediary of the control unit 27 .
  • control unit 27 controls the internal parameter storing unit 22 , the REG counter 23 , the comparator 24 , and the counter 25 .
  • a cyclic shift amount calculation unit 31 , a counter initial value calculation unit 32 , a deinterleave unit 33 , and an address change unit 34 are provided in the PDCCH deinterleave and cyclic deshift unit 14 .
  • the cyclic shift amount calculation unit 31 calculates a cyclic shift amount Ncs implemented on a demodulation datum, before the demodulation datum is obtained.
  • the cyclic shift amount Ncs is obtained as a reminder of dividing the total number of REGs:
  • N CS N PDCCH REG mod N ID cell ⁇ Math. 9 ⁇
  • the counter initial value calculation unit 32 calculates initial values of a row counter and a column counter of a deinterleaving matrix, by using the cyclic shift amount Ncs that has been calculated, and gives the initial values to the deinterleave unit 33 .
  • Ncs cyclic shift amount
  • R floor(( N PDCCH REG ⁇ 1)/ C subblock CC )+1 ⁇ Math. 11 ⁇
  • the size of the matrix may sometimes be greater than the total number of REGs (Math. 7); and in such a case, a dummy bit D is inserted in a top row. Incidentally, the dummy bit is not transmitted.
  • the number of dummy bits is expressed as:
  • FIG. 2 shows an example of a re-arrangement pattern within rows of REGs of PDCCH by an interleaving process
  • FIG. 3 shows an example of re-arrangement by using the re-arrangement pattern.
  • Demodulation data obtained as a result of demodulating PDCCH that has been interleaved as described above are in an arrangement of a matrix shown at a lower position in FIG. 3 .
  • the cyclic shift amount Ncs is equal to 0.
  • the data to be obtained as the demodulation data are shifted for the amount of Ncs.
  • the counter initial value calculation unit 32 makes a decision on initial positions of rows and columns, in accordance with the numerical advancement for the cyclic shift amount Ncs.
  • FIG. 4 shows an example of such a processing operation.
  • FIG. 4 is a drawing for explaining an example of a processing operation by the counter initial value calculation unit 32 , with reference to a source code of a computer program.
  • Rp is a row counter and Cp is a column counter.
  • ‘n’ and ‘m’ are variables.
  • the deinterleave unit 33 advances an interleaving matrix for the number of REGs progressed after a last unit processing operation. Specifically to describe, while the row counter Rp being advanced, and at the time when the row counter Rp reaches the number of columns R, the column counter Cp is incremented. At the same time, the number of columns Rp is initialized to be zero. Until reaching the number of REGs progressed after the last unit processing operation, this process is repeated.
  • FIG. 5 shows an example of such a processing operation.
  • FIG. 5 is a drawing for explaining an example of a processing operation by a deinterleave unit 33 , with reference to a source code of a computer program. Wadr shown in FIG. 5 is a deinterleaving pattern.
  • the address change unit 34 changes an address where a demodulation datum is written, to a position number calculated by the deinterleave unit 33 .
  • demapping operation is carried out on the basis of the RE number (k′ described in FIG. 18 ).
  • needed is to store all top RE numbers of the REGs where PCFICH and PHICH are mapped, to a memory unit.
  • serial REG numbers provided to the REGs are used instead of the RE numbers, for demapping PDCCH.
  • FIG. 6 and FIG. 7 are diagrams that show all of applicable REG arrangements.
  • FIG. 6 is a diagram that shows an REG arrangement in the case where the number of transmission antennas is one or two.
  • FIG. 7 is a diagram that shows an REG arrangement in the case where the number of transmission antennas is four.
  • Each of the squares shown in FIG. 6 and FIG. 7 represents one REG.
  • a horizontal direction and a vertical direction represent a time-wise direction and a frequency-wise direction, respectively.
  • REGs of one RB are grouped into three sections for placement; i.e., an upper section, a middle section, and a lower section. Therefore, a demapping operation for one RB is carried out in three stages, as a general rule.
  • a numerical number in a cell (square) of each REG shown in FIG. 6 and FIG. 7 represents a PDCCH symbol-quadruplet number in one RB.
  • PCFICH and PHICH are not taken into consideration for simple explanation here in FIG. 6 and FIG.
  • FIG. 8 is the flowchart for explaining a demapping operation of PDCCH.
  • FIG. 9 is the flowchart for explaining details of a process for one RB in the flowchart shown in FIG. 8 .
  • the PCFICH demap unit 11 demaps PCFICH.
  • PCFICH is mapped to OFDM symbol # 0 .
  • FIG. 10 is a diagram that shows a mapping image of PCFICH.
  • Each of the squares shown in FIG. 10 represent one REG, and each square having diagonal lines represents an REG where PCFICH is demapped.
  • a numerical number given in a square represents a PCFICH symbol-quadruplet number.
  • NPL 1 an algorithm for calculating a PCFICH mapping pattern is expressed as Formula (1) shows.
  • ‘k’ represents a mapping pattern.
  • SCs sub-carriers
  • PCFICH symbol ⁇ quadruplet #1 k k + ⁇ N RB DL /2 ⁇ N sc RB /2
  • PCFICH symbol ⁇ quadruplet #2 k k + ⁇ 2 N RB DL /2 ⁇ N sc RB /2
  • the above-described expression represents a number assigned to each base station (Physical-layer cell identity), and it is given in a numeric range from 0 to 503.
  • Math. 19 is a multiple number of 6 eventually, as being the following expression:
  • the REG number for which PCFICH is mapped can be calculated by using Formula (3). Incidentally, the following expression:
  • Math. 23 is a remainder of the following expression:
  • Step S 12 the PHICH demap unit 12 demaps PHICH.
  • PHICH is mapped to a plurality of OFDM symbols in the case of Extended PHICH duration.
  • FIG. 11 is a diagram that shows a mapping image of normal PHICH.
  • FIG. 12 is a diagram that shows a mapping image of PHICH in the case of Extended PHICH duration.
  • a right-hand side of FIG. 12 shows a mapping image of PHICH in the case of Extended PHICH duration and MBSFN subframe.
  • mapping is carried out alternately for every two REGs on two OFDM symbols in the case of Extended PHICH duration and MBSFN subframe
  • FIG. 12 shows a case of mapping alternately for every one REG, in order to simplify an explanation.
  • Each of the squares shown in FIG. 11 and FIG. 12 represents one REG, and each square having diagonal lines represents an REG where PHICH is mapped.
  • a numerical number given in a square represents a PHICH symbol-quadruplet number.
  • NPL 1 an algorithm for calculating a PHICH mapping pattern is as described next. Determined at first according to Formula (4) is an OFDM symbol number li′ where PHICH is mapped.
  • a PHICH symbol-quadruplet number ‘i’ is given as a numerical value in a range from 0 to 2.
  • a PHICH mapping unit number m′ is given as a PHICH group number (0 to 25) at the time of Normal CP; and meanwhile, at the time of Extended CP, it is given as a value calculated by way of dividing a PHICH group number (0 to 50) by two and rounding off a digit after the decimal point.
  • PHICH In the case of Extended PHICH duration and MBSFN subframe, PHICH is mapped to two OFDM symbols; and meanwhile, simply in the case of Extended PHICH duration, PHICH is mapped to three OFDM symbols. In the case of Normal PHICH duration, PHICH is mapped to OFDM symbol # 0 .
  • an REG number where PHICHI is mapped is determined according to Formula (5).
  • an REG number where PHICHI is mapped is determined according to Formula (6).
  • PHICH symbol-quadruplet number ‘i’ and a PHICH mapping unit number m′, at a position where (Math. 30) becomes minimum, are searched for; and those numbers are each stored in (Math. 2) and (Math. 3).
  • PHICH is mapped to a plurality of OFDM symbols, in the case of Extended PHICH duration. In this case, PHICH is held for each OFDM symbol in the memory unit 21 .
  • the internal parameter storing unit 22 , the REG counter 23 , and the counter 25 each initialize the PDCCH symbol-quadruplet number and REG number, the minimum REG number where PCFICH is mapped, and the minimum REG number where PHICH is mapped.
  • the REG counter 23 initializes the PDCCH symbol quadruplet number by setting 0 for m′′.
  • the internal parameter storing unit 22 initializes the PCFICH symbol-quadruplet number, as described in Formula (7).
  • the REG counter 23 initializes the PCFICH REG number, as described in Formula (8).
  • variable ‘i’ being incremented each time by 1 from 0 is less than the number of OFDM symbols L for which PDCCH is mapped; the PHICH symbol-quadruplet number, the PHICH mapping unit number, and the PHICH REG number are initialized in the internal parameter storing unit 22 according to Formula (9) and Formula (10).
  • variable ‘i’ is incremented from 0 up to but not including the number of OFDM symbols L for which PDCCH is mapped; the PHICH symbol-quadruplet number, the PHICH mapping unit number, and the PHICH REG number are initialized according to Formula (9) in the case where the variable ‘i’ is less than the number of OFDM symbols L′ for which PHICH is mapped.
  • variable ‘i’ becomes not less than the number of OFDM symbols L for which PDCCH is mapped as a result of being incremented ‘i’ each time by 1, or the variable ‘i’ becomes not less than the number of OFDM symbols L′ for which PHICH is mapped; initializing is carried out in the internal parameter storing unit 22 with a great value, with which PHICH is not mapped and which does not exist in reality as an OFDM symbol, as shown in Formula (10).
  • the cyclic shift amount calculation unit 31 calculates a cyclic shift amount Ncs implemented on a demodulation datum, before the demodulation datum is obtained. Moreover, at Step S 15 , the counter initial value calculation unit 32 calculates initial values of a row counter and a column counter of a deinterleaving matrix, by using the cyclic shift amount Ncs that has been calculated, and initializes both the counters. At Step S 16 , the REGs included in one RB are sequentially processed.
  • the number of REGs included in one RB is specific, depending on whether or not an RS is mapped to the OFDM symbol; namely, the number is 2 when an RS is mapped, and it is 3 when no RS is mapped. In the present case, it is assumed for simplifying the process that the number of REGs included in one RB is always 3.
  • the REGs are each called ‘a lower section’, ‘a middle section’, and ‘an upper section’ in a direction from a lower frequency side. Presence of RS is dependent on the OFDM symbol, the TxAnt number, and the CP length. The number of REGs being 2 means that no middle section exists. Then, it is judged in a later step that the section is not a REG, and procedures from Step S 23 to Step S 32 shown in FIG. 9 are skipped.
  • Step S 16 shown in FIG. 8 procedures from Step S 21 to S 34 shown in FIG. 9 are repeated with respect to a lower section, a middle section, and an upper section of one RB.
  • the counter 25 sets 0 for the OFDM symbol number li′.
  • the comparator 24 receives an REG count value for PDCCH from the REG counter 23 , and makes a judgment on whether or not it is an REG for PDCCH. If it is judged to be such an REG, operation progresses to Step S 23 .
  • Step S 22 if it is judged to be an REG, operation progresses to Step S 23 .
  • the comparator 24 receives an REG count value for PCFICH from the REG counter 23 ; and by way of making a judgment on whether or not the REG count value for PCFICH is the same as the REG count value for PDCCH, the comparator 24 judges if PCFICH is already mapped to the REG indicated by the REG count value for PDCCH, or not.
  • Step S 23 If it is judged at Step S 23 that PCFICH is already mapped to the REG indicated by the REG count value for PDCCH, operation progresses to Step S 24 to carry out an updating process with respect to PCFICH at the REG counter 23 .
  • mapping PDCCH for the REG is skipped.
  • an update is made so as to execute for a next PCFICH symbol-quadruplet number.
  • the PCFICH symbol quadruplet number is updated by way of a calculation described as Formula (11), and in the meantime, the PCFICH REG number is updated by way of a calculation described as Formula (12). Since the PCFICH symbol-quadruplet number is 4, an operation of mod 4 is executed. Furthermore;
  • Step S 24 operation progresses to Step S 32 .
  • Step S 25 If it is judged at Step S 23 that PCFICH is not mapped to the REG indicated by the REG count value for PDCCH, operation progresses to Step S 25 .
  • the comparator 24 receives an REG count value for PHICH from the REG counter 23 ; and by way of making a judgment on whether or not the REG count value for PHICH is the same as the REG count value for PDCCH, the comparator 24 judges if PHICH is already mapped to the REG indicated by the REG count value for PDCCH, or not.
  • Step S 25 If it is judged at Step S 25 that PHICH is already mapped to the REG indicated by the REG count value for PDCCH, operation progresses to Step S 26 to carry out an updating process with respect to PHICH at the REG counter 23 .
  • mapping PDCCH for the REG is skipped.
  • an update is made so as to execute for a next PHICH symbol-quadruplet number. Since the PHICH symbol-quadruplet number is 3, an operation of mod 3 is executed. Incidentally, in order to simply explain, an explanation is made here without considering a case involving MBSFN.
  • the PHICH symbol-quadruplet number is updated by way of an operation that Formula (14) mentions.
  • n quadruplet PHICH ( l ′) ( n quadruplet PHICH ( l ′)+1)mod 3 Formula (14)
  • n unit PHICH ( l ′) n unit PHICH ( l ′)+1 Formula (16)
  • the OFDM symbol changes for every two REGs as a unit, and therefore an increment of 3 is made.
  • the PHICH symbol-quadruplet number that the following expression describes:
  • Step S 26 operation progresses to Step S 32 .
  • Step S 25 If it is judged at Step S 25 that PHICH is not mapped to the REG indicated by the REG count value for PDCCH, the deinterleave unit 33 carries out a deinterleaving operation at Step S 27 . Then, only if the OFDM symbol number li′ agrees with the OFDM symbol number l′now at present at Step S 28 , operation progresses to Step S 29 .
  • the address change unit 34 changes a write address for demodulation data to an address calculated by the deinterleave unit 33 . It is an operation that the following expression describes:
  • REG SYM PDCCH [Wadr] REG ( n REG [l ′] ⁇ (4 +n RS ), l ′) ⁇ Math. 55 ⁇
  • the REG pair unit 26 demaps PDCCH at Step S 30 . Namely, the REG pair unit 26 demaps the REG having the PDCCH symbol-quadruplet number that the REG count value for PDCCH indicates.
  • nRS represents the number of RSs in the REG, i.e., 0 or 2.
  • Step S 30 or in the case where the OFDM symbol number li′ does not agree with the OFDM symbol number l′now at present at Step S 28 , operation progresses to Step S 31 .
  • the internal parameter storing unit 22 increments the PDCCH symbol-quadruplet number m′′ only by 1.
  • Step S 32 the REG counter 23 increments the REG number of each OFDM symbol only by 1.
  • the REG counter 23 increments the OFDM symbol number l′ only by 1.
  • the comparator 24 makes a judgment on whether or not the OFDM symbol number l′ has reached the number of OFDM symbols L for which PDCCH is mapped. If it is judged at Step S 34 that the OFDM symbol number l′ has not yet reached the number of OFDM symbols L for which PDCCH is mapped, operation returns to Step S 22 in order to repeat the procedures described above.
  • Step S 17 the control unit 27 judges whether or not nREG[0] is equal to two times of the number of RBs for one OFDM symbol (Math. 14). If it is judged that nREG[0] is not equal to two times of the number of RBs for one OFDM symbol (Math. 14), operation returns to Step S 16 in order to repeat the procedures described above.
  • Step S 17 If it is judged at Step S 17 that nREG[0] is equal to two times of the number of RBs for one OFDM symbol (Math. 14), the procedures of demapping PDCCH finish.
  • a number assigned to an REG is used instead of an RE number. Then, at the time of demapping PDCCH, the REG numbers of REGs where PCFICH and PHICH are mapped are calculated in an ascending order for staying away from those REGs so that it becomes possible to eliminate “a memory unit for storing all top RE numbers of REGs where PCFICH and PHICH are mapped”, though the memory unit being conventionally needed. In other words, it becomes possible to demap PDCCH in LTE by means of a small-scale circuit.
  • a parameter called l′now representing the OFDM symbol number at present is added for demapping PDCCH, in such a way that demapping is carried out only when the OFDM symbol number l′ agrees with the OFDM symbol number l′now at present.
  • Demapping PDCCH is carried out, while skipping any REG where PCFICH or PHICH is mapped.
  • it is needed to search a series of REGs in due order.
  • demapping PDCCH it is unnecessary to take the order of the REGs into consideration. Therefore, all the REGs are searched with respect to each OFDM symbol, and demapping PDCCH is carried out only for a REG of the OFDM symbol at present.
  • FIG. 13 is a drawing that explains a demapping operation by using an OFDM symbol number lnow′ at present.
  • the drawing shows a comparison example with respect to operation timing of two cases: namely, in one case where a demapping operation is carried out without considering the OFDM symbol number lnow′ at present, and in the other case where a demapping operation is carried out only when the OFDM symbol number l′ agrees with the OFDM symbol number l′now at present.
  • the PHICH symbol-quadruplet number corresponding to a minimum REG number to which PHICH is mapped and a PHICH mapping unit number
  • the PHICH symbol-quadruplet number and the PHICH mapping unit number are initialized at first, and then the REG number of PHICH is subsequently initialized; the minimum REG number to which PHICH is mapped is already searched at the time of demapping PHICH, and therefore the minimum REG number may be stored and used for demapping PDCCH.
  • deinterleaving of PDCCH and cyclic deshifting are processed in parallel with demodulation so that the process time of the deinterleaving and cyclic deshifting, as well as the memory unit for storing the data after processing operations of the deinterleaving and cyclic deshifting can be reduced.
  • the demodulation is carried out for each OFDM symbol as a unit.
  • the operation on a deinterleaving matrix means a procedure for advancing both counters in operation of calculating a position number on the matrix by using a row counter and a column counter.
  • the cyclic shift is executed with initial values given to both the counters that are used in the operation on a deinterleaving matrix. Therefore, the cyclic shift amount is calculated before writing an initial demodulation datum, and then the initial values are calculated by using the cyclic shift amount. In the deinterleaving operation, both the counters are initialized with the initial values to start the operation.
  • an address into which the demodulation datum is written is changed to the address calculated by using both the counters of the deinterleaving matrix.
  • the series of processes described above may be executed by means of hardware, and may also be executed by way of software.
  • a computer program constituting the software is installed into a computer, which is built in exclusive-use hardware, from a computer program recording medium; or the software is installed from a computer program recording medium, for example, into a general-purpose personal computer that can execute various functions with various computer programs being installed.
  • FIG. 14 is a block diagram showing a configuration example of hardware of a computer that executes the series of processes described above by way of a computer program.
  • a central processing unit (CPU) 51 a read only memory (ROM) 52 , and a random access memory (RAM) 53 are interconnected by using a bus 54 .
  • CPU central processing unit
  • ROM read only memory
  • RAM random access memory
  • an I/O interface 55 is connected to the bus 54 .
  • an input unit 56 including a keyboard, a mouse, a microphone, and the like
  • an output unit 57 including a display, a speaker, and the like
  • a storage unit 58 including a hard disc, a non-volatile memory, and the like
  • a communication unit 59 including a network interface and the like
  • a drive 60 for driving a removable medium 61 such as a magnetic disc, an optical disc, a magnetic optical disc, or a semiconductor memory.
  • the CPU 51 loads a computer program, for example, stored in the storage unit 58 by way of the I/O interface 55 and the bus 54 , and executes the program in order to carry out the series of processes described above.
  • the computer program to be executed by the computer (the CPU 51 ) is recorded, for being provided, in the removable medium 61 as a package medium; such as, for example, a magnetic disc (including a flexible disc), an optical disc (Compact Disc-Read Only Memory (CD-ROM), Digital Versatile Disc (DVD), and the like), a magnetic optical disc, or a semiconductor memory; or the computer program is provided via a wired or wireless transmission medium such as a local area network, the Internet, or digital satellite broadcasting.
  • a package medium such as, for example, a magnetic disc (including a flexible disc), an optical disc (Compact Disc-Read Only Memory (CD-ROM), Digital Versatile Disc (DVD), and the like), a magnetic optical disc, or a semiconductor memory
  • CD-ROM Compact Disc-Read Only Memory
  • DVD Digital Versatile Disc
  • the computer program is provided via a wired or wireless transmission medium such as a local area network, the Internet, or digital satellite broadcasting.
  • the computer program can be installed in the computer by way of being stored in the storage unit 58 through the I/O interface 55 , while the removable medium 61 being mounted on the drive 60 .
  • the computer program can be installed in the computer by way of being stored in the storage unit 58 , while being received in the communication unit 59 by the intermediary of a wired or wireless transmission medium.
  • the computer program can previously be installed in the computer by way of storing the program in advance in the ROM 52 or the storage unit 58 .
  • the program to be executed by the computer may be a program with which processes are carried out in chronological order along the sequence explained in this specification document, or may be a program with which processes are carried out in parallel or at the time as required, such as, in response to a call.

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