US20130184794A1 - Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs - Google Patents

Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs Download PDF

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Publication number
US20130184794A1
US20130184794A1 US13/741,116 US201313741116A US2013184794A1 US 20130184794 A1 US20130184794 A1 US 20130184794A1 US 201313741116 A US201313741116 A US 201313741116A US 2013184794 A1 US2013184794 A1 US 2013184794A1
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US
United States
Prior art keywords
electrode
pulses
integrated circuit
integrated circuits
programmed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/741,116
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English (en)
Inventor
Emanuel Feldman
Jordi Parramon
Paul J. Griffith
Jess Shi
Robert Tong
Goran Marnfeldt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boston Scientific Neuromodulation Corp
Original Assignee
Boston Scientific Neuromodulation Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Boston Scientific Neuromodulation Corp filed Critical Boston Scientific Neuromodulation Corp
Priority to US13/741,116 priority Critical patent/US20130184794A1/en
Assigned to BOSTON SCIENTIFIC NEUROMODULATION CORPORATION reassignment BOSTON SCIENTIFIC NEUROMODULATION CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FELDMAN, EMANUEL, GRIFFITH, PAUL J., MARNFELDT, GORAN, PARRAMON, JORDI, SHI, JESS, TONG, ROBERT
Priority to JP2014553361A priority patent/JP5875706B2/ja
Priority to PCT/US2013/021703 priority patent/WO2013109603A1/fr
Priority to EP23160858.9A priority patent/EP4218918A1/fr
Priority to ES17186448T priority patent/ES2943718T3/es
Priority to EP13702540.9A priority patent/EP2804664B1/fr
Priority to ES13702540.9T priority patent/ES2653264T3/es
Priority to EP17186448.1A priority patent/EP3281670B1/fr
Priority to AU2013209855A priority patent/AU2013209855B2/en
Publication of US20130184794A1 publication Critical patent/US20130184794A1/en
Priority to US15/063,072 priority patent/US9656081B2/en
Priority to US15/491,492 priority patent/US10363422B2/en
Priority to US16/443,609 priority patent/US11207521B2/en
Priority to US17/457,366 priority patent/US20220088392A1/en
Abandoned legal-status Critical Current

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    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00—Electrotherapy; Circuits therefor
    • A61N1/18—Applying electric currents by contact electrodes
    • A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
    • A61N1/3605—Implantable neurostimulators for stimulating central or peripheral nerve system
    • A61N1/36125—Details of circuitry or electric components
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00—Electrotherapy; Circuits therefor
    • A61N1/02—Details
    • A61N1/04—Electrodes
    • A61N1/05—Electrodes for implantation or insertion into the body, e.g. heart electrode
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00—Electrotherapy; Circuits therefor
    • A61N1/02—Details
    • A61N1/04—Electrodes
    • A61N1/05—Electrodes for implantation or insertion into the body, e.g. heart electrode
    • A61N1/0526—Head electrodes
    • A61N1/0529—Electrodes for brain stimulation
    • A61N1/0534—Electrodes for deep brain stimulation
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00—Electrotherapy; Circuits therefor
    • A61N1/18—Applying electric currents by contact electrodes
    • A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
    • A61N1/3605—Implantable neurostimulators for stimulating central or peripheral nerve system
    • A61N1/36128—Control systems
    • A61N1/36146—Control systems specified by the stimulation parameters
    • A61N1/36167—Timing, e.g. stimulation onset
    • A61N1/36171—Frequency
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    • H01—ELECTRIC ELEMENTS
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    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • timing channel 176 1 (corresponding to array 102 ) is used to provide the cathodic and anodic pulses respectively at electrode E 1 (for example) and Ec (the case electrode) at a particular frequency (f 1 ), pulse width (pw 1 ), and amplitude (a 1 ).
  • timing channel 176 1 passes therapeutic current pulses between electrodes Ec and E 1 , with Ec comprising the current source, and E 1 the corresponding current sink.
  • Timing channel 176 2 (corresponding to array 103 ) likewise is used to provide cathodic and anodic pulses respectively at electrode E 7 (for example) and Ec, but with a different frequency (f 2 ), and with a particular pulse width (pw 2 ), and amplitude (a 2 ).
  • timing channels 176 1 and 176 2 will stimulate different regions on one (e.g., right) side of the brain.
  • FIG. 6B describes one algorithm 500 for setting V+ to an optimal level in the improved system 290 .
  • the algorithm can start ( 501 ) at any time the IPG is operating and providing pulses, but in one example starts when therapy setting have been adjusted in some fashion. This can occur, for example, when the patient or clinician has used an external controller to change the frequencies, durations, or amplitudes of the pulses, or has chosen new electrodes for stimulation.

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  • Health & Medical Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Public Health (AREA)
  • Veterinary Medicine (AREA)
  • Biomedical Technology (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
  • Radiology & Medical Imaging (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Animal Behavior & Ethology (AREA)
  • General Health & Medical Sciences (AREA)
  • Neurosurgery (AREA)
  • Neurology (AREA)
  • Heart & Thoracic Surgery (AREA)
  • Cardiology (AREA)
  • Psychology (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrotherapy Devices (AREA)
US13/741,116 2012-01-16 2013-01-14 Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs Abandoned US20130184794A1 (en)

Priority Applications (13)

Application Number Priority Date Filing Date Title
US13/741,116 US20130184794A1 (en) 2012-01-16 2013-01-14 Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs
AU2013209855A AU2013209855B2 (en) 2012-01-16 2013-01-16 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
EP13702540.9A EP2804664B1 (fr) 2012-01-16 2013-01-16 Architectures pour un dispositif stimulateur implantable présentant une pluralité de circuits intégrés de commande d'électrodes à sorties d'électrodes court-circuitées
EP17186448.1A EP3281670B1 (fr) 2012-01-16 2013-01-16 Architectures pour un dispositif stimulateur implantable ayant une pluralité de circuits intégrés avec excitateur d'électrode et sorties d'électrode court-circuitées
PCT/US2013/021703 WO2013109603A1 (fr) 2012-01-16 2013-01-16 Architectures pour un dispositif stimulateur implantable présentant une pluralité de circuits intégrés de commande d'électrodes à sorties d'électrodes court-circuitées
EP23160858.9A EP4218918A1 (fr) 2012-01-16 2013-01-16 Architectures pour dispositif stimulateur implantable ayant une pluralité de circuits intégrés de commande d'électrode à sorties d'électrode court-circuitées
ES17186448T ES2943718T3 (es) 2012-01-16 2013-01-16 Arquitecturas para un dispositivo estimulador implantable con una pluralidad de circuitos integrados controladores de electrodos con salidas de electrodos en cortocircuito
JP2014553361A JP5875706B2 (ja) 2012-01-16 2013-01-16 短絡電極出力を備えた複数の電極ドライバ集積回路を有する埋込み可能刺激器デバイスのためのアーキテクチャ
ES13702540.9T ES2653264T3 (es) 2012-01-16 2013-01-16 Arquitecturas para un dispositivo estimulador implantable que tiene una pluralidad de circuitos integrados de controlador de electrodos con salidas de electrodos en cortocircuito
US15/063,072 US9656081B2 (en) 2012-01-16 2016-03-07 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US15/491,492 US10363422B2 (en) 2012-01-16 2017-04-19 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US16/443,609 US11207521B2 (en) 2012-01-16 2019-06-17 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US17/457,366 US20220088392A1 (en) 2012-01-16 2021-12-02 Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261586930P 2012-01-16 2012-01-16
US13/741,116 US20130184794A1 (en) 2012-01-16 2013-01-14 Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US15/063,072 Continuation US9656081B2 (en) 2012-01-16 2016-03-07 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs

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US20130184794A1 true US20130184794A1 (en) 2013-07-18

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Family Applications (5)

Application Number Title Priority Date Filing Date
US13/741,116 Abandoned US20130184794A1 (en) 2012-01-16 2013-01-14 Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs
US15/063,072 Active US9656081B2 (en) 2012-01-16 2016-03-07 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US15/491,492 Active 2033-05-20 US10363422B2 (en) 2012-01-16 2017-04-19 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US16/443,609 Active 2034-01-20 US11207521B2 (en) 2012-01-16 2019-06-17 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US17/457,366 Pending US20220088392A1 (en) 2012-01-16 2021-12-02 Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs

Family Applications After (4)

Application Number Title Priority Date Filing Date
US15/063,072 Active US9656081B2 (en) 2012-01-16 2016-03-07 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US15/491,492 Active 2033-05-20 US10363422B2 (en) 2012-01-16 2017-04-19 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US16/443,609 Active 2034-01-20 US11207521B2 (en) 2012-01-16 2019-06-17 Architectures for an implantable stimulator device having a plurality of electrode driver integrated circuits with shorted electrode outputs
US17/457,366 Pending US20220088392A1 (en) 2012-01-16 2021-12-02 Architectures for an Implantable Stimulator Device Having a Plurality of Electrode Driver Integrated Circuits with Shorted Electrode Outputs

Country Status (6)

Country Link
US (5) US20130184794A1 (fr)
EP (3) EP2804664B1 (fr)
JP (1) JP5875706B2 (fr)
AU (1) AU2013209855B2 (fr)
ES (2) ES2943718T3 (fr)
WO (1) WO2013109603A1 (fr)

Cited By (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110015705A1 (en) * 2007-06-25 2011-01-20 Boston Scientific Neuromodulation Corporation Architectures for an Implantable Medical Device System
WO2015057389A1 (fr) 2013-10-16 2015-04-23 Boston Scientific Neuromodulation Corporation Mesure de courant d'interruption d'alimentation en énergie pour un dispositif médical implantable
US9119964B2 (en) 2013-03-06 2015-09-01 Boston Scientific Neuromodulation Corporation System for deep brain stimulation employing a sensor for monitoring patient movement and providing closed loop control
US9433796B2 (en) 2013-09-03 2016-09-06 Boston Scientific Neuromodulation Corporation Medical device application for an external device using data logged at an implantable medical device
WO2017015541A1 (fr) * 2015-07-22 2017-01-26 Globus Medical, Inc. Générateur d'impulsions implantable générant des signaux de stimulation de la moelle épinière pour un corps humain
WO2017091299A1 (fr) 2015-11-29 2017-06-01 Boston Scientific Neuromodulation Corporation Stimulateur cérébral profond monté sur un crâne
US9717911B2 (en) 2013-03-15 2017-08-01 Globus Medical, Inc. Implantable pulse generator that generates spinal cord stimulation signals for a human body
US9737718B2 (en) 2013-03-15 2017-08-22 Globus Medical, Inc. Implantable pulse generator that generates spinal cord stimulation signals for a human body
EP3269421A1 (fr) * 2016-07-15 2018-01-17 Precisis AG Neurostimulation à l'aide d'impulsions de stimulation à courant continu et/ou courant alternatif
US20180015286A1 (en) * 2016-07-15 2018-01-18 Precisis Ag Neurostimulation using AC and/or DC stimulation pulses
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US20170216600A1 (en) 2017-08-03
AU2013209855B2 (en) 2015-06-18
AU2013209855A1 (en) 2014-06-19
US20220088392A1 (en) 2022-03-24
EP4218918A1 (fr) 2023-08-02
EP3281670A1 (fr) 2018-02-14
ES2653264T3 (es) 2018-02-06
WO2013109603A1 (fr) 2013-07-25
US20160184591A1 (en) 2016-06-30
US9656081B2 (en) 2017-05-23
US11207521B2 (en) 2021-12-28
EP2804664B1 (fr) 2017-10-04
US20190299007A1 (en) 2019-10-03
ES2943718T3 (es) 2023-06-15
EP2804664A1 (fr) 2014-11-26

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