US20120273813A1 - Light emitting diode package and method for fabricating the same - Google Patents

Light emitting diode package and method for fabricating the same Download PDF

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Publication number
US20120273813A1
US20120273813A1 US13/518,209 US201013518209A US2012273813A1 US 20120273813 A1 US20120273813 A1 US 20120273813A1 US 201013518209 A US201013518209 A US 201013518209A US 2012273813 A1 US2012273813 A1 US 2012273813A1
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United States
Prior art keywords
led
led chip
base
wall
package
Prior art date
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Abandoned
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US13/518,209
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English (en)
Inventor
Jung Hwa Jung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seoul Semiconductor Co Ltd
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Seoul Semiconductor Co Ltd
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Assigned to SEOUL SEMICONDUCTOR CO., LTD. reassignment SEOUL SEMICONDUCTOR CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: JUNG, JUNG HWA
Publication of US20120273813A1 publication Critical patent/US20120273813A1/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50Wavelength conversion elements
    • H01L33/505Wavelength conversion elements characterised by the shape, e.g. plate or foil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0041Processes relating to semiconductor body packages relating to wavelength conversion elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/005Processes relating to semiconductor body packages relating to encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • H01L33/54Encapsulations having a particular shape

Definitions

  • the present disclosure relates to a light emitting diode (LED) package and a method for fabricating the same.
  • LED light emitting diode
  • LED packages are used for a variety of applications, such as electronic billboards for displaying letters or figures, lighting fixtures for illuminating product showcases, and the like, by providing optical output of various colors including white, red, and blue, while consuming only a few dozen Watts.
  • a conventional LED package includes a package body 11 having first and second electrodes 12 , 13 , and an LED chip 14 mounted on the first electrode 12 .
  • the LED chip 14 is mounted on the first electrode 12 and connected to the second electrode 13 via a bonding wire W.
  • An encapsulation member 17 is formed to cover the LED chip 14 and the bonding wire W.
  • the encapsulation member 17 has phosphors 16 dispersed therein for color conversion.
  • the LED package 1 may realize white light by a combination of the LED chip 14 and the phosphors 16 .
  • phosphors which emit yellow-green light or yellow light using some of the blue light emitted from the LED chip as an excitation source, are dispersed above the LED chip, so that white light can be realized by combination of the blue light emitted from the LED chip 14 and the yellow-green or yellow light emitted from the phosphors 16 . That is, the LED package may realize white light through combination of the blue LED chip, which is composed of semiconductor components emitting light in a wavelength range of 430 ⁇ 480 nm, and the phosphors, which emit yellow light using the blue light as an excitation source.
  • non-uniform distribution of the phosphors 16 in the encapsulation member 17 can cause color deviation, due to a non-uniform optical path of the light emitted from the LED chip 14 .
  • the LED package when the LED package is applied to a secondary lens, the LED package exhibits poor optical efficiency.
  • another conventional LED package 2 includes a package body 21 , a first electrode 22 , a second electrode 23 , and a phosphor layer 26 formed on an upper surface of an LED chip 24 , as shown in FIG. 1( b ).
  • the LED package 2 may have improved color uniformity of output light emitted from an encapsulation member 27 and through the phosphor layer 26 , which has a constant thickness and is formed on the upper surface of the LED chip 24 .
  • the phosphor layer 26 is disposed only on the upper surface of the LED chip 24 , light emitted laterally from the LED chip 24 may result in color deviation.
  • the present disclosure provides an LED package in which a fluorescent material is evenly distributed around an LED chip disposed on a base, by filling a space inside a wall surrounding the LED chip with the fluorescent material, and a method for fabricating the same.
  • an LED package includes: a base; at least one LED chip mounted on the base; a transparent wall disposed on the base and extending around the LED chip; and a fluorescent material disposed inside of the transparent wall and covering upper and side surfaces of the LED chip.
  • a method of fabricating an LED package includes: preparing a base; forming a transparent wall on the base to define a filling space open at an upper side thereof; mounting at least one LED chip on the base in the transparent wall; and filling the filling space with a fluorescent material to cover the LED chip.
  • an LED package includes: a base; at least one LED chip mounted on the base; a resin wall formed on the base and having a filling space around the LED chip; and a fluorescent material, with which the filling space is filled to cover the LED chip.
  • an LED package includes a fluorescent material that is uniformly distributed around an LED chip disposed on a base.
  • the transparent wall includes the same type of material as an encapsulation member, whereby the LED package can be advantageously fabricated without removing the transparent wall.
  • the distance between the transparent wall and the LED chip is equal to the distance between an upper end of the transparent wall and an upper end of the LED chip, whereby the fluorescent material may be distributed to a uniform thickness.
  • FIG. 1 is side-sectional views of conventional LED packages
  • FIG. 2 is a top view of an LED package in accordance with an exemplary embodiment of the present disclosure
  • FIG. 3 is a cross-sectional view taken along line I-I of FIG. 2 ;
  • FIG. 4 is side-sectional views of various examples of a wall of FIG. 3 ;
  • FIG. 5 is a side-sectional view of an LED package having an encapsulation member formed to cover the wall of FIG. 3 ;
  • FIG. 6 is a side-sectional view of an LED package in accordance with an exemplary embodiment of the present disclosure.
  • FIG. 7 is side-sectional views of a method for fabricating the LED packages of FIGS. 2 and 6 .
  • FIG. 2 is a top view of an LED package 3 , in accordance with an exemplary embodiment of the present disclosure.
  • FIG. 3 is a cross-sectional view taken along line I-I of FIG. 2 .
  • FIG. 4 is side-sectional views of various examples of a wall of FIG. 3 .
  • FIG. 5 is a side-sectional view of an LED package having an encapsulation member formed to cover the entirety of a wall of FIG. 3 .
  • the LED package 3 includes a base 31 and first and second electrodes 32 , 33 disposed on the base 31 .
  • the base 31 may be a printed circuit board or a lead frame.
  • the printed circuit board may include a flat board supported by a ceramic or polyphthalamide (PPA) resin material.
  • the LED package 3 may further include a reflector (not shown) disposed on the base to reflect light generated by the LED chip 34 .
  • a metal pad (not shown) may be provided on a lower surface of the base 31 , to be attached to other objects by, for example, surface mount technology (SMT).
  • SMT surface mount technology
  • the first and second electrodes 32 , 33 formed on the base 31 may be electrically connected to the metal pad.
  • a wall 35 is disposed on the base 31 and is open at an upper side thereof. The wall 35 may at least partially define a filling space and may be transparent.
  • the LED chip 34 is mounted inside the wall 35 .
  • the wall 35 may be formed on the base by, for example, transfer molding.
  • a mold (not shown) may be disposed on the base 31 , in consideration of the size/shape of the LED chip 34 , to make the distance between the wall 35 and the LED chip 34 equal to a difference between the height of the wall 35 and the height of the LED chip 34 .
  • the mold may be filled with a light-transmitting (transparent) resin, thereby forming the wall 35 .
  • the wall 35 may be formed of glass, silicone, epoxy, or other suitable transparent resins. As shown in FIG. 4( a ), the wall 35 may have an inner side surface that is perpendicular to the plane of the base, so that the fluorescent material may be formed to a uniform thickness. The wall 35 may be configured to correspond to the shape of any LED chip.
  • FIGS. 4( b ) and 4 ( c ) show inclined side surfaces of the wall 35 . Further, since the wall 35 may have any shape so long as a suitable filling space is formed around the LED chip 34 , the wall 35 may receive any LED chip.
  • the wall 35 may be made of the light-transmitting material. However, according to some embodiments, the wall 35 may be made of an opaque resin. If the wall 35 is opaque, the wall 35 may reflect light emitted from the LED chip 34 , and an inner side surface(s) of the wall 35 may be slanted, for example, at an angle of 120 degrees.
  • the LED chip 34 is electrically connected to the first and second electrodes 32 , 33 via, for example, two bonding wires (W).
  • the filling space of the wall 35 is filled with a fluorescent material 36 , so as to cover the LED chip 34 .
  • the fluorescent material 36 covers upper and side surfaces of the LED chip 34 and may completely cover the LED chip 34 .
  • the fluorescent material 36 may be composed of a light-transmitting resin and phosphors.
  • the LED package may further include an encapsulation member 37 , to protect the fluorescent material 36 , which covers the LED chip 34 and the wall 35 .
  • the encapsulation member 37 is shown in full detail in FIG. 5 .
  • the encapsulation member 37 may include epoxy resin, silicone resin, or the like, and may include the same type of transparent material as the wall 35 .
  • the encapsulation member 37 may be formed without removing the wall 35 , so that the LED package may be easily fabricated.
  • the encapsulation member 37 has a convex shape.
  • shape of the encapsulation member is not limited thereto and may be selected according to use of a light source.
  • the LED chip 34 in the LED package 3 receives electric current from the first and second electrodes 32 , 33 on the base 31 and emits light, which in turn is emitted to the outside through a uniform color conversion path, thereby reducing color deviation.
  • FIG. 6 is a side-sectional view of an LED package 4 in accordance with an exemplary embodiment.
  • the LED package 4 has a different number of LED chips than the LED package 3 . Next, the different features of the LED package 4 will be described.
  • the LED package 4 includes first to third LED chips 441 , 442 , 443 mounted inside a wall 45 formed of a transparent material and disposed on a base 41 . Although the LED package 4 is described as including three LED chips, any suitable number of LED chips may be mounted on the base.
  • a filling space is at least partially defined by the wall 45 such that a mounting surface on the base for mounting the first to third LED chips 441 , 442 , 443 has a larger area than in the LED package 3 .
  • Each of the first to third LED chips 441 , 442 , 443 is electrically connected to the first and second electrodes 42 , 43 , via three pairs of bonding wires (not shown).
  • An inner surface of the wall 45 may have the same shape as that of the first to third LED chips 441 , 442 , 443 .
  • the distance between the inner surfaces of the wall 45 and the first to third LED chips 441 , 442 , 443 , the distance between the first LED chip 441 and the second LED chip 442 , the distance between the first LED chip 441 and the third LED chip 443 , and the height difference between the wall 45 and the first to third LED chips 441 , 442 , 443 are set to define constant filling spaces therebetween.
  • the filling spaces are filled with the fluorescent material 46 . Consequently, the fluorescent material may have a uniform thickness over the first to third LED chips 441 , 442 , 443 . Therefore, since light generated by the first to third LED chips 441 , 442 , 443 is emitted to the outside through a uniform color conversion path, it is possible to improve the quality of light by reducing color deviation.
  • FIG. 7 shows side-sectional views of a method for fabricating the LED package of FIG. 2 .
  • a base 31 is prepared as shown in FIG. 7( a ).
  • the base 31 may have first and second electrodes 32 , 33 on an upper surface thereof and a metal pad (not shown) on a lower surface thereof.
  • a wall 35 is formed on the base 31 .
  • the wall 35 may be transparent.
  • the wall 35 is formed between the first and second electrodes 32 , 33 and may be formed on the base 31 by, for example, transfer molding.
  • an LED chip 34 having a rectangular shape is mounted on the base 31 , and the wall 35 has an inner side surface that is perpendicular to the base.
  • the inner side surface of the wall 35 is not limited thereto and may be modified according to the shape of the LED chip, to allow any shape of LED chip to be mounted inside the wall 35 , so that a uniform layer may be formed in the LED chip.
  • the wall 35 may have an inclined inner side surface such that the distance between the wall 35 and the LED chip gradually increases going upwards or downwards.
  • an LED chip 34 is mounted inside the wall 35 .
  • the LED chip 34 is mounted such that the distance between the inner side surface of the wall 35 and the LED chip 34 is constant.
  • the LED chip 34 is electrically connected to the first and second electrodes 32 , 33 on the base 31 , via bonding wires (W).
  • bonding wires (W) are used to electrically connect the LED chip 34 to the first and second electrodes 32 , 33 on the base 31 .
  • a fluorescent material 36 is supplied to a space at least partially defined by the wall 35 , to cover upper and side surfaces of the LED chip 34 .
  • the fluorescent material 36 may comprise a combination of at least one phosphor and a light-transmitting resin.
  • the fluorescent material 36 is coated on the LED chip 34 at a uniform thickness, in accordance with the shape of the wall 35 .
  • the resultant may be cut to produce individual LED packages.
  • the resultant may be subjected to a process as shown in FIG. 7( e ), followed by cutting to produce individual LED packages.
  • an encapsulation member 37 may be formed on the base 31 to cover the wall 35 and the first and second electrodes 32 , 33 .
  • the encapsulation member 37 may protect the LED chip 34 , the wall 35 , bonding wires (W), the first and second electrodes 32 , 33 , and the like.
US13/518,209 2009-12-21 2010-12-10 Light emitting diode package and method for fabricating the same Abandoned US20120273813A1 (en)

Applications Claiming Priority (3)

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KR10-2009-0127872 2009-12-21
KR1020090127872A KR101186648B1 (ko) 2009-12-21 2009-12-21 Led 패키지 및 그의 제조 방법
PCT/KR2010/008843 WO2011078506A2 (en) 2009-12-21 2010-12-10 Light emitting diode package and method for fabricating the same

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KR (1) KR101186648B1 (zh)
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US20130334553A1 (en) * 2012-06-13 2013-12-19 Everlight Electronics Co., Ltd. Light Emitting Diode Package Structure And Manufacturing Method Thereof
US20150102373A1 (en) * 2013-10-10 2015-04-16 Samsung Electronics Co., Ltd. Light emitting diode package and method of manufacturing the same
US20160225959A1 (en) * 2015-02-04 2016-08-04 Everlight Electronics Co., Ltd. LED Packaging Structure And Method For Manufacturing The Same
US10553765B2 (en) 2016-11-21 2020-02-04 Nichia Corporation Method for manufacturing light emitting device

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US20130334553A1 (en) * 2012-06-13 2013-12-19 Everlight Electronics Co., Ltd. Light Emitting Diode Package Structure And Manufacturing Method Thereof
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WO2011078506A2 (en) 2011-06-30
CN102714264B (zh) 2016-03-23
US20140312366A1 (en) 2014-10-23
KR101186648B1 (ko) 2012-09-28
CN102714264A (zh) 2012-10-03
US10529901B2 (en) 2020-01-07

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