US20110297551A1 - Method for fabricating electronic component and electro-plating apparatus - Google Patents
Method for fabricating electronic component and electro-plating apparatus Download PDFInfo
- Publication number
- US20110297551A1 US20110297551A1 US13/050,454 US201113050454A US2011297551A1 US 20110297551 A1 US20110297551 A1 US 20110297551A1 US 201113050454 A US201113050454 A US 201113050454A US 2011297551 A1 US2011297551 A1 US 2011297551A1
- Authority
- US
- United States
- Prior art keywords
- plating
- plating solution
- electro
- substrate
- seed film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/001—Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D21/00—Processes for servicing or operating cells for electrolytic coating
- C25D21/10—Agitating of electrolytes; Moving of racks
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/003—Electroplating using gases, e.g. pressure influence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Abstract
A method for fabricating an electronic component according to an Embodiment, includes a seed film forming process and an electro-plating process. In the seed film forming process, a seed film is formed above a substrate. In the electro-plating process, electro-plating is performed by soaking the seed film in a plating solution in a plating bath to which the plating solution being bubbled by a nitrogen gas is supplied, using the seed film as a cathode.
Description
- This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2010-128060 filed on Jun. 3, 2010 in Japan, the entire contents of which are incorporated herein by reference.
- Embodiments described herein relate generally to a method for fabricating an electronic component and an electro-plating apparatus.
- In recent years, with higher integration and higher performance of semiconductor integrated circuits (LSI), new microprocessing technologies have been developed. Particularly recently, replacement of aluminum (Al) alloys as a conventional wire material by low-resistant copper (Cu) or Cu alloys (that is, copper-containing materials and hereinafter, collectively referred to as Cu) is under way to achieve faster LSIs. However, it is difficult to microprocess Cu by the dry etching method such as RIE (reactive ion etching) used frequently to form an Al-alloy wire. Therefore, the so-called damascene method by which an embedded wire is formed by depositing a Cu film on a grooved dielectric film and removing the Cu film excluding the Cu film embedded in the groove by the chemical mechanical polishing (CMP) method is mainly adopted. The Cu film is generally formed by first forming a thin Cu seed film by the sputter process or the like and then forming a laminated film of a thickness on the order of several hundred nm by the electro-plating method. Further, when a multilayer Cu wire is formed, particularly the wire formation method called a dual damascene structure can also be used. According to the method, a dielectric film is formed on a lower-layer wire to form a predetermined via hole and a trench (wire groove) for an upper-layer wire and then, Cu to be the wire material is embedded in the via hole and the trench simultaneously and further, unnecessary Cu in the upper layer is removed by the CMP method for planarization to form an embedded wire.
- A Cu seed film formed by the sputter process has particularly a thin side wall and is easily dissolved by a plating solution. If an attempt is made to perform electro-plating on a portion where the Cu seed film has dissolved, no Cu film is formed because no current flows. Thus, even if a Cu film grown from therearound is completely embedded in such a portion, there is a problem that the portion has poor adhesion between the side wall and the Cu film, causing defects.
-
FIG. 1 is a flow chart showing principal parts of a method for fabricating a semiconductor device according to a first embodiment; -
FIGS. 2A to 2C are process sectional views showing processes performed conforming to the flow chart inFIG. 1 ; -
FIGS. 3A to 3C are process sectional views showing processes performed conforming to the flow chart inFIG. 1 ; -
FIG. 4 is a conceptual diagram exemplifying the configuration of a plating apparatus in which a substrate is held in a standby position according to the first embodiment; -
FIG. 5 is a conceptual diagram exemplifying the configuration of the plating apparatus in which the substrate is held in a plating position according to the first embodiment; -
FIG. 6 is a process sectional view showing a process performed conforming to the flow chart inFIG. 1 ; -
FIG. 7 is a diagram showing a relationship between the number of defects and an etching rate according to the first embodiment; -
FIGS. 8A and 8B are conceptual diagrams of a substrate section illustrating an effect of N2 bubbling according to the first embodiment; -
FIG. 9 is a flow chart showing principal parts of the method for fabricating a semiconductor device according to a second embodiment; -
FIG. 10 is a conceptual diagram exemplifying the configuration of the plating apparatus in which the substrate is held in the standby position according to the second embodiment; -
FIG. 11 is a conceptual diagram exemplifying the configuration of the plating apparatus in which the substrate is held in the plating position according to the second embodiment; and -
FIGS. 12A and 12B are conceptual diagrams exemplifying a technique for putting the substrate into a plating bath according to a third embodiment. - A method for fabricating an electronic component according to an Embodiment, includes a seed film forming process and an electro-plating process. In the seed film forming process, a seed film is formed above a substrate. In the electro-plating process, electro-plating is performed by soaking the seed film in a plating solution in a plating bath to which the plating solution being bubbled by a nitrogen gas is supplied, using the seed film as a cathode.
- An electro-plating apparatus according to an Embodiment, includes a holder, a plating bath, a supply tank, a nitrogen gas supply unit, and a current supply device. The holder is configured to hold a substrate to be plated. An anode member is arranged in the plating bath. The supply tank is configured to supply a plating solution being bubbled by a nitrogen gas to the plating bath. The nitrogen gas supply unit is configured to supply the nitrogen gas into the supply tank. The current supply device is configured to pass a current between the substrate to be plated and the anode member.
- In the first embodiment, a case where a Cu damascene wire is formed in an insulating layer of a low-k film will be described below using the drawings.
-
FIG. 1 is a flow chart showing principal parts of a method for fabricating a semiconductor device according to the first embodiment. InFIG. 1 , in the present embodiment, a series of processes is performed, including a low-k film formation process that forms a thin low-k film made of a low dielectric constant material (S102), a cap film formation process that forms a cap film (S104), an opening formation process that forms an opening (S106), a barrier metal film formation process (S108), a seed film formation process (S110), a nitrogen (N2) bubbling and electro-plating process (S114), and a polishing process (S116). -
FIGS. 2A to 2C are process sectional views showing processes performed conforming to the flow chart inFIG. 1 .FIGS. 2A to 2C show the low-k film formation process (S102) to the opening formation process (S106) inFIG. 1 . Subsequent processes will be described later. - In
FIG. 2A , as the low-k film formation process (S102), a thin film of a low-k film 220 using a porous low dielectric constant material is formed on asubstrate 200 as an example of a base substance to a thickness of, for example, 300 nm. By forming the low-k film 220, an inter-level dielectric whose relative dielectric constant k is 3.0 or less can be obtained. Porous silicon oxycarbide (SiOC) is suitably used as a material of the low-k film 220. Using a porous SiOC film, an inter-level dielectric whose relative dielectric constant k is, for example, 2.6 or less can be obtained. As a formation method thereof, for example, the PECVD method can be used. For example, a mixed gas including methyl-di-ethoxy-silane, alpha-terpinene (C10H16), oxygen (O2), and helium (He) is caused to flow into a chamber (not shown), thesubstrate 200 is heated to, for example, 250° C. while pressure inside the chamber is maintained at 1.3×103 Pa (10 Torr) or less, and high-frequency power is supplied to a lower electrode and an upper electrode (not shown) in the chamber to generate plasma. Methyl-di-ethoxy-silane is a gas for forming main skeleton components and alpha-terpinene is a gas for forming porogen. Then, porogen contained in the SiOC film is removed by heating and vaporizing porogen. Then, in a nitrogen atmosphere, the SiOC film is cured by ultraviolet (UV) irradiation at, for example, 450° C., which is higher than the porogen removal temperature. Accordingly, the low-k film 220, which becomes a porous dielectric film, can be formed. The formation method is not limited to the CVD method, and the SOD (spin on dielectric coating) method by which a thin film is formed by spin-coating and heat-treating a solution may also be suitably used. For example, a film having siloxane backbone structures such as polymethyl siloxane having methyl siloxane as a main component, polysiloxane, hydrogen silsesquioxane, and methyl silsesquioxane can suitably be used as a material of the low-k film 220. A ground film (not shown) is suitably formed in a lower layer of the low-k film 220. As the ground film, for example, silicon oxide (SiO2), silicon oxycarbide (SiCN), silicon carbide (SiC), or non-porous silicon carboxide (dense SiCO) is suitable. A ground film can be formed by the PECVD method, but the formation method is not limited to this and some other method may also be used to form the ground film. The ground film of 20 nm, for example, is formed. A silicon wafer having a diameter of 300 mm, for example, is used as thesubstrate 200. Here, a contact plug layer and device portions are not illustrated. On thesubstrate 200, other metal wires or a layer having various semiconductor elements or structures (not shown) may be formed. Alternatively, some other layer may be formed. - In
FIG. 2B , as the cap film formation process (S104), a thin film of anSiOC film 222 is formed on the low-k film 220 by the CVD method by depositing silicon oxycarbide (SiOC) as a cap dielectric film to a thickness of, for example, 50 nm. By forming theSiOC film 222, it becomes possible to protect the low-k film 220 to which it is difficult to directly apply lithography and to form a pattern on the low-k film 220. In addition to SiOC, at least one dielectric material selected from the group composed of silicon oxide (SiO2), SiC, silicon carbohydrate (SiCH), silicon carbonitride (SiCN), and SiOCH and whose relative dielectric constant is 2.5 or more may be used as the material of the cap dielectric film. Here, the CVD method is used to form the cap film, but some other method may also be used. - In
FIG. 2C , as the opening formation process (S106), anopening 150, which is a wire groove structure to produce a damascene wire in lithography and dry etching processes, is formed in theSiOC film 222 and the low-k film 220. A wire groove of 5 μm in width, for example, is formed. Theopening 150 can be formed substantially perpendicularly to the surface of thesubstrate 200 by removing the exposedSiOC film 222 and the low-k film 220 positioned in the lower layer thereof from thesubstrate 200 having a resist film formed on theSiOC film 222 through the lithography process such as a resist coating process and exposure process, which are not shown, by the anisotropic etching method. For example, theopening 150 may be formed by the reactive ion etching method. If the above-described ground film is formed in a lower layer of the low-k film 220, the ground film may also be removed by the anisotropic etching method. -
FIGS. 3A to 3C are process sectional views showing processes performed conforming to the flow chart inFIG. 1 .FIGS. 3A to 3C show the barrier metal film formation process (S108) to the N2 bubbling and electro-plating process (S114) inFIG. 1 , as a conductive material film formation process. Subsequent processes will be described later. - In
FIG. 3A , as the barrier metal film formation process (S108), abarrier metal film 240 using a barrier metal material is formed in theopening 150 formed by the opening formation process and on the surface of theSiOC film 222. Thebarrier metal film 240 is formed by depositing a thin film of a tantalum (Ta) film to a thickness of, for example, 30 nm in a sputtering apparatus using a sputter process, which is a kind of the physical vapor deposition (PVD) method. The deposition method of a barrier metal material is not limited to the PVD method, and the atomic layer deposition (ALD or the atomic layer chemical vapor deposition (ALCVD)) method or the CVD method may also be used. The coverage can thereby be made higher than when the PVD method is used. In addition to Ta, a tantalum-based tantalum-containing material such as tantalum nitride (TaN), a titanium-based titanium-containing material such as titanium (Ti) and titanium nitride (TiN), a tungsten-based tungsten-containing material such as tungsten nitride (WN), or a laminated film combining and using Ta and TaN or the like may be used as the material of the barrier metal film. - In
FIG. 3B , as the seed film formation process (S110), a Cu thin film to be a cathode electrode in the next process, that is, the electro-plating process, is caused to deposit (form) on an inner wall of theopening 150 in which thebarrier metal film 240 is formed and on the surface of thesubstrate 200 as a seed film 250 (an example of the copper-containing film) by the PVD method such as the sputter process. Here, theseed film 250 is caused to deposit, for example, on the surface of thesubstrate 200 to a thickness of 20 nm. - In the first embodiment, N2 bubbling is performed before plating is started in the next process, that is, the electro-plating process (S114), to prevent the
seed film 250 from disappearing after being dissolved by a plating solution, and electro-plating is performed by using the plating solution with which N2 bubbling has been performed at least until the plating is started (the passage of electric current for electro-plating is started). - In
FIG. 3C , as the N2 bubbling and electro-plating process (S114), theseed film 250 is soaked in the plating solution in a plating bath to which the plating solution bubbled by a nitrogen gas is supplied, to cause a Cu film (example of copper-containing film) 260 to deposit in theopening 150 and on the surface of thesubstrate 200 by the electrochemical growth method based on electro-plating using theseed film 250 as a cathode. Here, theCu film 260 of the thickness of, for example, 800 nm is caused to deposit, and which annealing is performed, for example, at 150° C. for 30 min. -
FIG. 4 is a conceptual diagram exemplifying the configuration of a plating apparatus in which a substrate is held in a standby position according to the first embodiment. In the electro-plating apparatus, an N2 tank 620 (nitrogen gas supply unit), anozzle 632, asupply tank 610, aplating bath 650, ananode electrode 654, acurrent supply device 612, and aholder 652 are arranged. A nitrogen (N2) gas supplied from the N2 tank 620 is supplied (discharged) into aplating solution 670 from the tip of thenozzle 632 extending into theplating solution 670 inside thesupply tank 610 via avalve 630 and apipe 631. Then, a portion of the N2 gas is dissolved in theplating solution 670 and the rest thereof is discharged into the air from above. Thus, in thesupply tank 610, theplating solution 670 is bubbled by the N2 gas. Then, as described above, theplating solution 670 bubbled by the N2 gas is supplied to theplating bath 650 by apump 640. Moreover, theplating solution 670 continues to be supplied to theplating bath 650 by thepump 640 since electro-plating is started until the plating is completed. Theplating solution 670 overflowing from theplating bath 650 is returned to thesupply tank 610 by going through a pipe. Therefore, theplating solution 670 circulates through thesupply tank 610 and theplating bath 650. In other words, theplating solution 670 supplied to theplating bath 650 continues to be bubbled by the N2 gas inside thesupply tank 610 since before electro-plating is started until electro-plating is completed. Then, theplating solution 670 continuing to be bubbled inside thesupply tank 610 circulates between thesupply tank 610 and theplating bath 650 since before electro-plating is started until electro-plating is completed. Therefore, theplating solution 670 overflowing from theplating bath 650 is bubbled by the N2 gas inside thesupply tank 610 and then supplied to theplating bath 650 again. A solution obtained by adding an additive to a solution containing copper sulfate as a main component may be used as theplating solution 670. Theplating bath 650 is formed in a substantially cylindrical shape and contains therein theplating solution 670 supplied from thesupply tank 610. At the bottom of theplating solution 670 in theplating bath 650, theanode electrode 654 made of an anode member whose upper surface is exposed to theplating solution 670 is arranged. As theanode electrode 654, for example, a soluble anode such as phosphorous-containing copper may be used. Theholder 652 is arranged above theplating bath 650 to removably hold thesubstrate 200 whose plating surface faces downward. Thecurrent supply device 612 passes a current to between theanode electrode 654 and thesubstrate 200 to be a substrate to be plated. - In
FIG. 4 , a state in which theholder 652 holds thesubstrate 200 in a position raised from the liquid surface of theplating solution 670 is shown. For example, thesubstrate 200 is held in a standby position for transportation by a robot or the like (not shown). A cathode contact plug is connected to an outer circumferential portion of the surface of thesubstrate 200 where the seed film is formed in a region that does not come into contact with theplating solution 670. On the other hand, an anode contact plug is connected to theanode electrode 654. Facilities before the N2 gas is supplied to thesupply tank 610, for example, the N2 tank 620, thevalve 630, thepipe 631, and thenozzle 632 may be arranged as supply facilities on the side of the user, instead of components constituting the electro-plating apparatus. -
FIG. 5 is a conceptual diagram exemplifying the configuration of the plating apparatus in which the substrate is held in a plating position according to the first embodiment. In the first embodiment, when the surface of thesubstrate 200 is put into theplating bath 650 filled with theplating solution 670, thesubstrate 200 is put into theplating bath 670 being bubbled by an N2 gas while rotating thesubstrate 200 using theholder 652. Accordingly, theseed film 250 is soaked in theplating solution 670 in theplating bath 650 to which theplating solution 670 being bubbled by the N2 gas is supplied. By soaking theseed film 250 in theplating solution 670 being bubbled by the N2 gas, dissolution of theseed film 250 can be suppressed. To suppress dissolution of theseed film 250, the plating solution 670 N2-bubbled at least until electro-plating is started since before electro-plating is started (before the substrate is put into the plating solution) is supplied to theplating bath 650. Then, the surface of thesubstrate 200 is soaked in theplating solution 670 while rotating thesubstrate 200 and a current of a predetermined current density is passed from thecurrent supply device 612 with theanode electrode 654 set as an anode and theseed film 250 of thesubstrate 200 to be a plating surface set as a cathode to perform electro-plating. When thesubstrate 200 is put into theplating solution 670, it is better to tilt the substrate by a predetermined angle so that no air is left between thesubstrate 200 and theplating solution 670. - Then, a damascene wire is formed by removing, using CMP, the
Cu film 260 and thebarrier metal film 240 that are deposited on theopening 150 and excessive from the above state. -
FIG. 6 is a process sectional view showing a process performed conforming to the flow chart inFIG. 1 . InFIG. 6 , the polishing process (S116) inFIG. 1 is shown. - In
FIG. 6 , as the polishing process, the surface of thesubstrate 200 is polished by the CMP method and theCu film 260 including theseed film 250 to be a wiring layer as a conductive portion deposited on the surface other than the opening and thebarrier metal film 240 are polished and removed for planarization as shown inFIG. 6 . In this manner, the damascene wire can be formed. -
FIG. 7 is a diagram showing a relationship between the number of defects and an etching rate according to the first embodiment. InFIG. 7 , the etching rate shows the rate of dissolution of Cu into the plating solution. The number of defects shows the number of poorly embedded wires after polishing. The etching rate can be decreased by performing N2 bubbling. Then, by decreasing the etching rate, dissolution of theseed film 250 can be suppressed and also a region without theseed film 250 can be prevented. As a result, poorly embedded wires can be reduced. - The reason why the rate of dissolution of Cu can be reduced by performing N2 bubbling is considered to be because Cu dissolution in the plating solution occurs according to the following reaction formula:
-
Cu+O2+2H+→Cu2++H2O - Cu reacts with dissolved oxygen and acid in the plating solution to elute into the plating solution. Dissolved oxygen in the plating solution is expelled by performing N2 bubbling so that the amount of reaction of the above reaction formula decreases. Accordingly, elution of Cu into the plating solution can be considered to have decreased.
-
FIGS. 8A and 8B are conceptual diagrams of a substrate section illustrating an effect of N2 bubbling according to the first embodiment. If no N2 bubbling is performed, as shown inFIG. 8A , voids arise due to losses of the seed Cu film that conspicuously occur on the side wall of the opening. By contrast, as described above, by putting the substrate into the N2-bubbledplating solution 670, as shown inFIG. 8B , incomplete plating due to losses of seed Cu film that conspicuously occur particularly on the side wall of the opening can be prevented by suppressing dissolution of the seed Cu film before plating. - When electro-plating is performed, the
seed film 250 may further be put into theplating bath 650 filled with theplating solution 670 in a state in which a voltage is applied to theseed film 250 from thecurrent supply device 612 while performing N2 bubbling. Particularly in the first embodiment, a voltage lower than a voltage when electro-plating is started after the substrate is soaked in theplating solution 670 is suitably applied to theseed film 250 when the substrate is put into theplating bath 650 filled with theplating solution 670. With this configuration, dissolution of the Cu seed film can further be suppressed. - To completely prevent dissolution of the Cu seed film without performing N2 bubbling, it is necessary to set the voltage at which Cu plating occurs. However, when the substrate is put into the
plating bath 650, it takes a predetermined time before the whole surface of thesubstrate 200 comes into contact with theplating solution 670 and the plating time is different between a portion that comes into contact with the solution first and a portion that comes into contact last, resulting in degradation in embedding uniformity of theCu film 260 grown as plating on the surface of thesubstrate 200. Moreover, if the voltage applied to thesubstrate 200 is decreased without performing N2 bubbling, incomplete plating or defects occur on the side wall where the Cu seed film is thin. Therefore, in the first embodiment, a voltage lower than a voltage when electro-plating is started after the substrate is put into theplating bath 650 filled with theplating solution 670 is applied to theseed film 250 when the substrate is soaked in theplating solution 670 while performing N2 bubbling. Accordingly, dissolution of the Cu layer can be suppressed while maintaining embedding uniformity. - In the second embodiment, a case where, in addition to content in the first embodiment, the substrate is further cooled will be described below using the drawings.
-
FIG. 9 is a flow chart showing principal parts of the method for fabricating a semiconductor device according to the second embodiment. In the present embodiment,FIG. 9 is the same asFIG. 1 except that a cooling process (S112) is added between the seed film formation process (S110) and the N2 bubbling and electro-plating process (S114). Other than content described below are the same as in the first embodiment. Each process up to the seed film formation process (S110) is the same as in the first embodiment. - The
seed film 250 is cooled as the cooling process (S112). The rear surface of thesubstrate 200 is cooled by using a gas as a cooling method to cool theseed film 250 via the rear surface of thesubstrate 200. -
FIG. 10 is a conceptual diagram exemplifying the configuration of the plating apparatus in which the substrate is held in the standby position according to the second embodiment. InFIG. 10 , theholder 652 is worked out so that a space is formed on the rear surface side of thesubstrate 200 and the space serves as achannel 601 of a gas. A portion of a nitrogen (N2) gas supplied from the N2 tank 620 is supplied to thesupply tank 610 via thevalve 630, thepipe 631, and apipe 634 and the rest thereof to thechannel 601 of theholder 652 via thevalve 630, thepipe 631, and apipe 636. By causing the N2 gas to flow to the rear surface of thesubstrate 200 held in the standby position, the substrate temperature is controlled. By passing the N2 gas through thechannel 601 in this manner, the rear surface of thesubstrate 200 is cooled. The silicon wafer as thesubstrate 200 has high thermal conductivity and thus, the substrate temperature can be cooled to a temperature comparable to the gas temperature by causing the gas to flow to the rear surface of thesubstrate 200 for a sufficiently long time. Other portions of the configuration are the same as inFIG. 4 . Thus, theseed film 250 is cooled by cooling the rear surface of thesubstrate 200 using the N2 gas supplied from the N2 tank 620, which is the same supply source as the N2 gas used for bubbling. - It is preferable that the substrate be cooled to a temperature cooler than the temperature of the
plating solution 670 by 10° C. or more. If, for example, the temperature of theplating solution 670 is 25° C., the substrate temperature may be controlled to a range between a temperature at which condensation of thesubstrate 200 is not caused (for example, 5° C.) and 15° C. If the rate of dissolution of theseed film 250 in theplating solution 670 at 25° C. is 100%, the rate of dissolution of theseed film 250 in theplating solution 670 can be suppressed to 56% by cooling the substrate temperature to 15° C. If the substrate temperature is cooled to 5° C., the rate of dissolution of theseed film 250 in theplating solution 670 can be suppressed to about 30%. That is, by cooling the substrate temperature to 15° C. or below, the rate of dissolution can be reduced to almost the half. The cooling position is preferably as close to theplating solution 670 as possible. By making the cooling position as close to theplating solution 670 as possible, the time necessary for thesubstrate 200 to come into contact with theplating solution 670 after the cooling can be reduced to maintain the cooling effect. - In
FIG. 3C , as the N2 bubbling and electro-plating process (S114), theseed film 250 cooled by the N2 gas is soaked in the plating solution in theplating bath 650 to which theplating solution 670 bubbled by the N2 gas is supplied, to perform electro-plating using theseed film 250 as a cathode. In this case, control is exercised so that the N2 tank 620 continues to supply the N2 gas at least since before electro-plating is started (before the substrate is put into the plating solution) until when electro-plating is started. Further, the N2 tank 620 may continue to supply the N2 gas since before electro-plating is started (before the substrate is put into the plating solution) until electro-plating is completed. -
FIG. 11 is a conceptual diagram exemplifying the configuration of the plating apparatus in which the substrate is held in the plating position according to the second embodiment. In the second embodiment, when the surface of thesubstrate 200 is put into theplating bath 650 filled with theplating solution 670 being N2-bubbled, thesubstrate 200 whoseseed film 250 has been cooled by the above cooling process is put into theplating bath 670 while rotating thesubstrate 200. Then, the surface of thesubstrate 200 is soaked in theplating solution 670 while rotating thesubstrate 200 and a current of a predetermined current density is passed from thecurrent supply device 612 with theanode electrode 654 set as an anode and theseed film 250 of thesubstrate 200 to be a plating surface set as a cathode to perform electro-plating. As described above, when thesubstrate 200 is put into theplating solution 670, it is better to tilt the substrate by a predetermined angle so that no air is left between thesubstrate 200 and theplating solution 670. - When electro-plating is performed, the cooled
seed film 250 may further be put into theplating bath 650 filled with the plating solution 670 (soaked into theplating solution 670 from outside the plating solution 670) in a state in which a voltage is applied to theseed film 250 from thecurrent supply device 612 while performing N2 bubbling. As described above, a voltage lower than a voltage when electro-plating is started after the substrate is put into theplating bath 650 filled with theplating solution 670 is suitably applied to theseed film 250 when the substrate is soaked in the plating solution 670 (soaked into theplating solution 670 from outside the plating solution 670). - Thus, as described above, by cooling the substrate in addition to N2 bubbling for the
plating solution 670, when the surface of thesubstrate 200 is put into theplating bath 650, dissolution of theseed film 250 can further be suppressed. - In the second embodiment, before the
substrate 200 is put into theplating bath 650, for example, thesubstrate 200 is cooled in the standby position shown inFIG. 10 and cooling is stopped when thesubstrate 200 is put into theplating bath 650, but the present embodiment is not limited to this. -
FIGS. 12A and 12B are conceptual diagrams exemplifying a technique for putting the substrate into a plating bath according to a third embodiment. As shown inFIG. 12A , like in the second embodiment, the N2 gas supplied from the N2 tank 620 is caused to flow while touching the rear surface of thesubstrate 200 before thesubstrate 200 is put into theplating bath 650. In the third embodiment, as shown inFIG. 12B , thesubstrate 200 is put into theplating bath 650 while being cooled. With this configuration, the cooling effect can better be maintained. Moreover, it is allowed to continue to cool thesubstrate 200 during actual plating. - According to the above embodiments, as described above, occurrences of incompletely plated films after electro-plating and defects can be reduced while suppressing dissolution of a seed film.
- In the foregoing, the embodiments have been described with reference to concrete examples. However, the embodiments are not limited to such concrete examples. In the above embodiments, the low-
k film 220 is used as a dielectric film, but the dielectric film is not limited to the low-k film 220 and other insulating materials may also be used. For example, a silicon oxide (SiO2) film may be used. The rear surface of thesubstrate 200 may indirectly be cooled, instead of cooling directly. The embodiments describe a damascene wire, but a dual damascene wire can also achieve similar effects. Particularly, the embodiments are suitable for Cu embedding in a via hole in dual damascene wire formation. In the above examples, the N2 gas supplied from the N2 tank 620 is branched to theholder 652 side and thesupply tank 610 of the plating solution, but the embodiments are not limited to such examples. For example, the N2 gas after being supplied to theholder 652 side and discharged from theholder 652 may be supplied to thesupply tank 610 for N2 bubbling. - Concerning the thickness of inter-level dielectrics and the size, shape, number and the like of openings, what is needed for semiconductor integrated circuits and various semiconductor elements can be selected and used as appropriate.
- In addition, methods for fabricating an electronic component represented by all methods for fabricating a semiconductor device including the elements of the embodiments and obtainable by arbitrarily changing the design by a person skilled in the art are included in the scope of the embodiments.
- While techniques normally used in the semiconductor industry such as a photolithography process and cleaning before and after treatment are not described for convenience of description, it is needless to say that such techniques are included in the scope of the embodiments.
- While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and devices described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and devices described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Claims (20)
1. A method for fabricating an electronic component, comprising:
forming a seed film above a substrate; and
performing electro-plating by soaking the seed film in a plating solution in a plating bath to which the plating solution being bubbled by a nitrogen gas is supplied, using the seed film as a cathode.
2. The method according to claim 1 , further comprising:
cooling the seed film by supplying a nitrogen gas to a rear surface of the substrate from a same supply source as the nitrogen gas used for a bubbling.
3. The method according to claim 2 , wherein the nitrogen gas after being supplied to the rear surface of the substrate is used for the bubbling of the plating solution.
4. The method according to claim 1 , wherein when the electro-plating is performed, the seed film is soaked in the plating solution from outside the plating solution in a state in which a voltage is applied to the seed film.
5. The method according to claim 1 , wherein a voltage lower than a voltage when the electro-plating is started after the seed film is soaked in the plating solution is applied to the seed film when the seed film is soaked in the plating solution from outside the plating solution.
6. The method according to claim 1 , wherein the seed film is formed by using copper (Cu).
7. The method according to claim 1 , wherein the plating solution supplied to the plating bath continues to be bubbled by the nitrogen gas since before the electro-plating is started at least until when the electro-plating is started.
8. The method according to claim 1 , wherein the plating solution supplied to the plating bath continues to be bubbled by the nitrogen gas since before the electro-plating is started until the electro-plating is completed.
9. The method according to claim 1 , further comprising:
bubbling the plating solution inside a supply tank by the nitrogen gas; and
supplying the plating solution that continues to be bubbled inside the supply tank to the plating bath.
10. The method according to claim 9 , wherein the plating solution that continues to be bubbled inside the supply tank circulates through the supply tank and the plating bath since before the electro-plating is started until the electro-plating is completed.
11. The method according to claim 9 , wherein a portion of the plating solution overflowing from the plating bath is bubbled inside the supply tank by the nitrogen gas and then supplied to the plating bath again.
12. An electro-plating apparatus, comprising:
a holder configured to hold a substrate to be plated;
a plating bath in which an anode member is arranged;
a supply tank configured to supply a plating solution being bubbled by a nitrogen gas to the plating bath;
a nitrogen gas supply unit configured to supply the nitrogen gas into the supply tank; and
a current supply device configured to pass a current between the substrate to be plated and the anode member.
13. The apparatus according to claim 12 , wherein the holder has a channel, through which a nitrogen gas supplied from the nitrogen gas supply unit passes while the substrate to be plated is held, formed in a rear surface side of the substrate held.
14. The apparatus according to claim 13 , wherein the rear surface of the substrate to be plated is cooled by the nitrogen gas being passed through the channel.
15. The apparatus according to claim 12 , wherein a seed film is formed on the substrate to be plated, and the seed film is soaked into the plating solution from outside the plating solution by the holder in a state in which a voltage is applied to the seed film by the current supply device.
16. The apparatus according to claim 15 , wherein the current supply device applies a voltage, lower than the voltage when electro-plating is started after the seed film is soaked in the plating solution, to the seed film when the seed film is soaked into the plating solution from outside the plating solution.
17. The apparatus according to claim 15 , wherein the nitrogen gas supply unit is controlled to continue to supply the nitrogen gas into the supply tank since before the seed film is soaked in the plating solution at least until when electro-plating is started.
18. The apparatus according to claim 15 , wherein the nitrogen gas supply unit is controlled to continue to supply the nitrogen gas into the supply tank since before the seed film is soaked in the plating solution until the electro-plating is completed.
19. The apparatus according to claim 12 , further comprising:
a mechanism configured to cause the plating solution continuing to be bubbled by the nitrogen gas inside the supply tank to circulate between the supply tank and the plating bath since before electro-plating is started until the electro-plating is completed.
20. The apparatus according to claim 19 , wherein a portion of the plating solution overflowing from the plating bath is bubbled inside the supply tank by the nitrogen gas and then supplied to the plating bath again.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010-128060 | 2010-06-03 | ||
JP2010128060A JP2011252218A (en) | 2010-06-03 | 2010-06-03 | Method for fabricating electronic component and electro-plating apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
US20110297551A1 true US20110297551A1 (en) | 2011-12-08 |
Family
ID=45063639
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/050,454 Abandoned US20110297551A1 (en) | 2010-06-03 | 2011-03-17 | Method for fabricating electronic component and electro-plating apparatus |
Country Status (2)
Country | Link |
---|---|
US (1) | US20110297551A1 (en) |
JP (1) | JP2011252218A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9816193B2 (en) * | 2011-01-07 | 2017-11-14 | Novellus Systems, Inc. | Configuration and method of operation of an electrodeposition system for improved process stability and performance |
US9816196B2 (en) | 2012-04-27 | 2017-11-14 | Novellus Systems, Inc. | Method and apparatus for electroplating semiconductor wafer when controlling cations in electrolyte |
US20220205126A1 (en) * | 2020-12-29 | 2022-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plating apparatus for plating semiconductor wafer and plating method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020027082A1 (en) * | 1999-09-01 | 2002-03-07 | Andricacos Panayotis C. | Method of improving contact reliability for electroplating |
US20090068400A1 (en) * | 2007-09-10 | 2009-03-12 | Lotfi Ashraf W | Micromagnetic Device and Method of Forming the Same |
-
2010
- 2010-06-03 JP JP2010128060A patent/JP2011252218A/en active Pending
-
2011
- 2011-03-17 US US13/050,454 patent/US20110297551A1/en not_active Abandoned
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020027082A1 (en) * | 1999-09-01 | 2002-03-07 | Andricacos Panayotis C. | Method of improving contact reliability for electroplating |
US20090068400A1 (en) * | 2007-09-10 | 2009-03-12 | Lotfi Ashraf W | Micromagnetic Device and Method of Forming the Same |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9816193B2 (en) * | 2011-01-07 | 2017-11-14 | Novellus Systems, Inc. | Configuration and method of operation of an electrodeposition system for improved process stability and performance |
US10745817B2 (en) | 2011-01-07 | 2020-08-18 | Novellus Systems, Inc. | Configuration and method of operation of an electrodeposition system for improved process stability and performance |
US9816196B2 (en) | 2012-04-27 | 2017-11-14 | Novellus Systems, Inc. | Method and apparatus for electroplating semiconductor wafer when controlling cations in electrolyte |
US20220205126A1 (en) * | 2020-12-29 | 2022-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plating apparatus for plating semiconductor wafer and plating method |
US11585008B2 (en) * | 2020-12-29 | 2023-02-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plating apparatus for plating semiconductor wafer and plating method |
Also Published As
Publication number | Publication date |
---|---|
JP2011252218A (en) | 2011-12-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20220336271A1 (en) | Doped selective metal caps to improve copper electromigration with ruthenium liner | |
US8435828B2 (en) | Method of manufacturing semiconductor device | |
JP5683038B2 (en) | Deposition method | |
TWI436428B (en) | Method for forming ruthenium metal cap layers | |
US7795142B2 (en) | Method for fabricating a semiconductor device | |
WO2007061134A1 (en) | Method for forming porous insulating film, apparatus for manufacturing semiconductor device, method for manufacturing semiconductor device and semiconductor device | |
US20050272258A1 (en) | Method of manufacturing a semiconductor device and semiconductor device | |
US6930035B2 (en) | Semiconductor device fabrication method | |
US20110297551A1 (en) | Method for fabricating electronic component and electro-plating apparatus | |
US10128147B2 (en) | Interconnect structure | |
US20070173056A1 (en) | Semiconductor device fabrication method and polishing apparatus | |
JP5823359B2 (en) | Manufacturing method of semiconductor device | |
JP4746443B2 (en) | Manufacturing method of electronic parts | |
US7981793B2 (en) | Method of forming a metal directly on a conductive barrier layer by electrochemical deposition using an oxygen-depleted ambient | |
TWI653367B (en) | Electrochemical deposition on a workpiece having high sheet resistance | |
TWI609095B (en) | Methods for manganese nitride integration | |
US7199044B2 (en) | Method for manufacturing semiconductor device | |
JP2006024668A (en) | Process for fabricating semiconductor device | |
JP2011124472A (en) | Method of manufacturing semiconductor device | |
JP2006120664A (en) | Method for manufacturing semiconductor device | |
JP2006060011A (en) | Method of manufacturing semiconductor device | |
KR100576046B1 (en) | method of forming a copper wiring in a semiconductor device | |
JP2005340604A (en) | Process for fabricating semiconductor device | |
JP2006024667A (en) | Process for fabricating semiconductor device | |
JP2006147895A (en) | Manufacturing method of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: KABUSHIKI KAISHA TOSHIBA, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MORITA, TOSHIYUKI;WAKATSUKI, SATOSHI;SIGNING DATES FROM 20110309 TO 20110404;REEL/FRAME:026181/0621 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |