KR100576046B1 - method of forming a copper wiring in a semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming a copper metal wiring of a semiconductor device, in order to overcome the limitations of copper embedding into the dual damascene pattern formed in the insulating film as the device becomes an ultra-fine structure in the technique using copper as metal wiring. In order to form a chemical reinforcement layer and to embed a dual damascene pattern using a copper precursor, a solution such as pure water is used to prevent electrical specific deterioration of the copper wiring by the chemical reinforcement layer having a high resistivity value present on the surface of the copper. The wet cleaning and spin-drying process removes the chemical reinforcing layer on the surface of copper completely and conducts the copper electroplating process to maintain the low resistivity inherent in copper and improve the properties of copper metal wiring. Disclosed is a metal wiring forming method.

Copper Metal Wiring, Copper Precursor, Chemical Enhancer Layer

Description

Method of forming a copper wiring in a semiconductor device             

1A to 1E are cross-sectional views sequentially illustrating a method of forming a copper metal wiring of a semiconductor device according to the present invention.

<Description of the symbols for the main parts of the drawings>

10: lower insulating film 20: lower metal layer

30 interlayer insulating film 40 diffusion barrier film

50: chemical strengthening layer 60: CECVD copper layer

70 copper plating layer

The present invention relates to a method for forming a copper metal wiring of a semiconductor device, and in particular, it is possible to realize the reproducibility of the copper deposition process by establishing a metal organic chemical vapor deposition (MOCVD) process technology using a copper precursor. The present invention also relates to a method for forming a copper metal wiring of a semiconductor device capable of obtaining an excellent thin film copper thin film.

As the semiconductor industry moves to Ultra Large Scale Integration (ULSI), the geometry of the device continues to shrink to the sub-half-micron region, while improving circuitry in terms of performance and reliability. Circuit density is increasing. In response to these demands, the copper thin film has a higher melting point than aluminum in forming metal wirings of the semiconductor device, and thus has high resistance to electro-migration (EM), thereby improving reliability of the semiconductor device and providing a specific resistance. This low rate can increase the signal transfer rate, making it a useful interconnect material for integration circuits.

In the copper metal wiring formation method, the copper deposition process is an important process for realizing high-speed devices and high-density devices, such as physical vapor deposition (PVD), electroplating, and electroless-plating. And various deposition techniques such as organometallic chemical vapor deposition (MOCVD). Among these copper deposition techniques, copper deposition by organometallic chemical vapor deposition is highly influenced by copper precursors, and therefore, copper precursors must be developed to facilitate deposition, and a delivery system capable of stably transporting these copper precursors is required. ) Is essential.                         

Copper deposition by organometallic chemical vapor deposition is performed using a bubbler-type Liquid Delivery System (hereinafter referred to as "LDS"), or Direct Liquid Injection (hereinafter referred to as DLI). Use the same LDS or LDS such as Control Evaporation Mixer (hereafter referred to as CEM), and other LDSs having an orifice or spray vaporizer. The same LDS is being used. Copper deposition is achieved by decomposing compounds containing copper metal called precursors in these LDS. Copper precursors for organometallic chemical vapor deposition are low vapor pressure 1,1,1,5,5,5-hexafluoro-2,4-pentadioneto-kappa (II) 1,1,1,5,5, 5-hexafluoro-2,4-pentadionato-copper (II); Since the development of copper II (CuII) compounds such as Cu (hfac) 2 compounds, copper II has a higher vapor pressure than the compounds, which leads to faster deposition rates and enables high purity copper thin film deposition at low temperatures of 150 to 250 ° C. I-valent (CuI) compounds have been developed. Among the various copper I compounds developed to date, 1,1,1,5,5,5-hexafluoro-2,4-pentadioneto (trimethylvinylsilane) -kappa (I) 1,1,1 , 5,5,5-hexafluoro-2,4-pentadionato (trimethylvinylsilane) -copper (I); Hereinafter, a compound called (hfac) Cu (TMVS) is a representative organometallic chemical vapor deposition copper precursor which is present in the liquid phase at room temperature and enables to deposit a high purity copper thin film at low temperature. However, despite these advantages, (hfac) Cu (TMVS) compounds have a problem of degradation when stored at room temperature, which makes it difficult to reproduce the process when applied to the manufacturing process of semiconductor devices. Among the precursors, the vapor pressure is high, but it is difficult to secure reproducibility unless a new LDS capable of transporting stably is developed because the vapor pressure is low to ensure reproducibility in the existing LDS. In addition, the (hfac) Cu (TMVS) compound has a very narrow vaporization temperature and a condensation temperature, so it is difficult to maintain a very constant temperature. In the "Schumacher" company, a stabilizer is used It has been announced that the (hfac) Cu (TMVS) compound can be used stably for one year.

In order to solve the problems of the (hfac) Cu (TMVS) compound, a (hfac) Cu (DMB) compound was developed as a precursor. The (hfac) Cu (DMB) compound is a new compound developed using 3,3-dimethyl-1-butene (hereinafter referred to as DMB) as a Lewis base ligand. Instead of the methyl group of VTMS, it has higher vapor pressure than (hfac) CuTMVS because low molecular weight and high vapor pressure DMB is used as Lewis base ligand. Therefore, the (hfac) Cu (DMB) compound is a precursor having a great advantage because it can greatly improve the poor deposition rate, which is one of the biggest problems of the MOCVD Cu precursor. However, until now, the conventional LDS-organic metal chemical vapor deposition process technology using (hfac) Cu (DMB) precursor has not been established and is not commercialized.

In order to realize the reproducibility of the copper deposition process, recently, chemical enhancement chemical vapor deposition (CEM) using chemical enhancers such as iodine is a limitation of the organometallic chemical vapor deposition process using copper precursors. It is proposed as an alternative to overcome. But. The CECVD copper layer has a disadvantage in that excellent copper thin films cannot be obtained due to the very high resistance of the chemical reinforcing agent because the chemical reinforcing agent such as iodine remains on the surface of the copper film.

Accordingly, the present invention effectively removes a chemical reinforcing layer such as iodine present on the surface of the CECVD copper layer by using wet cleaning to maintain a low resistivity inherent in copper and to improve the physical properties of the CECVD copper layer. It is an object to provide a method for forming metal wiring.

Copper metal wiring forming method of a semiconductor device according to the present invention for achieving this object is

Characterized in that comprises a.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1A to 1E are cross-sectional views sequentially illustrating a method of forming a copper metal wiring of a semiconductor device.                     

Referring to FIG. 1A, a lower insulating film 10 and a lower metal layer 20 are formed on a semiconductor substrate on which various elements for forming a semiconductor device are formed, and an interlayer insulating film 30 is formed. Thereafter, a dual damascene pattern for wiring with the lower metal layer 20 is formed on the interlayer insulating layer 30. When the dual damascene pattern 30 is formed, the lower metal layer 20 is exposed, and a cleaning process is performed to remove the natural oxide film and contaminants formed on the surface of the lower metal layer 20. Subsequently, a diffusion barrier 40 is formed on the interlayer insulating layer 30 including the dual damascene pattern.

The interlayer insulating layer 30 is formed using an insulating material having a low dielectric constant value, and the dual damascene pattern is formed of a contact hole and a trench. After the dual damascene pattern is formed, the cleaning process may be performed using RF plasma or reactive cleaning depending on the type of the lower metal layer. When the lower metal layer is tungsten (W), aluminum (Al), or the like, RF plasma is used, and when the lower metal layer is copper (Cu), a reactive cleaning method is applied. The diffusion barrier 40 is ionized PVD TiN, CVD TiN, MOCVD TiN, ionized PVD Ta, ionized PVD TaN, CVD Ta, CVD TaN, CVD WN, CVD TiAlN, CVD TiSiN, CVD TaSiN, PVD TiAlN, PVD TiSiN, PVD TaSiN It forms using at least any one.

Referring to FIG. 1B, a chemical enhancer layer 50 is formed on the diffusion barrier layer 40. In the process of forming the chemical enhancer layer 50, a plasma treatment process may be added before the chemical enhancer layer 50 is formed in order to facilitate the adsorption of the chemical enhancer layer 50 uniformly onto the diffusion barrier layer 40. do. In addition, a seed layer of titanium (Ti), aluminum (Al), copper (Cu), or the like may be deposited before the chemical reinforcing layer 50 is formed. In the case of forming such a seed layer, the thickness of the seed layer is formed in the range of 5 to 500 kPa.

The chemical reinforcing layer 50 is a liquid compound containing iodine (I), Hhfac 1/2 H ₂ 0, Hhfac, TMVS, pure iodine gas (pure I ₂ ), iodine containing gas, water vapor, water vapor, Group 7 elements on the periodic table. It is formed by chemical treatment using any one of the liquid state and gaseous state of F, Cl, Br, I, At as a catalyst. At this time, the treatment time is performed in the range of 1 to 600 seconds and the chemical pretreatment temperature is in the temperature range of -20 to 300 ℃.

Referring to FIG. 1C, after forming the chemical enhancer layer 50, the CECVD copper layer 60 is formed using MOCVD Cu equipment using various LDSs and various precursors. Even when the CECVD copper layer 60 is formed, the chemical reinforcing layer 50 continues to rise to the surface of the CECVD copper layer 60, and therefore, even after the CECVD copper layer 60 is formed, the chemical reinforcing layer 50 is the CECVD copper layer. It exists in the surface of 60.

In the above, the precursor for forming the CECVD copper layer 60 uses any one of all kinds of copper precursor using hfac, such as (hfac) CuVTMOS series, (hfac) CuDMB series, (hfac) CuTMVS series, The instrument applies all Vaporizers with direct liquid injection (DLI), CEM, orifice and spray. On the other hand, the CECVD copper layer 60 is formed by performing selective partial fill deposition or seed layer deposition to fill only the damascene pattern.                     

Referring to FIG. 1D, the chemical reinforcement layer 50 that has surfaced on the CECVD copper layer 60 is removed by wet cleaning.

In the above, the wet cleaning may be performed at a temperature of −20 to 50 ° C. using at least one of pure water (DI), pure water + H ₂ SO ₄ , BOE, and pure water + HF, which may easily remove the chemical reinforcing layer 50. In the range of 1 to 600 seconds. In addition, wet cleaning is performed while rotating the wafer, and the rotation speed of the wafer is in the range of 1 to 3000 rpm. After the cleaning process, spin drying is performed in a temperature range of 50 to 300 ° C., where the rotation speed of the wafer is in the range of 1 to 2000 rpm.

The chemical enhancer layer 50 has a high resistivity of 5.85XE6 microOhmcm. Therefore, if the copper electroplating process is performed without removing the chemical reinforcing layer present on the copper surface, the copper wiring inside the dual damascene pattern has high resistance. In this case, since the purpose of using copper as a wiring cannot be achieved, the chemical reinforcing layer must be completely removed by the above-described wet cleaning, thereby achieving the purpose of using copper as wiring.

Referring to FIG. 1E, the copper plating layer 70 is formed on the CECVD copper layer 60 from which the chemical enhancer layer 50 is removed by a copper electroplating Cu to completely fill the dual damascene pattern with copper. After the hydrogen reduction heat treatment, a chemical mechanical polishing (CMP) process is performed to form a copper wiring.

As described above, the present invention can easily embed a damascene pattern having an ultra-fine structure with copper by using a copper precursor, and the electrical characteristics of the device by completely removing a chemical reinforcing layer having high resistivity by wet cleaning and spin drying processes. Has the effect of maximizing.

Claims (12)

Forming an interlayer insulating film on the semiconductor substrate on which the lower insulating film and the lower metal wiring are formed, patterning a predetermined region of the interlayer insulating film to form a damascene pattern, and then cleaning the exposed surface of the lower metal wiring; Forming a diffusion barrier on the interlayer insulating layer including the damascene pattern; Forming a chemical reinforcing layer on the diffusion barrier layer; Forming a CECVD copper layer on the chemical enhancer layer by a chemical vapor deposition process; Removing the chemical reinforcing layer on the surface of the CECVD copper layer by wet cleaning and spin dry; And copper electroplating on the CECVD copper layer, performing annealing, and then performing a chemical mechanical polishing process to form a copper metal wiring. The method of claim 1, The damascene pattern is formed in a dual damascene method, copper metal wire forming method of a semiconductor device. The method of claim 1, And the interlayer insulating film is formed using an insulating material having a low dielectric constant value. The method of claim 1, The cleaning performed after the damascene pattern is formed by using RF plasma when the lower metal layer is any one of W and Al, and using a reactive cleaning process when the lower metal layer is copper. Copper metal wiring formation method of a semiconductor device. The method of claim 1, The diffusion barrier layer is at least of ionized PVD TiN, CVD TiN, MOCVD TiN, ionized PVD Ta, ionized PVD TaN, CVD Ta, CVD TaN, CVD WN, CVD TiAlN, CVD TiSiN, CVD TaSiN, PVD TiAlN, PVD TiSiN, PVD TaSiN The copper metal wiring formation method of a semiconductor element characterized by forming any one. The method of claim 1, And forming a chemical reinforcing layer easily after forming the diffusion barrier layer. The method of claim 1, And forming a seed layer having a thickness of 5 to 500 kV using any one of Ti, Al, and Cu after forming the diffusion barrier. The method of claim 1, The chemical reinforcing agent layer is a liquid or gaseous state of pure iodine of any one of Group 7 elements F, Cl, Br, I, At on the periodic table of the iodine (I) -containing liquid compound, Hhfac 1/2 H ₂ 0, Hhfac, TMVS A method for forming a copper metal wiring of a semiconductor device, characterized in that formed in a temperature range of -20 to 300 ℃ for 1 to 600 seconds using any one of a gas (pure I ₂ ), iodine-containing gas and water vapor as a catalyst. The method of claim 1, The CECVD copper layer is formed using any one of precursors of (hfac) CuVTMOS series, (hfac) CuDMB series, and (hfac) CuTMVS series. The method of claim 1, The CECVD copper layer is MOCVD in an organic chemical vapor deposition apparatus having a vaporizer of any one of a direct liquid injection (DLI), a control evolution mixer (CEM), an orifice method and a spray method. The copper metal wiring formation method of a semiconductor element characterized by forming by the method. The method of claim 1, The wet cleaning is performed in a temperature range of -20 to 50 ° C. using any one of pure water (DI), pure water + H ₂ SO ₄ , BOE, and pure water + HF as a cleaning solution while rotating the wafer in the range of 1 to 3000 rpm. Copper metal wiring forming method of a semiconductor device, characterized in that carried out for about 600 seconds. The method of claim 1, The spin-drying is performed in a temperature range of 50 to 300 ° C. while rotating the wafer in a range of 1 to 2000 rpm.

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