US20110058394A1 - Single-Ended Forward Converter - Google Patents

Single-Ended Forward Converter Download PDF

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Publication number
US20110058394A1
US20110058394A1 US12/584,404 US58440409A US2011058394A1 US 20110058394 A1 US20110058394 A1 US 20110058394A1 US 58440409 A US58440409 A US 58440409A US 2011058394 A1 US2011058394 A1 US 2011058394A1
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Prior art keywords
terminal
driving
lus
resistor
channel fet
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US12/584,404
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Chao-Cheng Lu
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Priority to US12/584,404 priority Critical patent/US20110058394A1/en
Priority to US12/932,579 priority patent/US8193933B2/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/1557—Single ended primary inductor converters [SEPIC]

Definitions

  • the present invention related to enhancement mode Lus FET for single-ended forward converter, especially Lus FET with novel structures replacing prior art static shielding diode (SSD), or body diode, or intrinsic diode, in prior art FET may be with polarity reversed are taught by the ROC. TW. Pat. Nos. 1295,527; 1295,528; 1301,013; 1301,014; 1301,015.
  • the Single-ended forward converter may be achieved with two Lus N-Channel FET, or two Lus P-Channel FET.
  • a structure of the prior art single-ended forward converter circuit has a pulse generator PG, a switching element SW, a high frequency transformer T 1 , a primary winding VP and secondary winding VS of the high frequency transformer T 1 , first terminal A and second terminal B of the secondary winding VS, a pair of first and second switching element F 1 , F 2 , a first driving circuit R 1 and ZD 1 , a second driving circuit R 2 and ZD 2 , a inductor L 1 , a capacitor C 1 , a load LD, and DC voltage output terminal C, D.
  • first driving element comprises the series-connected circuit of the voltage drop resistor R 1 and zener diode ZD 1
  • second driving element comprises the series-connected circuit of the voltage drop resistor R 2 and zener diode ZD 2 .
  • the present invention is proposed the following object:
  • the first object of the present invention to provide Lus FET for a single-ended forward converter, in which the converter simplicity is improved.
  • the second object of the present invention provide a Lus FET for single-ended forward converter, can be eliminate the destruction of prior art FET, and windings due to a large current.
  • the Lus FET is proposed in the present invention, which provides higher efficiency in single-ended forward converter.
  • FIG. 1 shows the structures of a prior art N-Channel FET.
  • FIG. 2 shows the structures of a Lus N-Channel FET.
  • FIG. 3 shows the structures of a prior art P-Channel FET.
  • FIG. 4 shows the structures of a Lus P-Channel FET.
  • FIG. 5 shows the structures of a prior art FET for single-ended forward converter.
  • FIGS. 6A and 6B shows the single-ended forward converter of the present invention use two Lus N-Channel FET.
  • FIGS. 7A and 7B shows the single-ended forward converter of the present invention use two Lus P-Channel FET.
  • FIG. 1 shows the structures of a prior art N-Channel FET, a N-junction of the SSD connected to drain of the prior art N-Channel FET, a P-junction of the SSD connected to source of the prior art N-Channel FET.
  • FIG. 2 shows the structures of a Lus N-Channel FET, a N-junction of the SSD connected to source of the Lus N-Channel FET, a P-junction of the SSD connected to drain of the Lus N-Channel FET.
  • FIG. 3 shows the structures of a prior art P-Channel FET, a N-junction of the SSD connected to source of the prior art P-Channel FET, a P-junction of the SSD connected to drain of the prior art P-Channel FET.
  • FIG. 4 shows the structures of a Lus P-Channel FET, a N-junction of the SSD connected to drain of the Lus P-Channel FET, a P-junction of the SSD connected to source of the P-Channel FET.
  • a structure of the present invention single-ended forward converter circuit has a pulse generator PG, switching element SW, a high frequency transformer T 1 , a primary winding VP and secondary winding VS of the high frequency transformer T 1 , first terminal A and second terminal B of the secondary winding VS, a pair of first and second switching element Q 1 , Q 2 , a first driving circuit R 1 , ZD 1 , a second driving circuit R 2 , ZD 2 , a inductor L 1 , a capacitor C 1 , a load LD, and DC voltage output terminal C, D.
  • Each of the first and second switching element Q 1 , Q 2 comprises a pair Lus N-Channel FET shown in FIGS. 6A and 6B , a first driving circuit comprises the series-connected circuit of the first voltage drop resistor R 1 and first zener diode ZD 1 , a second driving circuit comprises the series-connected circuit of second the voltage drop resistor R 2 and second zener diode ZD 2 .
  • the first and second driving circuit for driving first and second switching element Q 1 , Q 2 in FIGS. 7A , 7 B, the first driving circuit comprises a first driving resistor R 1 and second driving resistor R 2 for driving first switching element U 1 , the second driving circuit comprises a third driving resistor R 3 and a fourth driving resistor R 4 for driving second switching element U 2 , the operation principle of the driving circuit of FIGS. 6A , 6 B and FIGS. 7A , 7 B is same, both of the driving circuit can be replace, and but should not be limit.

Abstract

A single-ended forward converter of the present invention, has first and second switching element comprises a pair Lus N-Channel FET, a first driving circuit comprises the series-connected circuit of the first voltage drop resistor and first zener diode for driving first Lus N-Channel FET, a second driving circuit comprises the series-connected circuit of the second voltage drop resistor and second zener diode for driving second Lus N-Channel FET.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention related to enhancement mode Lus FET for single-ended forward converter, especially Lus FET with novel structures replacing prior art static shielding diode (SSD), or body diode, or intrinsic diode, in prior art FET may be with polarity reversed are taught by the ROC. TW. Pat. Nos. 1295,527; 1295,528; 1301,013; 1301,014; 1301,015. According to such philosophy of the present invention, the Single-ended forward converter may be achieved with two Lus N-Channel FET, or two Lus P-Channel FET.
  • 2. Description of Related Art
  • As shown in FIG. 5, a structure of the prior art single-ended forward converter circuit, has a pulse generator PG, a switching element SW, a high frequency transformer T1, a primary winding VP and secondary winding VS of the high frequency transformer T1, first terminal A and second terminal B of the secondary winding VS, a pair of first and second switching element F1, F2, a first driving circuit R1 and ZD1, a second driving circuit R2 and ZD2, a inductor L1, a capacitor C1, a load LD, and DC voltage output terminal C, D.
  • Each of the first and second switching element F1, F2, comprises a prior art N-Channel FET shown in FIG. 5, first driving element comprises the series-connected circuit of the voltage drop resistor R1 and zener diode ZD1, second driving element comprises the series-connected circuit of the voltage drop resistor R2 and zener diode ZD2.
  • As shown in FIG. 5, when the positive of secondary winding VS in the terminal A, terminal B is negative, the switching element F1 is turned on, the switching element F2 is turned off, the path of the current flow is from terminal A of the secondary winding VS, though static shielding diode D2 of the switching element F2, switching element F1, and back to terminal B of the secondary winding VS, the possibility that F1, F2, may be burnout by current of the prior art N-Channel FET.
    • SUMMARY OF THE INVENTION
  • In order to provide Lus FET that may elevate the efficiency of single-ended forward converter, the present invention is proposed the following object:
  • The first object of the present invention to provide Lus FET for a single-ended forward converter, in which the converter simplicity is improved.
  • The second object of the present invention provide a Lus FET for single-ended forward converter, can be eliminate the destruction of prior art FET, and windings due to a large current.
  • According to the defects of the prior art technology discussed above, a novel solution, the Lus FET is proposed in the present invention, which provides higher efficiency in single-ended forward converter.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 shows the structures of a prior art N-Channel FET.
  • FIG. 2 shows the structures of a Lus N-Channel FET.
  • FIG. 3 shows the structures of a prior art P-Channel FET.
  • FIG. 4 shows the structures of a Lus P-Channel FET.
  • FIG. 5 shows the structures of a prior art FET for single-ended forward converter.
  • FIGS. 6A and 6B shows the single-ended forward converter of the present invention use two Lus N-Channel FET.
  • FIGS. 7A and 7B shows the single-ended forward converter of the present invention use two Lus P-Channel FET.
    •  DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • FIG. 1 shows the structures of a prior art N-Channel FET, a N-junction of the SSD connected to drain of the prior art N-Channel FET, a P-junction of the SSD connected to source of the prior art N-Channel FET.
  • FIG. 2 shows the structures of a Lus N-Channel FET, a N-junction of the SSD connected to source of the Lus N-Channel FET, a P-junction of the SSD connected to drain of the Lus N-Channel FET.
  • FIG. 3 shows the structures of a prior art P-Channel FET, a N-junction of the SSD connected to source of the prior art P-Channel FET, a P-junction of the SSD connected to drain of the prior art P-Channel FET.
  • FIG. 4 shows the structures of a Lus P-Channel FET, a N-junction of the SSD connected to drain of the Lus P-Channel FET, a P-junction of the SSD connected to source of the P-Channel FET.
  • As shown in FIGS. 6A and 6B, a structure of the present invention single-ended forward converter circuit, has a pulse generator PG, switching element SW, a high frequency transformer T1, a primary winding VP and secondary winding VS of the high frequency transformer T1, first terminal A and second terminal B of the secondary winding VS, a pair of first and second switching element Q1, Q2, a first driving circuit R1, ZD1, a second driving circuit R2, ZD2, a inductor L1, a capacitor C1, a load LD, and DC voltage output terminal C, D.
  • Each of the first and second switching element Q1, Q2, comprises a pair Lus N-Channel FET shown in FIGS. 6A and 6B, a first driving circuit comprises the series-connected circuit of the first voltage drop resistor R1 and first zener diode ZD1, a second driving circuit comprises the series-connected circuit of second the voltage drop resistor R2 and second zener diode ZD2.
  • As shown in FIG. 6A, when the switching element SW is on, a current flowing from the DC power source PS to the primary winding VP, and a voltage is induced in the secondary winding VS, positive of secondary winding VS in the terminal A, terminal B is negative, the N-junction is positive of the first zener diode ZD1 of the first driving circuit, the P-junction is negative of the first zener diode ZD1 of the first driving circuit, the first switching element Q1 is turned on; the P-junction is positive of the second zener diode ZD2 of the second driving circuit, the N-junction is negative of the second zener diode ZD2 of the first driving circuit, the second switching element Q2 is turned off, the path of the current flows is from terminal A of the secondary winding VS though inductor L1, a load LD, first switching element Q1, and back to terminal B of the secondary winding VS.
  • As shown in FIG. 6B, when the switching element SW is turned Off, a voltage or counter electromotive force is develop in the inductor L1, the negative of secondary winding VS in the terminal A, terminal B is positive, the P-junction is positive of the first zener diode ZD1 of the first driving circuit, the N-junction is negative of the first zener diode ZD1 of the first driving circuit, the first switching element Q1 is turned off; the P-junction is negative of the second zener diode ZD2 of the second driving circuit, the N-junction is positive of the second zener diode ZD2 of the second driving circuit, the second switchin element Q2 is turned on, the path of the current flows is from inductor L1 terminal C of DC voltage output terminal though a load LD, second switching element Q2, and back to terminal A of the inductor L1.
  • As shown in FIG. 7A, when the positive of the terminal A of the secondary winding VS of the high frequency transformer T1, terminal B is negative, the first terminal is positive of the first driving resistor R1, the second terminal is negative of the first driving resistor R1, the second terminal of the first driver resistor R1 and the first terminal of the second driving resistor R2 connected together to gate of the first switching element U1, the first terminal is positive of the second driving resistor R2, the second terminal is negative of the second driving resistor R2 connected to terminal B of the secondary winding VS, the first switching element U1 is turned on, the first terminal is positive of the third driving resistor R3, the second terminal is negative of the third driving resistor R3, the second terminal of the third driver resistor R3 and the first terminal of the fourth driving resistor R4 connected together to gate of the second switching element U2, the first terminal is positive of the fourth driving resistor R4, the second terminal is negative of the fourth driving resistor R4 and connected to terminal B of the secondary winding VS, the second switching element U2 is turned off, the path of the current flow is from terminal A of secondary winding Vs though the switching element U1, a inductor L1, a load LD and back to terminal B of the secondary winding VS of high frequency transformer T1.
  • As shown in FIG. 7B, when the negative of the terminal A of the secondary winding VS of the high frequency transformer T1, the first terminal is negative of the first driving resistor R1, the second terminal is positive of the first driving resistor R1, the second terminal of the first driver resistor R1 and the first terminal of the second driving resistor R2 connected together to gate of the first switching element U1, the first terminal is negative of the second driving resistorR2, the second terminal is positive of the second driving resistor R2, the first switching element U1 is turned off; the first terminal is negative of the third driving resistor R3, the second terminal is positive of the third driving resistor R3, the second terminal of the third driver resistor R3 and the first terminal of the fourth driving resistor R4 connected together to gate of the second switching element U2, the first terminal is negative of the fourth driving resistor R4, the second terminal is positive of the fourth driving resistor R4 and connected to terminal D of the DC voltage output terminal, and terminal B of the secondary winding VS, second switching element U2 is turned on, a voltage or counter electromotive force is develop in the inductor L1, the negative of secondary winding VS in the terminal A, second terminal of the inductor L1 is positive, the path of the current flows is from second terminal of the inductor L1 though terminal C of the DC voltage output terminal, a load LD, terminal D of the DC voltage output terminal, second switching element U2 and back to the first terminal of the inductor L1, the drain of the first switch element U1 and drain of the second switching element U2 connected together to first terminal of the inductor L1.
  • As shown in FIGS. 6A, 6B, the first and second driving circuit for driving first and second switching element Q1, Q2, in FIGS. 7A, 7B, the first driving circuit comprises a first driving resistor R1 and second driving resistor R2 for driving first switching element U1, the second driving circuit comprises a third driving resistor R3 and a fourth driving resistor R4 for driving second switching element U2, the operation principle of the driving circuit of FIGS. 6A, 6B and FIGS. 7A, 7B is same, both of the driving circuit can be replace, and but should not be limit.

Claims (16)

1. A single-ended forward converter comprises:
a first Lus N-Channel FET connected in series with a secondary winding of a transformer of said single-ended forward converter;
a second Lus N-Channel FET connected in parallel with a series circuit constituted by the secondary winding of said transformer and said first Lus N-Channel FET;
a first driving circuit connected in parallel with a secondary winding of said a transformer for driving first Lus N-Channel FET; and
a second driving circuit connected in parallel with second Lus N-Channel FET for driving second Lus N-Channel FET.
2. A single-ended forward converter as in claim 1, wherein said driving circuit comprises a first and second driving element.
3. A single-ended forward converter as in claim 2, wherein said first driving element comprises the series-connected circuit of the first voltage drop resistor and first zener diode.
4. A single-ended forward converter as in claim 3, wherein said first voltage drop resistor and said first zener diode can be replace first driving resistor and second driving resistor.
5. A single-ended forward converter as in claim 2, wherein said second driving element comprises the series-connected circuit of the second voltage drop resistor and second zener diode.
6. A single-ended forward converter as in claim 5, wherein said second voltage drop resistor and said second zener diode can be replace third driving resistor and fourth driving resistor.
7. A single-ended forward converter as in claim 1, wherein:
said first terminal of first voltage drop resistor connected to terminal A of secondary winding of said transformer;
said secondary terminal of first voltage drop resistor and said first terminal of first zener diode connected together to said gate of Lus N-Channel FET; and
said second terminal of first zener diode connected to said terminal B of second winding of said transformer.
8. A single-ended forward converter as in claim 1, wherein:
said first terminal of second voltage drop resistor connected to drain of second Lus N-Channel FET and drain of first Lus N-Channel FET;
said second terminal of second voltage drop resistor and said first terminal of second zener diode connected together to said gate of second Lus N-Channel FET; and
said second terminal of second zener diode connected to terminal A of secondary Winding of said transformer and said source of second Lus N-Channel FET.
9. A single-ended forward converter comprises:
a first Lus P-Channel FET connected in series with a secondary winding of a transformer of said single-ended forward converter;
a second Lus P-Channel FET connected in parallel with a series circuit constituted by the secondary winding of said transformer and said first Lus P-Channel FET;
a first driving circuit connected in parallel with a secondary winding of said a transformer for driving first Lus P-Channel FET; and
a second driving circuit connected in parallel with second Lus P-Channel FET for driving second Lus P-Channel FET.
10. A single-ended forward converter as in claim 9, wherein said driving circuit comprises a first and second driving element.
11. A single-ended forward converter as in claim 10, wherein said first driving element comprises the series-connected circuit of the first driving resistor and second driving resistor.
12. A single-ended forward converter as in claim 11, wherein said first driving resistor and second driving resistor can be replace first voltage drop resistor and first zener diode.
13. A single-ended forward converter as in claim 10, wherein said second driving element comprises the series-connected circuit of the third driving resistor and fourth driving resistor.
14. A single-ended forward converter as in claim 13, wherein said third driving resistor and fourth driving resistor can be replace second voltage drop resistor and second zener diode.
15. A single-ended forward converter as in claim 9, wherein:
said first terminal of first driving resistor connected to terminal A of secondary winding of said transformer;
said second terminal of first driving resistor and said first terminal of second driving resistor connected together to said gate of first Lus P-Channel FET; and
said terminal of second driving resistor connected to terminal B of secondary Winding of said transformer.
16. A single-ended forward converter as in claim 9, wherein:
said first terminal of third driver resistor connected to drain of first Lus P-Channel FET and drain of second Lus P-Channel FET;
said second terminal of third driving resistor and said first terminal of fourth driving resistor connected together to said gate of second Lus P-Channel FET; and
said second terminal of fourth driving resistor connected to terminal B of secondary winding of said transformer and said source of second Lus P-Channel FET.
US12/584,404 2005-08-01 2009-09-08 Single-Ended Forward Converter Abandoned US20110058394A1 (en)

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US12/932,579 US8193933B2 (en) 2005-08-01 2011-03-01 Apparatus and method for remote viewing system

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109347311A (en) * 2018-12-07 2019-02-15 广州金升阳科技有限公司 A kind of self-powered driving circuit of double tube positive exciting circuit of synchronous rectification

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130076530A1 (en) * 2011-09-13 2013-03-28 William Peter Heckel, III Portable device environmental monitoring apparatus and method
JP2014049090A (en) * 2012-09-04 2014-03-17 Xacti Corp Electronic file processor
US20140094148A1 (en) 2013-05-08 2014-04-03 Vringo Infrastructure Inc. Cognitive Radio System And Cognitive Radio Carrier Device
KR102015953B1 (en) 2014-11-28 2019-10-21 한화테크윈 주식회사 Low-powered imaging processing device and method thereof
KR102316351B1 (en) 2015-01-12 2021-10-22 한화테크윈 주식회사 Camera system and method for controlling thereof
KR102282473B1 (en) 2015-02-10 2021-07-27 한화테크윈 주식회사 Camera system and method for controlling thereof
TWM538179U (en) 2016-10-05 2017-03-11 Brickcom Corp Low power consumption and rapid response monitoring device
US10308193B1 (en) * 2018-02-14 2019-06-04 Dura Operating, Llc Camera apparatus
CN108282641A (en) * 2018-03-22 2018-07-13 深圳市邻友通科技发展有限公司 monitoring device, monitoring base station and monitoring system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6498367B1 (en) * 1999-04-01 2002-12-24 Apd Semiconductor, Inc. Discrete integrated circuit rectifier device
US6545883B2 (en) * 2001-05-07 2003-04-08 Artesyn Technologies, Inc. Integrated boost-asymmetrical half-bridge converter

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6114959A (en) * 1999-02-22 2000-09-05 Bennett; Ronald J. Automatic remote mail alert system
US6307472B1 (en) * 1999-10-21 2001-10-23 Darryl Lee Robertson Post office box system and apparatus for indicating post office box occupancy
US20020024438A1 (en) * 2000-08-28 2002-02-28 Roberson Orin A. Mail check method and system
US6715669B2 (en) * 2001-03-16 2004-04-06 Kabushiki Kaisha Fulltime System Delivery box capable of handling registered mails
US6879255B1 (en) * 2002-09-23 2005-04-12 Scott Daniel Jezierski Mailboxcam instantaneous remote mail viewing system
US7609952B2 (en) * 2005-08-01 2009-10-27 Scott Jezierski Apparatus and method for remote viewing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6498367B1 (en) * 1999-04-01 2002-12-24 Apd Semiconductor, Inc. Discrete integrated circuit rectifier device
US6545883B2 (en) * 2001-05-07 2003-04-08 Artesyn Technologies, Inc. Integrated boost-asymmetrical half-bridge converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109347311A (en) * 2018-12-07 2019-02-15 广州金升阳科技有限公司 A kind of self-powered driving circuit of double tube positive exciting circuit of synchronous rectification

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