US20100035523A1 - Semiconductor device fabricating method, and semiconductor fabricating device - Google Patents
Semiconductor device fabricating method, and semiconductor fabricating device Download PDFInfo
- Publication number
- US20100035523A1 US20100035523A1 US12/505,639 US50563909A US2010035523A1 US 20100035523 A1 US20100035523 A1 US 20100035523A1 US 50563909 A US50563909 A US 50563909A US 2010035523 A1 US2010035523 A1 US 2010035523A1
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- semiconductor substrate
- polishing
- inner peripheral
- retainer ring
- semiconductor
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 161
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000005498 polishing Methods 0.000 claims abstract description 136
- 239000000758 substrate Substances 0.000 claims abstract description 103
- 230000002093 peripheral effect Effects 0.000 claims abstract description 89
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
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- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000002002 slurry Substances 0.000 description 11
- 239000012212 insulator Substances 0.000 description 10
- 239000011229 interlayer Substances 0.000 description 10
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- 230000013011 mating Effects 0.000 description 5
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000008119 colloidal silica Substances 0.000 description 2
- 239000002270 dispersing agent Substances 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 239000011164 primary particle Substances 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
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Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/27—Work carriers
- B24B37/30—Work carriers for single side lapping of plane surfaces
- B24B37/32—Retaining rings
Definitions
- the present invention relates to a semiconductor device fabricating method and a semiconductor fabricating device and, more specifically, to a semiconductor device fabricating method and a semiconductor fabricating device with a film polishing process.
- CMP Chemical Mechanical Polishing
- the resulting interlayer insulator film is then formed with a groove by photolithography, for example.
- a conductive film is then formed in such a manner as to embed the groove therewith.
- the conductive film herein is the film to be polished (hereinafter, referred to as “polishing target film”.
- polishing target film is polished until the surface of the interlayer insulator film is exposed.
- the problem with such a semiconductor device fabricating method is that the polishing target film may have scratches on the surface.
- the polishing target film suffers from scratches on the surface, the resulting semiconductor device may not be reliable.
- a method for fabricating a semiconductor device includes: supporting a semiconductor substrate formed with a polishing target film by a polishing head; and polishing the polishing target film while restricting movement in a radial direction of the semiconductor substrate by a retainer formed on the polishing head with a tilted surface formed on an inner peripheral section of the retainer, wherein when the polishing target film is polished, an outer peripheral section of the semiconductor substrate comes into contact with the tilted surface formed on the inner peripheral section of the retainer.
- FIG. 1 is a plan view of a semiconductor fabricating device of a first embodiment
- FIG. 2 is a cross sectional view of the semiconductor fabricating device of the first embodiment
- FIGS. 3A and 3B are each an enlargement of a cross sectional view of the semiconductor fabricating device of the first embodiment
- FIGS. 4A to 4C are diagrams depicting, step by step, a semiconductor device fabricating method of the first embodiment with cross sectional views of the resulting semiconductor device;
- FIG. 5 is a schematic cross sectional view of a retainer ring whose inner peripheral section is been partially worn away due to a semiconductor substrate;
- FIG. 6 is a cross sectional view of a semiconductor fabricating device of a second embodiment
- FIG. 7 is an enlargement of a cross sectional view of the semiconductor fabricating device of the second embodiment
- FIG. 8 is a cross sectional view of the semiconductor fabricating device of a modified example of the second embodiment
- FIG. 9 is an enlargement of a cross sectional view of the semiconductor fabricating device of the modified example of the second embodiment.
- FIG. 10 is a cross sectional view of a semiconductor substrate coming into contact with a retainer ring.
- FIGS. 11A to 11C are each a cross sectional view of the retainer ring of FIG. 10 whose inner peripheral section has been worn away due to the semiconductor substrate.
- FIG. 10 is a cross sectional view of a semiconductor substrate coming into contact with a retainer ring.
- a semiconductor substrate 210 formed with a polishing target film is supported by a polishing head (not illustrated).
- the polishing head may be provided with a retainer ring 212 for restricting the movement of the semiconductor substrate 210 in the radial direction (in-plane direction).
- the outer peripheral section of the semiconductor substrate 210 may come into contact with an inner peripheral surface 214 of the retainer ring 212 .
- the inner peripheral surface 214 of the retainer ring 212 may become partially worn away.
- semiconductor substrates have become larger in size, which may lead to an increase in friction between the semiconductor substrate and a polishing pad (not illustrated).
- the force applied to the inner peripheral surface of the retainer ring 212 tends to be large. This may cause a deep recess to be formed in the inner peripheral section of the retainer ring 212 .
- FIGS. 11A to 11C are each a cross sectional view of the retainer ring whose inner peripheral section has been partially worn away due to the semiconductor substrate 210 .
- a deep recess (groove) 216 may be formed in the inner peripheral section of the retainer ring 212 .
- the portions enclosed by broken lines in FIGS. 11A to 11C are portions that may break off easily due to their shape. When the retainer ring 212 is partially worn away in this way, portions of the retainer ring 212 may break off more easily, and the resulting broken pieces of the retainer ring 212 may cause scratches on the surface of the polishing target film.
- the inner peripheral section of a retainer may be partially tilted, and with such a configuration, when a polishing target film is polished, the outer peripheral section of the semiconductor substrate thus comes into contact with the tilted portion of the inner peripheral section of the retainer. Because the outer peripheral section of the semiconductor substrate comes into contact with the tilted portion of the inner peripheral section of the retainer as such, the force applied to the inner peripheral section of the retainer may be favorably released so that the recess formed in the inner peripheral section of the retainer may be shallower.
- portions of the retainer breaking off may be reduced if not prevented.
- portions breaking off the retainer are reduced, thereby reducing the possibility of scratch damage on the surface of the polishing target film.
- a semiconductor device fabricating method and a semiconductor fabricating device of a first embodiment are disclosed by referring to FIGS. 1 to 5 .
- FIG. 1 is a plan view of the semiconductor fabricating device of the embodiment.
- FIG. 2 is a cross sectional view of the semiconductor fabricating device of this embodiment.
- FIGS. 3A and 3B are each an enlarged cross sectional view of the semiconductor fabricating device of the embodiment.
- a polishing table 102 that can rotate is provided on a base 100 .
- a polishing pad 104 is provided on the polishing table 102 .
- the polishing pad 104 may be formed by laminating a plurality of polyurethane foam layers, for example.
- the base 100 is provided with an arm 106 .
- the arm 106 may be provided with a polishing head 108 that can rotate. By moving the arm 106 as desired, the polishing head 108 may also be moved as desired.
- the polishing head 108 supports a semiconductor substrate 10 formed with a polishing target film 36 (refer to FIG. 4B ). While rotating the semiconductor substrate 10 , the polishing head 108 pushes the polishing target film 36 formed on the semiconductor substrate 10 against the polishing pad 104 .
- the lower surface side of the polishing head 108 is provided with a retainer 116 .
- the retainer 116 serves to restrict the movement of the semiconductor substrate 10 in the radial direction (in-plane direction).
- the retainer 116 is in the shape of a ring (the shape of a cylinder).
- the ring-shaped retainer 116 is hereinafter referred to as a “retainer ring” (guide ring).
- the retainer ring 116 may be made of resin.
- the retainer ring 116 may be Poly Phenylene Sulfide Resin (PPS), VespelTM, and the like.
- the retainer ring 116 is so designed as to have an inner diameter slightly larger than the outer diameter of the semiconductor substrate 10 .
- the retainer ring 116 may have an inner diameter of 301 mm, an outer diameter of 348 mm, and a height of 20 mm, for example.
- the lower surface side of the polishing head 108 may be also provided with a pressurization technique (air chamber) 118 .
- the air chamber 118 may be provided inside the retainer ring 116 .
- the lower surface side of the air chamber 118 may be provided with an elastic film (membrane) 120 .
- the membrane 120 may be an elastic material including rubber, for example.
- the membrane 120 may be provided for applying a constant force to the semiconductor substrate 10 .
- the lower surface side of the membrane 120 is attached to the semiconductor substrate 10 formed with the polishing target film 36 . With such a configuration, the semiconductor substrate 10 is supported by the polishing head 108 .
- the polishing target film 36 formed on the semiconductor substrate 10 (refer to FIG. 4B ) is positioned as to be on the lower side of the semiconductor substrate 10 .
- the normal of the main surface of the semiconductor substrate 10 has the same direction as the normal of the lower surface of the polishing head 108 .
- the air chamber 118 When air is directed into the air chamber 118 , the air chamber 118 expands, the membrane 120 moves downward, and the semiconductor substrate 10 is pushed against the polishing pad 104 .
- the pressure to push the semiconductor substrate 10 against the polishing pad 104 may also be controlled as appropriate.
- the lower portion of the inner peripheral section of the retainer ring 116 is formed with a tilted surface 122 .
- the outer peripheral surface of the semiconductor substrate 10 may be so disposed as to come into contact with the tilted surface 122 formed in the retainer ring 116 .
- the height h of the tilted surface 122 may be 380 ⁇ m or more to allow the outer peripheral surface of the semiconductor substrate 10 come into contact with the tilted surface 122 of the retainer ring 116 when the outer peripheral surface of the semiconductor substrate 10 comes into contact with the inner peripheral section of the retainer ring 116 .
- FIG. 3A is a schematic diagram illustrating a tilt angle ⁇ of the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 .
- FIG. 3B is a schematic diagram illustrating the state in which the inner peripheral section of the retainer ring 116 is in contact with the outer peripheral surface of the semiconductor substrate 10 .
- the tilted surface 122 is set with the tilt angle ⁇ relatively large with respect to the normal direction of the lower surface of the polishing head 108 (refer to FIG. 3A ), when the outer peripheral surface of the semiconductor substrate 10 comes into contact with the inner peripheral section of the retainer ring 116 , the force applied to the retainer ring 116 may be released.
- the tilt angle ⁇ of the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 is preferably set at a relatively large angle.
- the retainer ring 116 may not be able to restrict the semiconductor substrate 10 from moving in the radial direction. If this is the case, the semiconductor substrate 10 may come off from the polishing head 108 .
- the tilt angle ⁇ of the tilted surface 122 is preferably not excessively large with respect to the normal direction of the main surface of the semiconductor substrate 10 .
- the preferable range of the tilt angle ⁇ of the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 is 10 to 40 degrees, for example, with respect to the normal direction of the lower surface of the polishing head 108 .
- the force applied to the retainer ring 116 may be sufficiently released so that the recess will not be too deep in the inner peripheral section of the retainer ring 116 .
- the semiconductor substrate 10 may be restricted, with reliability, from moving in the radial direction.
- a more preferable range for the tilt angle ⁇ of the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 is 15 to 35 degrees, for example, with respect to the normal direction of the lower surface of the polishing head 108 .
- the tilt angle ⁇ of the tilted surface 122 being 15 degrees or more, the force to be applied to the retainer ring 116 may be fully released so that the recess may not be too deep in the inner peripheral section of the retainer ring 116 .
- the semiconductor substrate 10 may be restricted from moving in the radial direction with a high reliability.
- the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 has the tilt angle ⁇ of 10 to 40 degrees, and more preferably 15 to 35 degrees with respect to the normal direction of the lower surface of the polishing head 108 , but the tilt angle ⁇ of the tilted surface 122 is not restricted to such a size range.
- the tilt angle ⁇ of the tilted surface 122 may be set, as appropriate, to fall in the range of 1 to 70 degrees with respect to the normal direction of the lower surface of the polishing head 108 .
- the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 preferably has the tilt angle ⁇ of 10 to 40 degrees, and more preferably 15 to 35 degrees with respect to the normal direction of the lower surface of the polishing head 108 .
- the polishing table 102 includes a nozzle 110 formed thereon.
- the nozzle 110 is provided for supplying a slurry (abrasive), pure water, and the like onto the polishing pad 104 .
- the polishing table 102 is provided with, on the side section thereof, a dresser 112 for dressing the polishing pad 104 .
- the dresser 112 may be provided with a diamond disk 114 .
- the diamond disk 114 may include diamond particles of about 150 ⁇ m in size fixed to a base made of stainless steel, for example.
- the semiconductor fabricating device of the embodiment is configured.
- FIGS. 4A to 4C are diagrams illustrating, step by step, a semiconductor device fabricating method of this embodiment with cross sectional views of the resulting semiconductor device.
- FIG. 5 is a schematic cross-sectional view of the retainer ring whose inner peripheral section is partially worn away due to the semiconductor substrate.
- an interlayer insulator film 34 is formed on the semiconductor substrate 10 formed with a transistor (not illustrated) and the like.
- a silicon wafer with a diameter of 300 mm, for example, may be used for the semiconductor substrate 10 .
- the semiconductor substrate 10 may have a thickness of about 775 ⁇ m, for example.
- a photo resist film (not illustrated) is formed over the semiconductor substrate 10 by spin coating.
- the photo resist film is subjected to patterning by photolithography.
- the interlayer insulator film 34 is subjected to etching using the photo resist film as a mask. As such, a groove 38 is formed for embedding therein a wiring pattern 40 (refer to FIG. 4C ), or a contact hole (not illustrated) for embedding therein a conductor plug (not illustrated).
- a barrier metal film (not illustrated) may be formed over the resulting surface by sputtering, for example.
- the barrier metal film may be, for example, a laminated film including a tantalum (Ta) film and a titanium nitride (TiN) film.
- the Ta may have a thickness of 10 nm
- the TiN film may have a thickness of 5 nm, for example.
- the seed film may be, for example, a Cu film.
- the Cu film may have a thickness of 60 nm, for example.
- a conductive film may be formed by electroplating, for example.
- the conductive film may be a Cu film.
- the Cu film may have a thickness of 1 ⁇ m, for example.
- the resulting polishing target film 36 includes the barrier metal film and the conductive film (refer to FIG. 4B ).
- the semiconductor substrate 10 formed with the polishing target film 36 is supported by the polishing head 108 .
- the polishing target film 36 formed on the semiconductor substrate 10 (refer to FIG. 4B ) is so disposed as to be on the lower side of the semiconductor substrate 10 .
- the polishing target film 36 is polished until the surface of the interlayer insulator film 34 is exposed (refer to FIG. 4C ).
- the polishing target film 36 formed on the semiconductor substrate 10 is pushed against the polishing pad 104 .
- a slurry is provided onto the polishing pad 104 via the nozzle 110 (refer to FIG. 1 ).
- the polishing target film 36 is pushed against the polishing pad 104 with a pressure of about 2.8 psi, for example, and the retainer ring 116 is pushed against the polishing pad 104 with a pressure of about 5.5 psi, for example.
- the polishing head 108 may be rotated at a rotation frequency of 80 rotations per minute, and the polishing table 102 may be rotated at a rotation frequency of 76 rotations per minute, for example.
- the slurry for provision onto the polishing pad 104 may include an abrasive, a pH regulator, a dispersant, an oxidizer, and the like.
- the abrasive in the slurry may be a colloidal silica with a primary particle size of 70 nm, for example.
- the abrasive in the slurry may have a concentration of 1 wt % or lower, for example.
- the amount of supply of the slurry may be 300 ml/min, for example. Note here that such requirements for polishing the polishing target film 36 are not restricted to those disclosed above, and may be set as appropriate.
- the outer peripheral surface of the semiconductor substrate 10 comes into contact with the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 . Because the outer peripheral surface of the semiconductor substrate 10 comes into contact with the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 as such, the force to be applied to the inner peripheral section of the retainer ring 116 may be released to some degree.
- a recess (groove) 124 to be formed to the inner peripheral section of the retainer ring 116 may be shallower, as illustrated in FIG. 5 .
- the recess 124 is formed in the tilted surface 122 formed in the retainer ring 116 , even if the recess 124 is formed, the shape of the resulting retainer ring 116 will not break easily.
- the polishing target film 36 may be polished until the surface of the interlayer insulator film 34 is exposed so that the wiring pattern 40 with the conductive film is embedded into the groove 38 (refer to FIG. 4C ).
- the inner peripheral section of the retainer ring 116 is formed with the tilted surface 122 , and when the polishing target film 36 is polished, the outer peripheral surface of the semiconductor substrate 10 comes into contact with the tilted surface 122 formed on the inner peripheral section of the retainer ring 116 .
- the force to be applied to the inner peripheral section of the retainer ring 1116 may be released to some degree.
- the depth of the recess 124 may be reduced in the inner peripheral section of the retainer ring 116 .
- FIGS. 6 and 7 a semiconductor device fabricating method and a semiconductor fabricating device of a second embodiment are disclosed.
- FIG. 6 is a cross sectional view of the semiconductor fabricating device of the second embodiment
- FIG. 7 is an enlargement of a cross sectional view of the semiconductor fabricating device of the second embodiment. Any components similar to those in the semiconductor device fabricating method and the semiconductor fabricating device in the first embodiment of FIGS. 1 to 5 are provided with the same reference numeral, and therefore are only partially described or their description is omitted.
- the main characteristics lie in a member 126 provided on the inside of a retainer ring 116 a with a hardness higher than the hardness of the semiconductor substrate 10 .
- the semiconductor fabricating device of this embodiment is disclosed by referring to FIG. 6 .
- the retainer ring 116 a is formed with, on the inner peripheral section thereof, a recess (mating portion) 128 .
- the mating portion 128 may have a depth of about 5 mm, for example.
- the mating portion may have a height of 3 mm or more, and more preferably, 5 mm or more, for example.
- the mating portion 128 preferably, does not exceed the height of the inner peripheral section of the retainer ring 116 a.
- a high-hardness member 126 having a hardness higher than the semiconductor substrate 10 is fitted into the mating portion 128 .
- the high-hardness member 126 is formed in the shape of a ring (the shape of a cylinder).
- the high-hardness material 126 may be made of a material including titanium, for example.
- the high-hardness material 126 may be made of a titanium alloy.
- the polishing target film 36 (refer to FIG. 4B ) is polished, the outer peripheral surface of the semiconductor substrate 10 comes into contact with the high-hardness member 126 . Because the high-hardness member 126 has the hardness higher than the semiconductor substrate 10 , portions of the hard-hardness member 126 may not be deeply worn away due to the semiconductor substrate 10 . Because portions of the hard-hardness member 126 are not worn away due to contact with the semiconductor substrate 10 as such, the resulting retainer ring 116 a may not be partially worn away due to the semiconductor substrate 10 . Accordingly, also in this embodiment, breaking off of portions of the retainer ring 116 a is accordingly reduced, thereby reducing the possibility of scratch damage on the surface of the polishing target film 36 .
- FIGS. 1 , 4 A to 4 C, 6 , and 7 the semiconductor device fabricating method in this embodiment is disclosed by referring to FIGS. 1 , 4 A to 4 C, 6 , and 7 .
- the processes in this embodiment are similar to those in the semiconductor device fabricating method in the first embodiment disclosed by referring to FIGS. 4A and 4B from the process of forming the interlayer insulator film 34 on the semiconductor substrate 10 formed with a transistor (not illustrated) and the like, to the process of forming the polishing target film 36 on the semiconductor substrate 10 , and thus are not described again.
- the semiconductor substrate 10 formed with the polishing target film 36 is supported by the polishing head 108 .
- the polishing target film 36 formed on the semiconductor substrate 10 (refer to FIG. 4B ) is disposed to be on the lower side of the semiconductor substrate 10 .
- the polishing target film 36 is polished until the surface of the interlayer insulator film 34 is exposed (refer to FIG. 4C ).
- the polishing target film 36 formed on the semiconductor substrate 10 is pushed against the polishing pad 104 .
- a slurry is provided onto the polishing pad 104 via the nozzle 110 (refer to FIG. 1 ).
- the polishing target film 36 is pushed against the polishing head 104 with the pressure of about 2.8 psi, for example, and the retainer ring 116 a is pushed against the polishing pad 104 with the pressure of about 5.5 psi, for example.
- the polishing head 108 may be rotated at the rotation frequency of 80 rotations per minute, and the polishing table 102 may be rotated at the rotation frequency of 76 rotations per minute, for example.
- the slurry for provision onto the polishing pad 104 may include an abrasive, a pH regulator, a dispersant, an oxidizer, and the like.
- the abrasive in the slurry may be colloidal silica with a primary particle size of 70 nm, for example.
- the abrasive in the slurry may have a concentration of 1 wt % or lower, for example.
- the amount of supply of the slurry may be 300 ml/min, for example. Note here that such requirements for polishing of the polishing target film 36 are not restricted to those described above, and may be set as appropriate.
- the polishing target film 36 is polished until the surface of the interlayer insulator film 34 is exposed so that the wiring pattern 40 with the conductive film is embedded into the groove 38 (refer to FIG. 4C ).
- the inner peripheral section of the retainer ring 116 a is formed with the high-hardness member 126 , and when the polishing target film 36 is polished, the inner peripheral section of the high-hardness member 126 provided on the inner peripheral section of the retainer ring 116 a as such is in contact with the outer peripheral surface of the semiconductor substrate 10 . Accordingly, also in this embodiment, the retainer ring 116 a may not be partially worn away due to the semiconductor substrate 10 so that breaking off of portions of the resulting retainer ring 116 a may be reduced. As such, also in this embodiment, the possibility of scratch damage on the surface of the polishing target film 36 may be favorably reduced.
- FIG. 8 is a cross sectional view of the semiconductor fabricating device in this modified example.
- FIG. 9 is an enlargement of a cross sectional view of the semiconductor fabricating device in this modified example.
- the main characteristics lie in a high-hardness film (high-hardness member) 126 a disposed at least on the inner peripheral section of the retainer ring 116 with a hardness that is higher than the semiconductor substrate 10 .
- the high-hardness film (high-hardness member) 126 a is formed with the hardness that is higher than the semiconductor substrate 10 .
- the high-hardness film 126 a is formed on surfaces of the retainer ring 116 , i.e., the inner peripheral surface, the bottom surface, and the outer peripheral surface, for example.
- the high-hardness film 126 a is made of, as appropriate, a material having the hardness higher than the semiconductor substrate 10 .
- the high-hardness material 126 a may be made of a material including titanium, for example.
- the high-hardness material 126 a may be formed by Physical Vapor Deposition (PVD), for example.
- the retainer ring 116 serves to restrict the semiconductor substrate 10 from moving in the radial direction, the outer peripheral surface of the semiconductor substrate 10 comes into contact with the high-hardness film (high-hardness member) 126 a having the hardness higher than the semiconductor substrate 10 .
- the high-hardness member 126 a is disposed at least on the inner peripheral section of the retainer ring 116 , and when the polishing target film 36 is polished, the high-hardness member 126 a disposed on the inner peripheral section of the retainer ring 116 as such is in contact with the outer peripheral surface of the semiconductor substrate 10 . Also in this modified example, partial wearing away of the retainer ring 116 due to the semiconductor substrate 10 is reduced so that breaking off of portions of the resulting retainer ring 116 may be reduced. As such, also in this embodiment, the possibility of scratch damage on the surface of the polishing target film 36 may be favorably reduced.
- the polishing target film 36 is described in the examples as a conductive film, but the polishing target film 36 is not restricted as such.
- the polishing target film 36 may be insulative.
- the high-hardness members 126 and 126 a are each described as being made of a material including titanium, but the high-hardness members 126 and 126 a are both not restricted as such.
- any other material having the hardness higher than the semiconductor substrate 10 can be used for making the high-hardness members 126 and 126 a.
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- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
A method for fabricating a semiconductor device includes: supporting a semiconductor substrate formed with a polishing target film by a polishing head; and polishing the polishing target film while restricting movement in a radial direction of the semiconductor substrate by a retainer formed on the polishing head with a tilted surface formed on an inner peripheral section of the retainer, wherein when the polishing target film is polished, an outer peripheral surface of the semiconductor substrate comes into contact with the tilted surface formed on the inner peripheral section of the retainer.
Description
- This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2008-205525, filed on Aug. 8, 2008, the entire contents of which are incorporated herein by reference.
- The present invention relates to a semiconductor device fabricating method and a semiconductor fabricating device and, more specifically, to a semiconductor device fabricating method and a semiconductor fabricating device with a film polishing process.
- There is a technology of polishing a film to be polished formed on a semiconductor substrate by Chemical Mechanical Polishing (CMP).
- For example, when forming an interlayer insulator film on a semiconductor substrate formed with a transistor and others, the resulting interlayer insulator film is then formed with a groove by photolithography, for example. A conductive film is then formed in such a manner as to embed the groove therewith. The conductive film herein is the film to be polished (hereinafter, referred to as “polishing target film”. Next, by CMP, the polishing target film is polished until the surface of the interlayer insulator film is exposed. With such a method, a wiring pattern having the conductive film is formed in the groove.
- The problem with such a semiconductor device fabricating method is that the polishing target film may have scratches on the surface. When the polishing target film suffers from scratches on the surface, the resulting semiconductor device may not be reliable.
- According to aspects of the embodiments disclosed herein, a method for fabricating a semiconductor device includes: supporting a semiconductor substrate formed with a polishing target film by a polishing head; and polishing the polishing target film while restricting movement in a radial direction of the semiconductor substrate by a retainer formed on the polishing head with a tilted surface formed on an inner peripheral section of the retainer, wherein when the polishing target film is polished, an outer peripheral section of the semiconductor substrate comes into contact with the tilted surface formed on the inner peripheral section of the retainer.
- The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.
- It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed.
-
FIG. 1 is a plan view of a semiconductor fabricating device of a first embodiment; -
FIG. 2 is a cross sectional view of the semiconductor fabricating device of the first embodiment; -
FIGS. 3A and 3B are each an enlargement of a cross sectional view of the semiconductor fabricating device of the first embodiment; -
FIGS. 4A to 4C are diagrams depicting, step by step, a semiconductor device fabricating method of the first embodiment with cross sectional views of the resulting semiconductor device; -
FIG. 5 is a schematic cross sectional view of a retainer ring whose inner peripheral section is been partially worn away due to a semiconductor substrate; -
FIG. 6 is a cross sectional view of a semiconductor fabricating device of a second embodiment; -
FIG. 7 is an enlargement of a cross sectional view of the semiconductor fabricating device of the second embodiment; -
FIG. 8 is a cross sectional view of the semiconductor fabricating device of a modified example of the second embodiment; -
FIG. 9 is an enlargement of a cross sectional view of the semiconductor fabricating device of the modified example of the second embodiment; -
FIG. 10 is a cross sectional view of a semiconductor substrate coming into contact with a retainer ring; and -
FIGS. 11A to 11C are each a cross sectional view of the retainer ring ofFIG. 10 whose inner peripheral section has been worn away due to the semiconductor substrate. -
FIG. 10 is a cross sectional view of a semiconductor substrate coming into contact with a retainer ring. Asemiconductor substrate 210 formed with a polishing target film is supported by a polishing head (not illustrated). The polishing head may be provided with aretainer ring 212 for restricting the movement of thesemiconductor substrate 210 in the radial direction (in-plane direction). At the time of polishing the polishing target film, the outer peripheral section of thesemiconductor substrate 210 may come into contact with an innerperipheral surface 214 of theretainer ring 212. - When the outer peripheral section of the
semiconductor substrate 210 comes into contact with the innerperipheral surface 214 of theretainer ring 212, the innerperipheral surface 214 of theretainer ring 212 may become partially worn away. Recently, semiconductor substrates have become larger in size, which may lead to an increase in friction between the semiconductor substrate and a polishing pad (not illustrated). As a result, when the outer peripheral section of thesemiconductor substrate 210 comes into contact with the inner peripheral surface of theretainer ring 212, the force applied to the inner peripheral surface of theretainer ring 212 tends to be large. This may cause a deep recess to be formed in the inner peripheral section of theretainer ring 212. -
FIGS. 11A to 11C are each a cross sectional view of the retainer ring whose inner peripheral section has been partially worn away due to thesemiconductor substrate 210. - As illustrated in
FIGS. 11A to 11C , due to the wearing away, a deep recess (groove) 216 may be formed in the inner peripheral section of theretainer ring 212. The portions enclosed by broken lines inFIGS. 11A to 11C are portions that may break off easily due to their shape. When theretainer ring 212 is partially worn away in this way, portions of theretainer ring 212 may break off more easily, and the resulting broken pieces of theretainer ring 212 may cause scratches on the surface of the polishing target film. - With the semiconductor device and fabricating method thereof disclosed herein, the inner peripheral section of a retainer may be partially tilted, and with such a configuration, when a polishing target film is polished, the outer peripheral section of the semiconductor substrate thus comes into contact with the tilted portion of the inner peripheral section of the retainer. Because the outer peripheral section of the semiconductor substrate comes into contact with the tilted portion of the inner peripheral section of the retainer as such, the force applied to the inner peripheral section of the retainer may be favorably released so that the recess formed in the inner peripheral section of the retainer may be shallower. Also, because a shallower recess is formed in the tilted surface of the retainer, even if the inner peripheral portion of the retainer is partially worn away due to the semiconductor substrate, portions of the retainer breaking off may be reduced if not prevented. Thus, portions breaking off the retainer are reduced, thereby reducing the possibility of scratch damage on the surface of the polishing target film.
- The inventors have come up with, as a result of extensive study, an idea of reducing possible scratches as disclosed below.
- A semiconductor device fabricating method and a semiconductor fabricating device of a first embodiment are disclosed by referring to
FIGS. 1 to 5 . - Semiconductor Fabricating Device
- First of all, by referring to
FIGS. 1 to 3B , a semiconductor fabricating device (polishing device) with a semiconductor device fabricating method of this embodiment shall be disclosed.FIG. 1 is a plan view of the semiconductor fabricating device of the embodiment.FIG. 2 is a cross sectional view of the semiconductor fabricating device of this embodiment.FIGS. 3A and 3B are each an enlarged cross sectional view of the semiconductor fabricating device of the embodiment. - As illustrated in
FIG. 1 , a polishing table 102 that can rotate is provided on abase 100. - A
polishing pad 104 is provided on the polishing table 102. Thepolishing pad 104 may be formed by laminating a plurality of polyurethane foam layers, for example. - The
base 100 is provided with anarm 106. - The
arm 106 may be provided with a polishinghead 108 that can rotate. By moving thearm 106 as desired, the polishinghead 108 may also be moved as desired. - The polishing
head 108 supports asemiconductor substrate 10 formed with a polishing target film 36 (refer toFIG. 4B ). While rotating thesemiconductor substrate 10, the polishinghead 108 pushes the polishingtarget film 36 formed on thesemiconductor substrate 10 against thepolishing pad 104. - The lower surface side of the polishing
head 108 is provided with aretainer 116. Theretainer 116 serves to restrict the movement of thesemiconductor substrate 10 in the radial direction (in-plane direction). In this embodiment, theretainer 116 is in the shape of a ring (the shape of a cylinder). The ring-shapedretainer 116 is hereinafter referred to as a “retainer ring” (guide ring). Theretainer ring 116 may be made of resin. For example theretainer ring 116 may be Poly Phenylene Sulfide Resin (PPS), Vespel™, and the like. Theretainer ring 116 is so designed as to have an inner diameter slightly larger than the outer diameter of thesemiconductor substrate 10. Theretainer ring 116 may have an inner diameter of 301 mm, an outer diameter of 348 mm, and a height of 20 mm, for example. - The lower surface side of the polishing
head 108 may be also provided with a pressurization technique (air chamber) 118. Theair chamber 118 may be provided inside theretainer ring 116. The lower surface side of theair chamber 118 may be provided with an elastic film (membrane) 120. Themembrane 120 may be an elastic material including rubber, for example. Themembrane 120 may be provided for applying a constant force to thesemiconductor substrate 10. The lower surface side of themembrane 120 is attached to thesemiconductor substrate 10 formed with the polishingtarget film 36. With such a configuration, thesemiconductor substrate 10 is supported by the polishinghead 108. When supporting thesemiconductor substrate 10 by the polishinghead 108, the polishingtarget film 36 formed on the semiconductor substrate 10 (refer toFIG. 4B ) is positioned as to be on the lower side of thesemiconductor substrate 10. The normal of the main surface of thesemiconductor substrate 10 has the same direction as the normal of the lower surface of the polishinghead 108. - When air is directed into the
air chamber 118, theair chamber 118 expands, themembrane 120 moves downward, and thesemiconductor substrate 10 is pushed against thepolishing pad 104. By controlling as appropriate the amount of air guided into theair chamber 118, the pressure to push thesemiconductor substrate 10 against thepolishing pad 104 may also be controlled as appropriate. - The lower portion of the inner peripheral section of the
retainer ring 116 is formed with a tiltedsurface 122. In this embodiment, when the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the inner peripheral surface of theretainer ring 116, the outer peripheral surface of thesemiconductor substrate 10 may be so disposed as to come into contact with the tiltedsurface 122 formed in theretainer ring 116. For example, if thesemiconductor substrate 10 has a thickness of 775 μm, then, the height h of the tiltedsurface 122 may be 380 μm or more to allow the outer peripheral surface of thesemiconductor substrate 10 come into contact with the tiltedsurface 122 of theretainer ring 116 when the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the inner peripheral section of theretainer ring 116. -
FIG. 3A is a schematic diagram illustrating a tilt angle θ of the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116.FIG. 3B is a schematic diagram illustrating the state in which the inner peripheral section of theretainer ring 116 is in contact with the outer peripheral surface of thesemiconductor substrate 10. - If the tilted
surface 122 is set with the tilt angle θ relatively large with respect to the normal direction of the lower surface of the polishing head 108 (refer toFIG. 3A ), when the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the inner peripheral section of theretainer ring 116, the force applied to theretainer ring 116 may be released. By setting the tiltedsurface 122 with a relatively large tilt angle θ with respect to the normal direction of the lower surface of the polishinghead 108, deep wearing away of the inner peripheral section of theretainer ring 116 may be reduced if not prevented. As such, the tilt angle θ of the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116 is preferably set at a relatively large angle. However, if the tilt angle θ of the tiltedsurface 122 is too large with respect to the normal direction of the lower surface of the polishinghead 108, theretainer ring 116 may not be able to restrict thesemiconductor substrate 10 from moving in the radial direction. If this is the case, thesemiconductor substrate 10 may come off from the polishinghead 108. In consideration thereof, the tilt angle θ of the tiltedsurface 122 is preferably not excessively large with respect to the normal direction of the main surface of thesemiconductor substrate 10. The preferable range of the tilt angle θ of the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116 is 10 to 40 degrees, for example, with respect to the normal direction of the lower surface of the polishinghead 108. With the tilt angle θ of the tiltedsurface 122 being 10 degrees or more, the force applied to theretainer ring 116 may be sufficiently released so that the recess will not be too deep in the inner peripheral section of theretainer ring 116. Moreover, with the tilt angle θ of the tiltedsurface 122 being 40 degrees or less, thesemiconductor substrate 10 may be restricted, with reliability, from moving in the radial direction. - A more preferable range for the tilt angle θ of the tilted
surface 122 formed on the inner peripheral section of theretainer ring 116 is 15 to 35 degrees, for example, with respect to the normal direction of the lower surface of the polishinghead 108. With the tilt angle θ of the tiltedsurface 122 being 15 degrees or more, the force to be applied to theretainer ring 116 may be fully released so that the recess may not be too deep in the inner peripheral section of theretainer ring 116. Moreover, with the tilt angle θ of the tiltedsurface 122 being 35 degrees or less, thesemiconductor substrate 10 may be restricted from moving in the radial direction with a high reliability. - Disclosed herein is an example where the tilted
surface 122 formed on the inner peripheral section of theretainer ring 116 has the tilt angle θ of 10 to 40 degrees, and more preferably 15 to 35 degrees with respect to the normal direction of the lower surface of the polishinghead 108, but the tilt angle θ of the tiltedsurface 122 is not restricted to such a size range. Alternatively, the tilt angle θ of the tiltedsurface 122 may be set, as appropriate, to fall in the range of 1 to 70 degrees with respect to the normal direction of the lower surface of the polishinghead 108. However, in view of the above, the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116 preferably has the tilt angle θ of 10 to 40 degrees, and more preferably 15 to 35 degrees with respect to the normal direction of the lower surface of the polishinghead 108. - The polishing table 102 includes a
nozzle 110 formed thereon. Thenozzle 110 is provided for supplying a slurry (abrasive), pure water, and the like onto thepolishing pad 104. - The polishing table 102 is provided with, on the side section thereof, a
dresser 112 for dressing thepolishing pad 104. - The
dresser 112 may be provided with adiamond disk 114. Thediamond disk 114 may include diamond particles of about 150 μm in size fixed to a base made of stainless steel, for example. - As such, the semiconductor fabricating device of the embodiment is configured.
- Semiconductor Device Fabricating Method
- Next, a semiconductor device fabricating method of the embodiment shall be disclosed by referring to
FIGS. 1 to 5 .FIGS. 4A to 4C are diagrams illustrating, step by step, a semiconductor device fabricating method of this embodiment with cross sectional views of the resulting semiconductor device.FIG. 5 is a schematic cross-sectional view of the retainer ring whose inner peripheral section is partially worn away due to the semiconductor substrate. - First of all, as illustrated in
FIG. 4A , aninterlayer insulator film 34 is formed on thesemiconductor substrate 10 formed with a transistor (not illustrated) and the like. A silicon wafer with a diameter of 300 mm, for example, may be used for thesemiconductor substrate 10. Thesemiconductor substrate 10 may have a thickness of about 775 μm, for example. - Next, a photo resist film (not illustrated) is formed over the
semiconductor substrate 10 by spin coating. - Next, the photo resist film is subjected to patterning by photolithography.
- Next, the
interlayer insulator film 34 is subjected to etching using the photo resist film as a mask. As such, agroove 38 is formed for embedding therein a wiring pattern 40 (refer toFIG. 4C ), or a contact hole (not illustrated) for embedding therein a conductor plug (not illustrated). - Next, a barrier metal film (not illustrated) may be formed over the resulting surface by sputtering, for example. The barrier metal film may be, for example, a laminated film including a tantalum (Ta) film and a titanium nitride (TiN) film. The Ta may have a thickness of 10 nm, and the TiN film may have a thickness of 5 nm, for example.
- Next, a seed film (not illustrated) is formed over the resulting surface by sputtering, for example. The seed film may be, for example, a Cu film. The Cu film may have a thickness of 60 nm, for example.
- Next, a conductive film may be formed by electroplating, for example. The conductive film may be a Cu film. The Cu film may have a thickness of 1 μm, for example.
- As such, the resulting polishing
target film 36 includes the barrier metal film and the conductive film (refer toFIG. 4B ). - Next, the
semiconductor substrate 10 formed with the polishingtarget film 36 is supported by the polishinghead 108. For supporting thesemiconductor substrate 10 by the polishinghead 108, the polishingtarget film 36 formed on the semiconductor substrate 10 (refer toFIG. 4B ) is so disposed as to be on the lower side of thesemiconductor substrate 10. - Next, by CMP, the polishing
target film 36 is polished until the surface of theinterlayer insulator film 34 is exposed (refer toFIG. 4C ). For polishing the polishingtarget film 36, while the polishing table 102 and the polishinghead 108 are each rotated, the polishingtarget film 36 formed on thesemiconductor substrate 10 is pushed against thepolishing pad 104. When the polishingtarget film 36 is polished as such, a slurry is provided onto thepolishing pad 104 via the nozzle 110 (refer toFIG. 1 ). The polishingtarget film 36 is pushed against thepolishing pad 104 with a pressure of about 2.8 psi, for example, and theretainer ring 116 is pushed against thepolishing pad 104 with a pressure of about 5.5 psi, for example. The polishinghead 108 may be rotated at a rotation frequency of 80 rotations per minute, and the polishing table 102 may be rotated at a rotation frequency of 76 rotations per minute, for example. The slurry for provision onto thepolishing pad 104 may include an abrasive, a pH regulator, a dispersant, an oxidizer, and the like. The abrasive in the slurry may be a colloidal silica with a primary particle size of 70 nm, for example. The abrasive in the slurry may have a concentration of 1 wt % or lower, for example. The amount of supply of the slurry may be 300 ml/min, for example. Note here that such requirements for polishing the polishingtarget film 36 are not restricted to those disclosed above, and may be set as appropriate. - When the
semiconductor substrate 10 is restricted from moving in the radial direction by theretainer ring 116, the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116. Because the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116 as such, the force to be applied to the inner peripheral section of theretainer ring 116 may be released to some degree. In this embodiment, because the force to be applied to the inner peripheral section of theretainer ring 116 may be released to some degree as such, a recess (groove) 124 to be formed to the inner peripheral section of theretainer ring 116 may be shallower, as illustrated inFIG. 5 . Moreover, because therecess 124 is formed in the tiltedsurface 122 formed in theretainer ring 116, even if therecess 124 is formed, the shape of the resultingretainer ring 116 will not break easily. As such, the polishingtarget film 36 may be polished until the surface of theinterlayer insulator film 34 is exposed so that thewiring pattern 40 with the conductive film is embedded into the groove 38 (refer toFIG. 4C ). - As such, according to the first embodiment, the inner peripheral section of the
retainer ring 116 is formed with the tiltedsurface 122, and when the polishingtarget film 36 is polished, the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116. In this embodiment, because the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the tiltedsurface 122 formed on the inner peripheral section of theretainer ring 116 as such, the force to be applied to the inner peripheral section of the retainer ring 1116 may be released to some degree. As such, in this embodiment, the depth of therecess 124 may be reduced in the inner peripheral section of theretainer ring 116. Moreover, in this embodiment, because therecess 124 is formed in the tiltedsurface 122 formed on theretainer ring 116, even if the inner peripheral section of theretainer ring 116 is partially worn away, portions of theretainer ring 116 may not break off as easily as before due to the resulting shape. As such, in this embodiment, breaking off of theretainer ring 116 is accordingly reduced, thereby reducing the possibility of scratch damage on the surface of the polishingtarget film 36. - By referring to
FIGS. 6 and 7 , a semiconductor device fabricating method and a semiconductor fabricating device of a second embodiment are disclosed.FIG. 6 is a cross sectional view of the semiconductor fabricating device of the second embodiment, andFIG. 7 is an enlargement of a cross sectional view of the semiconductor fabricating device of the second embodiment. Any components similar to those in the semiconductor device fabricating method and the semiconductor fabricating device in the first embodiment ofFIGS. 1 to 5 are provided with the same reference numeral, and therefore are only partially described or their description is omitted. - With the semiconductor device fabricating method and the semiconductor fabricating device of the second embodiment, the main characteristics lie in a
member 126 provided on the inside of aretainer ring 116 a with a hardness higher than the hardness of thesemiconductor substrate 10. - Semiconductor Fabricating Device
- First of all, the semiconductor fabricating device of this embodiment is disclosed by referring to
FIG. 6 . - As illustrated in
FIG. 6 , theretainer ring 116 a is formed with, on the inner peripheral section thereof, a recess (mating portion) 128. Themating portion 128 may have a depth of about 5 mm, for example. The mating portion may have a height of 3 mm or more, and more preferably, 5 mm or more, for example. Themating portion 128, preferably, does not exceed the height of the inner peripheral section of theretainer ring 116 a. - A high-
hardness member 126 having a hardness higher than thesemiconductor substrate 10 is fitted into themating portion 128. The high-hardness member 126 is formed in the shape of a ring (the shape of a cylinder). The high-hardness material 126 may be made of a material including titanium, for example. For example, the high-hardness material 126 may be made of a titanium alloy. - As illustrated in
FIG. 6 , when the polishing target film 36 (refer toFIG. 4B ) is polished, the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the high-hardness member 126. Because the high-hardness member 126 has the hardness higher than thesemiconductor substrate 10, portions of the hard-hardness member 126 may not be deeply worn away due to thesemiconductor substrate 10. Because portions of the hard-hardness member 126 are not worn away due to contact with thesemiconductor substrate 10 as such, the resultingretainer ring 116 a may not be partially worn away due to thesemiconductor substrate 10. Accordingly, also in this embodiment, breaking off of portions of theretainer ring 116 a is accordingly reduced, thereby reducing the possibility of scratch damage on the surface of the polishingtarget film 36. - Semiconductor Device Fabricating Method
- Next, the semiconductor device fabricating method in this embodiment is disclosed by referring to
FIGS. 1 , 4A to 4C, 6, and 7. - First of all, the processes in this embodiment are similar to those in the semiconductor device fabricating method in the first embodiment disclosed by referring to
FIGS. 4A and 4B from the process of forming theinterlayer insulator film 34 on thesemiconductor substrate 10 formed with a transistor (not illustrated) and the like, to the process of forming the polishingtarget film 36 on thesemiconductor substrate 10, and thus are not described again. - Next, the
semiconductor substrate 10 formed with the polishingtarget film 36 is supported by the polishinghead 108. When thesemiconductor substrate 10 is supported by the polishinghead 108 as such, the polishingtarget film 36 formed on the semiconductor substrate 10 (refer toFIG. 4B ) is disposed to be on the lower side of thesemiconductor substrate 10. - Next, by CMP, the polishing
target film 36 is polished until the surface of theinterlayer insulator film 34 is exposed (refer toFIG. 4C ). For polishing the polishingtarget film 36, while the polishing table 102 and the polishinghead 108 are each being rotated, the polishingtarget film 36 formed on thesemiconductor substrate 10 is pushed against thepolishing pad 104. When the polishingtarget film 36 is polished as such, a slurry is provided onto thepolishing pad 104 via the nozzle 110 (refer toFIG. 1 ). The polishingtarget film 36 is pushed against the polishinghead 104 with the pressure of about 2.8 psi, for example, and theretainer ring 116 a is pushed against thepolishing pad 104 with the pressure of about 5.5 psi, for example. The polishinghead 108 may be rotated at the rotation frequency of 80 rotations per minute, and the polishing table 102 may be rotated at the rotation frequency of 76 rotations per minute, for example. The slurry for provision onto thepolishing pad 104 may include an abrasive, a pH regulator, a dispersant, an oxidizer, and the like. The abrasive in the slurry may be colloidal silica with a primary particle size of 70 nm, for example. The abrasive in the slurry may have a concentration of 1 wt % or lower, for example. The amount of supply of the slurry may be 300 ml/min, for example. Note here that such requirements for polishing of the polishingtarget film 36 are not restricted to those described above, and may be set as appropriate. - When the
semiconductor substrate 10 is restricted from moving in the radial direction by theretainer ring 116 a, the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the inner peripheral section of the high-hardness member 126 having a hardness higher than thesemiconductor substrate 10. As such, the polishingtarget film 36 is polished until the surface of theinterlayer insulator film 34 is exposed so that thewiring pattern 40 with the conductive film is embedded into the groove 38 (refer toFIG. 4C ). - As such, according to the second embodiment, the inner peripheral section of the
retainer ring 116 a is formed with the high-hardness member 126, and when the polishingtarget film 36 is polished, the inner peripheral section of the high-hardness member 126 provided on the inner peripheral section of theretainer ring 116 a as such is in contact with the outer peripheral surface of thesemiconductor substrate 10. Accordingly, also in this embodiment, theretainer ring 116 a may not be partially worn away due to thesemiconductor substrate 10 so that breaking off of portions of the resultingretainer ring 116 a may be reduced. As such, also in this embodiment, the possibility of scratch damage on the surface of the polishingtarget film 36 may be favorably reduced. - A semiconductor device fabricating method and a semiconductor fabricating device in a modified example of the second embodiment is disclosed next by referring to
FIGS. 8 and 9 .FIG. 8 is a cross sectional view of the semiconductor fabricating device in this modified example.FIG. 9 is an enlargement of a cross sectional view of the semiconductor fabricating device in this modified example. - With the semiconductor device fabricating method and the semiconductor fabricating device in this modified example, the main characteristics lie in a high-hardness film (high-hardness member) 126 a disposed at least on the inner peripheral section of the
retainer ring 116 with a hardness that is higher than thesemiconductor substrate 10. - As illustrated in
FIG. 8 , at least on the inner peripheral section of theretainer ring 116, the high-hardness film (high-hardness member) 126 a is formed with the hardness that is higher than thesemiconductor substrate 10. In this example, the high-hardness film 126 a is formed on surfaces of theretainer ring 116, i.e., the inner peripheral surface, the bottom surface, and the outer peripheral surface, for example. The high-hardness film 126 a is made of, as appropriate, a material having the hardness higher than thesemiconductor substrate 10. In this example, the high-hardness material 126 a may be made of a material including titanium, for example. The high-hardness material 126 a may be formed by Physical Vapor Deposition (PVD), for example. - When the
retainer ring 116 serves to restrict thesemiconductor substrate 10 from moving in the radial direction, the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the high-hardness film (high-hardness member) 126 a having the hardness higher than thesemiconductor substrate 10. - As such, in this example, the high-
hardness member 126 a is disposed at least on the inner peripheral section of theretainer ring 116, and when the polishingtarget film 36 is polished, the high-hardness member 126 a disposed on the inner peripheral section of theretainer ring 116 as such is in contact with the outer peripheral surface of thesemiconductor substrate 10. Also in this modified example, partial wearing away of theretainer ring 116 due to thesemiconductor substrate 10 is reduced so that breaking off of portions of the resultingretainer ring 116 may be reduced. As such, also in this embodiment, the possibility of scratch damage on the surface of the polishingtarget film 36 may be favorably reduced. - The embodiments disclosed above are not restrictive, and other various modifications are also possible.
- In the embodiments disclosed above, the polishing
target film 36 is described in the examples as a conductive film, but the polishingtarget film 36 is not restricted as such. For example, the polishingtarget film 36 may be insulative. - In the second embodiment, the high-
hardness members hardness members semiconductor substrate 10 can be used for making the high-hardness members - All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although the embodiments have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
Claims (8)
1. A method for fabricating a semiconductor device, comprising:
supporting a semiconductor substrate formed with a polishing target film by a polishing head; and
polishing the polishing target film while restricting movement in the radial direction of the semiconductor substrate by a retainer formed on the polishing head with a tilted surface formed on an inner peripheral section of the retainer, wherein
when the polishing target film is polished, an outer peripheral surface of the semiconductor substrate comes into contact with the tilted surface formed on the inner peripheral section of the retainer.
2. The method according to claim 1 , wherein
the tilted surface has a tilt angle of 10 to 40 degrees with respect to the normal direction of the lower surface of the polishing head.
3. The method according to claim 2 , wherein
the tilted surface has the tilt angle of 15 to 35 degrees with respect to the normal direction of the lower surface of the polishing head.
4. A semiconductor device, comprising:
a polishing head that supports a semiconductor substrate formed with a polishing target film; and
a retainer, that is provided on the polishing head, with a tilted surface on an inner peripheral section to restrict movement of the semiconductor substrate in the radial direction, wherein
when the polishing target film is polished, an outer peripheral surface of the semiconductor substrate comes into contact with the tilted surface formed on the inner peripheral section of the retainer.
5. The semiconductor device according to claim 4 , wherein
the tilted surface has a tilt angle of 10 to 40 degrees with respect to the normal direction of the lower surface of the polishing head.
6. The semiconductor device according to claim 5 , wherein
the tilted surface has the tilt angle of 15 to 35 degrees with respect to the normal direction of the lower surface of the polishing head.
7. A semiconductor device, comprising:
a polishing head that supports a semiconductor substrate formed with a polishing target film; and
a retainer that is provided on the polishing head with a member, having a hardness higher than the semiconductor substrate, on an inner peripheral section to restrict movement of the semiconductor substrate in the radial direction, wherein
when the polishing target film is polished, an outer peripheral surface of the semiconductor substrate comes into contact with the member formed on the inner peripheral section of the retainer.
8. The semiconductor device according to claim 7 , wherein
the member having the hardness higher than the semiconductor substrate includes titanium.
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JP2008205525A JP5444660B2 (en) | 2008-08-08 | 2008-08-08 | Semiconductor device manufacturing method and semiconductor manufacturing apparatus |
JP2008-205525 | 2008-08-08 |
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US20100035523A1 true US20100035523A1 (en) | 2010-02-11 |
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US12/505,639 Abandoned US20100035523A1 (en) | 2008-08-08 | 2009-07-20 | Semiconductor device fabricating method, and semiconductor fabricating device |
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US20230019815A1 (en) * | 2015-05-29 | 2023-01-19 | Applied Materials, Inc. | Retaining ring having inner surfaces with features |
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JP2016165792A (en) * | 2015-03-05 | 2016-09-15 | ミクロ技研株式会社 | Polishing head and polishing process device |
JP7388324B2 (en) | 2019-12-05 | 2023-11-29 | 株式会社Sumco | Wafer single-side polishing method, wafer manufacturing method, and wafer single-side polishing device |
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JP2000280167A (en) * | 1999-03-30 | 2000-10-10 | Kyocera Corp | Carrier plate and double surface polishing device using the same |
US6663468B2 (en) * | 2000-01-07 | 2003-12-16 | Hitachi, Ltd. | Method for polishing surface of semiconductor device substrate |
US20080166952A1 (en) * | 2005-02-25 | 2008-07-10 | Shin-Etsu Handotai Co., Ltd | Carrier For Double-Side Polishing Apparatus, Double-Side Polishing Apparatus And Double-Side Polishing Method Using The Same |
US7867060B2 (en) * | 2008-03-31 | 2011-01-11 | Tdk Corporation | Retainer ring used for polishing a structure for manufacturing magnetic head, and polishing method using the same |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US20120264359A1 (en) * | 2011-04-13 | 2012-10-18 | Nanya Technology Corporation | Membrane |
US20230019815A1 (en) * | 2015-05-29 | 2023-01-19 | Applied Materials, Inc. | Retaining ring having inner surfaces with features |
Also Published As
Publication number | Publication date |
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JP2010040993A (en) | 2010-02-18 |
JP5444660B2 (en) | 2014-03-19 |
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