US20090121328A1 - Glass Substrate of Flat Panel Display and Display Integrated Circuit Chip - Google Patents
Glass Substrate of Flat Panel Display and Display Integrated Circuit Chip Download PDFInfo
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- US20090121328A1 US20090121328A1 US12/356,265 US35626509A US2009121328A1 US 20090121328 A1 US20090121328 A1 US 20090121328A1 US 35626509 A US35626509 A US 35626509A US 2009121328 A1 US2009121328 A1 US 2009121328A1
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- integrated circuit
- sides
- output terminals
- circuit chip
- display
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
Definitions
- the present invention generally relates to the field of flat panel display and, particularly, to a glass substrate of flat panel display and a display integrated circuit (IC) chip.
- IC display integrated circuit
- Flat panel displays such as a liquid crystal display (LCD) and a plasma display have the advantages of high image quality, small size, light weight and a broad application range, and thus are widely applied on consumer electronic products such as a mobile phone, a notebook computer, a desktop display and a television, and have gradually replaced the traditional cathode ray tube (CRT) displays as the main trend in the display industry.
- LCD liquid crystal display
- plasma display have the advantages of high image quality, small size, light weight and a broad application range, and thus are widely applied on consumer electronic products such as a mobile phone, a notebook computer, a desktop display and a television, and have gradually replaced the traditional cathode ray tube (CRT) displays as the main trend in the display industry.
- CTR cathode ray tube
- a conventional glass substrate 10 of flat panel display is adapted for disposing a plurality of gate driver integrated circuit (IC) chips 12 and a plurality of source driver IC chips 14 thereon.
- the glass substrate 10 includes a display area 11 (as denoted by the dashed rectangle in FIG. 1 ), a plurality of first conductive wires 13 a and a plurality of second conductive wires 13 b .
- the display area 11 have a plurality of display elements P, a plurality of gate lines GL and a plurality of data lines DL formed therein.
- the first conductive wires 13 a are electrically coupled between output terminals (not shown) of the gate driver IC chips 12 and the display area 11 , so as to transmit gate control signals supplied from the output terminals of gate driver IC chips 12 to the display area 11 .
- the second conductive wires 13 b are electrically coupled between output terminals (not shown) of the source driver IC chips 14 and the display area 11 , so as to transmit data signals supplied from the output terminals of the source driver IC chips 14 to the display area 11 .
- Each of the gate driver IC chips 12 and source driver IC chips 14 includes multiple sides and all of the output terminals thereof only are arranged at one long side of the multiple sides, resulting in an excessive length for the IC chip and a waste of chip area, and a region occupied by each IC chip on the glass substrate 10 is relatively large correspondingly. Accordingly, an increased miniaturization of the glass substrate 10 is hindered to some degree.
- the present invention relates to a glass substrate of flat panel display, can achieve an increased miniaturization.
- the present invention further relates to a display integrated circuit chip, can achieve efficient utilization of chip area.
- a glass substrate of flat panel display in accordance with an embodiment of the present invention is provided.
- the glass substrate is adapted for an integrated circuit (IC) chip including a plurality of sides.
- the glass substrate includes a display area and a plurality of conductive wires.
- the display area has a plurality of display elements disposed therein.
- the conductive wires are electrically coupled between the IC chip and the display area, so as to transmit a signal provided by the IC chip to the display area.
- the sides of the IC chip include two opposite long sides and two opposite short sides.
- the IC chip has a plurality of output terminals arranged at the two long sides and electrically coupled to the respective conductive wires.
- the IC chip further includes a plurality of output terminals arranged at the two short sides.
- the glass substrate is adapted for a first-type driver IC chip and a second-type driver IC chip.
- the glass substrate includes a display area, a plurality of first conductive wires and a plurality of second conductive wires.
- the display area has a plurality of display elements disposed therein.
- the first conductive wires are electrically coupled between the first-type driver IC chip and the display area.
- Each of the first conductive wires is for transmitting a first-type signal outputted from the first-type driver IC chip to the display area.
- the first-type signals are for providing a same function applied to the display elements.
- the second conductive wires are electrically coupled between the second-type driver IC chip and the display area. Each of the second conductive wires is for transmitting a second-type signal outputted from the second-type driver IC chip to the display area. The second-type signals are for providing a same function applied to the display elements.
- the first-type driver IC chip includes a plurality of sides, and at least two of the sides have a plurality of output terminals arranged thereat. The output terminals are electrically coupled to the respective first conductive wires.
- the first-type driver IC chip includes a source driver IC chip or a gate driver IC chip.
- the sides of the first-type driver IC chip include two opposite long sides and two opposite short sides.
- the output terminals can be arranged at the two long sides, or the two short sides and one of the two long sides, or one of the two long sides and one of the two short sides.
- a display IC chip in accordance with an embodiment of the present invention is provided.
- the display IC chip is for receiving/outputting a first color signal, a second color signal and a third color signal.
- the display IC chip includes a plurality of sides, a plurality of output terminals, two first color short-circuit line, one second color short-circuit line and one third color short-circuit line.
- the output terminals are arranged at least two of the sides, and each of the output terminals is for outputting one of the first color signal, the second color signal and the third color signal.
- the two first color short-circuit line are parallel disposed in the IC chip and electrically coupled to a first output terminal group of the output terminals which is for outputting the first color signal.
- the second color short-circuit line is disposed between and parallel with the two first color short-circuit lines.
- the second color short-circuit line is electrically coupled to a second output terminal group of the output terminals which is for outputting the second color signal.
- the third color short-circuit line is disposed between and parallel with the two first color short-circuit lines.
- the third color short-circuit line is electrically coupled to a third output terminal group of the output terminals which is for outputting the third color signal.
- Conductive wires electrically coupled between the two first color short-circuit lines and the first output terminal group do not cross the second and third color short-circuit lines.
- the sides of the display IC chip include two long sides and two short sides
- the output terminals can be arranged at the two long sides, or the two short sides and one of the two long sides, or one of the two long sides and one of the two short sides.
- FIG. 1 shows a conventional glass substrate of flat panel display.
- FIG. 2 shows a glass substrate of flat panel display in accordance with an embodiment of the present invention.
- FIG. 3 is an enlarged view of any one of gate driver IC chips in FIG. 2 .
- FIG. 4 shows an example of multiple gate driver IC chips in FIG. 2 are connected in cascade.
- FIG. 5 shows another example of multiple gate driver IC chips in FIG. 2 are connected in parallel.
- FIG. 6 is an enlarged view of another gate driver IC chip in accordance with an embodiment of the present invention.
- FIG. 7 is an enlarged view of any one of source driver IC chips in FIG. 2 .
- FIG. 8 shows an example of multiple source driver IC chips in FIG. 2 are connected in cascade.
- FIG. 9 shows another example of multiple source driver IC chips in FIG. 2 are connected in parallel.
- FIG. 10 is an enlarged view of another source driver IC chip in accordance with an embodiment of the present invention.
- a glass substrate 20 of flat panel display in accordance with an embodiment of the present invention is provided.
- the glass substrate 20 is adapted for disposing a plurality of gate driver IC chips 22 and a plurality of source driver IC chips 24 thereon.
- the glass substrate 20 includes a display area 21 (as denoted by the dashed rectangle in FIG. 2 ), a plurality of first conductive wires 23 a and a plurality of second conductive wires 23 b .
- the display area 21 have a plurality of display elements P, a plurality of gate lines GL and a plurality of data lines DL formed therein.
- the display element P is electrically coupled to the gate line GL and the data line DL.
- the first conductive wires 23 a are electrically coupled between four sides of the gate driver IC chips 22 and the display area 21 , so as to transmit gate control signals outputted from multiple output terminals of the gate driver IC chips 22 to the display area 21 .
- the gate control signals are for providing a gate control function applied to the display elements P.
- the second conductive wires 23 b are electrically coupled between four sides of the source driver IC chips 24 and the display area 21 , so as to transmit data signals outputted from multiple output terminals of the source driver IC chips 24 to the display area 21 .
- the data signals are for providing display data applied to the display elements P.
- FIG. 3 being an enlarged view of any one of the gate driver IC chips 22 in FIG. 2 .
- the output terminals 220 of the gate driver IC chip 22 are arranged at four sides of the gate driver IC chip 22 , to output the gate control signals to the display area 21 through the first conductive wires 23 a electrically coupled thereto.
- Each solid rectangle in FIG. 3 represents one or multiple output terminals 220 .
- the four sides of the gate driver IC chip 22 include two long sides and two short sides.
- an external printed circuit board 31 a provides a control signal and a power signal to the cascade-connected gate driver IC chips 22 through a flexible printed circuit board 32 a .
- the flexible printed circuit board 32 a electrically coupled between the printed circuit board 31 a and the glass substrate 20 .
- the printed circuit board 31 a generally has a timing controller and a DC-to-DC converter disposed thereon to provide the control signal and the power signal respectively.
- the timing controller and the DC-to-DC converter are not shown in accompanying drawings.
- FIG. 5 showing another example of the gate driver IC chips 22 in FIG. 2 are connected in parallel.
- an external printed circuit board 31 b provides control signals and power signals to the parallel-connected gate driver IC chips 22 through respective flexible printed circuit boards 32 b .
- the flexible printed circuit boards 32 b are electrically coupled between the printed circuit board 31 b and the glass substrate 20 .
- the printed circuit board 31 b has a circuit configuration similar to that of the above-mentioned printed circuit board 31 a , and thus will not be repeated herein.
- the output terminals 220 of each of the gate driver IC chips 22 are not limited to be arranged at four sides the gate driver IC chip, and can be only arranged at two long sides of the four sides as illustrated in FIG. 6 , or three sides of the four sides.
- each solid rectangle represents multiple output terminals 220 .
- each solid rectangle represents one or multiple output terminals 240 .
- the four sides include two long sides and two short sides.
- the output terminals 240 include a plurality of first output terminals 241 , a plurality of second output terminals 242 and a plurality of third output terminals 243 .
- the first output terminals 241 constitute a first output terminal group to output the red signal.
- the second output terminals 242 constitute a second output terminal group to output the green signal.
- the third output terminals 243 constitute a third output terminal group to output the blue signal.
- the source driver IC chip 24 in FIG. 7 further includes two first color short-circuit lines 245 (e.g., red short-circuit lines), one second color short-circuit line 246 (e.g., green short-circuit line) and one third color short-circuit line 247 (e.g., blue short-circuit line).
- the two first color short-circuit lines 245 are electrically coupled to the first output terminal group
- the second color short-circuit line 246 is electrically coupled to the second output terminal group
- the third color short-circuit line 247 is electrically coupled to the third output terminal group.
- the first color short-circuit lines 245 , the second color short-circuit line 246 and the third color short-circuit line 247 are parallel to one another.
- Conductive wires (not labeled) electrically coupled between the two first color short-circuit lines 245 and the first output terminal group do not cross the second color short-circuit line 246 and the third color short-circuit line 247 .
- an external printed circuit board 41 a provides a power signal to the cascade-connected source driver IC chips 24 through a flexible printed circuit board 42 a .
- the flexible printed circuit board 42 a is electrically coupled between the printed circuit board 41 a and the glass substrate 20 .
- the printed circuit board 41 a generally has a timing controller and a DC-to-DC converter disposed thereon.
- the DC-to-DC converter is for providing the power signal.
- the timing controller and the DC-to-DC converter are illustrated.
- the printed circuit board 41 a and the above-mentioned printed circuit board 31 a can be the same printed circuit board.
- FIG. 9 showing another example of the source driver IC chips 24 in FIG. 2 are connected in parallel.
- an external printed circuit board 41 b provides power signals to the parallel-connected source driver IC chips 24 through a plurality of flexible printed circuit boards 42 b .
- the flexible printed circuit boards 42 b are electrically coupled between the printed circuit board 41 b and the glass substrate 20 .
- the printed circuit board 41 b has a circuit configuration similar to that of the printed circuit board 41 a , and thus will not be repeated herein.
- the output terminals 240 of each of the source driver IC chips 24 in accordance with the present invention are not limited to be arranged at four sides of the source driver IC chip 24 , and can be only arranged at two long sides of the four sides as illustrated in FIG. 10 , or three sides (e.g., two short sides and one long side) of the four sides, or one short side and one long side of the four sides.
- each solid rectangle represents multiple output terminals 240 .
- the amount of the gate driver IC chips 22 in accordance with the embodiment of the present invention is not limited to two as illustrated in FIG. 2 , and can be adjusted according to the requirement of practical applications.
- the gate driver IC chips 22 are not limited to be arranged at single side of the glass substrate 20 , and can be arranged at double sides of the glass substrate 20 instead.
- the amount of the source driver IC chips 24 in accordance with the embodiment of the present invention is not limited to three as illustrated in FIG. 2 , and can be adjusted according to the requirement of practical applications.
- the first, second and third output terminal groups of each of the source driver IC chips 24 are not limited to outputting the respective red, green and blue signals, and can be configured to output any one of red, green and blue signals as long as the outputted color signals are different from one another.
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- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
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- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
An exemplary glass substrate of flat panel display is adapted for an integrated circuit (IC) chip. The IC chip has two opposite long sides and two opposite short sides. The glass substrate includes a display area and a plurality of conductive wires. The display area has a plurality of display elements formed therein. The conductive wires are electrically coupled to the IC chip and the display area, to transmit a signal provided from the IC chip to the display area. The IC chip includes a plurality of output terminals arranged at the long sides and electrically coupled to the respective conductive wires. The present invention also provides a display IC chip for receiving and outputting a first color signal, a second color signal and a third color signal.
Description
- This application is based upon and claims the benefit of priority from the prior Taiwanese Patent Application No. 097143431, filed Nov. 10, 2008, the entire contents of which are incorporated herein by reference.
- 1. Technical Field
- The present invention generally relates to the field of flat panel display and, particularly, to a glass substrate of flat panel display and a display integrated circuit (IC) chip.
- 2. Description of the Related Art
- Flat panel displays such as a liquid crystal display (LCD) and a plasma display have the advantages of high image quality, small size, light weight and a broad application range, and thus are widely applied on consumer electronic products such as a mobile phone, a notebook computer, a desktop display and a television, and have gradually replaced the traditional cathode ray tube (CRT) displays as the main trend in the display industry.
- Referring to
FIG. 1 , aconventional glass substrate 10 of flat panel display is adapted for disposing a plurality of gate driver integrated circuit (IC)chips 12 and a plurality of sourcedriver IC chips 14 thereon. Theglass substrate 10 includes a display area 11 (as denoted by the dashed rectangle inFIG. 1 ), a plurality of firstconductive wires 13 a and a plurality of secondconductive wires 13 b. Thedisplay area 11 have a plurality of display elements P, a plurality of gate lines GL and a plurality of data lines DL formed therein.FIG. 1 only shows one display element P, one gate line GL and one data line DL for the purpose of illustration, the display element P is electrically coupled to the gate line GL and the data line DL. The firstconductive wires 13 a are electrically coupled between output terminals (not shown) of the gatedriver IC chips 12 and thedisplay area 11, so as to transmit gate control signals supplied from the output terminals of gatedriver IC chips 12 to thedisplay area 11. The secondconductive wires 13 b are electrically coupled between output terminals (not shown) of the sourcedriver IC chips 14 and thedisplay area 11, so as to transmit data signals supplied from the output terminals of the sourcedriver IC chips 14 to thedisplay area 11. Each of the gatedriver IC chips 12 and sourcedriver IC chips 14 includes multiple sides and all of the output terminals thereof only are arranged at one long side of the multiple sides, resulting in an excessive length for the IC chip and a waste of chip area, and a region occupied by each IC chip on theglass substrate 10 is relatively large correspondingly. Accordingly, an increased miniaturization of theglass substrate 10 is hindered to some degree. - The present invention relates to a glass substrate of flat panel display, can achieve an increased miniaturization.
- The present invention further relates to a display integrated circuit chip, can achieve efficient utilization of chip area.
- In order to achieve the above-mentioned advantages, a glass substrate of flat panel display in accordance with an embodiment of the present invention is provided. The glass substrate is adapted for an integrated circuit (IC) chip including a plurality of sides. The glass substrate includes a display area and a plurality of conductive wires. The display area has a plurality of display elements disposed therein. The conductive wires are electrically coupled between the IC chip and the display area, so as to transmit a signal provided by the IC chip to the display area. The sides of the IC chip include two opposite long sides and two opposite short sides. The IC chip has a plurality of output terminals arranged at the two long sides and electrically coupled to the respective conductive wires.
- In one embodiment, the IC chip further includes a plurality of output terminals arranged at the two short sides.
- Another glass substrate of flat panel display in accordance with an embodiment of the present invention is provided. The glass substrate is adapted for a first-type driver IC chip and a second-type driver IC chip. The glass substrate includes a display area, a plurality of first conductive wires and a plurality of second conductive wires. The display area has a plurality of display elements disposed therein. The first conductive wires are electrically coupled between the first-type driver IC chip and the display area. Each of the first conductive wires is for transmitting a first-type signal outputted from the first-type driver IC chip to the display area. The first-type signals are for providing a same function applied to the display elements. The second conductive wires are electrically coupled between the second-type driver IC chip and the display area. Each of the second conductive wires is for transmitting a second-type signal outputted from the second-type driver IC chip to the display area. The second-type signals are for providing a same function applied to the display elements. The first-type driver IC chip includes a plurality of sides, and at least two of the sides have a plurality of output terminals arranged thereat. The output terminals are electrically coupled to the respective first conductive wires.
- In one embodiment, the first-type driver IC chip includes a source driver IC chip or a gate driver IC chip.
- In one embodiment, the sides of the first-type driver IC chip include two opposite long sides and two opposite short sides. The output terminals can be arranged at the two long sides, or the two short sides and one of the two long sides, or one of the two long sides and one of the two short sides.
- A display IC chip in accordance with an embodiment of the present invention is provided. The display IC chip is for receiving/outputting a first color signal, a second color signal and a third color signal. The display IC chip includes a plurality of sides, a plurality of output terminals, two first color short-circuit line, one second color short-circuit line and one third color short-circuit line. The output terminals are arranged at least two of the sides, and each of the output terminals is for outputting one of the first color signal, the second color signal and the third color signal. The two first color short-circuit line are parallel disposed in the IC chip and electrically coupled to a first output terminal group of the output terminals which is for outputting the first color signal. The second color short-circuit line is disposed between and parallel with the two first color short-circuit lines. The second color short-circuit line is electrically coupled to a second output terminal group of the output terminals which is for outputting the second color signal. The third color short-circuit line is disposed between and parallel with the two first color short-circuit lines. The third color short-circuit line is electrically coupled to a third output terminal group of the output terminals which is for outputting the third color signal. Conductive wires electrically coupled between the two first color short-circuit lines and the first output terminal group do not cross the second and third color short-circuit lines.
- In one embodiment, the sides of the display IC chip include two long sides and two short sides, the output terminals can be arranged at the two long sides, or the two short sides and one of the two long sides, or one of the two long sides and one of the two short sides.
- In the above-mentioned embodiments of the present invention, since output terminals of each IC chip are arranged at least two of the multiple sides thereof, facilitating the efficient utilization and miniaturization of the IC chip, and the drawback of a waste of chip area resulting from excessive length for the IC chip in the prior art is overcome. When the IC chip is applied to a glass substrate of flat display panel, an increased miniaturization for the glass substrate can be achieved.
- These and other features and advantages of the various embodiments disclosed herein will be better understood with respect to the following description and drawings, in which like numbers refer to like parts throughout, and in which:
-
FIG. 1 shows a conventional glass substrate of flat panel display. -
FIG. 2 shows a glass substrate of flat panel display in accordance with an embodiment of the present invention. -
FIG. 3 is an enlarged view of any one of gate driver IC chips inFIG. 2 . -
FIG. 4 shows an example of multiple gate driver IC chips inFIG. 2 are connected in cascade. -
FIG. 5 shows another example of multiple gate driver IC chips inFIG. 2 are connected in parallel. -
FIG. 6 is an enlarged view of another gate driver IC chip in accordance with an embodiment of the present invention. -
FIG. 7 is an enlarged view of any one of source driver IC chips inFIG. 2 . -
FIG. 8 shows an example of multiple source driver IC chips inFIG. 2 are connected in cascade. -
FIG. 9 shows another example of multiple source driver IC chips inFIG. 2 are connected in parallel. -
FIG. 10 is an enlarged view of another source driver IC chip in accordance with an embodiment of the present invention. - Referring to
FIG. 2 , aglass substrate 20 of flat panel display in accordance with an embodiment of the present invention is provided. Theglass substrate 20 is adapted for disposing a plurality of gatedriver IC chips 22 and a plurality of source driver IC chips 24 thereon. Theglass substrate 20 includes a display area 21 (as denoted by the dashed rectangle inFIG. 2 ), a plurality of firstconductive wires 23 a and a plurality of secondconductive wires 23 b. Thedisplay area 21 have a plurality of display elements P, a plurality of gate lines GL and a plurality of data lines DL formed therein. In this embodiment,FIG. 2 only shows one display element P, one gate line GL and one data line DL for the purpose of illustration, the display element P is electrically coupled to the gate line GL and the data line DL. The firstconductive wires 23 a are electrically coupled between four sides of the gatedriver IC chips 22 and thedisplay area 21, so as to transmit gate control signals outputted from multiple output terminals of the gatedriver IC chips 22 to thedisplay area 21. The gate control signals are for providing a gate control function applied to the display elements P. The secondconductive wires 23 b are electrically coupled between four sides of the sourcedriver IC chips 24 and thedisplay area 21, so as to transmit data signals outputted from multiple output terminals of the sourcedriver IC chips 24 to thedisplay area 21. The data signals are for providing display data applied to the display elements P. - Referring to
FIG. 3 , being an enlarged view of any one of the gatedriver IC chips 22 inFIG. 2 . As illustrated inFIG. 3 , theoutput terminals 220 of the gatedriver IC chip 22 are arranged at four sides of the gatedriver IC chip 22, to output the gate control signals to thedisplay area 21 through the firstconductive wires 23 a electrically coupled thereto. Each solid rectangle inFIG. 3 represents one ormultiple output terminals 220. The four sides of the gatedriver IC chip 22 include two long sides and two short sides. - Referring to
FIG. 4 , showing an example of the gate driver IC chips inFIG. 2 are connected in cascade. As illustrated inFIG. 4 , an external printedcircuit board 31 a provides a control signal and a power signal to the cascade-connected gatedriver IC chips 22 through a flexible printedcircuit board 32 a. The flexible printedcircuit board 32 a electrically coupled between the printedcircuit board 31 a and theglass substrate 20. The printedcircuit board 31 a generally has a timing controller and a DC-to-DC converter disposed thereon to provide the control signal and the power signal respectively. The timing controller and the DC-to-DC converter are not shown in accompanying drawings. - Referring to
FIG. 5 , showing another example of the gatedriver IC chips 22 inFIG. 2 are connected in parallel. As illustrated inFIG. 5 , an external printedcircuit board 31 b provides control signals and power signals to the parallel-connected gatedriver IC chips 22 through respective flexible printedcircuit boards 32 b. The flexible printedcircuit boards 32 b are electrically coupled between the printedcircuit board 31 b and theglass substrate 20. The printedcircuit board 31 b has a circuit configuration similar to that of the above-mentioned printedcircuit board 31 a, and thus will not be repeated herein. - Referring to
FIG. 6 , theoutput terminals 220 of each of the gatedriver IC chips 22 are not limited to be arranged at four sides the gate driver IC chip, and can be only arranged at two long sides of the four sides as illustrated inFIG. 6 , or three sides of the four sides. InFIG. 6 , each solid rectangle representsmultiple output terminals 220. - Referring to
FIG. 7 , being an enlarged view of any one of the sourcedriver IC chips 24 inFIG. 2 before completing a signal wire connectivity test. As illustrated inFIG. 7 , theoutput terminals 240 of the sourcedriver IC chip 24 are arranged at four sides of the sourcedriver IC chip 24, to output the respective red (R), green (G) and blue (B) signals of the data signals to thedisplay area 21 through the firstconductive wires 23 b electrically coupled thereto. InFIG. 7 , each solid rectangle represents one ormultiple output terminals 240. The four sides include two long sides and two short sides. Theoutput terminals 240 include a plurality offirst output terminals 241, a plurality ofsecond output terminals 242 and a plurality ofthird output terminals 243. Thefirst output terminals 241 constitute a first output terminal group to output the red signal. Thesecond output terminals 242 constitute a second output terminal group to output the green signal. Thethird output terminals 243 constitute a third output terminal group to output the blue signal. - The source
driver IC chip 24 inFIG. 7 further includes two first color short-circuit lines 245 (e.g., red short-circuit lines), one second color short-circuit line 246 (e.g., green short-circuit line) and one third color short-circuit line 247 (e.g., blue short-circuit line). The two first color short-circuit lines 245 are electrically coupled to the first output terminal group, the second color short-circuit line 246 is electrically coupled to the second output terminal group, and the third color short-circuit line 247 is electrically coupled to the third output terminal group. The first color short-circuit lines 245, the second color short-circuit line 246 and the third color short-circuit line 247 are parallel to one another. Conductive wires (not labeled) electrically coupled between the two first color short-circuit lines 245 and the first output terminal group do not cross the second color short-circuit line 246 and the third color short-circuit line 247. - It is indicated that, after completing the signal wire connectivity test, the connections of the first, second and third color short-
circuit lines driver IC chip 24 are cut off via laser cutting. - Referring to
FIG. 8 , showing an example of the sourcedriver IC chips 24 inFIG. 2 are connected in cascade. As illustrated inFIG. 8 , an external printedcircuit board 41 a provides a power signal to the cascade-connected sourcedriver IC chips 24 through a flexible printedcircuit board 42 a. The flexible printedcircuit board 42 a is electrically coupled between the printedcircuit board 41 a and theglass substrate 20. The printedcircuit board 41 a generally has a timing controller and a DC-to-DC converter disposed thereon. The DC-to-DC converter is for providing the power signal. In this embodiment, the timing controller and the DC-to-DC converter are illustrated. In addition, the printedcircuit board 41 a and the above-mentioned printedcircuit board 31 a can be the same printed circuit board. - Referring to
FIG. 9 , showing another example of the sourcedriver IC chips 24 inFIG. 2 are connected in parallel. As illustrated inFIG. 9 , an external printedcircuit board 41 b provides power signals to the parallel-connected sourcedriver IC chips 24 through a plurality of flexible printedcircuit boards 42 b. The flexible printedcircuit boards 42 b are electrically coupled between the printedcircuit board 41 b and theglass substrate 20. The printedcircuit board 41 b has a circuit configuration similar to that of the printedcircuit board 41 a, and thus will not be repeated herein. - Referring to
FIG. 10 , theoutput terminals 240 of each of the sourcedriver IC chips 24 in accordance with the present invention are not limited to be arranged at four sides of the sourcedriver IC chip 24, and can be only arranged at two long sides of the four sides as illustrated inFIG. 10 , or three sides (e.g., two short sides and one long side) of the four sides, or one short side and one long side of the four sides. InFIG. 10 , each solid rectangle representsmultiple output terminals 240. - It is indicated that the amount of the gate
driver IC chips 22 in accordance with the embodiment of the present invention is not limited to two as illustrated inFIG. 2 , and can be adjusted according to the requirement of practical applications. The gatedriver IC chips 22 are not limited to be arranged at single side of theglass substrate 20, and can be arranged at double sides of theglass substrate 20 instead. In addition, the amount of the sourcedriver IC chips 24 in accordance with the embodiment of the present invention is not limited to three as illustrated inFIG. 2 , and can be adjusted according to the requirement of practical applications. The first, second and third output terminal groups of each of the sourcedriver IC chips 24 are not limited to outputting the respective red, green and blue signals, and can be configured to output any one of red, green and blue signals as long as the outputted color signals are different from one another. - In summary, in the above-mentioned embodiments of the present invention, since output terminals of the IC chip are arranged at least two of the multiple sides thereof, facilitating the efficient utilization and miniaturization of the IC chip, and the drawback of a waste of chip area resulting from excessive length for the IC chip in the prior art can be overcome. When the IC chip is applied to a glass substrate of flat display panel, an increased miniaturization for the glass substrate can be achieved.
- The above description is given by way of example, and not limitation. Given the above disclosure, one skilled in the art could devise variations that are within the scope and spirit of the invention disclosed herein, including configurations ways of the recessed portions and materials and/or designs of the attaching structures. Further, the various features of the embodiments disclosed herein can be used alone, or in varying combinations with each other and are not intended to be limited to the specific combination described herein. Thus, the scope of the claims is not to be limited by the illustrated embodiments.
Claims (14)
1. A glass substrate of flat panel display, adapted for an integrated circuit chip having two opposite long sides and two opposite short sides, the glass substrate comprising:
a display area having a plurality of display elements; and
a plurality of conductive wires, electrically coupled to the integrated circuit chip and the display area to transmit a signal provided by the integrated circuit chip to the display area;
wherein the integrated circuit chip comprises a plurality of output terminals arranged at the two long sides, and each of the output terminals is electrically coupled to one of the conductive wires.
2. The glass substrate as claimed in claim 1 , wherein the integrated circuit chip further comprises a plurality of output terminals arranged at the two short sides.
3. A glass substrate of flat panel display, adapted for a first-type driver integrated circuit chip and a second-type driver integrated circuit chip, the glass substrate comprising:
a display area having a plurality of display elements;
a plurality of first conductive wires electrically coupled between the first-type driver integrated circuit chip and the display area, wherein each of the first conductive wires is for transmitting a first-type signal outputted from the first-type driver integrated circuit chip to the display area, and the first-type signals are for providing a same function applied to the display elements; and
a plurality of second conductive wires electrically coupled between the second-type driver integrated circuit chip and the display area, wherein each of the second conductive wires is for transmitting a second-type signal outputted from the second-type driver IC chip to the display area, and the second-type signals are for providing a same function applied to the display elements;
wherein the first-type driver integrated circuit chip comprises a plurality of sides and a plurality of output terminals arranged at two of the sides, each of the output terminals is electrically coupled to one of the first conductive wires.
4. The glass substrate as claimed in claim 3 , wherein the first-type driver integrated circuit chip comprises a source driver integrated circuit chip.
5. The glass substrate as claimed in claim 3 , wherein the first-type driver integrated circuit chip comprises a gate driver integrated circuit chip.
6. The glass substrate as claimed in claim 3 , wherein the sides comprise two opposite long sides and two opposite short sides.
7. The glass substrate as claimed in claim 6 , wherein the output terminals are arranged at the two long sides.
8. The glass substrate as claimed in claim 6 , wherein the output terminals are arranged at the two short sides and one of the two long sides.
9. The glass substrate as claimed in claim 6 , wherein the output terminals are arranged at one of the two long sides and one of the two short sides.
10. A display integrated circuit chip for receiving and outputting a first color signal, a second color signal and a third color signal, comprising:
a plurality of sides;
a plurality of output terminals arranged at two of the sides, each of the output terminals is for outputting one of the first color signal, the second color signal and the third color signal;
two first color short-circuit lines parallel disposed in the integrated circuit chip and electrically coupled to a first output terminal group of the output terminals which is for outputting the first color signal;
one second color short-circuit line disposed between and parallel with the first color short-circuit lines, wherein the second color short-circuit line is electrically coupled to a second output terminal group of the output terminals which is for outputting the second color signal; and
one third color short-circuit line disposed between and parallel with the first color short-circuit lines, wherein the third color short-circuit line is electrically coupled to a third output terminal group of the output terminals which is for outputting the third color signal;
wherein conductive wires electrically coupling the first color short-circuit lines with the first output terminal group do not cross the second and third color short-circuit lines.
11. The display integrated circuit chip as claimed in claim 10 , wherein the sides comprise two long sides and two short sides.
12. The display integrated circuit chip as claimed in claim 11 , wherein the output terminals are arranged at the two long sides.
13. The display integrated circuit chip as claimed in claim 11 , wherein the output terminals are arranged at the two short sides and one of the two long sides.
14. The display integrated circuit chip as claimed in claim 11 , wherein the output terminals are arranged at one of the two long sides and one of the two short sides.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US13/354,836 US8665406B2 (en) | 2008-11-10 | 2012-01-20 | Display integrated circuit chip |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW097143431A TWI457671B (en) | 2008-11-10 | 2008-11-10 | Glass substrate of a flat panel display and integrated circuit chip for display |
TW097143431 | 2008-11-10 |
Related Child Applications (1)
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US13/354,836 Division US8665406B2 (en) | 2008-11-10 | 2012-01-20 | Display integrated circuit chip |
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US20090121328A1 true US20090121328A1 (en) | 2009-05-14 |
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Family Applications (2)
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US12/356,265 Abandoned US20090121328A1 (en) | 2006-11-10 | 2009-01-20 | Glass Substrate of Flat Panel Display and Display Integrated Circuit Chip |
US13/354,836 Active 2029-11-08 US8665406B2 (en) | 2008-11-10 | 2012-01-20 | Display integrated circuit chip |
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Application Number | Title | Priority Date | Filing Date |
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US13/354,836 Active 2029-11-08 US8665406B2 (en) | 2008-11-10 | 2012-01-20 | Display integrated circuit chip |
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US (2) | US20090121328A1 (en) |
TW (1) | TWI457671B (en) |
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JP2021043457A (en) * | 2020-11-13 | 2021-03-18 | 株式会社ジャパンディスプレイ | Display device |
US11049445B2 (en) * | 2017-08-02 | 2021-06-29 | Apple Inc. | Electronic devices with narrow display borders |
US20210312843A1 (en) * | 2018-11-14 | 2021-10-07 | HKC Corporation Limited | Method of Manufacturing a Display Panel and Method of Detecting the Display Panel |
JP2022089855A (en) * | 2020-11-13 | 2022-06-16 | 株式会社ジャパンディスプレイ | Display |
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US10216302B2 (en) * | 2014-07-22 | 2019-02-26 | Synaptics Incorporated | Routing for an integrated display and input sensing device |
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US20080036957A1 (en) * | 2006-08-08 | 2008-02-14 | Au Optronics Corp. | Display panel module |
US7767474B2 (en) * | 2005-08-04 | 2010-08-03 | Samsung Electronics Co., Ltd. | Drive film, drive package for organic light emitting diode display, organic light emitting diode display including the same and method thereof |
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JPS60130721A (en) * | 1983-12-19 | 1985-07-12 | Citizen Watch Co Ltd | Liquid-crystal display device |
JP2005070360A (en) | 2003-08-22 | 2005-03-17 | Sony Corp | Electric circuit board |
JP4024773B2 (en) | 2004-03-30 | 2007-12-19 | シャープ株式会社 | WIRING BOARD, SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD, AND SEMICONDUCTOR MODULE DEVICE |
-
2008
- 2008-11-10 TW TW097143431A patent/TWI457671B/en active
-
2009
- 2009-01-20 US US12/356,265 patent/US20090121328A1/en not_active Abandoned
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US7767474B2 (en) * | 2005-08-04 | 2010-08-03 | Samsung Electronics Co., Ltd. | Drive film, drive package for organic light emitting diode display, organic light emitting diode display including the same and method thereof |
US20080036957A1 (en) * | 2006-08-08 | 2008-02-14 | Au Optronics Corp. | Display panel module |
Cited By (7)
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US11049445B2 (en) * | 2017-08-02 | 2021-06-29 | Apple Inc. | Electronic devices with narrow display borders |
US20210312843A1 (en) * | 2018-11-14 | 2021-10-07 | HKC Corporation Limited | Method of Manufacturing a Display Panel and Method of Detecting the Display Panel |
US11967259B2 (en) * | 2018-11-14 | 2024-04-23 | HKC Corporation Limited | Method of manufacturing a display panel and method of detecting the display panel |
JP2021043457A (en) * | 2020-11-13 | 2021-03-18 | 株式会社ジャパンディスプレイ | Display device |
JP7051982B2 (en) | 2020-11-13 | 2022-04-11 | 株式会社ジャパンディスプレイ | Display device |
JP2022089855A (en) * | 2020-11-13 | 2022-06-16 | 株式会社ジャパンディスプレイ | Display |
JP7282944B2 (en) | 2020-11-13 | 2023-05-29 | 株式会社ジャパンディスプレイ | Display device |
Also Published As
Publication number | Publication date |
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TWI457671B (en) | 2014-10-21 |
US8665406B2 (en) | 2014-03-04 |
US20120113163A1 (en) | 2012-05-10 |
TW201019019A (en) | 2010-05-16 |
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Owner name: AU OPTRONICS CORP., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:HSU, SHENG-KAI;YANG, CHIH-HSIANG;HSIEH, MENG-YING;REEL/FRAME:022128/0938 Effective date: 20090116 |
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