US20060156262A1 - Method and apparatus for supporting verification, and computer product - Google Patents

Method and apparatus for supporting verification, and computer product Download PDF

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Publication number
US20060156262A1
US20060156262A1 US11/101,520 US10152005A US2006156262A1 US 20060156262 A1 US20060156262 A1 US 20060156262A1 US 10152005 A US10152005 A US 10152005A US 2006156262 A1 US2006156262 A1 US 2006156262A1
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Prior art keywords
verification
item list
sequential
item
description
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English (en)
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Kenji Abe
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Socionext Inc
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Fujitsu Ltd
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Publication of US20060156262A1 publication Critical patent/US20060156262A1/en
Priority to US11/747,026 priority Critical patent/US7685546B2/en
Assigned to FUJITSU MICROELECTRONICS LIMITED reassignment FUJITSU MICROELECTRONICS LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FUJITSU LIMITED
Assigned to FUJITSU SEMICONDUCTOR LIMITED reassignment FUJITSU SEMICONDUCTOR LIMITED CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: FUJITSU MICROELECTRONICS LIMITED
Assigned to SOCIONEXT INC. reassignment SOCIONEXT INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FUJITSU SEMICONDUCTOR LIMITED
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318314—Tools, e.g. program interfaces, test suite, test bench, simulation hardware, test compiler, test program languages
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318371—Methodologies therefor, e.g. algorithms, procedures

Definitions

  • the present invention relates to a method and an apparatus for supporting verification in large-scale integration (LSI) design, and a computer product.
  • LSI large-scale integration
  • LSI design improvement of work efficiency by shortening a design period has conventionally been demanded.
  • a verification process which is rather time consuming, to verify whether an LSI properly operates is essential.
  • the verification process is important to maintain high quality.
  • a verification item list in a free format is used.
  • the verification item list is formed in a table, and verification items that are extracted from a specification of an LSI by a third party, such as an outsider, an outside segment, and an outside company, are listed up in the table.
  • a format of the verification item list is not standardized, and is different among third parties.
  • the apparatus includes a functional-structure-information input unit, a condition input unit, a verification-item-function creating unit, and a verification-item extracting unit.
  • the functional-structure-information input unit inputs functional structure information that indicates functions of a verification target device to be verified whether the verification target device operates properly.
  • the condition input unit inputs conditions relating to input/output sequences to be provided to the verification target device.
  • the verification-item-function creating unit creates a verification item function that completely satisfies the conditions based on the functional structure information.
  • the verification-item extracting unit extracts a combination of elements that form the functional structure information as a verification item, based on the verification item function.
  • a result of review for evaluating a quality of the verification items is dependent on experience and ability of the members involved in the review.
  • the verification items are extracted without reference.
  • schedule arrangement itself can be a trouble for a coordinator, taking time and labor.
  • schedule arrangement does not proceed smoothly, a reviewing period becomes long.
  • a total time required for the LSI design increases.
  • the review usually requires about two hours to half a day. This not only makes the verification period long, but also causes a delay in other processes in the LSI design because of binding hours constraints for the members.
  • a verification supporting apparatus includes an acquiring unit that acquires a first verification-item list in which a verification item that indicates a content of verification for a verification target is listed in an arbitrary format, a functional specification that is an electronic specification including a functional description specifying a function of the verification target, and a sequential specification that is an electronic specification including a sequential description specifying a sequence of the verification target; a keyword extracting unit that extracts a keyword about the verification target from the first verification-item list; a creating unit that creates a second verification-item list that includes verification items in a format in which each of the verification items is formed with the functional description and the sequential description about an output action of the verification target; and a converting unit that converts the first verification-item list into a third verification-item list having a same format as the second verification-item list, based on the second verification-item list and the keyword.
  • a verification supporting method includes acquiring a first verification-item list in which a verification item that indicates a content of verification for a verification target is listed in an arbitrary format, a functional specification that is an electronic specification including a functional description specifying a function of the verification target, and a sequential specification that is an electronic specification including a sequential description specifying a sequence of the verification target; extracting a keyword about the verification target from the first verification-item list; creating a second verification-item list that includes verification items in a format in which each of the verification items is formed with the functional description and the sequential description about an output action of the verification target; and converting the first verification-item list into a third verification-item list having a same format as the second verification-item list, based on the second verification-item list and the keyword.
  • a computer-readable recording medium stores a verification supporting program that makes a computer execute the above verification supporting method according to the present invention.
  • FIG. 1 is a schematic of a hardware configuration of an apparatus for supporting verification according to an embodiment of the present invention
  • FIG. 2 is a block diagram of a functional configuration of the apparatus according to the present embodiment
  • FIG. 3 is a block diagram of a system LSI that includes a verification target
  • FIG. 4 is a table of a first verification-item list
  • FIG. 5 is a schematic of a functional specification of the verification target
  • FIG. 6 is a schematic of a sequential specification relating to a read action of the verification target
  • FIG. 7 is a schematic of a sequential specification relating to a write action of the verification target
  • FIG. 8 is a schematic of a verification keyword list
  • FIG. 9 is a schematic for explaining extraction of a sequential description from a sequence diagram relating to the read action.
  • FIG. 10 is a schematic for explaining extraction of a sequential description from a sequence diagram relating to the write action
  • FIG. 11 is a table of a second verification-item list
  • FIG. 12 is a table of a third verification item list
  • FIG. 13 is a table of an evaluation list
  • FIG. 14 is a schematic of a latest functional specification
  • FIG. 15 is a schematic of a latest sequential specification
  • FIG. 16 is a table of a fourth verification-item list
  • FIG. 17 is a table of an evaluation list obtained as a result of additional verification
  • FIG. 18 is a flowchart of a procedure for a verification supporting process according to the present embodiment.
  • FIG. 19 is a flowchart of the procedure for the verification supporting process.
  • FIG. 1 is a schematic of a hardware configuration of an apparatus for supporting verification according to an embodiment of the present invention.
  • the apparatus includes a central processing unit (CPU) 101 , a read only memory (ROM) 102 , a random access memory (RAM) 103 , a hard disk drive (HDD) 104 , a hard disk (HD) 105 , a flexible disk drive (FDD) 106 , a flexible disk (FD) 107 as a removable recording medium, a display 108 , an interface (I/F) 109 , a keyboard 110 , a mouse 111 , a scanner 112 , and a printer 113 .
  • CPU central processing unit
  • ROM read only memory
  • RAM random access memory
  • HDD hard disk drive
  • HD hard disk
  • FDD flexible disk drive
  • FD flexible disk
  • FD flexible disk
  • the CPU 101 controls a whole of the apparatus.
  • the ROM 102 stores a computer program such as a boot program.
  • the RAM 103 is used as a work area of the CPU 101 .
  • the HDD 104 controls read/write of data from/to the HD 105 in accordance with the control of the CPU 101 .
  • the HD 105 stores data that is written in accordance with the control of the HDD 104 .
  • the FDD 106 controls read/write of data from/to the FD 107 in accordance with the control of the CPU 101 .
  • the FD 107 stores data that is written by a control of the FDD 106 and lets the apparatus read the data stored in the FD 107 .
  • a compact disc-read only memory CD-ROM
  • CD-R compact disc-readable
  • CD-RW compact disc-rewritable
  • MO magnetic optical disc
  • DVD digital versatile disc
  • the display 108 displays a curser, an icon, a tool box as well as data such as documents, images, and functional information.
  • a cathode ray tube (CRT), a thin film transistor (TFT) liquid crystal display, or a plasma display can be used as the display 108 .
  • the I/F 109 is connected to a network 114 such as the Internet through a communication line and is connected to other devices through the network 114 .
  • the I/F 109 controls the network 114 and an internal interface to control input/output of data to/from external devices.
  • a modem or a local area network (LAN) adapter can be used as the I/F 109 .
  • the keyboard 110 includes keys for inputting characters, numbers, and various instructions, and is used to input data.
  • a touch panel input pad or a numerical key pad may also be used as the keyboard 110 .
  • the mouse 111 is used to shift the curser, select a range, shift windows, and change sizes of the windows on a display.
  • a track ball or a joy stick may be used as a pointing device if functions similar to those of the mouse 111 are provided.
  • the scanner 112 optically captures an image and inputs image data to the apparatus.
  • the scanner 112 may be provided with an optical character read (OCR) function.
  • OCR optical character read
  • the printer 113 prints the image data and document data.
  • a laser printer or an inkjet printer may be used as the printer 113 .
  • FIG. 2 is a block diagram of a functional configuration of the apparatus according to the present embodiment.
  • an apparatus for supporting verification 200 includes an acquiring unit 201 , a keyword extracting unit 202 , a sequential description extracting unit 203 , a creating unit 204 , a converting unit 205 , a verification-item extracting unit 206 , a calculating unit 207 , a detecting unit 208 , and a verification-content extracting unit 209 .
  • the acquiring unit acquires a first verification-item list, an electronic specification that specifies functions of a verification target (hereinafter, “functional specification”), and an electronic specification that specifies a sequence of the verification target (hereinafter, “sequential specification”).
  • the verification target is an LSI that is required to be verified.
  • FIG. 3 is a block diagram of a system LSI that includes the verification target.
  • a system LSI 300 includes a CPU 301 , a RAM 302 , and a device under test (DUT) 303 .
  • the DUT 303 is the verification target, and in this example, the DUT 303 represents a RAM interface with which data is communicated between the CPU 301 and the RAM 302 .
  • the first verification-item list is electronic information that includes verification contents written in a free format.
  • the first verification-item list is formed in a format of table, and in the table, verification items that are extracted from a specification of an LSI by a third party, such as an outsider, an outside segment, and an outside company, are listed up.
  • a format of the first verification-item list is not standardized, and is different among third parties.
  • the first verification-item list is called a golden verification item list without any inadequacy.
  • FIG. 4 is a table of the first verification-item list.
  • a first verification-item list 400 shown in FIG. 4 is a group of the verification items for the DUT 303 .
  • the first verification-item list includes verification items 401 to 403 . Verification contents of the verification items 401 to 403 are written in a text format, and the verification contents of each of the verification items 401 to 403 are as follows.
  • the electronic specification is a computer-readable electronic specification that is written in an object oriented language, such as the UML.
  • the functional specification specifies functions of the verification target. Specifically, the functional specification can be written in a form of a use case diagram in the UML.
  • the sequential specification specifies a sequence of the verification target. Specifically, the sequential specification can be written in a form of a sequence diagram in the UML.
  • FIG. 5 is a schematic of the functional specification of the verification target.
  • FIGS. 6 and 7 are schematics of the sequential specification of the verification target.
  • a use case diagram 500 written in the UML is shown in FIG. 5 .
  • the use case diagram 500 indicates a function of the DUT 303 shown in FIG. 3 .
  • the use case diagram 500 includes actors 501 and 502 , and a system 503 .
  • the actor 501 represents the CPU 301
  • the actor 502 represents the RAM 302 .
  • the system 503 represents the DUT 303 , and includes use case descriptions that indicate functions of the DUT 303 .
  • the use case descriptions shown in FIG. 5 includes a use case description 531 that indicates a read function of the DUT 303 and a use case description 532 that indicates a write function of the DUT 303 .
  • sequence diagrams 600 and 700 are shown in FIGS. 6 and 7 respectively.
  • the sequence diagram 600 indicates the read action of the DUT 303
  • the sequence diagram 700 indicates the write action of the DUT 303 .
  • the sequence diagram 600 includes the actors 501 and 502 , an object 603 , and messages 611 to 616 .
  • Each of an actor name “CPU” of the actor 501 , the actor name “RAM” of the actor 502 , an object name “DUT” of the object 603 is a sequential description that indicates an action target in the sequence diagram 600 (and in the sequence diagram 700 and a sequence diagram 1500 ).
  • the message 611 is a sequential description that indicates an action of transmitting a read-request from the actor 501 to the object 603 .
  • the message 612 is a sequential description that indicates an action of transmitting a write-request from the actor 501 to the object 603 .
  • the message 613 is a sequential description that indicates an action of transmitting a read-address from the object 603 to the actor 502 .
  • the message 614 is a sequential description that indicates an action of transmitting read-data from the actor 502 to the object 603 .
  • the message 615 is a sequential description that indicates an action of transmitting a read-response from the object 603 to the actor 501 .
  • the message 616 is a sequential description that indicates an action of transmitting the read-data from the object 603 to the actor 501 .
  • the sequence diagram 700 shown in FIG. 7 includes the actors 501 and 502 , the object 603 , and messages 711 to 716 .
  • the message 711 is a sequential description that indicates an action of transmitting a write-request from the actor 501 to the object 603 .
  • the message 712 is a sequential description that indicates an action of transmitting an action of transmitting a write-address form the actor 501 to the object 603 .
  • the message 713 is a sequential description that indicates an action of transmitting a write-data from the actor 501 to the object 603
  • the message 714 is a sequential description that indicates an action of transmitting write-data from the object 603 to the actor 502 .
  • the message 715 is a sequential description that indicates an action of transmitting a write-data from the object 603 to the actor 501 .
  • the message 716 is a sequential description that indicates an action of transmitting a write-response from the object 603 to the actor 501 .
  • the acquiring unit 201 acquires the first verification-item list 400 and the electronic specification by receiving the first verification-item list 400 and the electronic specification from an external server through the network 114 or by selecting from a database with operation of the keyboard 110 or the mouse 111 shown in FIG. 1 .
  • a function of the acquiring unit 201 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 , or by the I/F 109 shown in FIG. 1 .
  • the keyword extracting unit 202 shown in FIG. 2 extracts keywords relating to the verification target (hereinafter, “verification keyword”) from the first verification-item list 400 acquired. Specifically, the keyword extracting unit 202 extracts the verification keywords by extracting nouns from descriptions of the verification contents of the verification items 401 to 403 in the first verification-item list 400 .
  • a verification keyword database (not shown) may be prepared in advance, and the verification keywords may be extracted by extracting, from the first verification-item list 400 , verification keywords that match with verification keywords included in the verification keyword database.
  • FIG. 8 is a schematic of a verification keyword list thus listed up.
  • the verification keyword database includes “read-data”, “RAM”, “write-data”, “reset”, and “hang-up”, keywords, “read-data”, “RAM”, “write-data”, “reset”, and “hang-up”, can be extracted from the verification items 401 to 403 .
  • a verification keyword list 800 in which these keywords extracted are compiled are shown in FIG. 8 .
  • a function of the keyword extracting unit 202 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • the sequential description extracting unit 203 shown in FIG. 2 extracts, from the sequential specification, sequential descriptions that do not match with the verification keywords extracted. Specifically, the sequential description extracting unit 203 extracts sequential descriptions that do not match with the verification keywords extracted from among sequential descriptions relating to an output action of the object 603 (DUT 303 ) in the sequence diagrams 600 and 700 shown in FIGS. 6 and 7 respectively.
  • FIG. 9 is a schematic for explaining extraction of a sequential description from the sequence diagram 600 relating to a read action.
  • the messages 613 , 615 , and 616 shown with bold arrows represent the sequential descriptions that indicate the output action of the object 603 (DUT 303 ).
  • the actor 502 and the messages 614 and 616 in a broken-line-box in FIG. 9 represent the sequential descriptions that match with the verification keywords in the verification keyword list 800 shown in FIG. 8 . Therefore, the sequential description extracting unit 203 extracts the messages 613 and 615 that are not in the broken-line-box, namely “read-address” and “read-response”, from among the messages 613 , 615 , and 616 shown with bold lines in FIG. 9 .
  • FIG. 10 is a schematic for explaining extraction of a sequential description from the sequence diagram 700 relating to a write action.
  • the messages 713 to 716 shown with bold arrows represent the sequential descriptions that indicate the output action of the object 603 (DUT 303 ).
  • the actor 502 and the messages 714 and 715 in a broken-line-box in FIG. 10 represent the sequential descriptions that match with the verification keywords in the verification keyword list 800 shown in FIG. 8 . Therefore, the sequential description extracting unit 203 extracts the messages 714 and 716 that are not in the broken-line-box, namely “write-address” and “write-response”, from among the messages 714 to 716 shown with bold lines in FIG. 10 Specifically, a function of the sequential description extracting unit 203 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • the creating unit 204 shown in FIG. 2 creates a second verification-item list based on a functional description in the functional specification and the sequential description relating to the output action of the verification target in the sequential specification.
  • a format of the verification item list may be such a format that a verification item included is formed with the function description and the sequential description relating to the output action.
  • the second verification-item list may be formed in such a format that a verification item included in the second verification-item list is formed with the use case description in the use case diagram 500 shown in FIG. 5 and the sequential description in the sequence diagrams 600 and 700 shown in FIGS. 6 and 7 respectively.
  • FIG. 11 is a table of the second verification-item list.
  • a second verification-item list 1100 is formed in the format in which a verification item in the second verification-item list 1100 is formed with the use case description and the sequential description (message). If the use case diagram 500 is acquired, the use case descriptions in the second verification-item list 1100 are “read” of the use case description 531 and “write” of the use case description 532 .
  • the sequential descriptions in the second verification-item list 1100 are the messages 613 , 615 , and 616 (“read-address”, “read-response”, and “read-data”), and the messages 714 to 716 (“write-address”, “write-data”, and “write-response”).
  • a correspondence between the use case description and the sequential description can be determined based on a connection between the use case description and the actors in the use case diagram 500 , and input and output of the messages that occur between the actors and the object in the sequence diagrams 600 and 700 .
  • a function of the creating unit 204 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • the converting unit 205 shown in FIG. 2 converts, based on the second verification-item list 1100 and the verification keywords extracted, a format of the first verification-item list 400 into a format identical to the format of the second verification-item list 1100 to create a third verification item list. Specifically, the converting unit 205 converts the format of the first verification-item list 400 by deleting the sequential descriptions that are extracted by sequential description extracting unit 203 from the sequential descriptions in the second verification-item list 1100 .
  • the sequential descriptions that are extracted by sequential description extracting unit 203 are deleted.
  • the sequential descriptions to be deleted are “read-address” of the message 613 , “read-response” of the message 615 , “write-address” of the message 714 , and “write-response” of the message 716 .
  • FIG. 12 is a table of the third verification item list.
  • a third verification item list 1200 shown in FIG. 13 is formed in a format in which a verification item in the third verification item list 1200 is formed with the use case description and the sequential description.
  • the formats of the first verification-item list 400 and the second verification-item list 1100 are unified by providing the converting unit 205 .
  • a function of the converting unit 205 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • the verification-item extracting unit 206 shown in FIG. 2 extracts, from the second verification-item list 1100 , verification items that are not included in the third verification item list 1200 . Specifically, the verification-item extracting unit 206 extracts the verification item of which the use case description is “read” and the sequential description is “read-address”, the verification item of which the use case description is “read” and the sequential description is “read-response”, the verification item of which the use case description is “write” and the sequential description is “write-address”, and the verification item of which the use case description is “write” and the sequential description is “write-response” as the verification items that are not included in the third verification item list 1200 .
  • verification item that are missed to be included in the first verification-item list 400 can be identified.
  • a function of the verification-item extracting unit 206 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • the calculating unit 207 calculates coverage based on the second verification-item list 1100 and the third verification item list 1200 .
  • the coverage is a rate that indicates completeness of the first verification-item list 400 in covering the verification items of the second verification-item list 1100 , and is expressed in a fraction or a percentage. For example, the number of the verification items in the second verification-item list 1100 shown in FIG. 11 is six. The number of the verification items in the third verification item list 1200 shown in FIG. 12 is two. Therefore, the coverage is 2/6, that is 33%.
  • a reference for completing the verification process can be set, and the first verification-item list 400 can be an evaluation reference for the completeness of verification.
  • a function of the verification-item extracting unit 206 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • the detecting unit 208 detects a verification keyword that does not match with the sequential descriptions in the sequential specification in the verification keywords extracted by the keyword extracting unit 202 .
  • the detecting unit 208 detects “reset” and “hang-up” in the verification keyword list 800 shown in FIG. 8 as the verification keywords that do not match with the sequential descriptions in the sequence diagrams 600 and 700 .
  • a function of the detecting unit 208 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • the verification-content extracting unit 209 extracts a verification content that includes the verification keyword detected by the detecting unit 208 from among the verification contents in the first verification-item list 400 . Specifically, the verification-content extracting unit 209 extracts, from the first verification-item list 400 , the verification content that includes the verification keywords, “rest” and “hang-up”, which is the verification content, “is it possible to reset during read/write without causing a hang-up?” of the verification item 403 .
  • a function of the verification-content extracting unit 209 is realized by the CPU 101 executing a computer program that is recorded in, for example, the ROM 102 , the RAM 103 , the HD 105 , and the FD 107 shown in FIG. 1 .
  • FIG. 13 is a table of an evaluation list that is obtained by the apparatus 200 .
  • the evaluation list includes FIG. 12 the second verification-item list 1100 .
  • a description “added” is written in the verification content.
  • the verification content of the verification item that includes the sequential description in the third verification item list 1200 is written. Specifically, for the verification item of which the use case description is “read” and the sequential description is “read-data” shown in FIG. 13 , the verification content, “is it possible to read read-data from a RAM properly?“of the verification item 401 that includes “read-data” is written from among the verification contents in the first verification-item list 400 .
  • the apparatus 200 may transmit the evaluation list 1300 to a computer terminal of a verification client, display on the display 108 , or output the evaluation list 1300 from the printer 113 .
  • Additional verification is verification that becomes necessary after the evaluation list 1300 is created.
  • the additional verification is required due to update of the electronic specification for additional functions and sequences for the verification target.
  • the additional verification can be carried out with the acquiring unit 201 , the creating unit 204 , the verification-item extracting unit 206 , and the calculating unit 207 .
  • the acquiring unit 201 acquires a latest functional specification obtained by updating (adding, modifying, and deleting) the functional specification, and a latest sequential specification obtained by updating the sequential specification.
  • FIG. 14 is a schematic of the latest functional specification
  • FIG. 15 is a schematic of the latest sequential specification.
  • a use case diagram 1400 written in the UML is shown in FIG. 14 .
  • the use case diagram 1400 indicates updated functions of the DUT 303 .
  • FIG. 14 like reference characters are given to like parts in FIG. 5 , and same explanations are omitted.
  • system 1403 includes an additional use case description 1433 that indicates a clear function of the DUT 303 in addition to the use case descriptions 531 and 532 .
  • a sequence diagram 1500 which is newly added, written in the UML is shown in FIG. 15 .
  • the sequence diagram 1500 indicates a clear action of the DUT 303 , and includes the actors 501 and 502 , the object 603 , and messages 1511 to 1513 .
  • the message 1511 is a sequential description that indicates an action of transmitting a clear-request from the actor 501 to the object 603 .
  • the message 1512 is a sequential description that indicates an action of transmitting the clear-request from the object 603 to the actor 502 .
  • the message 1513 is a sequential description that indicates an action of transmitting the clear-response from the object 603 to the actor 501 .
  • the creating unit 204 creates a fourth verification-item list based on a functional description in the latest function al specification and a sequential description, which relates to the output action of the verification target, in the latest sequential specification.
  • the fourth verification-item list is formed in a format in which a verification item in the fourth verification-item list is formed with the function description in the latest functional specification and the sequential description in the latest sequential specification.
  • the use case diagram 1400 represents the latest functional specification
  • the sequence diagrams 600 , 700 , and 1500 represent the latest sequential specification.
  • the fourth verification-item list is formed in a format in which the verification item is formed with the use case description in the use case diagram 1400 , the sequential description in the sequence diagram 600 , the sequential description in the sequence diagram 700 , and the sequential description in the sequence diagram 1500 .
  • the fourth verification-item list can be created in a same format as that of the second verification-item list. In other words, it is possible to uniform the formats before and after update of the electronic specifications.
  • FIG. 16 is a table of the fourth verification-item list.
  • a fourth verification-item list 1600 shown in FIG. 16 is formed in the format in which a verification item in the fourth verification-item-list is formed with the use case description and the sequential description (message). If the use case diagram 1400 shown in FIG. 14 is acquired, the use case descriptions in the fourth verification-item list 1600 are “read” of the use case description 531 , “write” of the use case description 532 , and “clear” of the use case description 1433 .
  • the use case descriptions in the fourth verification-item list 1600 are the messages 613 , 615 , and 616 (“read-address”, “read-response”, and “read-data”), and the messages 714 to 716 (“write-address”, “write-data”, and “write-response”).
  • a correspondence between the use case description and the sequential description can be determined based on a connection between the use case description and the actors in the use case diagram 1400 , and the input and output of the messages that occur between the actors and the object in the sequence diagrams 600 and 700 , and input and output of the messages that occur between the actors and the object in the sequence diagram 1500 .
  • the verification-item extracting unit 206 extracts, from the fourth verification-item list 1600 , verification items that are not included in the second verification-item list 1100 . Specifically, the verification-item extracting unit 206 extracts the verification item of which the use case description is “clear” and the sequential description is “clear-request”, and the verification time of which the use case description is “clear” and the sequential description is “clear-response” as the verification items that are not included in the second verification-item list 1100 .
  • the additional function and the additional sequence added in the electronic specification are automatically identified, and additional verification items that cover the additional function and the additional sequence can be automatically specified.
  • the calculating unit 207 calculates an additional verification requirement rate that indicates to what extent the additional verification is necessary for the latest functional specification and the latest sequential specification.
  • the calculating unit 207 calculates the additional verification requirement rate based on the number of the verification items in the fourth verification-item list 1600 and the number of the verification items that are extracted from the fourth verification-item list 1600 as the verification items that are not included in the second verification-item list 1100 .
  • the additional verification requirement rate is expressed in a fraction or a percentage.
  • the number of the verification items in the fourth verification-item list 1600 is eight.
  • the number of the verification items extracted from the fourth verification-item list 1600 is two. Therefore, the additional verification requirement rate is 2/8, that is 25%. With the additional verification requirement rate, it is possible to understand to what extent the verification items are added, and is possible to estimate work for the additional verification.
  • FIG. 17 is a table of an evaluation list obtained as a result of the additional verification.
  • An evaluation list 1700 is obtained by updating the evaluation list 1300 shown in FIG. 13 reflecting results of the additional verification.
  • Verification items of which the verification content includes a description “completed” are verification items that have already been verified.
  • Verification items of which the verification content includes a description “added” are verification items that are newly added for the additional verification.
  • the apparatus 200 converts the format of the first verification-item list 400 into the format same as the format of the second verification-item list 1100 to create the third verification item list 1200 based on the second verification-item list 1100 and the verification keywords extracted.
  • the formats of the first verification-item list 400 and the second verification-item list 1100 are unified.
  • the format thus unified enables efficient comparison between the first verification-item list 400 and the second verification-item list 1100 at ease, and makes it possible to specify a redundant verification item and a missing verification item. Therefore, completeness in the verification can be improved.
  • the converting unit 205 converts the first verification-item list 400 in to the third verification item list 1200 by deleting the sequential descriptions extracted by the sequential description extracting unit 203 from among the sequential descriptions in the second verification-item list 1100 .
  • sequences to be verified that are missing in the first verification-item list 400 can be identified.
  • the redundant verification item and the missing verification item can be specified with high accuracy, thereby improving the completeness of verification.
  • the verification-item extracting unit 206 extracts the verification item that is not included in the third verification item list 1200 from the second verification-item list 1100 .
  • the verification item that is missing in the first verification-item list 400 can be automatically identified.
  • the redundant verification item and the missing verification item can be specified with high accuracy, thereby improving the completeness in the verification, reducing human cost and time spent on the verification, and shortening the design period for the LSI.
  • the verification-content extracting unit 209 extracts the verification content that includes the verification keyword detected by the detecting unit 208 from among the verification contents in the first verification-item list 400 .
  • the verification content extracted is identified as the verification content that is required to be reviewed. By reviewing the verification content extracted, it is possible to obtain a clue for determining which the functional specification, the sequential specification, or the verification items listed up in the first verification-item list 400 an error is originated to.
  • the creating unit 204 creates the fourth verification-item list 1600 based on the latest functional specification and the latest sequential specification.
  • the fourth verification-item list 1600 that is formed in the format same as the format of the second verification-item list 1100 . Therefore, for the fourth verification-item list 160 , it is only necessary to perform the verification for the additional verification item. As a result, it is possible to carry out the verification process easily and efficiently, and is possible to improve the completeness of verification in the additional verification.
  • the verification-item extracting unit 206 extracts, from the fourth verification-item list 1600 , the verification item that is not included in the second verification-item list 1100 .
  • the verification items that are newly added based on the latest functional specification and the latest sequential specification can be automatically identified. As a result, it is possible to improve the completeness of verification in the additional verification, to reduce the human cost and the time spent for the verification, and to shorten the design period for the LSI.
  • the calculating unit 207 calculates the additional verification requirement rate that indicates to what extent the additional verification become necessary due to the update of the electronic specification. This enables to set a reference for completing the additional verification, and criteria for evaluating the completeness for the additional verification.
  • FIGS. 18 and 19 are flowcharts of a procedure for a verification supporting process according to an embodiment of the present invention.
  • the keyword extracting unit 202 extracts the verification keyword (step S 1802 ).
  • the sequential description extracting unit 203 extracts the sequential description that relates to the output action of the DUT 303 from the sequence diagrams 600 and 700 for each of the use case descriptions (step S 1804 ). Then, the creating unit 204 creates the second verification-item list 1100 (step S 1805 ).
  • the format of the first verification-item list 400 is converted into the format same as the format of the second verification-item list 1100 (step S 1806 ).
  • the third verification item list 1200 is created.
  • the verification-item extracting unit 206 extracts the verification item that is not included in the third verification item list 1200 from the second verification-item list 1100 (step S 1807 ).
  • the calculating unit 207 calculates the coverage (step S 1808 ), and the detecting unit 208 detects the verification keywords (“reset” and “hang-up”) that do not match with the sequential description in the sequence diagrams 600 and 700 (step S 1809 ).
  • the verification-content extracting unit 209 extracts the verification content that includes the verification keywords detected (step S 1810 ).
  • the evaluation list 1300 is created (step S 1811 ).
  • the evaluation list 1300 can be provided to the verification client.
  • the evaluation list 1300 is updated (step S 1813 ).
  • the verification content “added” is updated to “completed” in the evaluation list 1300 .
  • the process is finished.
  • the latest functional specification (the use case diagram 1400 ) and the latest sequential specification (the sequence diagrams 600 and 700 ) are not acquired (“NO” at step S 1814 ) after step S 1813 , the process is finished.
  • the latest functional specification (the use case diagram 1400 ) and the latest sequential specification (the sequence diagrams 600 and 700 ) are acquired (“YES” at step S 1814 )
  • the creating unit 204 creates the fourth verification-item list 1600 (step S 1815 ).
  • the verification-item extracting unit 206 extracts the verification item that is not included in the second verification-item list 1100 , namely, the verification item of which the use case description is “clear” and the sequential description is “clear-request”, and the verification item of which the use case description is “clear” and the sequential description is “clear-response” (step S 1816 ).
  • the calculating unit 207 calculates the additional verification requirement rate (step S 1817 ), and the evaluation list 1300 is updated (step S 1818 ). Thus, the evaluation list 1700 is obtained.
  • the verification supporting process it is possible to avoid the verification process that requires a lot of time and more than one member to be involved as in the conventional review.
  • the conventional review requires 3 to 10 people or more as the reviewing members spending two hours to half a day
  • the redundant verification item and the missing verification item are extracted based on comparison between the second verification-item list 1100 that is automatically obtained from the electronic specification and the first verification-item list 400 , which is an evaluation target. Even when there is an error in the first verification-item list 400 , if the review item is extracted, it is possible to detect the error in the electronic specification that is a factor of a redundant description or a missing description by reviewing the review item.
  • the verification item is automatically extracted from the verification item list in a free format easily and efficiently. Therefore, it is possible to improve the completeness of verification, to reduce the human cost, and to shorten the design period for the LSI.
  • the method for supporting verification that is explained in the present embodiment of the present invention is implemented by executing a computer program prepared in advance by a computer, such as a personal computer and a workstation.
  • the computer program is recorded in a computer-readable recording medium, such as the CD-ROM, the MO, and the DVD, and is executed by the computer reading out from the recording medium.
  • the computer program may be a transmission medium that is distributed through a network such as the Internet.

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  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
US11/101,520 2004-12-28 2005-04-08 Method and apparatus for supporting verification, and computer product Abandoned US20060156262A1 (en)

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US20070234250A1 (en) 2007-10-04

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