US20030019584A1 - Chuck assembly of etching apparatus for preventing byproducts - Google Patents

Chuck assembly of etching apparatus for preventing byproducts Download PDF

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Publication number
US20030019584A1
US20030019584A1 US10/054,414 US5441402A US2003019584A1 US 20030019584 A1 US20030019584 A1 US 20030019584A1 US 5441402 A US5441402 A US 5441402A US 2003019584 A1 US2003019584 A1 US 2003019584A1
Authority
US
United States
Prior art keywords
wafer
edge
edge ring
chuck assembly
chuck
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US10/054,414
Other languages
English (en)
Inventor
Chang-Won Choi
Tae-ryong Kim
Jaung-Joo Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Assigned to SAMSUNG ELECTRONICS CO., LTD. reassignment SAMSUNG ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KIM, TAE-RYONG, CHOI, CHANG-WON, KIM, JAUNG-JOO
Publication of US20030019584A1 publication Critical patent/US20030019584A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor

Definitions

  • the present invention relates to an etching apparatus of a semiconductor device, and more particularly, to an etching apparatus comprising a chuck assembly for preventing byproducts being formed along an edge portion of a wafer, thereby improving a production yield of a semiconductor device.
  • an etching process of semiconductor devices is performed to etch a certain portion of a wafer exposed by a photo-resist patterning process.
  • a plasma etching process comprises supplying a process gas on a wafer positioned between upper and lower electrodes, and then applying high frequency power to charge the process gas to a plasma state. The plasma then reacts with the portion of the wafer exposed during a photo-resist patterning process. It is required that the plasma-state gas uniformly reacts with the entire surface of the wafer.
  • FIG. 1 is a sectional view of a chuck assembly of a conventional etching apparatus
  • FIG. 2 is an enlarged sectional view of the portion II in FIG. 1.
  • a chuck assembly comprises a main body 12 for supporting a central portion of a wafer W except an edge portion of the wafer W.
  • An edge ring 14 is provided on an edge portion of the chuck main body 12 .
  • the edge ring 14 comprises a stepped portion and is made of similar silicon material as the wafer W. High frequency power is applied to an upper electrode 10 of the wafer W.
  • An inner side portion of the edge ring 14 comprises a step shape having a predetermined thickness for supporting the edge portion of the wafer W exposed by the step edge portion of the chuck main body 12 .
  • the bottom portion of the edge ring 14 is extended to the edge portion of the chuck body 12 and is supported by an insulating ring 16 fixed to a side wall of the chuck body 12 .
  • the edge ring 14 serves to distribute a plasma gas up to the edge portion of the wafer W in response to the high-frequency power applied to the upper electrode 10 of the wafer W.
  • the plasma gas affects the entire surface of the wafer W.
  • a slanted portion B at the edge side portion of the wafer W cannot be sufficiently etched to a desired thickness during the etching process.
  • residual byproducts of a cone shape remain at the slanted portion B of the wafer W.
  • these cone shaped residuals form a flow shaped pattern at a flat portion F on an inferior wafer along the edge portion of the wafer W during a following process, thereby decreasing a production yield and productivity thereof.
  • an etching apparatus comprising a chuck assembly capable of improving an etching rate at an edge portion of a wafer, thereby preventing byproducts from being formed along the edge portion of the wafer.
  • a chuck assembly of an etching apparatus comprises a chuck body comprising a stepped portion at an edge side portion of the chuck body, for supporting a central portion of a wafer; an edge ring, received in the stepped portion of the chuck body, for supporting an edge portion of the wafer, wherein the edge ring has less resistance than the resistance of the wafer; and an insulating ring provided at a surrounding portion of the chuck body, for supporting a bottom portion of the edge ring, the bottom portion of the edge ring being extended toward outside of the chuck body.
  • the difference in the resistance between the edge ring and the wafer is preferably about 0.005 to about 4.5 ⁇ .
  • the resistance of the edge ring is about 3.5 to about 1.5 ⁇ .
  • the edge ring preferably comprises a slanted step portion whose surface forms an angle of about 40 to about 80 degrees relative to a normal to the wafer surface.
  • the slanted step portion of the edge ring begins from about 1.5 to about 4.5 mm, more preferably, about 1.5 to about 2.5 mm from the edge portion of the wafer.
  • a chuck assembly for a semiconductor etching apparatus comprises a chuck body for supporting a semiconductor wafer; an edge ring, disposed on the chuck body, for supporting an edge portion of the wafer; an insulating ring, disposed on the outside portion of the chuck body, for supporting the edge ring; wherein the electrical resistance of the edge ring is less than the electrical resistance of the wafer so as to uniformly etch the portion of the wafer supported by the edge ring during an etch process.
  • FIG. 1 is a sectional view showing a chuck assembly of a conventional etching apparatus
  • FIG. 2 is an enlarged sectional view of the portion II of the chuck assembly of FIG. 1;
  • FIG. 3 is a plane view illustrating cone shaped residuals remained on a wafer in using the chuck assembly of FIG. 1 to etch the wafer;
  • FIG. 4 is a partial sectional view illustrating a chuck assembly of an etching apparatus according to an embodiment of the present invention.
  • FIG. 4 is a partial sectional view illustrating a chuck assembly of an etching apparatus according to an embodiment of the present invention.
  • a chuck assembly according to an embodiment of the present invention improves an accuracy of etching at an edge portion of a wafer and enables high frequency to be uniformly distributed over the wafer.
  • a chuck assembly according to an embodiment of the present invention comprises a chuck body 12 for supporting a center portion of a wafer W (except an edge portion of the wafer W).
  • An edge ring 20 which is formed in a stepped portion in the edge portion of the chuck body 12 , supports an edge portion of the wafer W.
  • An insulating ring (see, 16 in FIG. 1) is provided at a surrounding portion of the chuck body 12 for supporting a bottom portion of the edge ring 20 extended toward outside of the chuck body 12 .
  • the edge ring 20 is supported by the stepped portion of the chuck body 12 and the edge ring 20 comprises a stepped portion at an inner side portion thereof.
  • the edge ring 20 has less electrical resistance than the electrical resistance of the wafer W such that the difference in the resistance between the edge ring 20 and the wafer W is less than about 0.005 to about 4.5 ⁇ .
  • the wafer W preferably has resistance of about 5 106 .
  • edge ring 20 has less resistance than the resistance of the wafer W
  • high frequency power is evenly activated at the edge portion of the wafer W (that is placed on the edge ring 20 and the stepped portion of the chuck body 12 ), thereby effectively etching a slant portion (see, B in FIG. 2) at the edge portion of the wafer W and preventing cone shaped residuals from remaining along the edge portion of the wafer W.
  • surface “A” between an upper portion P′ and lower portion P of the inner side portion of the edge ring 14 is slanted at an angle ( ⁇ ) of about 15 degrees with respect to a vertical line (which, as shown, is a normal to surface of the wafer).
  • ⁇ angle
  • the upper portion P′ has an acute angle to the normal, i.e., keen-edged, the upper portion P′ serves to concentrate the plasma effect of high frequency power on undesired portions, thereby decreasing the etch rate at the edge portion of the wafer W.
  • the structure of the edge ring 20 comprises a surface “a” between an upper portion p′ and a lower portion p at an inner stepped portion of the edge ring 20 .
  • the surface “a” is gently slanted with a normal in an angle ( ⁇ ′) of about 40 to about 80 degrees, relative to a normal to the wafer surface.
  • the lower portion p of the edge ring 20 has a longer distance 1 from the edge portion of the wafer W than a distance L of the lower portion P of the edge ring 14 as shown in FIG. 2.
  • the distance 1 may have a range of about 1.5 to about 4.5 mm, more preferably a range of about 1.5 to about 2.5 mm.
US10/054,414 2001-07-25 2002-01-22 Chuck assembly of etching apparatus for preventing byproducts Abandoned US20030019584A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR2001-44892 2001-07-25
KR10-2001-0044892A KR100397891B1 (ko) 2001-07-25 2001-07-25 반도체 장치 식각설비의 척 조립체

Publications (1)

Publication Number Publication Date
US20030019584A1 true US20030019584A1 (en) 2003-01-30

Family

ID=19712525

Family Applications (1)

Application Number Title Priority Date Filing Date
US10/054,414 Abandoned US20030019584A1 (en) 2001-07-25 2002-01-22 Chuck assembly of etching apparatus for preventing byproducts

Country Status (4)

Country Link
US (1) US20030019584A1 (de)
JP (1) JP2003059913A (de)
KR (1) KR100397891B1 (de)
DE (1) DE10203146B4 (de)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050056627A1 (en) * 2003-09-12 2005-03-17 Orbotech Ltd Micro-machining employing multiple independently focused and independently steered beams
US20100101729A1 (en) * 2008-10-28 2010-04-29 Applied Materials, Inc. Process kit having reduced erosion sensitivity
US20180051375A1 (en) * 2016-08-19 2018-02-22 Samsung Electronics Co., Ltd. Substrate processing apparatus
US20200043740A1 (en) * 2017-05-31 2020-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Focus ring for plasma etcher
CN112542415A (zh) * 2019-09-20 2021-03-23 夏泰鑫半导体(青岛)有限公司 晶圆处理装置及半导体加工站
CN112708871A (zh) * 2019-10-25 2021-04-27 联芯集成电路制造(厦门)有限公司 使用于沉积室的载环
US11251026B2 (en) * 2017-03-31 2022-02-15 Mattson Technology, Inc. Material deposition prevention on a workpiece in a process chamber

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5069452B2 (ja) 2006-04-27 2012-11-07 アプライド マテリアルズ インコーポレイテッド 二重温度帯を有する静電チャックをもつ基板支持体
US20070283884A1 (en) * 2006-05-30 2007-12-13 Applied Materials, Inc. Ring assembly for substrate processing chamber
KR101445742B1 (ko) * 2014-04-11 2014-10-06 (주)티티에스 기판 지지 유닛

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5891348A (en) * 1996-01-26 1999-04-06 Applied Materials, Inc. Process gas focusing apparatus and method
US5942039A (en) * 1997-05-01 1999-08-24 Applied Materials, Inc. Self-cleaning focus ring
US6074488A (en) * 1997-09-16 2000-06-13 Applied Materials, Inc Plasma chamber support having an electrically coupled collar ring
US6284093B1 (en) * 1996-11-29 2001-09-04 Applied Materials, Inc. Shield or ring surrounding semiconductor workpiece in plasma chamber

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5292399A (en) * 1990-04-19 1994-03-08 Applied Materials, Inc. Plasma etching apparatus with conductive means for inhibiting arcing
US6113731A (en) * 1997-01-02 2000-09-05 Applied Materials, Inc. Magnetically-enhanced plasma chamber with non-uniform magnetic field
US5740009A (en) * 1996-11-29 1998-04-14 Applied Materials, Inc. Apparatus for improving wafer and chuck edge protection
KR200163027Y1 (ko) * 1997-05-26 1999-12-15 김영환 반도체 웨이퍼 식각챔버
KR20000011739U (ko) * 1998-12-08 2000-07-05 김영환 배선 공정 식각장치의 포커스 링 구조
KR20010029086A (ko) * 1999-09-29 2001-04-06 윤종용 웨이퍼 클램프
KR20010068847A (ko) * 2000-01-10 2001-07-23 윤종용 척을 둘러싸는 포커스 링을 포함하는 건식 식각 장치.
US6391787B1 (en) * 2000-10-13 2002-05-21 Lam Research Corporation Stepped upper electrode for plasma processing uniformity

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5891348A (en) * 1996-01-26 1999-04-06 Applied Materials, Inc. Process gas focusing apparatus and method
US6284093B1 (en) * 1996-11-29 2001-09-04 Applied Materials, Inc. Shield or ring surrounding semiconductor workpiece in plasma chamber
US5942039A (en) * 1997-05-01 1999-08-24 Applied Materials, Inc. Self-cleaning focus ring
US6074488A (en) * 1997-09-16 2000-06-13 Applied Materials, Inc Plasma chamber support having an electrically coupled collar ring

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050056627A1 (en) * 2003-09-12 2005-03-17 Orbotech Ltd Micro-machining employing multiple independently focused and independently steered beams
US20100101729A1 (en) * 2008-10-28 2010-04-29 Applied Materials, Inc. Process kit having reduced erosion sensitivity
US20180051375A1 (en) * 2016-08-19 2018-02-22 Samsung Electronics Co., Ltd. Substrate processing apparatus
US10465290B2 (en) * 2016-08-19 2019-11-05 Samsung Electronics Co., Ltd. Substrate processing apparatus
US11251026B2 (en) * 2017-03-31 2022-02-15 Mattson Technology, Inc. Material deposition prevention on a workpiece in a process chamber
US20200043740A1 (en) * 2017-05-31 2020-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Focus ring for plasma etcher
CN112542415A (zh) * 2019-09-20 2021-03-23 夏泰鑫半导体(青岛)有限公司 晶圆处理装置及半导体加工站
CN112708871A (zh) * 2019-10-25 2021-04-27 联芯集成电路制造(厦门)有限公司 使用于沉积室的载环
US11795544B2 (en) 2019-10-25 2023-10-24 United Semiconductor (Xiamen) Co., Ltd. Carrier ring used in a deposition chamber

Also Published As

Publication number Publication date
JP2003059913A (ja) 2003-02-28
KR20030010111A (ko) 2003-02-05
DE10203146A1 (de) 2003-02-20
KR100397891B1 (ko) 2003-09-19
DE10203146B4 (de) 2006-03-09

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Date Code Title Description
AS Assignment

Owner name: SAMSUNG ELECTRONICS CO., LTD., KOREA, REPUBLIC OF

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHOI, CHANG-WON;KIM, TAE-RYONG;KIM, JAUNG-JOO;REEL/FRAME:012533/0240;SIGNING DATES FROM 20010102 TO 20020102

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION