US20020060321A1 - Minimally- patterned, thin-film semiconductor devices for display applications - Google Patents

Minimally- patterned, thin-film semiconductor devices for display applications Download PDF

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US20020060321A1
US20020060321A1 US09904435 US90443501A US2002060321A1 US 20020060321 A1 US20020060321 A1 US 20020060321A1 US 09904435 US09904435 US 09904435 US 90443501 A US90443501 A US 90443501A US 2002060321 A1 US2002060321 A1 US 2002060321A1
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layer
electrode
display
pixel
transistor
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Peter Kazlas
Yu Chen
Kevin Denis
Paul Drzaic
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E Ink Corp
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E Ink Corp
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate

Abstract

A thin-film transistor array comprises at least first and second transistors. Each of the first and second transistors include a shared silicon layer, i.e., an active layer, having a thickness less than approximately 40 nm. The shared silicon layer extends continuously between the first and second transistors. The silicon layer may consist of unpatterned silicon. Heavily doped material may not be required at metal-silicon contact interfaces.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • [0001]
    The present application claims the benefit under 35 USC §119(e) of United States Provisional Patent Application Ser. No. 60/218,490, filed Jul. 14, 200, the entire contents of which are incorporated herein by reference. The present application is filed simultaneously with United States Patent Application entitled “Fabrication of Electronic Circuit Elements Using Patterned Semiconductor Layers”, attorney docket number INK-100, the entire contents of which are incorporated herein by reference.
  • FIELD OF THE INVENTION
  • [0002]
    The present invention relates generally to electronic displays and methods of manufacturing the electronic displays, and more particularly to, semiconductor devices for electronic display applications and methods of manufacturing the semiconductor devices.
  • BACKGROUND OF THE INVENTION
  • [0003]
    Some encapsulated, particle-based displays offer a useful means of creating electronic displays. There exist many versions of encapsulated particle-based displays including encapsulated electrophoretic displays, encapsulated suspended particle displays, and rotating ball displays.
  • [0004]
    Encapsulated, particle-based displays can be made highly reflective, bistable, and optically and electrically efficient. To obtain a high-resolution display, however, individual pixels of a display must be addressable without interference from adjacent pixels. One way to achieve this objective is to provide an array of nonlinear elements, such as transistors or diodes where each transistor or diode is associated with each pixel. An addressing electrode is connected to each pixel through the transistor or the diode.
  • [0005]
    The processes for manufacturing active matrix arrays of thin-film transistors and diodes are well established in the display technology. Thin-film transistors, for example, can be fabricated using various deposition and photolithography techniques. A transistor includes a gate electrode, an insulating dielectric layer, a dielectric layer and source and drain electrodes. Application of a voltage to the gate electrode provides an electric field across the dielectric layer, which dramatically increases the source-to-drain conductivity of the semiconductor layer. This change allows for electrical conduction between the source and the drain electrodes. Typically, the gate electrode, the source electrode, and the drain electrode are patterned. In general, the semiconductor layer is also patterned in order to minimize stray conduction (i.e., cross-talk) between neighboring circuit elements.
  • [0006]
    Liquid crystal displays commonly employ amorphous silicon (“a-Si”), thin-film transistors (“TFT”) as switching devices for display pixels. Such TFTs typically have a bottom-gate configuration. Within one pixel, a thin-film capacitor typically holds a charge transferred by the switching TFT. Thin-film transistors can be fabricated to provide high performance. Fabrication processes, however, can result in significant cost.
  • [0007]
    Referring to FIG. 1, a thin-film transistor, having typical contact structures, and a capacitor are illustrated in cross-section. The transistor and capacitor include bottom electrodes 153, 155, a silicon nitride (“SiN”) dielectric layer 154, an a-Si layer 156, an n+ a-Si contact layer 158, drain and pixel electrodes 159, and capacitor top electrode 192. The a-Si layer 156, the n+ a-Si contact layer 158 and the electrodes 159 are all patterned layers.
  • [0008]
    The n+ a-Si contact layer 158 is typically 40 nm thick and provides an ohmic contact between the a-Si layer 156 and the electrodes 159. The patterning of the n+ a-Si layer 158 generally requires overetching to assure complete removal of the n+ a-Si contact layer 158 along the channel portion of the a-Si layer 156. Thus, a portion of the a-Si layer 156 is removed during this overetch step. Hence, the a-Si layer 156, as-deposited, is traditionally 160 nm or more in thickness.
  • [0009]
    The high cost of manufacturing thin-film transistors results in part from patterning steps, which typically require the use of expensive photolithography equipment and masks, coating steps, and etching steps. An a-Si layer is typically patterned to leave islands of semiconductor material and thereby reduce leakage currents. Formation of the structures illustrated in FIG. 1 might require three lithography steps and four etching steps. Trends toward making higher performance devices make precision patterning even more important and manufacturing cost even greater.
  • [0010]
    Certain electronic devices, however, require low cost rather than high performance components. For such devices, it remains desirable to have means to obtain better yield and lower cost of manufacturing.
  • SUMMARY OF THE INVENTION
  • [0011]
    The invention is based in part on the realization that a low cost display device transistor array having a shared, very thin a-Si layer may support good image resolution while providing tolerable leakage currents. The invention features electronic circuits that have a lower manufacturing cost and methods of making electronic circuits that involve simpler processing steps. The circuits are particularly useful for addressing display media in a display device.
  • [0012]
    In a preferred embodiment, the circuits comprise thin-film transistors (“TFT”) that share a continuous semiconductor layer, herein referred to as the “active layer”, that mediates current between source and drain of each transistor in an array of transistors. The semiconductor layer may be unpatterned. The layer may be continuous in two dimensions, e.g., it may be shared by, and continuous between, TFTs in a two-dimensional array. The display medium controlled by the circuits may be tolerant of leakage currents that flow through the continuous semiconductor layer. Devices of the invention are of particular use in the fabrication of electrophoretic displays.
  • [0013]
    In a preferred embodiment, the continuous semiconductor layer is a very thin layer, for example, most effective at less than approximately 40 nm in thickness, and supports the active regions for an array of TFTs. Prior art transistors typically require deposition of heavily doped silicon material, e.g., n+ a-Si, at the interface between metal-to-silicon contacts. The heavily doped material assists formation of an ohmic rather than a Schottky contact. In contrast, various embodiments of TFTs of the invention require no heavily doped material, e.g., n+ a-Si, at contact interfaces, e.g., the interface of the semiconductor layer to a source metal electrode or a drain metal electrode.
  • [0014]
    Embodiments that require no n+ a-Si material at interface provide numerous potential advantages over the prior art. For example, TFT arrays may be fabricated with no patterning of a semiconductor layer, i.e. the active layer, or deposition and patterning of a heavily doped semiconductor layer at contact interfaces. This may eliminate a photolithographic step and a dry etching step, in addition to eliminating formation of a heavily doped layer at metal contact interfaces.
  • [0015]
    Elimination of n+ a-Si from fabrication may further eliminate associated costs due to a related deposition chamber and hazards entailed by use of highly toxic and flammable PH3 gas. Related elimination of a dry etch step permits use of all-wet fabrication, further reducing fabrication costs.
  • [0016]
    Moreover, the above features of the invention provide increased fabrication throughput. Use of a thinner semiconductor active layer reduces semiconductor deposition time. Elimination of a heavily doped semiconductor layer, and elimination of patterning of the semiconductor active layer, further increase fabrication throughput. In some embodiments, a SiN layer, an a-Si layer and a metal 2 layer are deposited in the same deposition system, again improving manufacturing throughput.
  • [0017]
    The invention may provide improved fabrication yield, due to simplified processing. Moreover, some embodiments may utilize a roll-to-roll substrate fabrication process. Continuous deposition of the gate dielectric, a-Si, and source-drain electrode metal without a break in vacuum, for example, as well as an all-wet etching process, are compatible with roll-to-roll processing.
  • [0018]
    Though use of an unpatterned active layer may increase device leakage, appropriate design and application of a TFT array may provide acceptable performance. The spacing between transistors may be selected to obtain acceptable leakage currents. The geometry of the transistors may be selected to obtain an acceptable leakage current between a first data line and a second data line. Alternatively, the spacing between the first data line and a first pixel electrode may be chosen to provide an acceptable leakage current between the first data line and the first pixel electrode. Use of a very thin active layer may permit closer packing of devices than otherwise possible.
  • [0019]
    Accordingly, in a first aspect, the invention features a thin-film transistor array that includes at least first and second transistors. Each of the first and second transistors include a shared silicon layer, i.e., an active layer, having a thickness less than 40 nm. The shared silicon layer extends continuously between the first and second transistors. Each transistor further has a source electrode and a drain electrode spaced from the source electrode, both in direct contact with the silicon layer. Each transistor also has a gate electrode disposed adjacent to the silicon layer.
  • [0020]
    The silicon layer may consist of unpatterned silicon. Hence, the silicon may be a continuous film of material, use of which may reduce the number of process steps involved in manufacturing the transistor array. The silicon layer may consist of amorphous silicon, and the silicon layer may be undoped.
  • [0021]
    Use of an extremely thin silicon layer may obviate a need for a highly doped layer of material lying between the extremely thin silicon layer and source and drain contacts. Prior art thin-film transistor arrays typical require the highly doped layer to provide a good ohmic contact.
  • [0022]
    The first transistor may be a bottom gate or a top gate transistor. The first transistor may include a first pixel electrode of an electronic display, the first pixel electrode in communication with the source electrode of the first transistor, and the drain electrode of the first transistor is in communication with a first data line of the electronic display. A distance between the first pixel electrode and the first data line may be selected to provide an acceptable leakage current between the first pixel electrode and the first data line. Though use of an unpatterned silicon layer may lead to increased leakage current, transistor geometry may be adjusted to reduce leakage to tolerable levels.
  • [0023]
    Different geometrical aspects of a transistor array may be selected to reduce leakage. The distances between a pixel electrode and each of the adjacent data lines may be selected to provide an acceptable leakage current between the first data line and the second data line. At least one of the first data line, the second data line, the first transistor and the first pixel electrode may have a geometry selected to provide an acceptable leakage between the first data line and the second data line.
  • [0024]
    In a second aspect, the invention features an electronic display. The display includes a display medium, a first pixel electrode and a second pixel electrode adjacent to the display medium, and a first thin-film transistor and a second thin-film transistor in respective electrical communication with the first pixel electrode and the second pixel electrode, and comprising a shared continuous amorphous silicon layer that has a thickness less than 40 nm and provides channels for the first thin-film transistor and the second thin-film transistor.
  • [0025]
    The electronic display may include any of a variety of display media, for example, an electrophoretic medium. An electrophoretic medium may have at least one type of particle and a suspending fluid, and may be encapsulated.
  • [0026]
    The electronic display may further include a light blocking layer provided adjacent to the silicon layer. As described above, transistor geometrical features may be adjusted to reduce leakage currents.
  • [0027]
    In a third aspect, the invention features a method of manufacturing an array of thin-film transistors. The method includes the steps of providing a substrate, forming adjacent to the substrate an unpatterned silicon layer having a thickness less than 40 nm. At least one patterned drain electrode is formed for each of the transistors. Drain electrodes are formed in direct contact with the unpatterned silicon layer. At least at least one patterned source electrode is provided for each of the transistors. The source electrodes are in direct contact with the unpatterned silicon layer. At least one gate electrode is provided for each of the transistors. The gate electrode is disposed adjacent to the unpatterned silicon layer.
  • [0028]
    A dielectric layer may be formed adjacent to the at least one gate electrode. Forming the dielectric layer, forming the unpatterned silicon layer and forming the metal layer which will, after patterning, form the source and drain electrodes may occur during one visit of the substrate inside a single deposition chamber. Providing a substrate may include unwinding the substrate from a first roll and winding the substrate onto a second roll.
  • [0029]
    The method may further include providing a first pixel electrode of an electronic display in communication with the source electrode of the first transistor, and providing a first data line of the electronic display in communication with the drain electrode of the first transistor. The method may further include providing a second pixel electrode of an electronic display in communication with the source electrode of the second transistor and providing a second data line of the electronic display in communication with the drain electrode of the second transistor.
  • [0030]
    Various geometrical parameters may be adjusted to provide acceptable leakage currents. Geometrical parameters include the shapes of features and the spacings between features. Features include, for example, the data lines, the transistors and the pixel electrodes.
  • [0031]
    Forming may include mask steps consisting of a first mask step and a second mask step. At least one patterned gate electrode is formed in the first mask step, and at least one drain and one source electrode is formed the second mask step. Hence some embodiments include exactly two mask steps. (As in many prior art processes, and additional mask step may be required to form contacts adjacent the edges of the display.)
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0032]
    The foregoing and other objects, features and advantages of the present invention, as well as the invention itself, will be more fully understood from the following description of preferred embodiments, when read together with the accompanying drawings, in which:
  • [0033]
    [0033]FIG. 1 shows a diagrammatic cross-sectional view of a prior art TFT and capacitor.
  • [0034]
    [0034]FIG. 2 shows a cross-sectional view of an array of thin-film transistors according to one embodiment of the present invention.
  • [0035]
    [0035]FIG. 3 shows a top view of one embodiment of an electronic display, with the display medium removed.
  • [0036]
    [0036]FIG. 4 illustrates locations of resistive leakage paths for the display of FIG. 3.
  • [0037]
    [0037]FIG. 5a shows an underneath plan view of an embodiment of a thin-film transistor with the substrate omitted.
  • [0038]
    [0038]FIG. 5b shows a diagrammatic cross sectional view that corresponds to the transistor embodiment shown in FIG. 5a.
  • [0039]
    [0039]FIG. 6 shows a graph of drain current versus gate voltage for a sample of a two-mask transistor of the type shown in FIG. 5a.
  • [0040]
    [0040]FIG. 7 shows a cross-sectional view of an array of thin-film transistors according to one embodiment of the present invention.
  • [0041]
    [0041]FIG. 8 shows a cross-sectional view of an array of thin-film transistors according to one embodiment of the present invention.
  • [0042]
    [0042]FIG. 9 shows a cross-sectional view of an array of thin-film transistors according to one embodiment of the present invention.
  • [0043]
    [0043]FIG. 10 shows a cross-sectional view of an array of thin-film transistors according to one embodiment of the present invention.
  • [0044]
    [0044]FIG. 11 shows a cross-sectional view of an electronic display according to one embodiment of the present invention.
  • [0045]
    [0045]FIG. 12 shows a diagrammatic cross-sectional view of a transistor and capacitor of an array, according to one embodiment of the invention.
  • [0046]
    [0046]FIG. 13 shows a graph of drain current versus gate voltage for a sample transistor of an embodiment with a 10 nm thick a-Si layer.
  • [0047]
    [0047]FIG. 14 shows a graph of drain current versus drain voltage for the sample transistor of FIG. 13.
  • [0048]
    [0048]FIG. 15 shows a graph of transient voltage switching and holding of a sample transistor array.
  • [0049]
    [0049]FIG. 16a shows a diagrammatic cross-sectional view of an electronic display according to one embodiment of the present invention.
  • [0050]
    [0050]FIG. 16b shows a diagrammatic cross-sectional view of an electronic display according to one embodiment of the present invention.
  • [0051]
    [0051]FIG. 16c shows a diagrammatic cross-sectional view of an electronic display according to one embodiment of the present invention.
  • [0052]
    [0052]FIG. 16d shows a diagrammatic cross-sectional view of an electronic display according to one embodiment of the present invention.
  • DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
  • [0053]
    In one aspect, the invention features minimally-patterned semiconductor devices for display applications. In a preferred embodiment, the semiconductor devices are an array of thin-film transistors. An array of TFTs may include a continuous a-Si layer of approximately 40 nm or less in thickness, preferably 30 nm or less, most preferably 20 nm or less, without heavily doped a-Si at metal contact interfaces. In the following, general considerations of transistor array design and leakage currents will be discussed. Simplified arrays for displays that can tolerate leakage in a variety of semiconductor materials that provide for TFT active layers, are described. Then, arrays employing very thin a-Si for the active layer are described. A final section describes some display media that may be used with TFT arrays in the fabrication of a display.
  • [0054]
    Referring to FIG. 2, an array of transistors 10 includes a substrate 12, a gate electrode 14 for each transistor provided adjacent to the substrate 12, a gate dielectric layer 16 provided adjacent to the substrate 12 and the gate electrodes 14, a semiconductor layer 18 provided adjacent to the gate dielectric layer 16, and a source electrode 20 and a drain electrode 22 for each transistor provided adjacent to the semiconductor layer 18. The sizes of the electrodes 20, 22 may vary in various transistor designs.
  • [0055]
    For fabrication of thin-film transistors, the substrate 12 may be, for example: a silicon wafer; a glass plate; a steel foil; or a plastic sheet (for example a polyimide sheet). The gate electrodes 14, for example, can be any conductive material such as metal or conductive polymer. The materials for use as the semiconductor layer 18, for example, can be inorganic materials such as amorphous silicon or polysilicon. Alternatively, the semiconductor layer 18 can be formed of organic semiconductors such as: polythiophene and its derivatives; oligothiophenes; and pentacene. In general, any semiconductive material useful in creating conventional thin film transistors can be used in this embodiment. The material for the gate dielectric layer 16 can be an organic or an inorganic material. Examples of suitable materials include, but are not limited to, polyimides, silicon dioxide, and a variety of inorganic coatings and glasses. The source and drain electrodes 20, 22 may be made of any conductive material such as metal or conductive polymer.
  • [0056]
    The array of transistors illustrated in FIG. 2 can be manufactured using any one of many appropriate methods. For example, vacuum based methods such as chemical vapor deposition, evaporation, or sputtering can be used to deposit the materials necessary to form the transistor and thereafter the deposited material can be patterned. Alternatively, wet printing methods or transfer methods can be used to deposit the materials necessary to form the transistors.
  • [0057]
    The array of transistors described in reference to FIG. 2 can be used for addressing an electronic display. This embodiment is applicable to a variety of electronic displays, including: electrophoretic displays; liquid crystal displays; emissive displays (including organic light emitting materials); and, rotating ball displays. For liquid crystal displays, error limits place a demand on the time-averaged square of the voltage across the pixel. For current-driven, emissive displays, the acceptable tolerance in voltage variation will depend upon how emission varies with current through the pixel. In general, display types that have switching elements with a threshold associated with switching, rather than a gradual change in optical state, will be more tolerant of errors.
  • [0058]
    In the embodiment of FIG. 2, while the electrodes 14, 20, 22 (i.e., gate electrode, source electrode and drain electrode) are patterned, the semiconductor layer 18 is not, resulting in significant reduction in processing efforts and cost. This circuit design can exhibit cross-talk between adjacent transistors that reside in rows and columns of transistors in an array. The degree of cross-talk, however, can be reduced to a level that is acceptable for some applications.
  • [0059]
    For some applications, a degree of cross-talk can be tolerated. For example, if only a few gray level states of a display are addressed, then small stray voltages may not significantly affect the overall appearance of the display. In addition, if the display is designed for moderate resolution, then neighboring circuit elements will be far apart from each other, reducing the degree of cross-talk.
  • [0060]
    In general, cross-talk errors are noticeable in displays only if they cause unwanted optical changes in pixel areas surrounding any one particular pixel element. In particular, if a pixel has only two possible switching states, i.e. either dark or light, then small deviations in the electronic signal due to cross-talk may not substantially change the optical appearance of the pixel. When intermediate optical states, i.e. gray levels, are being addressed, however, the display pixel elements will be more sensitive to errors. Here, it is more likely that an incorrect gray level will be displayed by a pixel.
  • [0061]
    Depending on a particular display type and application, a smaller or larger error tolerance can be preferred. A monochrome display, for example, may be able to tolerate leakage currents in excess of 10%, whereas a 256-level display would typically require a much lower leakage level of approximately 0.2%. A tolerance level may be estimated by dividing 100% by twice the number of gray levels, because typically the leakage current should not cause more than one-half a gray level error. In a preferred embodiment, the display incorporates pixels with a limited number of gray levels. In this case, a given pixel is less sensitive to cross-talk induced voltage errors because it is switched between a limited number of optical states.
  • [0062]
    For a particular display, the acceptable leakage will depend on the extent of error in the electrical signal seen by a pixel and how that affects the optical state of the pixel. This will depend on the display medium. For displays that depend on a DC signal to switch, including electrophoretic and rotating ball displays, and ferroelectric liquid crystal displays, the switching electronic signal depends on both the magnitude and duration of the voltage applied. The acceptable leakage corresponds to a maximum tolerable error in the optical state of a display pixel.
  • [0063]
    An array of transistors with acceptable cross-talk can be prepared by following the design rules provided herein in reference to FIG. 3, which illustrates a plan-view of the conductive leads and the elements for driving a display. An array comprises: data lines 30, 32; select lines 36, 46; and pixel electrodes 34, 38, 40, 42. To address a pixel electrode 34, 38, 40, 42, voltages are applied to appropriate data lines 30, 32 and select lines 36, 46. For example, to address particular pixel electrode 34, voltages are applied to data line 30 and select line 36. Changes in the optical characteristics of a display element are achieved by addressing a pixel electrode 34, 38, 40, 42 that is associated with the display element.
  • [0064]
    A preferred embodiment includes two design criteria for a properly functioning display. First, referring to FIG. 3, the resistive leakage between neighboring data lines 30, 32 must be small such that the voltage applied to each data lines 30, 32 can be controlled to within desired tolerances by the associated driver elements. A resistive leakage between neighboring data lines is too large when it leads to unacceptable resistive voltage drops in the driver circuit or in the data lines. Second, the current leakage to the pixel electrode from each of the two adjacent data lines 30 or 32, when the corresponding transistor is switched “off”, must be sufficiently small to avoid unacceptable optical artifacts.
  • [0065]
    Many video displays produce video output by periodically updating still images presented in rapid succession at some frame rate. Each image is presented for a period of time, i.e., a frame time. When the optical character is determined primarily by the time-varying voltage profile on the pixel electrode, such as for electrophoretic and twisted-nematic displays, the impact of current leakage on the voltage profile preferably is sufficiently small during the frame time. A pixel voltage preferably does not change by an unacceptable amount during a frame time because a pixel preferably maintains a given optical state during this interval of time.
  • [0066]
    For example, a large current leakage between the data line 30 and pixel electrode 34 may cause an unintended shift in the pixel voltage, thus changing the optical state of that pixel during the presentation of a single image by a display. In a display using emissive material, such parasitic leakage currents can cause unwanted light emission from the pixel.
  • [0067]
    The following discussion illustrates how the above described two design criteria can be calculated. Since the semiconductor layer is much thinner than the lateral gaps between the electrical elements, resistance calculations can employ a thin-film approximation.
  • [0068]
    The First Design Criterion
  • [0069]
    The conduction between adjacent data lines 30, 32 is greatly facilitated by the presence of a column of pixel electrodes 34, 40. An efficient conduction path can be approximated as follows. Current can leak from the first data line 30 to the adjacent column of pixel electrodes 34. Note that the display has a first row of pixel electrodes 34, 38 and a second row of pixel electrodes 40, 42. More generally, if there are N rows in a particular display, N being an integer, then there are N conduction paths in parallel between adjacent data lines 30, 32 and the resistive pathway between adjacent data lines 30, 32 can be approximated by the resistive elements shown in FIG. 4.
  • [0070]
    Referring to FIG. 4, RTFT is the resistance between the first data line 30 and the pixel electrode 34 through the thin-film transistor channel in the “off” state, R1 is the resistance across the gap between the first data line 30 and the pixel electrode 34 and R2 is the resistance across the gap between the pixel electrode 34 and the second data line 32. The resistive pathway provided directly between adjacent data lines 30, 32 along the region between neighboring pixel electrodes 34, 40 can be neglected as being insignificant in comparison to the pathway provided by the pixel electrodes 34, 40, i.e. the pixel electrodes 34, 40 are good conductors. Using this model, the resistance across adjacent data lines 30, 32 (Rdd) can be expressed as:
  • [0071]
    where: R dd = 1 N R 2 + ( 1 R TFT + 1 R 1 ) - 1 , where: R TFT = ρ L W h ; R 1 = ρ L 1 ( Y p - W ) h ; R 2 = ρ L 2 Y p h .
    Figure US20020060321A1-20020523-M00001
  • [0072]
    N is the number of rows of pixel electrodes, ρ is the bulk resistivity of the semiconducting layer, L is the distance between source and drain electrodes, L1 is the distance between a data line and the adjacent pixel electrode, L2 is the distance between the pixel electrode and the neighboring data line, Yp is a width of a pixel electrode, W is the channel width, and h is the thickness of the continuous semiconductor layer.
  • [0073]
    A properly functioning display will have a resistance between adjacent data lines 30, 32 that is much greater than the resistance between the data lines 30, 32 and the voltage source (Rd). In the approximation where the thin-film transistor channel width is much smaller than the pixel width (Yp), this condition can be achieved by a display which obeys the two inequalities:
  • R 1 +R 2 >>NR d
  • [0074]
    and
  • R TFT >>NR d
  • [0075]
    The data line also should not charge up an adjacent pixel while the select line is off (row unselected). This demand can be translated as:
  • R TFT >>R p
  • [0076]
    and
  • R 2 >>R p
  • [0077]
    where Rp is the resistance through the pixel electrode and the electro-optic medium to the electrode on the opposed side of the medium.
  • [0078]
    For amorphous silicon, the resistivity (undoped) is approximately 108 ohm-cm. A typical semiconductor thickness is about 500 angstroms. This information and pixel dimensions can be used to calculate the relevant resistances.
  • [0079]
    The Second Design Criterion
  • [0080]
    The minimum spacing of a pixel electrode 34 to a data line 30, Lms, can be derived from a consideration of the effect of the leakage on the pixel voltage. In order to avoid undesirable voltage shifts on the pixel, the following condition must be met:
  • I leak T f ≦C p ΔV p
  • [0081]
    where Ileak is the leakage current from the data line to the pixel electrode through the unpatterned semiconductor layer, Tf is the frame time, and Cp is the total capacitance of the pixel. ΔVp is the maximum tolerance for leakage-induced voltage shifts on the pixel electrode. This value depends on how voltage shifts affect the optical state of the pixel and the tolerance defined by the display parameters.
  • [0082]
    Ileak, at the minimum spacing, can be expressed by:
  • Ileak =σwh(V p −V d)/Lms
  • [0083]
    where σ is the conductivity of the semiconductor material, w is the width of the leakage path, h is the thickness of the underlying semiconductor material, and Vd is the voltage of the data line.
  • [0084]
    Combining the above two equations gives the following relation that defines a minimum spacing Lms:
  • L ms ≧σwh(V p −V d)T f /C pix ΔV p.
  • [0085]
    The above discussion applies to embodiments with a single leakage source. If there are multiple leakage sources, Ileak will include leakage currents from each leakage source and the minimum spacing Lms for each leakage path must be derived accordingly.
  • [0086]
    A preferred embodiment of a thin-film transistor for use in an encapsulated electrophoretic display is shown in FIG. 5a. Referring to FIG. 5a, this preferred embodiment includes data lines 30′, 32′, a selection line 36′, a pixel electrode 34′, and a capacitor top electrode 92′. Various physical dimensions are indicated, in microns.
  • [0087]
    The embodiment of FIG. 5a is illustrated in cross section in FIG. 5b, though not to scale. Referring to FIG. 5b, the embodiment includes bottom gate electrode 53′ and bottom capacitor electrode 55′, a silicon nitride (“SiN”) dielectric layer 54′, an amorphous silicon layer 56′, amorphous silicon contacts 58′ drain and pixel electrodes 59′ , and capacitor top electrode 92′. Other embodiments may employ different materials, for example, other dielectric materials such as silicon dioxide.
  • [0088]
    To illustrate the operating characteristics of the embodiment of FIGS. 5a and 5 b, samples were prepared through either a two-mask process, as preferred, or a three-mask process, for comparison. In the two-mask process, the amorphous silicon layer 56′ was not patterned while in the three mask process the amorphous silicon layer 56′ was patterned. The physical and experimentally measured electrical characteristics for these two samples are given in the table below.
    On/Off Threshold Max. Drain Min. Drain Storage
    Sample WL Ratio Mobility Voltage Gm Current Current capacitance
    Patterned 200/20   1 × 108 .55 cm2/Vs 5.0 V 18.9 nA/V2 10 μA 0.1 pA 19.1 pF
    Unpatterned 160/20 3.3 × 105 .43 cm2/Vs 5.0 V 23.4 nA/V2 20 μA  60 pA 18.4 pF
  • [0089]
    The leakage current and On/Off ratio for the unpatterned sample, as expected, are poorer than for the patterned sample. The unpatterned sample, however, is both suitable and preferable for many display applications, as discussed above. Referring to FIG. 6, the drain current versus gate voltage characteristics of the two-mask sample are shown. The drain current can be caused to vary by over five orders of magnitude by changing the gate voltage from zero to 30 volts. This large range makes this transistor suitable for many display applications.
  • [0090]
    Further alternative embodiments of a thin-film transistor array are now given. Referring to FIG. 7, an array of bottom gate transistors 50 include a substrate 52, a patterned gate electrode 53 for each transistor provided adjacent the substrate 52, a dielectric layer 54 provided adjacent the gate electrodes 53 and the substrate 52, an amorphous silicon layer 56 provided adjacent the dielectric layer 54, a plurality of patterned n+ doped amorphous silicon contact layers 58 provided adjacent the amorphous silicon doped layer 56, and patterned source, drain or pixel electrodes 59 provided adjacent the patterned n+ doped amorphous silicon contacts layers 58. Each patterned n+ doped amorphous silicon contact layers 58 is provided between the amorphous silicon layer 56 and a patterned electrode 59 to provide better electrical contact. The contacts layers 58 at the metal-semiconductor interface ensure ohmic behavior. The contacts 58 can be deposited by the addition of PH3 to SiH4 in the gas phase. The contacts 58 can also be achieved by direct ion implantation of n-type dopants in selected areas of the intrinsic amorphous silicon layer 56 followed by high temperature annealing as an alternative to the additional n+ amorphous silicon deposition step. The contacts 58, however, are not essential to produce a sufficiently functioning transistor.
  • [0091]
    Referring to FIG. 8, an array of top gate transistors 60 include a substrate 62, patterned source, drain, and/or pixel electrodes 64 for each transistor provided adjacent the substrate 62, a patterned n+ amorphous silicon contact 66 provided adjacent each electrode 64, an amorphous silicon layer 68 provided adjacent the contacts 66 and the substrate 62, a dielectric layer 70 provided adjacent to the boron doped amorphous silicon layer 68, and a gate electrode 72 for each transistor provided adjacent to the dielectric layer 70.
  • [0092]
    Referring to FIG. 9, an array of bottom gate transistors 80 is substantially similar to the transistors 50 of FIG. 7. The transistors 80 of FIG. 9 include a passivation layer 82 provided above the exposed regions of the amorphous silicon layer 56. The passivation layer 82 can be deposited after the patterning of the electrodes 59. For example, the passivation layer 82 can consist of silicon nitride. In one embodiment, a light blocking layer is incorporated into the array of transistors to shield any exposed silicon layer 56. The light blocking layer can be either light absorbing or reflective.
  • [0093]
    Referring to FIG. 10, an array of bottom gate transistors 90 is substantially similar to the array of transistors 80 of FIG. 9. The array of transistors 90 further incorporates a substrate capacitor 292. The substrate capacitor 292 can be formed by extending the pixel electrode 94 over the preceding gate line 53 b. The capacitance is directly proportional to the area of overlap.
  • [0094]
    In one alternative, inexpensive displays can be constructed by minimizing the number of patterning steps. Such a display can take different forms, including but not limited to: large area displays, displays with low-to-moderate pixel density, or microencapsulated electrophoretic display devices. In the preferred embodiment the semiconductor layer 18, 56, or 68 is unpatterned. Alternatively, the dielectric layer 16, 54, or 70 is unpatterned.
  • [0095]
    An electronic display can incorporate an array of transistors as described above. Referring to FIG. 11, an electronic display may include a transparent over-layer 101 supporting an electrode 102, a display medium 106 provided next to the electrode 102, a plurality of pixel electrodes 104 provided next to the display medium 106, and a plurality of discrete electronic devices (e.g., transistors) provided next to and in electrical communication with the pixel electrodes 104 supported by a substrate 110 provided next to and in electrical communication with the discrete electronic devices. The discrete electronic devices, in this embodiment, are transistors. The gate electrodes 112, the gate dielectric layer 100, the semiconductor layer 118 and the source electrodes 120 of the transistors are shown in this cross-section.
  • [0096]
    The over-layer 101 can be made of a transparent material. The over-layer 101 can also be a flexible substrate. For example, the over-layer 101 can consist of polyester. The electrode 102 can be a common electrode. Alternatively, the electrode 102 can be a plurality of row electrodes. The electrode 102 can consist of a transparent conductive material. For example, an indium tin oxide (ITO), polyaniline or polythiophene coating can be provided on an inner surface of the over-layer 101.
  • [0097]
    The display medium 106 can include a plurality of microcapsules 124 dispersed in a binder 126 (not shown in drawing). Each microcapsule 124 can include an electro-optical material. An electro-optical material refers to a material which displays an optical property in response to an electrical signal. Electro-optical material, for example, can be electrophoretic particles or liquid crystals dispersed in a solvent. An electro-optical material can also be bichromal spheres dispersed in a solvent. Details of electro-optical materials within the microcapsules 124 will be discussed below. An important property of the electro-optical material within the microcapsules 124 is that the material is capable of displaying one visible state upon application of an electric field and a different visual state upon application of a different electric field.
  • [0098]
    In one embodiment, the display medium 106 comprises a particle-based display medium. In one detailed embodiment, the particle-based display medium comprises an electronic ink. An electronic ink is an optoelectronically active material which comprises at least two phases: an electrophoretic contrast medium phase and a coating/binding phase. The electrophoretic phase comprises, in some embodiments, a single species of electrophoretic particles dispersed in a clear or dyed medium, or more than one species of electrophoretic particles having distinct physical and electrical characteristics dispersed in a clear or dyed medium. In some embodiments the electrophoretic phase is encapsulated, that is, there is a capsule wall phase between the two phases. The coating/binding phase includes, in one embodiment, a polymer matrix that surrounds the electrophoretic phase. In this embodiment, the polymer in the polymeric binder is capable of being dried, crosslinked, or otherwise cured as in traditional inks, and therefore a printing process can be used to deposit the electronic ink onto a substrate.
  • [0099]
    The optical quality of an electronic ink is quite distinct from other electronic display materials. The most notable difference is that the electronic ink provides a high degree of both reflectance and contrast because it is pigment based (as are ordinary printing inks). The light scattered from the electronic ink comes from a very thin layer of pigment close to the top of the viewing surface. In this respect it resembles an ordinary, printed image. Also, electronic ink is easily viewed from a wide range of viewing angles in the same manner as a printed page, and such ink approximates a Lambertian contrast curve more closely than any other electronic display material. Since electronic ink can be printed, it can be included on the same surface with any other printed material, including traditional inks. Electronic ink can be made optically stable in all display configurations, that is, the ink can be set to a persistent optical state. Fabrication of a display by printing an electronic ink is particularly useful in low power applications because of this stability.
  • [0100]
    Electronic ink displays are novel in that they can be addressed by DC voltages and draw very little current. As such, the conductive leads and electrodes used to deliver the voltage to electronic ink displays can be of relatively high resistivity. The ability to use resistive conductors substantially widens the number and type of materials that can be used as conductors in electronic ink displays. In particular, the use of costly vacuum-sputtered indium tin oxide (ITO) conductors, a standard material in liquid crystal devices, is not required.
  • [0101]
    Aside from cost savings, the replacement of ITO with other materials can provide benefits in appearance, processing capabilities (printed conductors), flexibility, and durability. Additionally, the printed electrodes are in contact only with a solid binder, not with a fluid layer (like liquid crystals). This means that some conductive materials, which would otherwise dissolve or be degraded by contact with liquid crystals, can be used in an electronic ink application. These include opaque metallic inks for the rear electrode (e.g., silver and graphite inks), as well as conductive transparent inks for either substrate.
  • [0102]
    These conductive coatings include conducting or semiconducting colloids, examples of which are indium tin oxide and antimony-doped tin oxide. Organic conductors (polymeric conductors and molecular organic conductors) also may be used. Polymers include, but are not limited to, polyaniline and derivatives, polythiophene and derivatives, poly(3,4-ethylenedioxythiophene) (PEDOT) and derivatives, polypyrrole and derivatives, and polyphenylenevinylene (PPV) and derivatives. Organic molecular conductors include, but are not limited to, derivatives of naphthalene, phthalocyanine, and pentacene. Polymer layers can be made thinner and more transparent than with traditional displays because conductivity requirements are not as stringent.
  • [0103]
    The pixel electrodes 104 can be bonded to the display medium 106 through a binder. The binder, for example, can be a pressure sensitive adhesive. The pixel electrodes 104 can be made from any conductive material. The pixel electrodes 104 can be transparent or opaque. For example, the pixel electrodes 104 can be made from aluminum, chrome, solder paste, copper, copper-clad polyimide, graphite inks, silver inks and other metal containing conductive inks. The pixel electrodes 104 can be formed on a substrate 110 and subsequently bonded to the display medium 106.
  • [0104]
    The discrete electronic devices can be non-linear devices such as transistor for addressing the pixels of the display. Alternatively, the non-linear devices can be diodes.
  • [0105]
    The electrodes 112, 120 can be made of any conductive material, either transparent or opaque. The conductive material can be printed, coated, or vacuum sputtered. For example, the electrodes 102, 112, 120 can also be made using transparent materials such as indium tin oxide and conductive polymers such as polyaniline or polythiophenes. Alternatively, the electrodes 102, 112, 120 can be made of opaque materials such as aluminum, chrome, solder paste, copper, copper-clad polyimide, graphite inks, silver inks and other metal-containing conductive inks.
  • [0106]
    The architecture of the electronic display shown in FIG. 11 is exemplary only and other architectures for an electronic display may also be used in accordance with this invention.
  • [0107]
    Very Thin a-Si Active Layer
  • [0108]
    To reduce leakage currents, as noted in the description of FIG. 1, an a-Si active layer is traditionally patterned to leave islands of semiconductor material. The structures shown in FIG. 1 typically require three lithography steps and four etching steps. In contrast, some embodiments of the invention, as described above in reference to FIG. 5b, employ two masks in a simplified fabrication process. As described in the following, another embodiment of the invention provides further fabrication improvements through use of very thin a-Si for the active layer.
  • [0109]
    Referring to FIG. 12, one embodiment that employs a very thin a-Si layer includes a gate electrode 53 a, a bottom capacitor electrode 55 a, a SiN dielectric layer 54 a, an a-Si layer 56 a, drain and pixel electrodes 59 a, and a capacitor top electrode 92 a. This embodiment, may be fabricated with a two-mask process, and without use of highly doped a-Si to assist formation of ohmic contacts. The a-Si layer 56 a may be formed with no further treatment after deposition, such as a chemical treatment to vary electrical properties. The a-Si layer 56 a preferably extends continuously from a transistor to neighboring transistors that reside both in rows and columns in an array of transistors.
  • [0110]
    A bottom gate with top pixel electrode structure is advantageous for electro-optic display applications. Such a structure positions the pixel electrodes closely to the electro-optic display medium. Thus, drive voltage and energy consumption may be reduce. Moreover, leakage current may be reduced.
  • [0111]
    In preferred embodiments, the a-Si layer 56 a has a thickness of approximately 40 nm or less. The use of a very thin a-Si layer as an active layer in a TFT obviates the requirement of heavily doped n+ a-Si lying between the a-Si layer 56 a and the electrodes 59 a. See Thomasson, et al., IEEE Elec. Dev. Lett., Vol. 18, no. 3, 1717 (1997). For example, by employing intrinsic a-Si of 10 nm thickness, gate induced carrier concentration substantially reduces the metal to channel Schottky barrier. Hence, carriers may tunnel from the metal source and drain contacts to the channel, without reducing the TFT current and substantially affecting performance.
  • [0112]
    Elimination of an n+ a-Si layer at the metal to active layer interface reduces the number and difficulty of process steps by, for example, eliminating deposition and etching of n+ a-Si. This may also permit use of a very thin a-Si active layer due to elimination of the need to overetch the n+ a-Si layer.
  • [0113]
    Use of a very thin a-Si layer as the active layer may provide further advantages. If left unpatterned, an active layer of, for example, 10 nm thick a-Si may reduce leakage currents due to increased lateral resistance relative to that of a thicker, continuous active layer. Hence, as discussed above, device dimensions may be reduced while still achieving acceptable leakage current levels. Thus, use of very thin a-Si as an active layer may permit dense packing of electronic components while still employing a simple two-mask fabrication process.
  • [0114]
    The embodiment illustrated in FIG. 12 may be fabricated as follows. A first metal layer is deposited and patterned to form the gate electrode 53 a and the capacitor's bottom electrode 55 a. The SiN dielectric layer 54 a, the a-Si layer 56 a, and a second metal layer are then deposited. The drain and pixel electrodes 59 a are formed from the second metal layer by, for example, wet etching.
  • [0115]
    Referring to FIGS. 13-15, electrical measurements were obtained from sample TFT arrays having the structure of the embodiment illustrated in FIG. 12. FIG. 13 shows the drain current versus gate voltage of a TFT in an array having a shared 10 nm thick a-Si layer. The threshold voltage is approximately 13 volts, which is somewhat greater than the threshold voltage of 3 to 4 volts for a typical TFT having a conventional structure. The mobility of the TFT is 0.15 cM2/Vs. The drain current on/off ratio is greater than 2×105.
  • [0116]
    [0116]FIG. 14 shows the drain current versus drain voltage for a TFT in the same sample array used to obtain the data presented in FIG. 13. The contact resistance between the source and drain electrodes and the intrinsic a-Si layer partially limits the drain current at low drain voltage in this sample TFT. The on/off ratio, however, is good, and the mobility and on-current are sufficient to drive, for example, an active matrix display pixel.
  • [0117]
    [0117]FIG. 15 shows a transient voltage switching-and-holding plot of a pixel electrode in a sample 40 dpi display fabricated with TFTs similar to those used to obtain the data presented in FIG. 13 and FIG. 14. The pixel electrode has a dynamic range of 0 to 15 volts when the voltage range of the gate voltage and the drain voltage are set to 30 volts. The voltage holding range of the sample pixel is approximately 90 w. The measured dynamic range and voltage holding ratio are sufficient to drive, for example, an electrophoretic medium display.
  • [0118]
    Various embodiments of the invention have numerous advantages over the prior art. TFT arrays may be fabricated at low cost. Fabrication may utilize only two patterning steps. No patterning of a semiconductor active layer is required; this may, for example, eliminate a photolithographic step and a dry etching step. A heavily doped semiconductor layer may be eliminated at the metal to semiconductor active layer interface; this may, for example, eliminate a dry etching step.
  • [0119]
    Elimination of n+ a-Si from fabrication may eliminate associated costs that arise from the requirement of a deposition chamber, as well as hazards entailed by use of highly toxic and flammable PH3 gas. Related elimination of a dry etch step permits use of all-wet fabrication, further reducing fabrication costs.
  • [0120]
    The above features of the invention further permit increased fabrication throughput. Use of a thinner semiconductor active layer reduces semiconductor deposition time. Elimination of a heavily doped semiconductor layer, and elimination of patterning of the semiconductor active layer, further increase fabrication throughput. In some embodiments, a SiN layer, an a-Si layer and a metal 2 layer are deposited in the same deposition system, again improving manufacturing throughput.
  • [0121]
    The invention may provide improved fabrication yield, due to simplified processing. Moreover, some embodiments may utilize a roll-to-roll substrate fabrication process. Continuous deposition of a semiconductor stack and metal 2 without a break in vacuum, as well as an all-wet etching process, are compatible with roll-to-roll processing.
  • [0122]
    Materials for Use in Electrophoretic Displays Useful materials for constructing encapsulated electrophoretic displays are discussed in detail below. Many of these materials will be known to those skilled in the art of constructing conventional electrophoretic displays, or those skilled in the art of microencapsulation. The combination of these materials and processes, along with the other necessary components found in an encapsulated electrophoretic display, comprise the invention described herein.
  • [0123]
    A. Particles
  • [0124]
    There is much flexibility in the choice of particles for use in electrophoretic displays, as described above. For purposes of this invention, a particle is any component that is charged or capable of acquiring a charge (i.e., has or is capable of acquiring electrophoretic mobility), and, in some cases, this mobility may be zero or close to zero (i.e., the particles will not move). The particles may be neat pigments, dyed (laked) pigments or pigment/polymer composites, or any other component that is charged or capable of acquiring a charge. Typical considerations for the electrophoretic particle are its optical properties, electrical properties, and surface chemistry. The particles may be organic or inorganic compounds, and they may either absorb light or scatter light. The particles for use in the invention may further include scattering pigments, absorbing pigments and luminescent particles. The particles may be retroreflective, such as corner cubes, or they may be electroluminescent, such as zinc sulfide particles, which emit light when excited by an AC field, or they may be photoluminescent. Finally, the particles may be surface treated so as to improve charging or interaction with a charging agent, or to improve dispersibility.
  • [0125]
    A preferred particle for use in electrophoretic displays of the invention is Titania. The titania particles may be coated with a metal oxide, such as aluminum oxide or silicon oxide, for example. The titania particles may have one, two, or more layers of metal-oxide coating. For example, a titania particle for use in electrophoretic displays of the invention may have a coating of aluminum oxide and a coating of silicon oxide. The coatings may be added to the particle in any order.
  • [0126]
    The electrophoretic particle is usually a pigment, a polymer, a laked pigment, or some combination of the above. A neat pigment can be any pigment, and, usually for a light colored particle, pigments such as, for example, rutile (titania), anatase (titania), barium sulfate, kaolin, or zinc oxide are useful. Some typical particles have high refractive indices, high scattering coefficients, and low absorption coefficients. Other particles are absorptive, such as carbon black or colored pigments used in paints and inks. The pigment should also be insoluble in the suspending fluid. Yellow pigments such as diarylide yellow, hansa yellow, and benzidin yellow have also found use in similar displays. Any other reflective material can be employed for a light colored particle, including non-pigment materials, such as metallic particles.
  • [0127]
    Useful neat pigments include, but are not limited to, PbCrO4, Cyan blue GT 55-3295 (American Cyanamid Company, Wayne, N.J.), Cibacron Black BG (Ciba Company, Inc., Newport, Del.), Cibacron Turquoise Blue G (Ciba), Cibalon Black BGL (Ciba), Orasol Black BRG (Ciba), Orasol Black RBL (Ciba), Acetamine Blac, CBS (E. I. du Pont de Nemours and Company, Inc., Wilmington, Del.), Crocein Scarlet N Ex (du Pont) (27290), Fiber Black VF (DuPont) (30235), Luxol Fast Black L (DuPont) (Solv. Black 17), Nirosine Base No. 424 (DuPont) (50415 B), Oil Black BG (DuPont) (Solv. Black 16), Rotalin Black RM (DuPont), Sevron Brilliant Red 3 B (DuPont); Basic Black DSC (Dye Specialties, Inc.), Hectolene Black (Dye Specialties, Inc.), Azosol Brilliant Blue B (GAF, Dyestuff and Chemical Division, Wayne, N.J.) (Solv. Blue 9), Azosol Brilliant Green BA (GAF) (Solv. Green 2), Azosol Fast Brilliant Red B (GAF), Azosol Fast Orange RA Conc. (GAF) (Solv. Orange 20), Azosol Fast Yellow GRA Conc. (GAF) (13900 A), Basic Black KMPA (GAF), Benzofix Black CW-CF (GAF) (35435), Cellitazol BNFV Ex Soluble CF (GAF) (Disp. Black 9), Celliton Fast Blue AF Ex Conc (GAF) (Disp. Blue 9), Cyper Black IA (GAF) (Basic Blk. 3), Diamine Black CAP Ex Conc (GAF) (30235), Diamond Black EAN Hi Con. CF (GAF) (15710), Diamond Black PBBA Ex (GAF) (16505); Direct Deep Black EA Ex CF (GAF) (30235), Hansa Yellow G (GAF) (11680); Indanthrene Black BBK Powd. (GAF) (59850), Indocarbon CLGS Conc. CF (GAF) (53295), Katigen Deep Black NND Hi Conc. CF (GAF) (15711), Rapidogen Black 3 G (GAF) (Azoic Blk. 4); Sulphone Cyanine Black BA-CF (GAF) (26370), Zambezi Black VD Ex Conc. (GAF) (30015); Rubanox Red CP-1495 (The Sherwin-Williams Company, Cleveland, Ohio) (15630); Raven 11 (Columbian Carbon Company, Atlanta, Ga.), (carbon black aggregates with a particle size of about 25 μm), Statex B-12 (Columbian Carbon Co.) (a furnace black of 33 μm average particle size), and chrome green.
  • [0128]
    Particles may also include laked, or dyed, pigments. Laked pigments are particles that have a dye precipitated on them or which are stained. Lakes are metal salts of readily soluble anionic dyes. These are dyes of azo, triphenylmethane or anthraquinone structure containing one or more sulphonic or carboxylic acid groupings. They are usually precipitated by a calcium, barium or aluminum salt onto a substrate. Typical examples are peacock blue lake (CI Pigment Blue 24) and Persian orange (lake of CI Acid Orange 7), Black M Toner (GAF) (a mixture of carbon black and black dye precipitated on a lake).
  • [0129]
    A dark particle of the dyed type may be constructed from any light absorbing material, such as carbon black, or inorganic black materials. The dark material may also be selectively absorbing. For example, a dark green pigment may be used. Black particles may also be formed by staining latices with metal oxides, such latex copolymers consisting of any of butadiene, styrene, isoprene, methacrylic acid, methyl methacrylate, acrylonitrile, vinyl chloride, acrylic acid, sodium styrene sulfonate, vinyl acetate, chlorostyrene, dimethylaminopropylmethacrylamide, isocyanoethyl methacrylate and N-(isobutoxymethacrylamide), and optionally including conjugated diene compounds such as diacrylate, triacrylate, dimethylacrylate and trimethacrylate. Black particles may also be formed by a dispersion polymerization technique.
  • [0130]
    In the systems containing pigments and polymers, the pigments and polymers may form multiple domains within the electrophoretic particle, or be aggregates of smaller pigment/polymer combined particles. Alternatively, a central pigment core may be surrounded by a polymer shell. The pigment, polymer, or both can contain a dye. The optical purpose of the particle may be to scatter light, absorb light, or both. Useful sizes may range from 1 nm up to about 100 μm, as long as the particles are smaller than the bounding capsule. In a preferred embodiment, the density of the electrophoretic particle may be substantially matched to that of the suspending (i.e., electrophoretic) fluid. As defined herein, a suspending fluid has a density that is “substantially matched” to the density of the particle if the difference in their respective densities is between about zero and about two g/ml. This difference is preferably between about zero and about 0.5 g/ml.
  • [0131]
    Useful polymers for the particles include, but are not limited to: polystyrene, polyethylene, polypropylene, phenolic resins, Du Pont Elvax resins (ethylene-vinyl acetate copolymers), polyesters, polyacrylates, polymethacrylates, ethylene acrylic acid or methacrylic acid copolymers (Nucrel Resins—DuPont, Primacor Resins—Dow Chemical), acrylic copolymers and terpolymers (Elvacite Resins, DuPont) and PMMA. Useful materials for homopolymer/pigment phase separation in high shear melt include, but are not limited to, polyethylene, polypropylene, polymethylmethacrylate, polyisobutylmethacrylate, polystyrene, polybutadiene, polyisoprene, polyisobutylene, polylauryl methacrylate, polystearyl methacrylate, polyisobornyl methacrylate, poly-t-butyl methacrylate, polyethyl methacrylate, polymethyl acrylate, polyethyl acrylate, polyacrylonitrile, and copolymers of two or more of these materials. Some useful pigment/polymer complexes that are commercially available include, but are not limited to, Process Magenta PM 1776 (Magruder Color Company, Inc., Elizabeth, N.J.), Methyl Violet PMA VM6223 (Magruder Color Company, Inc., Elizabeth, N.J.), and Naphthol FGR RF6257 (Magruder Color Company, Inc., Elizabeth, N.J.).
  • [0132]
    The pigment-polymer composite may be formed by a physical process, (e.g., attrition or ball milling), a chemical process (e.g., microencapsulation or dispersion polymerization), or any other process known in the art of particle production. From the following non-limiting examples, it may be seen that the processes and materials for both the fabrication of particles and the charging thereof are generally derived from the art of liquid toner, or liquid immersion development. Thus any of the known processes from liquid development are particularly, but not exclusively, relevant.
  • [0133]
    New and useful electrophoretic particles may still be discovered, but a number of particles already known to those skilled in the art of electrophoretic displays and liquid toners can also prove useful. In general, the polymer requirements for liquid toners and encapsulated electrophoretic inks are similar, in that the pigment or dye must be easily incorporated therein, either by a physical, chemical, or physicochemical process, may aid in the colloidal stability, and may contain charging sites or may be able to incorporate materials which contain charging sites. One general requirement from the liquid toner industry that is not shared by encapsulated electrophoretic inks is that the toner must be capable of “fixing” the image, i.e., heat fusing together to create a uniform film after the deposition of the toner particles.
  • [0134]
    Typical manufacturing techniques for particles are drawn from the liquid toner and other arts and include ball milling, attrition, jet milling, etc. The process will be illustrated for the case of a pigmented polymeric particle. In such a case the pigment is compounded in the polymer, usually in some kind of high shear mechanism such as a screw extruder. The composite material is then (wet or dry) ground to a starting size of around 10 μm. It is then dispersed in a carrier liquid, for example ISOPAR® (Exxon, Houston, Tex.), optionally with some charge control agent(s), and milled under high shear for several hours down to a final particle size and/or size distribution.
  • [0135]
    Another manufacturing technique for particles drawn from the liquid toner field is to add the polymer, pigment, and suspending fluid to a media mill. The mill is started and simultaneously heated to temperature at which the polymer swells substantially with the solvent. This temperature is typically near 100° C. In this state, the pigment is easily encapsulated into the swollen polymer. After a suitable time, typically a few hours, the mill is gradually cooled back to ambient temperature while stirring. The milling may be continued for some time to achieve a small enough particle size, typically a few microns in diameter. The charging agents may be added at this time. Optionally, more suspending fluid may be added.
  • [0136]
    Chemical processes such as dispersion polymerization, mini- or micro-emulsion polymerization, suspension polymerization precipitation, phase separation, solvent evaporation, in situ polymerization, seeded emulsion polymerization, or any process which falls under the general category of microencapsulation may be used. A typical process of this type is a phase separation process wherein a dissolved polymeric material is precipitated out of solution onto a dispersed pigment surface through solvent dilution, evaporation, or a thermal change. Other processes include chemical means for staining polymeric latices, for example with metal oxides or dyes.
  • [0137]
    B. Suspending Fluid
  • [0138]
    The suspending fluid containing the particles can be chosen based on properties such as density, refractive index, and solubility. A preferred suspending fluid has a low dielectric constant (about 2), high volume resistivity (about 10^ 15 ohm-cm), low viscosity (less than 5 cst), low toxicity and environmental impact, low water solubility (less than 10 ppm), high specific gravity (greater than 1.5), a high boiling point (greater than 90° C.), and a low refractive index (less than 1.2).
  • [0139]
    The choice of suspending fluid may be based on concerns of chemical inertness, density matching to the electrophoretic particle, or chemical compatibility with both the electrophoretic particle and bounding capsule. The viscosity of the fluid should be low when you want the particles to move. The refractive index of the suspending fluid may also be substantially matched to that of the particles. As used herein, the refractive index of a suspending fluid “is substantially matched” to that of a particle if the difference between their respective refractive indices is between about zero and about 0.3, and is preferably between about 0.05 and about 0.2.
  • [0140]
    Additionally, the fluid may be chosen to be a poor solvent for some polymers, which is advantageous for use in the fabrication of microparticles because it increases the range of polymeric materials useful in fabricating particles of polymers and pigments. Organic solvents, such as halogenated organic solvents, saturated linear or branched hydrocarbons, silicone oils, and low molecular weight halogen-containing polymers are some useful suspending fluids. The suspending fluid may comprise a single fluid. The fluid will, however, often be a blend of more than one fluid in order to tune its chemical and physical properties. Furthermore, the fluid may contain surface modifiers to modify the surface energy or charge of the electrophoretic particle or bounding capsule. Reactants or solvents for the microencapsulation process (oil soluble monomers, for example) can also be contained in the suspending fluid. Charge control agents can also be added to the suspending fluid.
  • [0141]
    Useful organic solvents include, but are not limited to, epoxides, such as, for example, decane epoxide and dodecane epoxide; vinyl ethers, such as, for example, cyclohexyl vinyl ether and Decave® (International Flavors & Fragrances, Inc., New York, N.Y.); and aromatic hydrocarbons, such as, for example, toluene and naphthalene. Useful halogenated organic solvents include, but are not limited to, tetrafluorodibromoethylene, tetrachloroethylene, trifluorochloroethylene, 1,2,4-trichlorobenzene, carbon tetrachloride. These materials have high densities. Useful hydrocarbons include, but are not limited to, dodecane, tetradecane, the aliphatic hydrocarbons in the Isopar® series (Exxon, Houston, Tex.), Norpar® (series of normal paraffinic liquids), Shell-Sol® (Shell, Houston, Tex.), and Sol-Trol® (Shell), naphtha, and other petroleum solvents. These materials usually have low densities. Useful examples of silicone oils include, but are not limited to, octamethyl cyclosiloxane and higher molecular weight cyclic siloxanes, poly (methyl phenyl siloxane), hexamethyldisiloxane, and polydimethylsiloxane. These materials usually have low densities. Useful low molecular weight halogen-containing polymers include, but are not limited to, poly(chlorotrifluoroethylene) polymer (Halogenated hydrocarbon Inc., River Edge, N.J.), Galden® (a perfluorinated ether from Ausimont, Morristown, N.J.), or Krytox® from DuPont (Wilmington, Del.). In a preferred embodiment, the suspending fluid is a poly(chlorotrifluoroethylene) polymer. In a particularly preferred embodiment, this polymer has a degree of polymerization from about 2 to about 10. Many of the above materials are available in a range of viscosities, densities, and boiling points.
  • [0142]
    The fluid must be capable of being formed into small droplets prior to a capsule being formed. Processes for forming small droplets include flow-through jets, membranes, nozzles, or orifices, as well as shear-based emulsifying schemes. The formation of small drops may be assisted by electrical or sonic fields. Surfactants and polymers can be used to aid in the stabilization and emulsification of the droplets in the case of an emulsion type encapsulation. A preferred surfactant for use in displays of the invention is sodium dodecylsulfate.
  • [0143]
    It can be advantageous in some displays for the suspending fluid to contain an optically absorbing dye. This dye must be soluble in the fluid, but will generally be insoluble in the other components of the capsule. There is much flexibility in the choice of dye material. The dye can be a pure compound, or blends of dyes to achieve a particular color, including black. The dyes can be fluorescent, which would produce a display in which the fluorescence properties depend on the position of the particles. The dyes can be photoactive, changing to another color or becoming colorless upon irradiation with either visible or ultraviolet light, providing another means for obtaining an optical response. Dyes could also be polymerizable, forming a solid absorbing polymer inside the bounding shell.
  • [0144]
    There are many dyes that can be chosen for use in encapsulated electrophoretic display. Properties important here include light fastness, solubility in the suspending liquid, color, and cost. These are generally from the class of azo, anthraquinone, and triphenylmethane type dyes and may be chemically modified so as to increase the solubility in the oil phase and reduce the adsorption by the particle surface.
  • [0145]
    A number of dyes already known to those skilled in the art of electrophoretic displays will prove useful. Useful azo dyes include, but are not limited to: the Oil Red dyes, and the Sudan Red and Sudan Black series of dyes. Useful anthraquinone dyes include, but are not limited to: the Oil Blue dyes, and the Macrolex Blue series of dyes. Useful triphenylmethane dyes include, but are not limited to, Michler's hydrol, Malachite Green, Crystal Violet, and Auramine O.
  • [0146]
    C. Charge Control Agents and Particle Stabilizers
  • [0147]
    Charge control agents are used to provide good electrophoretic mobility to the electrophoretic particles. Stabilizers are used to prevent agglomeration of the electrophoretic particles, as well as prevent the electrophoretic particles from irreversibly depositing onto the capsule wall. Either component can be constructed from materials across a wide range of molecular weights (low molecular weight, oligomeric, or polymeric), and may be pure or a mixture. In particular, suitable charge control agents are generally adapted from the liquid toner art. The charge control agent used to modify and/or stabilize the particle surface charge is applied as generally known in the arts of liquid toners, electrophoretic displays, non-aqueous paint dispersions, and engine-oil additives. In all of these arts, charging species may be added to non-aqueous media in order to increase electrophoretic mobility or increase electrostatic stabilization. The materials can improve steric stabilization as well. Different theories of charging are postulated, including selective ion adsorption, proton transfer, and contact electrification.
  • [0148]
    An optional charge control agent or charge director may be used. These constituents typically consist of low molecular weight surfactants, polymeric agents, or blends of one or more components and serve to stabilize or otherwise modify the sign and/or magnitude of the charge on the electrophoretic particles.
  • [0149]
    The charging properties of the pigment itself may be accounted for by taking into account the acidic or basic surface properties of the pigment, or the charging sites may take place on the carrier resin surface (if present), or a combination of the two. Additional pigment properties which may be relevant are the particle size distribution, the chemical composition, and the lightfastness. The charge control agent used to modify and/or stabilize the particle surface charge is applied as generally known in the arts of liquid toners, electrophoretic displays, non-aqueous paint dispersions, and engine-oil additives. In all of these arts, charging species may be added to non-aqueous media in order to increase electrophoretic mobility or increase electrostatic stabilization. The materials can improve steric stabilization as well. Different theories of charging are postulated, including selective ion adsorption, proton transfer, and contact electrification.
  • [0150]
    Charge adjuvants may also be added. These materials increase the effectiveness of the charge control agents or charge directors. The charge adjuvant may be a polyhydroxy compound or an aminoalcohol compound, which are preferably soluble in the suspending fluid in an amount of at least 2% by weight. Examples of polyhydroxy compounds which contain at least two hydroxyl groups include, but are not limited to, ethylene glycol, 2,4,7,9-tetramethyl-decyne-4,7-diol, poly(propylene glycol), pentaethylene glycol, tripropylene glycol, triethylene glycol, glycerol, pentaerythritol, glycerol tris(12-hydroxystearate), propylene glycerol monohydroxystearate, and ethylene glycol monohydroxystrearate. Examples of aminoalcohol compounds which contain at least one alcohol function and one amine function in the same molecule include, but are not limited to, triisopropanolamine, triethanolamine, ethanolamine, 3-amino-1-propanol, o-aminophenol, 5-amino-1-pentanol, and tetrakis(2-hydroxyethyl)ethylene-diamine. The charge adjuvant is preferably present in the suspending fluid in an amount of about 1 to about 100 mg/g of the particle mass, and more preferably about 50 to about 200 mg/g.
  • [0151]
    The surface of the particle may also be chemically modified to aid dispersion, to improve surface charge, and to improve the stability of the dispersion, for example. Surface modifiers include organic siloxanes, organohalogen silanes and other functional silane coupling agents (Dow Corning® Z-6070, Z-6124, and 3 additive, Midland, Mich.); organic titanates and zirconates (Tyzor® TOT, TBT, and TE Series, DuPont, Wilmington, Del.); hydrophobing agents, such as long chain (C12 to C50) alkyl and alkyl benzene sulphonic acids, fatty amines or diamines and their salts or quaternary derivatives; and amphipathic polymers which can be covalently bonded to the particle surface.
  • [0152]
    In general, it is believed that charging results as an acid-base reaction between some moiety present in the continuous phase and the particle surface. Thus useful materials are those which are capable of participating in such a reaction, or any other charging reaction as known in the art.
  • [0153]
    Different non-limiting classes of charge control agents which are useful include organic sulfates or sulfonates, metal soaps, block or comb copolymers, organic amides, organic zwitterions, and organic phosphates and phosphonates. Useful organic sulfates and sulfonates include, but are not limited to, sodium bis(2-ethyl hexyl) sulfosuccinate, calcium dodecyl benzene sulfonate, calcium petroleum sulfonate, neutral or basic barium dinonylnaphthalene sulfonate, neutral or basic calcium dinonylnaphthalene sulfonate, dodecylbenzenesulfonic acid sodium salt, and ammonium lauryl sulphate. Useful metal soaps include, but are not limited to, basic or neutral barium petronate, calcium petronate, Co—, Ca—, Cu—, Mn—, Ni—, Zn—, and Fe— salts of naphthenic acid, Ba—, Al—, Zn—, Cu—, Pb—, and Fe— salts of stearic acid, divalent and trivalent metal carboxylates, such as aluminum tristearate, aluminum octoanate, lithium heptanoate, iron stearate, iron distearate, barium stearate, chromium stearate, magnesium octanoate, calcium stearate, iron naphthenate, and zinc naphthenate, Mn— and Zn— heptanoate, and Ba—, Al—, Co—, Mn—, and Zn— octanoate. Useful block or comb copolymers include, but are not limited to, AB diblock copolymers of (A) polymers of 2-(N,N)-dimethylaminoethyl methacrylate quaternized with methyl-p-toluenesulfonate and (B) poly-2-ethylhexyl methacrylate, and comb graft copolymers with oil soluble tails of poly (12-hydroxystearic acid) and having a molecular weight of about 1800, pendant on an oil-soluble anchor group of poly (methyl methacrylate-methacrylic acid). Useful organic amides include, but are not limited to, polyisobutylene succinimides such as OLOA 1200 and 3700, and N-vinyl pyrrolidone polymers. Useful organic zwitterions include, but are not limited to, lecithin. Useful organic phosphates and phosphonates include, but are not limited to, the sodium salts of phosphated mono- and di-glycerides with saturated and unsaturated acid substituents.
  • [0154]
    Particle dispersion stabilizers may be added to prevent particle flocculation or attachment to the capsule walls. For the typical high resistivity liquids used as suspending fluids in electrophoretic displays, nonaqueous surfactants may be used. These include, but are not limited to, glycol ethers, acetylenic glycols, alkanolamides, sorbitol derivatives, alkyl amines, quaternary amines, imidazolines, dialkyl oxides, and sulfosuccinates.
  • [0155]
    D. Encapsulation
  • [0156]
    There is a long and rich history to encapsulation, with numerous processes and polymers having proven useful in creating capsules.
  • [0157]
    Encapsulation of the internal phase may be accomplished in a number of different ways. Numerous suitable procedures for microencapsulation are detailed in both Microencapsulation, Processes and Applications, (I. E. Vandegaer, ed.), Plenum Press, New York, N.Y. (1974) and Gutcho, Microcapsules and Mircroencapsulation Techniques, Nuyes Data Corp., Park Ridge, N.J. (1976). The processes fall into several general categories, all of which can be applied to the present invention: interfacial polymerization, in situ polymerization, physical processes, such as coextrusion and other phase separation processes, in-liquid curing, and simple/complex coacervation.
  • [0158]
    Numerous materials and processes should prove useful in formulating displays of the present invention. Useful materials for simple coacervation processes include, but are not limited to, gelatin, polyvinyl alcohol, polyvinyl acetate, and cellulosic derivatives, such as, for example, carboxymethylcellulose. Useful materials for complex coacervation processes include, but are not limited to, gelatin, acacia, carageenan, carboxymethylcellulose, hydrolyzed styrene anhydride copolymers, agar, alginate, casein, albumin, methyl vinyl ether co-maleic anhydride, and cellulose phthalate. Useful materials for phase separation processes include, but are not limited to, polystyrene, PMMA, polyethyl methacrylate, polybutyl methacrylate, ethyl cellulose, polyvinyl pyridine, and poly acrylonitrile. Useful materials for in situ polymerization processes include, but are not limited to, polyhydroxyamides, with aldehydes, melamine, or urea and formaldehyde; water-soluble oligomers of the condensate of melamine, or urea and formaldehyde; and vinyl monomers, such as, for example, styrene, MMA and acrylonitrile. Finally, useful materials for interfacial polymerization processes include, but are not limited to, diacyl chlorides, such as, for example, sebacoyl, adipoyl, and di- or poly- amines or alcohols, and isocyanates. Useful emulsion polymerization materials may include, but are not limited to, styrene, vinyl acetate, acrylic acid, butyl acrylate, t-butyl acrylate, methyl methacrylate, and butyl methacrylate.
  • [0159]
    Capsules produced may be dispersed into a curable carrier, resulting in an ink which may be printed or coated on large and arbitrarily shaped or curved surfaces using conventional printing and coating techniques. In the context of the present invention, one skilled in the art will select an encapsulation procedure and wall material based on the desired capsule properties. These properties include the distribution of capsule radii; electrical, mechanical, diffusion, and optical properties of the capsule wall; and chemical compatibility with the internal phase of the capsule.
  • [0160]
    The capsule wall generally has a high electrical resistivity. Although it is possible to use walls with relatively low resistivities, this may limit performance in requiring relatively higher addressing voltages. The capsule wall should also be mechanically strong (although if the finished capsule powder is to be dispersed in a curable polymeric binder for coating, mechanical strength is not as critical). The capsule wall should generally not be porous. If, however, it is desired to use an encapsulation procedure that produces porous capsules, these can be overcoated in a post-processing step (i.e., a second encapsulation). Moreover, if the capsules are to be dispersed in a curable binder, the binder will serve to close the pores. The capsule walls should be optically clear. The wall material may, however, be chosen to match the refractive index of the internal phase of the capsule (i.e., the suspending fluid) or a binder in which the capsules are to be dispersed. For some applications (e.g., interposition between two fixed electrodes), monodispersed capsule radii are desirable.
  • [0161]
    An encapsulation procedure involves a polymerization between urea and formaldehyde in an aqueous phase of an oil/water emulsion in the presence of a negatively charged, carboxyl-substituted, linear hydrocarbon polyelectrolyte material. The resulting capsule wall is a urea/formaldehyde copolymer, which discretely encloses the internal phase. The capsule is clear, mechanically strong, and has good resistivity properties.
  • [0162]
    The related technique of in situ polymerization utilizes an oil/water emulsion, which is formed by dispersing the electrophoretic composition (i.e., the dielectric liquid containing a suspension of the pigment particles) in an aqueous environment. The monomers polymerize to form a polymer with higher affinity for the internal phase than for the aqueous phase, thus condensing around the emulsified oily droplets. In one especially useful in situ polymerization processes, urea and formaldehyde condense in the presence of poly(acrylic acid) (See, e.g., U.S. Pat. No. 4,001,140). In other useful process, any of a variety of cross-linking agents borne in aqueous solution is deposited around microscopic oil droplets. Such cross-linking agents include aldehydes, especially formaldehyde, glyoxal, or glutaraldehyde; alum; zirconium salts; and poly isocyanates. The entire disclosures of the 4,001,140 and 4,273,672 patents are hereby incorporated by reference herein.
  • [0163]
    The coacervation approach also utilizes an oil/water emulsion. One or more colloids are coacervated (i.e., agglomerated) out of the aqueous phase and deposited as shells around the oily droplets through control of temperature, pH and/or relative concentrations, thereby creating the microcapsule. Materials suitable for coacervation include gelatins and gum arabic.
  • [0164]
    The interfacial polymerization approach relies on the presence of an oil-soluble monomer in the electrophoretic composition, which once again is present as an emulsion in an aqueous phase. The monomers in the minute hydrophobic droplets react with a monomer introduced into the aqueous phase, polymerizing at the interface between the droplets and the surrounding aqueous medium and forming shells around the droplets. Although the resulting walls are relatively thin and may be permeable, this process does not require the elevated temperatures characteristic of some other processes, and therefore affords greater flexibility in terms of choosing the dielectric liquid.
  • [0165]
    Coating aids can be used to improve the uniformity and quality of the coated or printed electrophoretic ink material. Wetting agents are typically added to adjust the interfacial tension at the coating/substrate interface and to adjust the liquid/air surface tension. Wetting agents include, but are not limited to, anionic and cationic surfactants, and nonionic species, such as silicone or fluoropolymer based materials. Dispersing agents may be used to modify the interfacial tension between the capsules and binder, providing control over flocculation and particle settling.
  • [0166]
    Surface tension modifiers can be added to adjust the air/ink interfacial tension. Polysiloxanes are typically used in such an application to improve surface leveling while minimizing other defects within the coating. Surface tension modifiers include, but are not limited to, fluorinated surfactants, such as, for example, the Zonyl® series from DuPont (Wilmington, Del.), the Fluorod® series from 3M (St. Paul, Minn.), and the fluoroakyl series from Autochem (Glen Rock, N.J.); siloxanes, such as, for example, Silwet® from Union Carbide (Danbury, Conn.); and polyethoxy and polypropoxy alcohols. Antifoams, such as silicone and silicone-free polymeric materials, may be added to enhance the movement of air from within the ink to the surface and to facilitate the rupture of bubbles at the coating surface. Other useful antifoams include, but are not limited to, glyceryl esters, polyhydric alcohols, compounded antifoams, such as oil solutions of alkyl benzenes, natural fats, fatty acids, and metallic soaps, and silicone antifoaming agents made from the combination of dimethyl siloxane polymers and silica. Stabilizers such as uv-absorbers and antioxidants may also be added to improve the lifetime of the ink.
  • [0167]
    Other additives to control properties like coating viscosity and foaming can also be used in the coating fluid. Stabilizers (UV-absorbers, antioxidants) and other additives which could prove useful in practical materials.
  • [0168]
    E. Binder Material
  • [0169]
    The binder is used as a non-conducting, adhesive medium supporting and protecting the capsules, as well as binding the electrode materials to the capsule dispersion. Binders are available in many forms and chemical types. Among these are water-soluble polymers, water-borne polymers, oil-soluble polymers, thermoset and thermoplastic polymers, and radiation-cured polymers.
  • [0170]
    Among the water-soluble polymers are the various polysaccharides, the polyvinyl alcohols, N-methylpyrrolidone, N-vinylpyrrollidone, the various Carbowax® species (Union Carbide, Danbury, Conn.), and poly-2-hydroxyethylacrylate.
  • [0171]
    The water-dispersed or water-borne systems are generally latex compositions, typified by the Neorez® and Neocryl® resins (Zeneca Resins, Wilmington, Mass.), Acrysol® (Rohm and Haas, Philadelphia, Pa.), Bayhydrol® (Bayer, Pittsburgh, Pa.), and the Cytec Industries (West Paterson, N.J.) HP line. These are generally latices of polyurethanes, occasionally compounded with one or more of the acrylics, polyesters, polycarbonates or silicones, each lending the final cured resin in a specific set of properties defined by glass transition temperature, degree of “tack,” softness, clarity, flexibility, water permeability and solvent resistance, elongation modulus and tensile strength, thermoplastic flow, and solids level. Some water-borne systems can be mixed with reactive monomers and catalyzed to form more complex resins. Some can be further cross-linked by the use of a crosslinking reagent, such as an aziridine, for example, which reacts with carboxyl groups.
  • [0172]
    A typical application of a water-borne resin and aqueous capsules follows. A volume of particles is centrifuged at low speed to separate excess water. After a given centrifugation process, for example 10 minutes at 60×G, the capsules are found at the bottom of the centrifuge tube, while the water portion is at the top. The water portion is carefully removed (by decanting or pipetting). The mass of the remaining capsules is measured, and a mass of resin is added such that the mass of resin is between one eighth and one tenth of the weight of the capsules. This mixture is gently mixed on an oscillating mixer for approximately one half hour. After about one half hour, the mixture is ready to be coated onto the appropriate substrate.
  • [0173]
    The thermoset systems are exemplified by the family of epoxies. These binary systems can vary greatly in viscosity, and the reactivity of the pair determines the “pot life” of the mixture. If the pot life is long enough to allow a coating operation, capsules may be coated in an ordered arrangement in a coating process prior to the resin curing and hardening.
  • [0174]
    Thermoplastic polymers, which are often polyesters, are molten at high temperatures. A typical application of this type of product is hot-melt glue. A dispersion of heat-resistant capsules could be coated in such a medium. The solidification process begins during cooling, and the final hardness, clarity and flexibility are affected by the branching and molecular weight of the polymer.
  • [0175]
    Oil or solvent-soluble polymers are often similar in composition to the water-borne system, with the obvious exception of the water itself. The latitude in formulation for solvent systems is enormous, limited only by solvent choices and polymer solubility. Of considerable concern in solvent-based systems is the viability of the capsule itself—the integrity of the capsule wall cannot be compromised in any way by the solvent.
  • [0176]
    Radiation cure resins are generally found among the solvent-based systems. Capsules may be dispersed in such a medium and coated, and the resin may then be cured by a timed exposure to a threshold level of very violet radiation, either long or short wavelength. As in all cases of curing polymer resins, final properties are determined by the branching and molecular weights of the monomers, oligomers and crosslinkers.
  • [0177]
    A number of “water-reducible” monomers and oligomers are, however, marketed. In the strictest sense, they are not water soluble, but water is an acceptable diluent at low concentrations and can be dispersed relatively easily in the mixture. Under these circumstances, water is used to reduce the viscosity (initially from thousands to hundreds of thousands centipoise). Water-based capsules, such as those made from a protein or polysaccharide material, for example, could be dispersed in such a medium and coated, provided the viscosity could be sufficiently lowered. Curing in such systems is generally by ultraviolet radiation.
  • [0178]
    Referring to FIG. 16a, an embodiment of an electrophoretic display that employs a thin-film transistor array of the present invention is shown. FIG. 16a shows a diagrammatic cross-section of an electrophoretic display 130 constructed using electronic ink. The binder 132 includes at least one capsule 134, which is filled with a plurality of particles 136 and a dyed suspending fluid 138. In one embodiment, the particles 136 are titania particles. When a direct-current electric field of the appropriate polarity is applied across the capsule 134, the particles 136 move to the viewed surface of the display and scatter light. When the applied electric field is reversed, the particles 136 move to the rear surface of the display and the viewed surface of the display then appears dark.
  • [0179]
    [0179]FIG. 16b shows a cross-section of another electrophoretic display 140 constructed using electronic ink. This display comprises a first set of particles 142 and a second set of particles 144 in a capsule 141. The first set of particles 142 and the second set of particles 144 have contrasting optical properties. For example, the first set of particles 142 and the second set of particles 144 can have differing electrophoretic mobilities. In addition, the first set of particles 142 and the second set of particles 144 can have contrasting colors. For example, the first set of particles 142 can be white, while the second set of particles 144 can be black. The capsule 141 further includes a substantially clear fluid. The capsule 141 has electrodes 146 and 146′ disposed adjacent it. The electrodes 146, 146′ are connected to a source of voltage 148, which may provide an electric field to the capsule 141. In one embodiment, upon application of an electric field across the electrodes 146, 146′, the first set of particles 142 move toward electrode 146′, while the second set of particles 144 move toward electrode 146. In another embodiment, upon application of an electric field across the electrodes 146, 146′, the first set of particles 142 move rapidly toward electrode 146′, while the second set of particles 144 move only slowly or not at all towards electrode 146, so that the first set of particles packs preferentially at the microcapsule surface adjacent to electrode 146′.
  • [0180]
    [0180]FIG. 16c shows a diagrammatic cross-section of a suspended particle display 250. The suspended particle display 250 includes needle-like particles 252 in a transparent fluid 254. The particles 252 change their orientation upon application of an AC field across the electrodes 256, 256′. When the AC field is applied, the particles 252 are oriented perpendicular with respect to the display surface and the display appears transparent. When the AC field is removed, the particles 252 are randomly oriented and the display 250 appears opaque.
  • [0181]
    In another detailed embodiment, a display 160 can comprise a plurality of bichromal spheres, as illustrated in FIG. 16d. A bichromal sphere typically comprises a positively charged hemisphere 162 of a first color and a negatively charged hemisphere 164 of a second color in a liquid medium 166. Upon application of an electric field across the sphere through a pair of electrodes 168, 168′, the sphere rotates and displays the color of one of the two hemispheres 162, 164.
  • [0182]
    In an alternative embodiment, an array of transistors with reduced cross-talk is prepared by increasing the resistivity of the semiconductor layer. For example, where the semiconductor layer is an amorphous silicon that is slightly n-type as deposited, the semiconductor can be lightly doped with boron or an equivalent p-type dopant to increase the resistivity of the semiconductor layer. If the semiconductor layer is doped with too much boron, the semiconductor layer will become p-type and the resistivity will decrease. For example, in a display application, the boron doping can be adjusted to provide the minimum required “on” current for the transistor to drive a pixel of a display, while concurrently maintaining sufficient isolation between neighboring elements or signals. As discussed, the spacing between neighboring source and drain electrodes of the transistors and the metal signal lines must be sufficiently large to suppress charge leakage through the underlying semiconductor layer in this embodiment. This minimum spacing can be derived via a resistance calculation if the leakage current, electrode potential, semiconductor conductivity and thickness of various materials are known.
  • [0183]
    While the invention has been particularly shown and described with reference to specific preferred embodiments, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. For example, an array of active or passive elements can be prepared in accordance with the present invention. The array of elements can be used in devices other than displays.

Claims (30)

    What is claimed is:
  1. 1. A thin-film transistor array comprising at least first and second transistors, each of the first and second transistors comprising:
    a shared silicon layer having a thickness less than 40 nm and extending continuously between the first and second transistors;
    a source electrode in direct contact with the silicon layer;
    a drain electrode spaced from the source electrode and in direct contact with the silicon layer; and
    a gate electrode disposed adjacent to the silicon layer.
  2. 2. The thin-film transistor array of claim 1 wherein the silicon layer consists of unpatterned silicon.
  3. 3. The thin-film transistor array of claim 2 wherein the silicon layer consists of amorphous silicon.
  4. 4. The thin-film transistor array of claim 1 wherein the silicon layer is undoped.
  5. 5. The thin-film transistor array of claim 1 wherein the first transistor is a bottom gate transistor.
  6. 6. The thin-film transistor array of claim 1 wherein the first transistor is a top gate transistor.
  7. 7. The thin-film transistor array of claim 1, the first transistor further comprising a first pixel electrode of an electronic display, the first pixel electrode in communication with the source electrode of the first transistor, and the drain electrode of the first transistor is in communication with a first data line of the electronic display.
  8. 8. The thin-film transistor array of claim 7 wherein a distance between the first pixel electrode and the first data line is selected to provide an acceptable leakage current between the first pixel electrode and the first data line.
  9. 9. The thin-film transistor array of claim 7 wherein a distance between the first transistor and the second transistor is selected to provide an acceptable leakage current between the first data line and the second data line.
  10. 10. The thin-film transistor array of claim 9 wherein at least one of the first data line, the second data line, the first transistor and the first pixel electrode have a geometry selected to provide an acceptable leakage between the first data line and the second data line.
  11. 11. An electronic display comprising:
    a display medium;
    a first pixel electrode and a second pixel electrode provided adjacent to the display medium; and
    a first thin-film transistor and a second thin-film transistor in respective electrical communication with the first pixel electrode and the second pixel electrode, and comprising a shared continuous amorphous silicon layer that has a thickness less than 40 nm and provides channels for the first thin-film transistor and the second thin-film transistor.
  12. 12. The electronic display of claim 11 wherein the display medium is electrophoretic.
  13. 13. The electronic display of claim 12 wherein the electrophoretic medium comprises at least one type of particle and a suspending fluid.
  14. 14. The electronic display of claim 12 wherein the electrophoretic medium is encapsulated.
  15. 15. The electronic display of claim 11 further comprising a light blocking layer provided adjacent to the silicon layer.
  16. 16. The electronic display of claim 11 further comprising a first data line in communication with the first transistor and a second data line in communication with the second transistor, wherein a distance between the first transistor and the second transistor is selected to provide an acceptable leakage between the first data line and the second data line.
  17. 17. The electronic display of claim 16 wherein a distance between the first pixel electrode and the first data line is selected to provide an acceptable leakage between the first pixel electrode and the first data line.
  18. 18. The electronic display of claim 11 wherein the first transistor comprises a gate electrode, a source electrode and a drain electrode and the gate electrode and one of the source electrode and the drain electrode form a capacitor.
  19. 19. A method of manufacturing an array of thin-film transistors comprising at least a first transistor and a second transistor, the method comprising the steps of: providing a substrate;
    forming adjacent to the substrate an unpatterned silicon layer having a thickness less than 40 nm;
    forming at least one patterned drain electrode for each of the transistors, the drain electrodes in direct contact with the unpatterned silicon layer;
    forming at least one patterned source electrode for each of the transistors, the source electrodes in direct contact with the unpatterned silicon layer; and
    forming at least one gate electrode for each of the transistors, the gate electrode disposed adjacent to the unpatterned silicon layer.
  20. 20. The method of claim 19 further comprising the step of selecting a spacing between the first transistor and the second transistor to provide an acceptable leakage current between the first transistor and the second transistor.
  21. 21. The method of claim 19 further comprising the step of forming a dielectric layer adjacent to the at least one gate electrode.
  22. 22. The method of claim 19 wherein the step of providing a substrate comprises unwinding the substrate from a first roll and winding the substrate onto a second roll.
  23. 23. The method of claim 21 wherein the steps of forming the dielectric layer, forming the unpatterned silicon layer and forming the source and drain electrodes occur at least partially during one visit of the substrate inside a single deposition chamber.
  24. 24. The method of claim 19 further comprising the steps of: providing a first pixel electrode of an electronic display in communication with the source electrode of the first transistor; and providing a first data line of the electronic display in communication with the drain electrode of the first transistor.
  25. 25. The method of claim 24 further comprising the steps of: providing a second pixel electrode of an electronic display in communication with the source electrode of the second transistor; providing a second data line of the electronic display in communication with the drain electrode of the second transistor; and selecting a geometry of at least one of: (i) the first data line; (ii) the second data line; (iii) the first transistor and (iv) the first pixel electrode, to provide an acceptable leakage current between the first data line and the second data line.
  26. 26. The method of claim 24 further comprising the step of selecting a distance between the first pixel electrode and the first data line to provide an acceptable leakage between the first pixel electrode and the first data line.
  27. 27. The method of claim 24 further comprising the steps of: providing a second pixel electrode of an electronic display in communication with the source electrode of the second transistor; providing a second data line of the electronic display in communication with the drain electrode of the second transistor; and selecting at least one of: (i) a distance between the source electrode of the first transistor and the drain electrode of the first transistor; (ii) a channel width of the first transistor; (iii) a dimension of the first pixel electrode; (iv) a distance between the first data line and the first transistor and (v) a distance between the first pixel electrode and the second data line, to provide an acceptable leakage current between the first data line and the second data line.
  28. 28. The method of claim 19 wherein the step of forming the unpatterned silicon layer comprises forming an amorphous silicon film.
  29. 29. The method of claim 28 wherein the step of forming the unpatterned silicon layer comprises forming an intrinsic amorphous silicon film.
  30. 30. The method of claim 19 wherein the steps of forming include mask steps consisting of a first mask step and a second mask step, wherein the step of forming at least one gate electrode comprises the first mask step and the steps of forming at least one patterned drain electrode and forming at least one patterned source electrode share the second mask step.
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US6683333B2 (en) 2004-01-27 grant

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