US20020053466A1 - Printed-Circuit board and a semiconductor module, and a manufacturing process of the semiconductor module - Google Patents
Printed-Circuit board and a semiconductor module, and a manufacturing process of the semiconductor module Download PDFInfo
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- US20020053466A1 US20020053466A1 US09/504,712 US50471200A US2002053466A1 US 20020053466 A1 US20020053466 A1 US 20020053466A1 US 50471200 A US50471200 A US 50471200A US 2002053466 A1 US2002053466 A1 US 2002053466A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/10175—Flow barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/171—Disposition
- H01L2224/17104—Disposition relative to the bonding areas, e.g. bond pads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09281—Layout details of a single conductor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/163—Monitoring a manufacturing process
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to a printed-circuit board for receiving a semiconductor integrated circuit (IC) mounted thereon, and a semiconductor module including the semiconductor integrated circuit, and as well as to a manufacturing process of the semiconductor module.
- IC semiconductor integrated circuit
- the circuit substrate made of, for example, epoxy resin is provided with a plurality of isolated lands, each of which is aligned and connected, one to one correspondence, to the ball-like solder.
- the land which is preformed of a film layer of, for instance, copper deposited on the circuit substrate is rounded so that it corresponds to the ball-like solder bump.
- FIG. 10 shows a cross sectional view of the conventional semiconductor module receiving the IC with ball-like solders on the circuit substrate.
- the circuit substrate 1 supports a plurality of lands 2 , each connected with associated wire 3 .
- Both lands 2 and wires 3 are printed on the circuit substrate 1 .
- the lands 2 are arrayed on the circuit substrate 1 corresponding, in number and in shape, to the ball-like solders provided on the opposing surface, i.e. the lower surface in the drawing, of the Integrated Circuit (IC) 4 .
- a protection layer 6 made of photoresist is provided on the wires 3 , but not on the lands 3 to allow the lands 3 connected with ball-like solders on the IC 4 .
- FIG. 10 also shows not only ball-like solders properly fused but also that improperly fused, which are designated by numerals 5 a and 5 b, respectively.
- the properly fused ball-like solder 5 a is completely soldered and thereby extends across the entire surface of the land 3 .
- the improperly fused ball-like solder 5 b is not completely soldered at its portion facing to the land 3 , leaving a space gap extending around the land 3 between the land 3 and the fused ball-like solder 5 b.
- the improper soldering may bring a mal-function such as open circuit, significantly reducing the reliability of the semiconductor module 8 .
- a test should be made to determine whether the soldering has been performed properly.
- a plenty of ball-like solders 5 are provided two-dimensionally between the IC 4 and the circuit substrate 1 , it is difficult to determine the quality of the soldering by the visual inspection from the peripheral edge of the semiconductor module 8 . Therefore, many processes for determining the quality of the soldering have been developed including a fluoroscopic test in which X-rays is illuminated from above the IC 4 to image the configuration of the fused balls, determining whether ball-like solders 5 have been properly soldered.
- FIG. 11 shows, in part, a photofluorographic image of the semiconductor module 8 , viewed from above thereof with a soft X-rays.
- the ball-like solders 5 can be seen more clearly due to the reduced transmissivity thereof than others, as a cross-hatched portion, which are darker than the other portions (thus, the hatching is used only for exaggeration but not for indication of a cross-section.
- JP-A 9-51017 discloses the lands 2 designed such that they have the diameter greater than, or the configuration different from those of the ball-like solders 5 .
- This technique causes the reproduced image to show the configuration of the fused ball-like solders, allowing to readily judge whether the ball-like solders are properly soldered.
- the present invention was made to solve the problems as aforementioned above, and the first purpose thereof is to provide a printed-circuit board, which can be easily inspected to determine the quality of the soldering when the IC with the ball-like solder of BGA, CSP or the like, is mounted on the circuit substrate, while allowing the high density mounting, even in the case where each land has approximately the same area as the ball-like solder.
- the second purpose of the present invention is to provide a semiconductor module which can be easily inspected to determine the quality of the soldering when the IC with the ball-like solders of BGA or CSP etc., is mounted on the circuit substrate, while allowing the high reliability and the high density mounting.
- the third purpose of the present invention is to provide a manufacturing process of the semiconductor module which can be easily inspected to determine the quality of the soldering when the IC with the ball-like solder of BGA, CSP or the like, is mounted on the circuit substrate, while allowing the high reliability and the high density mounting.
- a printed-circuit board of the present invention comprises, a circuit substrate; a plurality of patterned wires formed on a surface of said circuit substrate; a plurality of lands, each land connected to at least one of said patterned wires through an end portion thereof; and a protection layer with a plurality of openings, covering the surface of said circuit substrate, wherein said land and said end portion connected thereto are exposed in the associated opening of said protection layer.
- each of the end portions of said patterned wires is tapered away from one of said lands connected thereto.
- a semiconductor module of the present invention comprises, a printed-circuit board, including a circuit substrate, a plurality of patterned wires formed on a surface of said circuit substrate, a plurality of lands, each land connected to at least one of said patterned wires through an end portion thereof; a semiconductor integrated circuit having a plurality of pins; and a plurality of ball-like solders formed on each of said pins to mount said semiconductor integrated circuit upon said printed-circuit board such that each of said ball-like solders is fused onto one of said lands and on the end portion of said patterned wires connected thereto.
- the printed-circuit board further including a protection layer with a plurality of openings, covering the surface of said circuit substrate; wherein each of said lands and end portions are exposed in the associated opening of said protection layer.
- each of the end portions of said patterned wires is tapered away from one of said lands connected thereto.
- a process for manufacturing the semiconductor module of the present invention which comprises steps of: covering an entire surface of a circuit substrate with a protection layer, wherein a plurality of patterned wires and lands are formed on said circuit substrate such that each of said patterned wires are connected at least one of said lands through an end portion thereof; opening a plurality of openings within said protection layer, each of said lands and end portions being exposed therethrough; aligning and connecting ball-like solders of a semiconductor integrated circuit to said lands; fusing said ball-like solders onto said lands and end portions of said patterned wires connected thereto, by heating the semiconductor module; and inspecting a shape of soldering by fluoroscoping the semiconductor module with a X-rays.
- the process for manufacturing the semiconductor module of the present invention further comprises steps of, removing said protection layer out after fusing said ball-like solders.
- FIG. 1 is a top plan view of the printed-circuit board according to Embodiment 1 of the present invention.
- FIGS. 2 to 5 are cross sectional views each showing the manufacturing processes of the semiconductor module according to Embodiment 1 of the present invention.
- FIG. 6 is a photofluorographic top view showing the manufacturing process of the semiconductor module according to Embodiment 1 of the present invention.
- FIG. 7 is a top plan view of the printed-circuit board according to Embodiment 2 of the present invention.
- FIG. 8 is a photofluorographic top plan view showing the manufacturing process of the semiconductor module according to Embodiment 2 of the present invention.
- FIG. 9 is a cross sectional view showing the semiconductor module according to Embodiment 3 of the present invention.
- FIG. 10 is a cross sectional view showing the prior art semiconductor module.
- FIG. 11 is a cross sectional view showing the manufacturing process of the prior art semiconductor module.
- the printed-circuit board 9 preferably made of, for example, epoxy comprises a circuit substrate 1 supporting a plurality of lands 2 and patterned wires 3 .
- the lands 2 are electrically connected with associated patterned wires 3 .
- the lands 2 are arrayed on the circuit substrate 1 in the same manner as solders 5 prepared in the form of balls on an IC board 4 .
- the printed-circuit board 9 also comprises a photoresist layer 6 for the protection of the circuits on the substrate 1 . In this case, however, the lands 2 and end portions 3 a of the patterned wires 3 are exposed to air for their electric connections with the associated ball-like solders 5 on the IC board 4 to form a semiconductor module 8 .
- FIGS. 2 to 5 show respective cross sectional views taken along lines X-X′ in FIG. 1.
- the details are described hereinafter with regard to the manufacturing process of the semiconductor module 8 .
- prepared is the printed-circuit board 9 as illustrated in and described with FIG. 1, including the substrate 1 which supports the lands 2 , patterned wires 3 each electrically connected to the associated lands 2 , and coated photoresist layer 6 .
- the top surfaces of the lands 2 are coated with a solder paste layer 10 by the conventional printing technique.
- the IC board 4 is placed on the board 9 .
- the IC board 4 is provided at its one surface to be faced against the board 9 with a number of ball-like solders 5 made of conventional soldering material.
- the solders 5 are arrayed in the same manner as the lands 2 in the board 9 .
- each of the solders 5 is sized so that, when properly fused on the land 2 , it could extend across the entire surface of the land 2 to the portion 3 a of the wire 3 .
- the assembled IC 4 and board 9 are placed in a heating chamber of a furnace, for example, re-flowing furnace. This causes the ball-like solder 5 as well as the soldering paste 10 to melt on the lands 2 , electrically connecting the melted solder 5 with the associated circuit portion provided on the IC board 4 .
- the resultant semiconductor module 8 is illustrated in FIG. 5.
- FIG. 5 also shows not only properly melted solders designated at 5 a but also improperly melted solders designated at 5 b .
- the properly melted solder 5 a covers not only on the entire surface of the land 2 but also on the portions 3 a of the wire 3 in the opening 7 , due to a good affinity of between the land 2 and the wire 3 , both made of the same material.
- the substrate 1 exposed outside the land 2 and the portion 3 a of the wire 3 in the opening 7 is made of material capable of repelling against the melted solder 5 a , preventing the melted solder 5 a from flowing beyond the peripheral of the land 2 and the end portion 3 a onto surface of the substrate 1 .
- the improperly melted solder 5 b since it has not completely melted, contacts only a part of the surface of the land 2 to form a space gap at its periphery and does not extend onto the portion 3 a of the wire 3 , which can result in a defect in the communication.
- FIG. 6 shows in part a resultant photofluorographic image of the semiconductor module.
- the melted solder is shown with a cross-hatching.
- the image clearly shows that the properly melted solder 5 a extends onto the end portion 3 a of the patterned wire 3 connected to the land 2 .
- the image also shows that the improperly melted solder does not reach the end portion 3 a . Therefore, whether the solder has been melted properly can be determined by viewing the existence of the melted solder on the end portion 3 a even when the improperly melted solder would cover the entire surface of the land 2 .
- the soldering connection in the semiconductor module can easily be tested, which results in a highly reliable semiconductor module. Also, this allows the land to be reduced in size down to the melted solder, eliminating the space for the land 2 on the printed-circuit board 9 . Advantageously, this in turn reduces the restrictions in the designing of the wires to be patterned. Also, a semiconductor module in which a greater number of ICs can be mounted in a small area can be provided. Further, the land can be in the form of circle corresponding to the ball-like solder, which allows the existing masks to be used and the mask to be aligned with great ease.
- the semiconductor module 8 according to the second embodiment will be described.
- the end portion 3 a of the patterned wire 3 is tapered away from the land 2 , although it is designed to have a constant width in the first embodiment.
- Other parts or portions of the module are similar to those in the first embodiment and therefore no further description will be made thereto.
- the melted solder can easily flow across the end portion 3 a .
- the tapered end portion 3 a also permits another portion of the wire 3 connected to the end portion 3 a to be narrowed. On the other hand, the end portion 3 a can be widened at its connecting end with the land 2 . This reduces a required area for the wires on the circuit board to provide a high density semiconductor module without decreasing the viewability of the end portions 3 a at the fluorographic inspection.
- the photoresist layer 6 is still remained even after the IC board 4 has been mounted on the circuit substrate 1 . Contrary to this, in a resultant semiconductor module according to Embodiment 3 shown in FIG. 9, no photoresist layer exists. Other parts or portions of the module are similar to those in the first embodiment and therefore no further description will be made thereto.
- the additional process includes a step for bathing the semiconductor module into the organic solvent for removing the photoresist layer after the refolwing step.
- the semiconductor module so constructed eases the inspection of the quality of the soldered connection and results in a highly reliable semiconductor module with a simple manner.
- the opening 7 in the substrate 1 is in the form of circle, it may be other configuration such as square and rectangular.
- the land 2 may be other configuration such as rectangular and circle with any deformation or deformations.
- the lands 2 and the patterned wires 3 may be made of the same or different materials, and they may have the same or different thicknesses.
- the protection layer of photoresist 6 may be made of other materials such as polytetrafluoroethylene which can function as a mask for the melted solder.
- the print-circuit board of the present invention can easily be tested for determining its soldering quality, and also can receive a number of ICs in high density.
- a highly reliable semiconductor module can be provided with the simple process.
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- General Physics & Mathematics (AREA)
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
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Abstract
A printed-circuit board of the present invention, comprises a circuit substrate 1; a plurality of patterned wires 3 formed on a surface of said circuit substrate 1; a plurality of lands 2, each land 2 connected to at least one of said patterned wires 3 through an end portion 3 a thereof; and a protection layer 6 with a plurality of openings 7, covering the surface of said circuit substrate 1, wherein said land 2 and said end portion 3 a connected thereto are exposed in the associated opening 7 of said protection layer 6.
Description
- 1) Technical Field of the Invention
- The present invention relates to a printed-circuit board for receiving a semiconductor integrated circuit (IC) mounted thereon, and a semiconductor module including the semiconductor integrated circuit, and as well as to a manufacturing process of the semiconductor module.
- 2) Description of the Related Art
- In the case where the IC having a plurality of pins provided with a ball-like solder or a solder bump is mounted on a circuit substrate using a packaging technology such as BGA (ball grid array) and CSP (chip scale package), the circuit substrate made of, for example, epoxy resin is provided with a plurality of isolated lands, each of which is aligned and connected, one to one correspondence, to the ball-like solder. The land, which is preformed of a film layer of, for instance, copper deposited on the circuit substrate is rounded so that it corresponds to the ball-like solder bump.
- FIG. 10 shows a cross sectional view of the conventional semiconductor module receiving the IC with ball-like solders on the circuit substrate. In this drawing, the
circuit substrate 1 supports a plurality oflands 2, each connected withassociated wire 3. Bothlands 2 andwires 3 are printed on thecircuit substrate 1. Thelands 2 are arrayed on thecircuit substrate 1 corresponding, in number and in shape, to the ball-like solders provided on the opposing surface, i.e. the lower surface in the drawing, of the Integrated Circuit (IC) 4. Also, aprotection layer 6 made of photoresist is provided on thewires 3, but not on thelands 3 to allow thelands 3 connected with ball-like solders on theIC 4. - For better understanding the problems to be solved by the present invention, FIG. 10 also shows not only ball-like solders properly fused but also that improperly fused, which are designated by
numerals like solder 5 a is completely soldered and thereby extends across the entire surface of theland 3. Meanwhile the improperly fused ball-like solder 5 b is not completely soldered at its portion facing to theland 3, leaving a space gap extending around theland 3 between theland 3 and the fused ball-like solder 5 b. - The improper soldering may bring a mal-function such as open circuit, significantly reducing the reliability of the
semiconductor module 8. Thus, after soldering, a test should be made to determine whether the soldering has been performed properly. However, since a plenty of ball-like solders 5 are provided two-dimensionally between theIC 4 and thecircuit substrate 1, it is difficult to determine the quality of the soldering by the visual inspection from the peripheral edge of thesemiconductor module 8. Therefore, many processes for determining the quality of the soldering have been developed including a fluoroscopic test in which X-rays is illuminated from above theIC 4 to image the configuration of the fused balls, determining whether ball-like solders 5 have been properly soldered. - FIG. 11 shows, in part, a photofluorographic image of the
semiconductor module 8, viewed from above thereof with a soft X-rays. As shown in an exaggerated fashion, the ball-like solders 5 can be seen more clearly due to the reduced transmissivity thereof than others, as a cross-hatched portion, which are darker than the other portions (thus, the hatching is used only for exaggeration but not for indication of a cross-section. - However, where the
module 8 is designed so that the ball-like solders 5 and thelands 2 on thecircuit substrate 1 have substantially the same diameter, the images of the properly fused ball-like solders 5 a can be hardly distinguished from those of the improperly fused ball-like solders 5 b even by the fluoroscopic test from above thereof, because both images look same configurations as shown in FIG. 11. - To solve this problem, the prior arts, such as JP-A 9-51017, and JP-A 11-4067 disclose the
lands 2 designed such that they have the diameter greater than, or the configuration different from those of the ball-like solders 5. - This technique causes the reproduced image to show the configuration of the fused ball-like solders, allowing to readily judge whether the ball-like solders are properly soldered.
- Disadvantageously, this requires a larger area of the
lands 5 on thecircuit substrate 1 therefor, which provides a great restriction in patterning thewires 3 on thecircuit substrate 1. Also thelarger lands 5 provides another restriction in reducing the intervals of the adjacent ball-like solders 5 in accordance with the miniaturization ofIC 4 and the increase of pins, which are normally required in the highly integrated circuit. - Therefore, the present invention was made to solve the problems as aforementioned above, and the first purpose thereof is to provide a printed-circuit board, which can be easily inspected to determine the quality of the soldering when the IC with the ball-like solder of BGA, CSP or the like, is mounted on the circuit substrate, while allowing the high density mounting, even in the case where each land has approximately the same area as the ball-like solder.
- Also, the second purpose of the present invention is to provide a semiconductor module which can be easily inspected to determine the quality of the soldering when the IC with the ball-like solders of BGA or CSP etc., is mounted on the circuit substrate, while allowing the high reliability and the high density mounting.
- Further, the third purpose of the present invention is to provide a manufacturing process of the semiconductor module which can be easily inspected to determine the quality of the soldering when the IC with the ball-like solder of BGA, CSP or the like, is mounted on the circuit substrate, while allowing the high reliability and the high density mounting.
- According to a printed-circuit board of the present invention, it comprises, a circuit substrate; a plurality of patterned wires formed on a surface of said circuit substrate; a plurality of lands, each land connected to at least one of said patterned wires through an end portion thereof; and a protection layer with a plurality of openings, covering the surface of said circuit substrate, wherein said land and said end portion connected thereto are exposed in the associated opening of said protection layer.
- Also according to the printed-circuit board of the present invention, each of the end portions of said patterned wires is tapered away from one of said lands connected thereto.
- According to a semiconductor module of the present invention, it comprises, a printed-circuit board, including a circuit substrate, a plurality of patterned wires formed on a surface of said circuit substrate, a plurality of lands, each land connected to at least one of said patterned wires through an end portion thereof; a semiconductor integrated circuit having a plurality of pins; and a plurality of ball-like solders formed on each of said pins to mount said semiconductor integrated circuit upon said printed-circuit board such that each of said ball-like solders is fused onto one of said lands and on the end portion of said patterned wires connected thereto.
- Also according to the semiconductor module of the present invention, the printed-circuit board further including a protection layer with a plurality of openings, covering the surface of said circuit substrate; wherein each of said lands and end portions are exposed in the associated opening of said protection layer.
- Further, according to the semiconductor module of the present invention, wherein each of the end portions of said patterned wires is tapered away from one of said lands connected thereto.
- According to a process for manufacturing the semiconductor module of the present invention, which comprises steps of: covering an entire surface of a circuit substrate with a protection layer, wherein a plurality of patterned wires and lands are formed on said circuit substrate such that each of said patterned wires are connected at least one of said lands through an end portion thereof; opening a plurality of openings within said protection layer, each of said lands and end portions being exposed therethrough; aligning and connecting ball-like solders of a semiconductor integrated circuit to said lands; fusing said ball-like solders onto said lands and end portions of said patterned wires connected thereto, by heating the semiconductor module; and inspecting a shape of soldering by fluoroscoping the semiconductor module with a X-rays.
- Also, according to the process for manufacturing the semiconductor module of the present invention, it further comprises steps of, removing said protection layer out after fusing said ball-like solders.
- FIG. 1 is a top plan view of the printed-circuit board according to
Embodiment 1 of the present invention; - FIGS.2 to 5 are cross sectional views each showing the manufacturing processes of the semiconductor module according to
Embodiment 1 of the present invention; - FIG. 6 is a photofluorographic top view showing the manufacturing process of the semiconductor module according to
Embodiment 1 of the present invention; - FIG. 7 is a top plan view of the printed-circuit board according to
Embodiment 2 of the present invention; - FIG. 8 is a photofluorographic top plan view showing the manufacturing process of the semiconductor module according to
Embodiment 2 of the present invention; - FIG. 9 is a cross sectional view showing the semiconductor module according to
Embodiment 3 of the present invention; - FIG. 10 is a cross sectional view showing the prior art semiconductor module; and
- FIG. 11 is a cross sectional view showing the manufacturing process of the prior art semiconductor module.
-
Embodiment 1 - Referring to FIG. 1, showing a top plan view of the printed-circuit board according to
Embodiment 1 of the present invention, the printed-circuit board 9 preferably made of, for example, epoxy comprises acircuit substrate 1 supporting a plurality oflands 2 and patternedwires 3. Thelands 2 are electrically connected with associated patternedwires 3. In particular, thelands 2 are arrayed on thecircuit substrate 1 in the same manner assolders 5 prepared in the form of balls on anIC board 4. The printed-circuit board 9 also comprises aphotoresist layer 6 for the protection of the circuits on thesubstrate 1. In this case, however, thelands 2 andend portions 3 a of the patternedwires 3 are exposed to air for their electric connections with the associated ball-like solders 5 on theIC board 4 to form asemiconductor module 8. - FIGS.2 to 5 show respective cross sectional views taken along lines X-X′ in FIG. 1. Referring to the drawings, the details are described hereinafter with regard to the manufacturing process of the
semiconductor module 8. In the process, prepared is the printed-circuit board 9 as illustrated in and described with FIG. 1, including thesubstrate 1 which supports thelands 2, patternedwires 3 each electrically connected to the associatedlands 2, and coatedphotoresist layer 6. - Referring to FIG. 3, the top surfaces of the
lands 2 are coated with asolder paste layer 10 by the conventional printing technique. - Referring next to FIG. 4, the
IC board 4 is placed on theboard 9. TheIC board 4 is provided at its one surface to be faced against theboard 9 with a number of ball-like solders 5 made of conventional soldering material. Thesolders 5 are arrayed in the same manner as thelands 2 in theboard 9. Preferably, each of thesolders 5 is sized so that, when properly fused on theland 2, it could extend across the entire surface of theland 2 to theportion 3 a of thewire 3. For this purpose, it is necessary for theIC board 4 to be assembled on theboard 9 so that the ball-like solders 5 correspond to the associatedlands 2 as shown in FIG. 4. - The assembled
IC 4 andboard 9 are placed in a heating chamber of a furnace, for example, re-flowing furnace. This causes the ball-like solder 5 as well as the soldering paste 10 to melt on thelands 2, electrically connecting the meltedsolder 5 with the associated circuit portion provided on theIC board 4. Theresultant semiconductor module 8 is illustrated in FIG. 5. - FIG. 5 also shows not only properly melted solders designated at5 a but also improperly melted solders designated at 5 b. As can be seen in the drawing, the properly melted
solder 5 a covers not only on the entire surface of theland 2 but also on theportions 3 a of thewire 3 in theopening 7, due to a good affinity of between theland 2 and thewire 3, both made of the same material. On the other hand, thesubstrate 1 exposed outside theland 2 and theportion 3 a of thewire 3 in theopening 7 is made of material capable of repelling against the meltedsolder 5 a, preventing the meltedsolder 5 a from flowing beyond the peripheral of theland 2 and theend portion 3 a onto surface of thesubstrate 1. - On the other hand, the improperly melted
solder 5 b, since it has not completely melted, contacts only a part of the surface of theland 2 to form a space gap at its periphery and does not extend onto theportion 3 a of thewire 3, which can result in a defect in the communication. - Next, a process for determining whether the soldering has been made properly is described hereinafter. In this process, the quality of the soldering is determined by the conventional fluoroscoping using soft X-ray illuminated from above the
semiconductor modulator 8. FIG. 6 shows in part a resultant photofluorographic image of the semiconductor module. For clarity, the melted solder is shown with a cross-hatching. The image clearly shows that the properly meltedsolder 5 a extends onto theend portion 3 a of the patternedwire 3 connected to theland 2. The image also shows that the improperly melted solder does not reach theend portion 3 a. Therefore, whether the solder has been melted properly can be determined by viewing the existence of the melted solder on theend portion 3 a even when the improperly melted solder would cover the entire surface of theland 2. - In view of above, by the use of the printed circuit board according to the first embodiment of the present invention, the soldering connection in the semiconductor module can easily be tested, which results in a highly reliable semiconductor module. Also, this allows the land to be reduced in size down to the melted solder, eliminating the space for the
land 2 on the printed-circuit board 9. Advantageously, this in turn reduces the restrictions in the designing of the wires to be patterned. Also, a semiconductor module in which a greater number of ICs can be mounted in a small area can be provided. Further, the land can be in the form of circle corresponding to the ball-like solder, which allows the existing masks to be used and the mask to be aligned with great ease. -
Embodiment 2 - Referring to FIG. 7, the
semiconductor module 8 according to the second embodiment will be described. In this embodiment, particularly theend portion 3 a of the patternedwire 3 is tapered away from theland 2, although it is designed to have a constant width in the first embodiment. Other parts or portions of the module are similar to those in the first embodiment and therefore no further description will be made thereto. - With this arrangement, the melted solder can easily flow across the
end portion 3 a. This means that the properly melted solder extends more smoothly over theentire end portion 3 a, causing the fluorographic image in which the melted solder on theend portion 3 a can easily be identified as shown in FIG. 8. This eases the determination of the quality of the soldering connection. - The
tapered end portion 3 a also permits another portion of thewire 3 connected to theend portion 3 a to be narrowed. On the other hand, theend portion 3 a can be widened at its connecting end with theland 2. This reduces a required area for the wires on the circuit board to provide a high density semiconductor module without decreasing the viewability of theend portions 3 a at the fluorographic inspection. -
Embodiment 3 - According to the semiconductor module according to
Embodiment 1 of the present invention, thephotoresist layer 6 is still remained even after theIC board 4 has been mounted on thecircuit substrate 1. Contrary to this, in a resultant semiconductor module according toEmbodiment 3 shown in FIG. 9, no photoresist layer exists. Other parts or portions of the module are similar to those in the first embodiment and therefore no further description will be made thereto. - In order to produce the semiconductor module of
Embodiment 3, an additional process is needed for the removal of the photoresist layer. For example, the additional process includes a step for bathing the semiconductor module into the organic solvent for removing the photoresist layer after the refolwing step. - The semiconductor module so constructed eases the inspection of the quality of the soldered connection and results in a highly reliable semiconductor module with a simple manner.
- Modifications
- Although the
opening 7 in thesubstrate 1 is in the form of circle, it may be other configuration such as square and rectangular. - Also, the
land 2 may be other configuration such as rectangular and circle with any deformation or deformations. - Further, the
lands 2 and thepatterned wires 3 may be made of the same or different materials, and they may have the same or different thicknesses. - Furthermore, the protection layer of
photoresist 6 may be made of other materials such as polytetrafluoroethylene which can function as a mask for the melted solder. - In view of above, the print-circuit board of the present invention can easily be tested for determining its soldering quality, and also can receive a number of ICs in high density.
- Also, a highly reliable semiconductor module with a high density ICs can be obtailed.
- Further, a highly reliable semiconductor module can be provided with the simple process.
- Parts List
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Claims (7)
1. A printed-circuit board, comprising:
a circuit substrate;
a plurality of patterned wires formed on a surface of said circuit substrate;
a plurality of lands, each land connected to at least one of said patterned wires through an end portion thereof; and
a protection layer with a plurality of openings, covering the surface of said circuit substrate, wherein said land and said end portion connected thereto are exposed in the associated opening of said protection layer.
2. A printed-circuit board according to claim 1 ,
wherein each of the end portions of said patterned wires is tapered away from one of said lands connected thereto.
3. A semiconductor module, comprising:
a printed-circuit board, including a circuit substrate, a plurality of patterned wires formed on a surface of said circuit substrate, a plurality of lands, each land connected to at least one of said patterned wires through an end portion thereof;
a semiconductor integrated circuit having a plurality of pins; and
a plurality of ball-like solders formed on each of said pins to mount said semiconductor integrated circuit upon said printed-circuit board such that each of said ball-like solders is fused onto one of said lands and on the end portion of said patterned wires connected thereto.
4. A semiconductor module according to claim 3 ,
said printed-circuit board further including a protection layer with a plurality of openings, covering the surface of said circuit substrate;
wherein each of said lands and end portions are exposed in the associated opening of said protection layer.
5. A semiconductor module according to claim 3 ,
wherein each of the end portions of said patterned wires is tapered away from one of said lands connected thereto.
6. A process for manufacturing a semiconductor module, comprising steps of:
covering an entire surface of a circuit substrate with a protection layer, wherein a plurality of patterned wires and lands are formed on said circuit substrate such that each of said patterned wires are connected at least one of said lands through an end portion thereof;
opening a plurality of openings within said protection layer, each of said lands and end portions being exposed therethrough;
aligning and connecting ball-like solders of a semiconductor integrated circuit to said lands;
fusing said ball-like solders onto said lands and end portions of said patterned wires connected thereto, by heating the semiconductor module; and
inspecting a shape of soldering by fluoroscoping the semiconductor module with a X-rays.
7. A process for manufacturing a semiconductor module according to claim 6 , further comprising steps of:
removing said protection layer out after fusing said ball-like solders.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP24169299A JP2001068836A (en) | 1999-08-27 | 1999-08-27 | Printed wiring board and semicondcutor module, and manufacture thereof |
JPP11-241692 | 1999-08-27 | ||
JP11-241692 | 1999-08-27 |
Publications (2)
Publication Number | Publication Date |
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US20020053466A1 true US20020053466A1 (en) | 2002-05-09 |
US6441316B1 US6441316B1 (en) | 2002-08-27 |
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Application Number | Title | Priority Date | Filing Date |
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US09/504,712 Expired - Fee Related US6441316B1 (en) | 1999-08-27 | 2000-02-16 | Printed-circuit board and a semiconductor module, and a manufacturing process of the semiconductor module |
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US (1) | US6441316B1 (en) |
JP (1) | JP2001068836A (en) |
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1999
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2000
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JP2001068836A (en) | 2001-03-16 |
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