US20010044213A1 - Method of anisotropic etching of substrates - Google Patents
Method of anisotropic etching of substrates Download PDFInfo
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- US20010044213A1 US20010044213A1 US09/295,100 US29510099A US2001044213A1 US 20010044213 A1 US20010044213 A1 US 20010044213A1 US 29510099 A US29510099 A US 29510099A US 2001044213 A1 US2001044213 A1 US 2001044213A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
- H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
Definitions
- the invention relates to a method of anisotropic plasma etching of substrates preferably defined with an etching mask in which the etch rate and selectivity is increased.
- the method can be well implemented for manufacturing microelectromechanical system (MEMS), as well as microelectronic devices.
- MEMS microelectromechanical system
- Anisotropic plasma etching can work independent of crystal orientation of the substrate or doping level. This method also applies to doped or undoped polysilicon.
- Preferred fields of applications are MEMS technology, where structures have a high aspect ratio, i.e., a high structural height to width ratio.
- Other examples include surface wave technology, where narrow grooves and vertical walls are etched to produce actuators, surface wave filters, delay lines, etc.
- Additional microelectronics applications include storage cells, insulation, collector contacts, etc.
- RIE Reactive Ion Etching
- relatively high energy ions ⁇ 100 eV
- reactive halogens such as fluorine, chlorine or bromine
- fluorine, chlorine or bromine reactive halogens
- the resulting ion bombardment of the etching ground i.e., the area to be etched, initiates the reaction of the radicals with the silicon to be depleted.
- the etching of the sidewalls is minimal due to the directionality of the ions.
- U.S. Pat. No. 5,501,893 discloses an etching method that includes alternating etching and polymerizing steps where the purpose of the polymerizing step is to provide a polymer layer on the surfaces that were exposed in the previous etching step to form a temporary etch stop. Thus the side walls are protected from etching during the etching steps.
- the gas mixtures introduced during the etching and polymerizing steps are different such that different gas mixtures are cycled during the respective etching and polymerizing steps.
- the gas mixture includes SF 2 and Ar and in the polymerizing step the gas mixture includes CHF 3 and Ar.
- the object of the invention is to establish a method for enhancing the treatment of the silicon surface being etched, by using the differences in the energies of activation of the reactive gases to arrive at optimal conditions for both etching and passivation, and alternating those conditions at a high rate to produce a high aspect ratio, and high selectivity etch process.
- the object of the present invention is accomplished by providing a method of anisotropic plasma etching of substrates (typically silicon) comprising the following steps:
- step (c) concurrent with step (c), applying high polarizing voltage (50-500 eV) to the substrate via its electromagnet power source to produce a highly anisotropic etch;
- step (e) concurrent with step (e), applying low polarizing voltage (0-25 eV) to the substrate to form a conformal polymer coating on the exposed side walls of the surfaces being etched; and
- the method used in this invention enables the substrate to be etched without using helium gas as a cooling medium. This is because lower power is used to excite the etching gas resulting in less heat being generated during the process.
- a further advantage of this invention is that a constant flow of mixed gas is injected into the process chamber during processing, resulting in a process that is more stable and repeatable.
- FIG. 1 is a schematical view showing the etching device for use in the present invention.
- FIGS. 2 ( a ) to 2 ( c ) are views showing the process steps of the present invention.
- the device includes an etching chamber 10 .
- a substrate holder 12 for holding substrate 14 as well as an inductive coupler 16 provided near the top of the chamber 10 .
- the substrate holder 12 is an electrode which is electrically connected to generator 18 , including a power supply 19 and a matching network 21 , for polarizing the substrate 14 .
- generator 18 Located at the top of the chamber is an inlet line 20 for introducing process gases into the chamber.
- the process gases are stored in gas tanks 22 , 24 and 26 .
- the flow rate of the process gases into the chamber 10 is controlled by a control valves 28 .
- the plasma stimulation is provided by inductive coupler 16 powered by an RF power source 30 and an associated matching network 32 .
- Pressure within the chamber 10 is controlled by mechanical pump 34 , turbo-molecular pump 36 and throttle valve 38 , in the conventional manner. It is of course understood that the invention is not limited to this particular device.
- the substrate 14 including a silicon substrate 40 and an etching mask 40 that exposes the regions of the silicon substrate 40 that are intended to be anisotropically etched, is placed on the substrate holder/electrode 12 and subjected to the first etching step.
- a mixture of gases containing etchant and passivating gases e.g., SF 6 , C 4 F 8 , and CHF 3
- a certain flow rate preferably in the range of 100 to 400 sccm and pressure in the range of 0.1 to 10 Pa
- the plasma is stimulated by applying a relatively low RF power, preferably in the range of 100 to 800 W, from the power source 30 .
- a polarization potential is provided by the substrate generator 18 to produce an electrical field of a relatively high value in the range of 50 to 500 eV, and preferably 80-300 eV.
- the low RF power applied for plasma stimulation provides the directional etch with an extremely high rate. Specifically, the plasma is “cold” due to the low energy applied so that the directionality of the ions can be controlled.
- the high potential of the substrate 14 provides strong acceleration of the ions toward the etched surface. Both factors provide excellent directionality of the ions, resulting in a high anisotropic etch.
- the etched portion 44 of the silicon substrate 40 is shown in FIG. 2( a ).
- the power source 30 switches to a relatively high power, preferably in the range of 1000 to 3000 W, to create high energy excitation of the plasma and the polarization potential developed by the substrate generator is reduced to a relatively low, or even zero, value (i.e. 0-25 eV).
- High energy excitation of the plasma creates a condition that results in the formation of a polymer layer 46 .
- isotropic movement of species causes the thickness of the polymer layer 46 on the bottom of the trench to be the same as the thickness on the sidewalls, as shown in FIG. 2( b ).
- the low polarization on the substrate 14 prevents any etching.
- the protective polymer layer 46 of a predetermined thickness is formed on the trench walls, as shown in FIG. 2( b ). This protective polymer layer 46 prevents erosion of the trench walls that were formed in the previous etching steps during the subsequent etching step, performed in the manner discussed above.
- the time for the species to arrive at the bottom of the etched trench varies drastically for trenches with different sized openings. This increases the variation in the depths achieved for trenches with different aspect ratios (Aspect Ratio Dependent Etch).
- the gas composition will be uniform for trenches with different size openings. This also improves the uniformity (microloading effect).
- the method of the present invention provides very high selectivity to the mask material, due to the combination of low power used during the etch and low polarization voltage used during deposition.
- Additional silicon etching gases include CF 4 , NF 3 , NF3HF, HBr, CCL 4 , CF 2 Cl 2 , CFCl 3 , Br 2 , Cl 2 , 12 , HCl, CIF 3 and BCl 3 .
- additional passivation gases include CH 4 , CH 2 F 2 , H 2 , C 2 H 4 , C 3 H 8 , CH 3 Br, C 2 F 6 , C 2 F 4 , and C 3 F 6 .
- the etch or passivation effect may be achieved by alternating the pressure in the chamber. Specifically, the polymer formation during passivation is effected by the pressure. The higher the pressure the stronger the polymer formation and hence the greater the degree of passivation. In contrast, the lower the pressure the weaker the polymer formation and hence the lower the degree of passivation. Similarly, an increase in pressure during etching increases the etching rate, while a decrease in pressure decreases the etching rate.
Abstract
Description
- 1. Field of the Invention
- The invention relates to a method of anisotropic plasma etching of substrates preferably defined with an etching mask in which the etch rate and selectivity is increased. The method can be well implemented for manufacturing microelectromechanical system (MEMS), as well as microelectronic devices.
- 2. Background of the Related Art
- Anisotropic plasma etching, particularly for single crystal silicon, can work independent of crystal orientation of the substrate or doping level. This method also applies to doped or undoped polysilicon. Preferred fields of applications are MEMS technology, where structures have a high aspect ratio, i.e., a high structural height to width ratio. Other examples include surface wave technology, where narrow grooves and vertical walls are etched to produce actuators, surface wave filters, delay lines, etc. Additional microelectronics applications include storage cells, insulation, collector contacts, etc.
- The Reactive Ion Etching (RIE) processes which are commonly used for anisotropic silicon etch employ relatively high energy ions (≧100 eV) and reactive halogens, such as fluorine, chlorine or bromine, which are used directly in the plasma or are released from corresponding compounds, like CF4, CF3Br, C2F6, CCI4, CHCI3. The resulting ion bombardment of the etching ground, i.e., the area to be etched, initiates the reaction of the radicals with the silicon to be depleted. The etching of the sidewalls is minimal due to the directionality of the ions.
- Problems occur when, to increase the speed of silicon removal (i.e., the etch rate), one tries to enhance the plasma density by increasing the power coupled to the plasma discharge. This can be accomplished by either increasing the power of the source for the plasma discharge or by increasing the value of the polarization voltage applied to the substrate. However, as the power is increased more hot ions are produced and the direction of ion movement becomes more random. The results is that more ions and radicals are depleted by the walls of the trenches, with the inevitable loss of anisotropy of the etch. To overcome this problem, one must reduce the etch rate, resulting in the loss of the throughput.
- An additional problem encountered is mask degradation. As etch rate is reduced, etch time, and therefore mask exposure time, are increased, leading to more rapid mask degradation, i.e., reduced selectivity.
- U.S. Pat. No. 5,501,893 discloses an etching method that includes alternating etching and polymerizing steps where the purpose of the polymerizing step is to provide a polymer layer on the surfaces that were exposed in the previous etching step to form a temporary etch stop. Thus the side walls are protected from etching during the etching steps. However, the gas mixtures introduced during the etching and polymerizing steps are different such that different gas mixtures are cycled during the respective etching and polymerizing steps. In the etching step the gas mixture includes SF2 and Ar and in the polymerizing step the gas mixture includes CHF3 and Ar.
- The problem with cycling different gases is that the time ratio of the etch deposition cycle depends on the speed of the gas mixtures and varies from point to point, affecting the uniformity. Also, the time for species to arrive at the bottom of the etched trench varies drastically for trenches having different sized openings. Also, this method typically requires more complex hardware and controls to introduce the two different gas mixtures in cycles.
- It is desirable to make the plasma as cold as possible with coexisting polymer-producing unsaturated monomers and fluorine, bromine or iodine radicals. The energy level sufficient for ionization is different for each gas. In certain cases, the activation energy for polymer-producing gases (C4F8, CHF3) is two times higher than for radical producing gases (SF6). The object of the invention is to establish a method for enhancing the treatment of the silicon surface being etched, by using the differences in the energies of activation of the reactive gases to arrive at optimal conditions for both etching and passivation, and alternating those conditions at a high rate to produce a high aspect ratio, and high selectivity etch process.
- The object of the present invention is accomplished by providing a method of anisotropic plasma etching of substrates (typically silicon) comprising the following steps:
- a) placing the substrate with the surface to be selectively etched on an electrode connected to an electromagnet power source;
- b) introducing mixed gases consisting of an etching gas (SF6) and a passivation gas (CHF3, C4F8, etc.) into the processing chamber;
- c) exciting the mixed gases with lower power (100-800 W) electromagnetic radiation sufficient to produce a plasma containing ions and radicals for etching;
- d) concurrent with step (c), applying high polarizing voltage (50-500 eV) to the substrate via its electromagnet power source to produce a highly anisotropic etch;
- e) exciting the mixed gases with high power (1000-3000 W) electromagnetic radiation to produce in the plasma unsaturated monomers for protective polymer coating formation;
- f) concurrent with step (e), applying low polarizing voltage (0-25 eV) to the substrate to form a conformal polymer coating on the exposed side walls of the surfaces being etched; and
- alternating steps c) and d) with steps e) and f) to achieve an anisotropic etch with a high etch rate and selectivity than is currently being achieved using other methodologies.
- The method used in this invention enables the substrate to be etched without using helium gas as a cooling medium. This is because lower power is used to excite the etching gas resulting in less heat being generated during the process.
- A further advantage of this invention is that a constant flow of mixed gas is injected into the process chamber during processing, resulting in a process that is more stable and repeatable.
- The invention is described in detail below in conjunction with the attached drawings in which:
- FIG. 1 is a schematical view showing the etching device for use in the present invention; and
- FIGS.2(a) to 2(c) are views showing the process steps of the present invention.
- The following is a detailed description of the invention with reference to FIGS. 1 and 2(a) to 2(c). Referring to FIG. 1, the device includes an etching chamber 10. Provided within the chamber 10 is a
substrate holder 12 forholding substrate 14 as well as aninductive coupler 16 provided near the top of the chamber 10. Thesubstrate holder 12 is an electrode which is electrically connected to generator 18, including apower supply 19 and amatching network 21, for polarizing thesubstrate 14. Located at the top of the chamber is aninlet line 20 for introducing process gases into the chamber. The process gases are stored ingas tanks control valves 28. The plasma stimulation is provided byinductive coupler 16 powered by anRF power source 30 and an associatedmatching network 32. Pressure within the chamber 10 is controlled bymechanical pump 34, turbo-molecular pump 36 andthrottle valve 38, in the conventional manner. It is of course understood that the invention is not limited to this particular device. - The following is a description of the process of etching the substrate with reference to FIGS.2(a) to 2(c). The
substrate 14, including asilicon substrate 40 and anetching mask 40 that exposes the regions of thesilicon substrate 40 that are intended to be anisotropically etched, is placed on the substrate holder/electrode 12 and subjected to the first etching step. In this step, a mixture of gases containing etchant and passivating gases (e.g., SF6, C4F8, and CHF3) with a certain flow rate, preferably in the range of 100 to 400 sccm and pressure in the range of 0.1 to 10 Pa, is introduced into the chamber 10. The plasma is stimulated by applying a relatively low RF power, preferably in the range of 100 to 800 W, from thepower source 30. At the same time, a polarization potential is provided by the substrate generator 18 to produce an electrical field of a relatively high value in the range of 50 to 500 eV, and preferably 80-300 eV. The low RF power applied for plasma stimulation provides the directional etch with an extremely high rate. Specifically, the plasma is “cold” due to the low energy applied so that the directionality of the ions can be controlled. Also, the high potential of thesubstrate 14 provides strong acceleration of the ions toward the etched surface. Both factors provide excellent directionality of the ions, resulting in a high anisotropic etch. The etched portion 44 of thesilicon substrate 40 is shown in FIG. 2(a). - After a certain period of time, e.g., 10 to 100 sec, the
power source 30 switches to a relatively high power, preferably in the range of 1000 to 3000 W, to create high energy excitation of the plasma and the polarization potential developed by the substrate generator is reduced to a relatively low, or even zero, value (i.e. 0-25 eV). High energy excitation of the plasma creates a condition that results in the formation of apolymer layer 46. Further, isotropic movement of species causes the thickness of thepolymer layer 46 on the bottom of the trench to be the same as the thickness on the sidewalls, as shown in FIG. 2(b). During this time, the low polarization on thesubstrate 14 prevents any etching. After a certain time, e.g., 0.5 to 3 sec, theprotective polymer layer 46 of a predetermined thickness is formed on the trench walls, as shown in FIG. 2(b). Thisprotective polymer layer 46 prevents erosion of the trench walls that were formed in the previous etching steps during the subsequent etching step, performed in the manner discussed above. - Specifically, during the next etching step the previously etched sidewalls remain protected by the
polymer layer 46, while the polymer layer on the bottom of the trench is rapidly stripped by the anisotropic bombardment of the ions that are accelerated by the high polarizing potential, allowing the silicon at the base of the trench to be further etched, as identified byreference numeral 48 in FIG. 2(c). The etching and passivating steps are alternately repeated until the trench reaches the required depth. - There are several advantages of this process when compared to the conventional process discussed above. In particular, the continuous introduction of a constant mixture of gases according to the present invention results in a more even distribution of species. This provides better uniformity across the substrate. In contrast, in the conventional case, where gases are cycled, the time ratio of the etch/deposition cycle depends on the speed of the gases and varies from point to point, affecting the uniformity.
- Further, when using the cycled gas method, the time for the species to arrive at the bottom of the etched trench varies drastically for trenches with different sized openings. This increases the variation in the depths achieved for trenches with different aspect ratios (Aspect Ratio Dependent Etch). In the present case where the gas mixture is constant, the gas composition will be uniform for trenches with different size openings. This also improves the uniformity (microloading effect).
- Further, the method of the present invention provides very high selectivity to the mask material, due to the combination of low power used during the etch and low polarization voltage used during deposition.
- Since numerous changes can be made without departing from the spirit of the invention, it is intended that all matter contained in the foregoing description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense. For example, the invention is not limited to the list of etchant and passivation gases discussed above. Additional silicon etching gases include CF4, NF3, NF3HF, HBr, CCL4, CF2Cl2, CFCl3, Br2, Cl2, 12, HCl, CIF3 and BCl3. Also, additional passivation gases include CH4, CH2F2, H2, C2H4, C3H8, CH3Br, C2F6, C2F4, and C3F6.
- In addition, the etch or passivation effect may be achieved by alternating the pressure in the chamber. Specifically, the polymer formation during passivation is effected by the pressure. The higher the pressure the stronger the polymer formation and hence the greater the degree of passivation. In contrast, the lower the pressure the weaker the polymer formation and hence the lower the degree of passivation. Similarly, an increase in pressure during etching increases the etching rate, while a decrease in pressure decreases the etching rate.
Claims (14)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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US09/295,100 US6383938B2 (en) | 1999-04-21 | 1999-04-21 | Method of anisotropic etching of substrates |
DE60030905T DE60030905T2 (en) | 1999-04-21 | 2000-02-21 | Process for the anisotropic etching of substrates |
EP00400462A EP1047122B1 (en) | 1999-04-21 | 2000-02-21 | Method of anisotropic etching of substrates |
AT00400462T ATE341099T1 (en) | 1999-04-21 | 2000-02-21 | METHOD FOR THE ANISOTROPIC ETCHING OF SUBSTRATES |
JP2000055248A JP4601113B2 (en) | 1999-04-21 | 2000-03-01 | Anisotropic etching method for substrates |
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US09/295,100 US6383938B2 (en) | 1999-04-21 | 1999-04-21 | Method of anisotropic etching of substrates |
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US6383938B2 US6383938B2 (en) | 2002-05-07 |
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US09/295,100 Expired - Lifetime US6383938B2 (en) | 1999-04-21 | 1999-04-21 | Method of anisotropic etching of substrates |
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EP (1) | EP1047122B1 (en) |
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DE19706682C2 (en) | 1997-02-20 | 1999-01-14 | Bosch Gmbh Robert | Anisotropic fluorine-based plasma etching process for silicon |
US5807789A (en) * | 1997-03-20 | 1998-09-15 | Taiwan Semiconductor Manufacturing, Co., Ltd. | Method for forming a shallow trench with tapered profile and round corners for the application of shallow trench isolation (STI) |
DE19736370C2 (en) | 1997-08-21 | 2001-12-06 | Bosch Gmbh Robert | Process for anisotropic etching of silicon |
-
1999
- 1999-04-21 US US09/295,100 patent/US6383938B2/en not_active Expired - Lifetime
-
2000
- 2000-02-21 DE DE60030905T patent/DE60030905T2/en not_active Expired - Lifetime
- 2000-02-21 AT AT00400462T patent/ATE341099T1/en not_active IP Right Cessation
- 2000-02-21 EP EP00400462A patent/EP1047122B1/en not_active Expired - Lifetime
- 2000-03-01 JP JP2000055248A patent/JP4601113B2/en not_active Expired - Fee Related
Cited By (14)
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US20050158666A1 (en) * | 1999-10-15 | 2005-07-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lateral etch inhibited multiple etch method for etching material etchable with oxygen containing plasma |
US20040077178A1 (en) * | 2002-10-17 | 2004-04-22 | Applied Materials, Inc. | Method for laterally etching a semiconductor structure |
US20060016784A1 (en) * | 2004-07-21 | 2006-01-26 | Voss Curtis L | Etching with electrostatically attracted ions |
US7183215B2 (en) * | 2004-07-21 | 2007-02-27 | Hewlett-Packard Development Company, L.P. | Etching with electrostatically attracted ions |
US20060168794A1 (en) * | 2005-01-28 | 2006-08-03 | Hitachi Global Storage Technologies | Method to control mask profile for read sensor definition |
US20100006427A1 (en) * | 2005-07-06 | 2010-01-14 | Joachim Rudhard | Reactor for carrying out an etching method for a stack of masked wafers and an etching method |
US20120152895A1 (en) * | 2010-12-20 | 2012-06-21 | Applied Materials, Inc. | Methods for etching a substrate |
US9318341B2 (en) * | 2010-12-20 | 2016-04-19 | Applied Materials, Inc. | Methods for etching a substrate |
KR101251072B1 (en) * | 2011-07-12 | 2013-04-12 | 에이피티씨 주식회사 | Method of etching a semiconductor device |
CN104134611A (en) * | 2013-05-03 | 2014-11-05 | 无锡华润上华半导体有限公司 | Silicon release technology |
CN110010463A (en) * | 2015-11-04 | 2019-07-12 | 朗姆研究公司 | A kind of plasma process system for semiconductor devices manufacture |
CN112105754A (en) * | 2018-05-17 | 2020-12-18 | 瑞士艾发科技 | Method for treating substrate and vacuum deposition apparatus |
US11393703B2 (en) * | 2018-06-18 | 2022-07-19 | Applied Materials, Inc. | Apparatus and method for controlling a flow process material to a deposition chamber |
CN117080062A (en) * | 2023-10-13 | 2023-11-17 | 无锡邑文微电子科技股份有限公司 | Bowl-shaped etching method |
Also Published As
Publication number | Publication date |
---|---|
DE60030905D1 (en) | 2006-11-09 |
JP2000323454A (en) | 2000-11-24 |
DE60030905T2 (en) | 2007-09-20 |
EP1047122A3 (en) | 2001-12-05 |
ATE341099T1 (en) | 2006-10-15 |
JP4601113B2 (en) | 2010-12-22 |
US6383938B2 (en) | 2002-05-07 |
EP1047122A2 (en) | 2000-10-25 |
EP1047122B1 (en) | 2006-09-27 |
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