US11515443B2 - Tandem solar cell manufacturing method - Google Patents
Tandem solar cell manufacturing method Download PDFInfo
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- US11515443B2 US11515443B2 US16/982,391 US201916982391A US11515443B2 US 11515443 B2 US11515443 B2 US 11515443B2 US 201916982391 A US201916982391 A US 201916982391A US 11515443 B2 US11515443 B2 US 11515443B2
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- solar cell
- crystalline silicon
- manufacturing
- silicon substrate
- tandem solar
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/544—Solar cells from Group III-V materials
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/549—Organic PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present disclosure relates to a method for manufacturing a tandem solar cell using a method of etching a crystalline silicon substrate.
- a crystalline silicon (c-Si) solar cell is a representative single junction solar cell and is widely used as a commercial solar cell.
- tandem solar cell constituting one solar cell by connecting single junction solar cells including absorption layers having different band gaps has been actively developed due to a low photoelectric conversion efficiency of the crystalline silicon solar cell.
- FIG. 1 is a schematic cross-sectional view showing a two-terminal tandem solar cell among tandem solar cells.
- the solar cell includes a single junction solar cell including an absorption layer having a relatively large band gap and a single junction solar cell including an absorption layer having a relatively small band gap and they are bonded through a middle layer.
- perovskite/crystalline silicon tandem solar cells may use a single junction solar cell including the absorption layer having the relatively large band gap as a perovskite solar cell to achieve 30% or more of high-photoelectric efficiency, and thus, perovskite/crystalline silicon tandem solar cells draw attention.
- Crystalline silicon solar cells and tandem solar cells in related art each use a crystalline silicon substrate.
- the crystalline silicon substrate for the solar cell has 5 to 6 N of chemical purity (corresponding to 99.999 to 99.9999% of purity) that is lower than 10 to 11 N of chemical purity of a semiconductor crystalline silicon substrate. Furthermore, a surface of a single crystal silicon ingot or a polycrystalline silicon ingot for solar cells is cut into wafers by a saw wire and the cut wafers are supplied without post-processing.
- the silicon substrate supplied by cutting with the saw wire has greater surface roughness or saw mark of several to tens of ⁇ m and has severe damage and contamination on the surface thereof. Therefore, an alkali or acid-based subsequent etching process is performed to remove the defects or the contamination.
- the etching is referred to as “saw damage etching (SDE)”. After the SDE process, a texture is selectively formed on the surface of a flat crystalline silicon substrate through a texturing process to increase a path of sunlight.
- the texture of several to tens of ⁇ m is formed on the substrate surface by the subsequent texturing process, and thus, the pyramid-shaped defects are screened by the texture.
- unit layers of the perovskite solar cell formed on the texture have a thickness of tens to hundreds of nm.
- the texture is formed on the substrate, the texture of the substrate is projected to the unit layer, and thus, the unit layer has the texture.
- This is referred to as “conformal structure” or “conformal growth”.
- the unit layers of the perovskite solar cell are not uniformly coated by the texture disposed thereunder.
- the crystalline silicon substrate may be flattened by the SDE to form the tandem solar cell including the perovskite solar cell with the uniform unit layer.
- the crystalline silicon substrate by SDE in the related art has pyramid-shaped defects with the size of several ⁇ m even after the etching.
- the pyramid-shaped defects have the size greater than tens to hundreds of nm, which is a thickness of the unit layer of the perovskite solar cell. Therefore, when the pyramid-shaped defects are present on the flat substrate surface, the perovskite solar cell may have difficulty in forming a unit layer having a uniform thickness and composition.
- the pyramid-shaped defects cause a shunt on the perovskite cell surface, thereby degrading fill factor (FF) characteristics.
- the present disclosure provides a method of etching a substrate that has no pyramid-shaped defects on a surface of a crystalline silicon substrate, having excellence in surface roughness characteristics caused by a saw mark, and with no surface damage.
- the present disclosure also provides a method of etching a substrate and a method for manufacturing a solar cell.
- the methods may be used to manufacture a unit layer having a uniform thickness and composition when the perovskite unit layer is deposited by removing pyramid-shaped defects from the surface of a crystalline silicon substrate and improving surface roughness caused by the saw mark.
- the present disclosure further provides a method of etching a substrate capable of suppressing shunts caused by non-uniform deposition of the perovskite unit layer.
- the present disclosure further provides the solar cell using the substrate to obtain fill factor characteristics.
- the method for manufacturing the tandem solar cell includes preparing a crystalline silicon substrate; isotropic etching the substrate; removing saw damage on a surface of the substrate by anisotropic etching the isotropically etched substrate; positioning a second solar cell on the substrate from which the saw damage is removed; positioning a middle layer on the second solar cell; and positioning a first solar cell on the middle layer.
- the method for manufacturing the tandem solar cell characterized in that the isotropic etching is performed using an acid.
- the method for manufacturing the tandem solar cell characterized in that the acid is a mixed acid with nitric acid (HNO 3 ) and hydrofluoric acid (HF) and has a mixing ratio of 100:1 to 10:1.
- HNO 3 nitric acid
- HF hydrofluoric acid
- the method for manufacturing the tandem solar cell characterized in that the anisotropic etching is performed using an alkali.
- the method for manufacturing the tandem solar cell characterized in that the alkali is 1 to 10% by weight of sodium hydroxide aqueous solution.
- the method for manufacturing the tandem solar cell characterized in that the etching solution further includes at least one additive of an organic solvent, a phosphate, a reaction modifier, or a surfactant.
- the method for manufacturing the tandem solar cell characterized in that the method for manufacturing the tandem solar cell further includes the isotropic etching process after the anisotropic etching process.
- the method for manufacturing the tandem solar cell characterized in that the anisotropic etching process time is 5 to 10 minutes.
- the method for manufacturing the tandem solar cell characterized in that the second solar cell is disposed on a flat substrate where the saw damage is removed and with no texture.
- the method for manufacturing the tandem solar cell characterized in that the first solar cell has a greater band gap than a band gap of the second solar cell.
- the method for manufacturing the tandem solar cell characterized in that the first solar cell is a perovskite solar cell and the second solar cell is a crystalline silicon solar cell.
- the method for manufacturing the tandem solar cell characterized in that the second solar cell includes a first semiconductor type layer and a second semiconductor type layer; and at least one of the first semiconductor type layer or the second semiconductor type layer includes an amorphous silicon layer.
- a crystalline silicon substrate with no pyramid-shaped surface detects may be obtained by isotropic etching and anisotropic etching of a substrate etching method.
- a crystalline silicon substrate with no damage caused by saw mark and having excellent surface roughness characteristics may be provided through the etching method.
- a unit layer having a uniform thickness and composition and without defects may be formed according to conformal characteristics of the unit layer of the perovskite solar cell.
- the solar cell using the substrate etched through the etching method may obtain excellent fill factor characteristics and efficiency.
- FIG. 1 is a schematic cross-sectional view showing a monolithic, two-terminal tandem solar cell among tandem solar cells.
- FIG. 2 shows a microscope picture of a pyramid-shaped defects presenting on a surface of a crystalline silicon substrate after saw damage etching (SDE) in related art.
- FIG. 3 is a cross-sectional view showing a crystalline silicon substrate 111 having a flat first surface and second surface according to the present disclosure.
- FIG. 4 shows a microscope picture of a surface of a crystalline silicon substrate according to the present disclosure, which has excellent surface roughness and with no pyramid-shaped defects.
- FIG. 5 shows a microscope picture of a bare wafer processed by cutting using a wire saw.
- FIG. 6 shows a microscope picture in Comparative Example 1 in which a bare wafer was pre-cleaned for 10 minutes and then anisotropically etched at room temperature.
- FIG. 7 shows a microscope picture in Comparative Example 2 in which a bare wafer was pre-cleaned for 10 minutes and then isotropically etched at room temperature.
- FIG. 8 shows a microscope picture in Comparative Example 3 in which a bare wafer was pre-cleaned for 10 minutes, anisotropically etched at room temperature, and then isotropically etched.
- FIG. 9 shows a microscope picture in Embodiment 1 in which a bare wafer was pre-cleaned for 10 minutes, isotropically etched at room temperature, and then anisotropically etched.
- FIG. 10 shows a microscope picture in Embodiment 2 in which a bare wafer was pre-cleaned for 10 minutes, isotropically etched at room temperature, and then anisotropically etched and isotropically etched again.
- FIG. 11 is a schematic view showing a mechanism for forming a surface state of a crystalline silicon substrate by SDE in Embodiments and Comparative Examples of the present disclosure.
- FIGS. 12 to 21 are schematic views showing a method for manufacturing a tandem solar cell using a crystalline silicon substrate according to an embodiment of the present disclosure.
- FIG. 22 shows a result of evaluating a fill factor (FF) of a tandem solar cell manufactured by an SDE method using a crystalline silicon substrate in Embodiments and Comparative Examples of the present disclosure.
- terms such as first, second, A, B, (a), (b) and the like may be used herein when describing elements of the present disclosure. These terms are intended to distinguish one element from other elements, and the essence, order, sequence, or a number of corresponding elements are not limited by these terms. It should be noted that if it is described in the present disclosure that one component is “connected,” “coupled” or “joined” to another component, the former may be directly “connected,” “coupled” or “joined” to the latter, or another component may be disposed between the former and the latter, or the former may be “connected,” “coupled” or “joined” to the latter via another component.
- one element may be described as its sub-elements in implementing the present disclosure; however, the sub-elements may be implemented in a single device or module in an integrated manner or implemented in multiple devices or modules in a distributed manner.
- FIG. 3 is a cross-sectional view showing a crystalline silicon substrate 111 used in the present disclosure.
- a first surface and a second surface of the crystalline silicon substrate 111 of the present disclosure are flattened by an etching method in the present disclosure.
- the crystalline silicon substrate 111 of the present disclosure having the cross-section in FIG. 3 does not have pyramid-shaped defects on the surface thereof 111 and has an excellent surface roughness, as shown in FIG. 4 .
- the crystalline silicon substrate of the present disclosure having the surface in FIG. 4 is formed from a bare wafer in FIG. 5 .
- a bare wafer in FIG. 5 is processed by cutting a silicon wafer having 5 to 6N of purity by a wire saw.
- the bare wafer is severely contaminated on the surface thereof due to foreign substrates and has a severe damage mark on the wafer surface generated when it is cut using the saw and a severe surface roughness.
- a subsequent process including pre-cleaning and etching may be used.
- the above etching is referred to as “saw damage etching (SDE)” for removing the wafer damaged by the wire saw.
- an anisotropic etching method is a method of etching at a temperature near room temperature using an alkaline aqueous solution.
- the anisotropic etching method is a method of etching a substrate surface using 1 to 10% by weight of sodium hydroxide (NaOH) aqueous solution or potassium hydroxide (KOH) aqueous solution and an aqueous solution containing additives of organic solvents, phosphates, reaction modifiers, and/or surfactants in a temperature range of room temperature to 150° C.
- a chemically stable ⁇ 111 ⁇ plane has a lowest etching rate at the silicon wafer substrate surface.
- the silicon substrate surface has an increased ratio of ⁇ 111 ⁇ plane and has improvement in surface roughness caused by the wire saw.
- the isotropic etching is a method of etching a temperature near room temperature using an acid as an etching solution.
- the isotropic etching is the method of etching the substrate surface using a mixed acid as a mixture of nitric acid and hydrofluoric acid and an aqueous solution containing an additive.
- a weight ratio of nitric acid to hydrofluoric acid is preferably 100:1 to 10:1.
- the hydrofluoric acid has a lower ratio compared to a ratio of nitric acid to hydrofluoric acid of 100:1 (or the nitric acid has a high ratio), the etching rate is too fast and the substrate thickness is excessively thinned, and thus, there is a risk that the substrate may be destroyed upon the subsequent process and there is a problem in that process costs increase due to an increase in amount of solution used.
- the substrate on the silicon wafer surface is uniformly etched through the isotropic etching regardless of crystallographic orientation of the substrate.
- the isotropic etching is performed, the silicon substrate surface is uniformly etched, and thus, the surface roughness is improved and a sharp concave-convex shape thereof is rounded through the uniform etching.
- the method of etching the crystalline silicon substrate capable of completely removing the pyramid-shaped defects by adjusting the etching method and the combination thereof with the bare wafer having the purity of 5N to 6N as a starting material.
- FIG. 6 shows a picture of a microstructure in Comparative Example 1 in which a bare wafer was pre-cleaned for 10 minutes and anisotropically etched using 5% by weight of sodium hydroxide (NaOH) aqueous solution at room temperature.
- NaOH sodium hydroxide
- Anisotropic etching is an etching method using a phenomenon in which an etching rate varies depending on a surface crystallographic orientation of a crystalline silicon substrate.
- surfaces with crystallographic orientations each different from that of a chemically stable ⁇ 111 ⁇ plane has a faster etching rate than that of the ⁇ 111 ⁇ plane due to crystallographic or atomic bond instability.
- the anisotropic etching has a feature in that the etching rate thereof is faster than that of the isotropic etching.
- the anisotropic etching method failed to remove the pyramid-shaped defects from the surface of the crystalline silicon wafer regardless of the etching time and a number of etchings. For this reason, the crystalline silicon substrate in Comparative Example 1 of the present disclosure is not suitable for forming a unit layer having a uniform thickness and composition when the unit layer of a perovskite solar cell is deposited as a subsequent process.
- FIG. 7 shows a picture of a microstructure in Comparative Example 2 in which a bare wafer was pre-cleaned for 10 minutes, and isotropically etched at room temperature with a ratio of nitric acid (HNO 3 ) to hydrofluoric acid (HF) adjusted to 20:1.
- HNO 3 nitric acid
- HF hydrofluoric acid
- isotropic etching has an effect of rounding a sharp cross-section or surface caused by a saw mark because the isotropic etching is performed in all directions regardless of crystallographic orientation on the wafer surface. For this reason, as described above, the isotropic etching has a feature that the etching rate thereof is slower than that of the anisotropic etching.
- pyramid-shaped defects do not occur on the surface of the crystalline silicon wafer subjected to isotropic etching.
- Comparative Example 3 of the present disclosure a mixed etching method was performed in which anisotropic etching using an aqueous alkali solution was performed among the SDE methods described above, and then isotropic etching is performed using an aqueous acid solution.
- FIG. 8 shows a picture of a microstructure in Comparative Example 3 in which a bare wafer was pre-cleaned for 10 minutes, anisotropically etched in 5% by weight of sodium hydroxide (NaOH) aqueous solution at room temperature for 5 minutes and 10 minutes, respectively, and isotropically etched for 10 minutes with a ratio of nitric acid (HNO 3 ) to hydrofluoric acid (HF) adjusted to 20:1.
- NaOH sodium hydroxide
- HNO 3 nitric acid
- HF hydrofluoric acid
- a stepped portion caused by a saw mark on the bare wafer was reduced by the anisotropic etching.
- the subsequent isotropic etching it was found that pyramid-shaped defects were present on the surface of the final crystalline silicon substrate.
- the anisotropic etching time was increased from 5 minutes to 10 minutes, the pyramid-shaped defects were still present on the surface of the final crystalline silicon substrate.
- the saw marks on the surface of the crystalline silicon substrate were slightly removed, but the pyramid-shaped defects were not completely removed from the substrate surface through the etching method in Comparative Example 3 in which the anisotropic etching is performed, and then, the isotropic etching is performed.
- the crystalline silicon substrate in Comparative Example 3 of the present disclosure is also not advantageous to form the unit layer having the uniform thickness and composition when a unit layer of a perovskite solar cell is deposited as the subsequent process.
- Embodiment 1 of the present disclosure an isotropic etching using an aqueous alkali acid solution among the SDE methods described above was performed, and then, an anisotropic etching method using an aqueous alkali solution was performed.
- FIG. 9 shows a picture of a microstructure in Embodiment 1 in which a bare wafer was pre-cleaned for 10 minutes, isotropically etched for 10 minutes at room temperature with a ratio of nitric acid (HNO 3 ) to hydrofluoric acid (HF) adjusted to 20:1, and anisotropically etched for 5 minutes in a 5% by weight of sodium hydroxide (NaOH) aqueous solution.
- HNO 3 nitric acid
- HF hydrofluoric acid
- a stepped portion caused by a saw mark on the bare wafer was not significantly reduced by isotropic etching, but a sharp cross-section or surface was not observed because the isotropic etching is performed in all directions regardless of crystallographic orientations on wafer surfaces to have a surface-rounding effect.
- the etching time of the subsequent anisotropic etching is advantageous not to exceed 10 minutes. If the anisotropic etching time exceeds 10 minutes, the substrate may be significantly thinned due to the fast etching rate of the anisotropic etching.
- the etching method in Embodiment 1 in which the isotropic etching is performed and then the anisotropic etching is performed may be used to improve flatness by removing saw marks on the surface of the crystalline silicon substrate and completely removes the pyramid-shaped defects from the substrate surface. Therefore, the crystalline silicon substrate according to Embodiment 1 of the present disclosure is expected to improve solar cell panel characteristics by enabling the formation of the unit layer having the uniform thickness and composition when the unit layer of the perovskite solar cell is subsequently deposited.
- Isotropic etching was added in a last step of SDE in Embodiment 2 of the present disclosure, compared to Embodiment 1 of the present disclosure.
- the saw mark was removed from the surface of the crystalline silicon substrate subjected to the isotropic etching and the anisotropic etching in Embodiment 1 and no pyramid defects were present.
- Embodiment 2 in which the isotropic etching was further performed for 10 minutes thereafter, it may be seen that the final substrate has a surface-rounding shape by the last isotropic etching to improve surface roughness and smoothen curve.
- FIG. 11 shows a mechanism in which a surface of a crystalline silicon substrate is formed by etching in Embodiments and Comparative Examples of the present disclosure, estimated by the present inventors.
- a bare silicon substrate cut by a wire saw has saw marks on a substrate surface as shown in FIG. 11 . If the anisotropic etching is performed on the substrate surface, the etching is slowly performed on a ⁇ 111 ⁇ plane as the etching rate of the anisotropic etching varies depending on the crystallographic orientation, and thus, a seed of the pyramid-shaped defects is generated. Even if the anisotropic etching is subsequently performed again, the seed of the pyramid defects are not removed by the anisotropic etching.
- the isotropic etching has the etching rate which is not relevant to the crystallographic orientation, even if the isotropic etching is performed after the anisotropic etching, it is estimated that the substrate has a surface-rounding effect, but the pyramid-shaped defects or the defect seeds are not completely removed.
- the crystalline silicon substrate when the isotropic etching is performed first, the crystalline silicon substrate has a round-shaped surface due to an etching rate of the isotropic etching irrespective of crystallographic orientations. Therefore, in contrast to the anisotropic etching, if the isotropic etching is performed first, a seed of pyramid-shaped defects does not occur on the substrate surface. Thereafter, when the anisotropic etching is performed, the rounded surface of the substrate has different etching rates according to the crystallographic orientations.
- a stepped portion caused by the saw mark on the surface of the final crystalline silicon substrate is also greatly flattened (or the surface roughness is improved)
- no pyramid-shaped defects were observed on the surface of the final substrate because the seeds of the pyramid-shaped defects were not formed by the isotropic etching which is initially performed.
- the crystalline silicon substrate having purity of 99.999% to 99.9999% and having flat both surfaces (e.g., a first surface and a second surface) with no texture, and no pyramid-shaped defects on the surface thereof
- a tandem solar cell has a two-terminal tandem solar cell structure.
- the two-terminal solar cell is formed by tunnel-bonding a first solar cell including an absorption layer with a relatively large band gap and a second solar cell including an absorption layer with a relatively small band gap through a middle layer.
- a light in a short-wavelength region is absorbed by the first solar cell disposed at an upper portion thereof to generate an electric charge and a light in a long-wavelength region passing through the first solar cell is absorbed by the second solar cell disposed at a lower portion thereof to generate an electric charge.
- the tandem solar cell having the above-described structure absorbs the light in the short-wavelength region by the first solar cell disposed at the upper portion thereof to generate electricity and absorbs the light in the long-wavelength region by the second solar cell disposed at the lower portion thereof to generate electricity. Therefore, a threshold wavelength may be moved toward the long wavelength to widen an entire wavelength band absorbed by the solar cell.
- solar cells that may be used as the first solar cell and the second solar cell includes, as non-limiting examples, a perovskite solar cell and a crystalline silicon solar cell.
- the first solar cell in the present disclosure is not limited to the perovskite solar cell and the second solar cell is not limited to the crystalline silicon solar cell.
- any solar cell may be used if the upper solar cell has a greater band gap than the band gap of the lower solar cell.
- tandem solar cell including a perovskite solar cell and a crystalline silicon solar cell are described.
- FIGS. 12 to 21 show a method for manufacturing a tandem solar cell according to an embodiment of the present disclosure.
- a tandem solar cell in the present disclosure was manufactured using a substrate flattened by performing SDE on a front surface and a rear surface of a crystalline silicon substrate 111 according to Comparative Examples and Embodiments of the present disclosure (see FIG. 12 ). It is notified in advance that remaining subsequent processes except for the etching process performed on the substrate in Embodiments and Comparative Examples were performed under the same conditions.
- the first passivation layer 112 is disposed on a first surface of the crystalline silicon substrate 111 and a second passivation layer 113 is disposed on a second surface of the crystalline silicon substrate 111 .
- the passivation layers 112 and 113 may be formed only on the first surface of the crystalline silicon substrate 111 , and then formed on the second surface thereof.
- the passivation layers 112 and 113 may be simultaneously formed on the first surface and the second surface of the crystalline silicon substrate 111 .
- the passivation layers 112 and 113 may also be deposited by plasma enhanced chemical vapor deposition (PECVD).
- PECVD plasma enhanced chemical vapor deposition
- the PECVD or thermal oxidation may be performed.
- amorphous intrinsic silicon (i-a-Si:H) layers were deposited by the PECVD using a silicon source material (e.g., SiH 4 , Si 2 H 6 ) and hydrogen (H 2 ) to manufacture the passivation layers 112 and 113 formed at both sides of an n-type silicon crystalline substrate 111 having flat surface.
- a silicon source material e.g., SiH 4 , Si 2 H 6
- hydrogen H 2
- a first semiconductor type layer 114 is formed on the passivation layer 112 and a second semiconductor type layer 115 is formed on the passivation layer 113 (see FIGS. 14 and 15 )
- the first semiconductor type layer 114 formed above the crystalline silicon substrate 111 may be different from the semiconductor type silicon substrate 111 or may be the same as the semiconductor type silicon substrate.
- the first semiconductor type layer 114 is a p-type semiconductor layer.
- the first semiconductor type layer 114 is an n-type semiconductor layer.
- the first semiconductor type layer 114 may also be an n-type semiconductor layer.
- the first semiconductor type layer and the second semiconductor type layer were formed using at least one gas selected from the group consisting of SiH 4 , SiH 6 , SiHCl 3 and SiH 2 Cl 2 , H 2 gas, and dopant gas such as B 2 H 6 or PH 3 gas, as a reactant, through the PECVD process.
- temperature and pressure conditions of the PECVD process may be the same as those of the amorphous intrinsic silicon layer.
- the first semiconductor type layer 114 and the second semiconductor type layer 115 may each be formed through an ion implantation process without the passivation layers 112 and 113 .
- the first semiconductor type layer 114 is an emitter layer
- boron is doped as a dopant
- the second semiconductor type layer 115 is a rear electric field layer and is doped with phosphorous.
- first semiconductor type layer 114 and the second semiconductor type layer 115 are each formed by the ion implantation process as described above, it is advantageous to perform heat treatment at 700 to 1,200° C. for activation of impurities.
- first semiconductor type layer 114 and the second semiconductor type layer 115 may each be formed through a high temperature diffusion process using BBr 3 or PCl 3 instead of the ion implantation process.
- a second electrode 140 is formed on the second semiconductor type layer 115 .
- a process temperature of the second electrode 140 is limited to equal to or less than 250° C., similar to the process temperature of the first electrode 150 , to prevent destruction of hydrogen bonds inside the amorphous silicon.
- the second electrode 140 may be formed before the first electrode 150 or the second electrode 140 and the first electrode 150 may be formed at the same time.
- a second transparent electrode layer 116 of the second electrode 140 is disposed on the second semiconductor type layer 115 .
- a transparent electrode layer is made of transparent conductive oxide such as indium tin oxide (ITO), zinc indium tin oxide (ZITO), zinc indium oxide (ZIO), and zinc tin oxide (ZTO)
- the second transparent electrode layer 116 may be deposited through sputtering.
- a second metal electrode layer 117 is formed.
- the second metal electrode layer 117 may be formed directly under the second semiconductor type layer 115 without forming the second transparent electrode layer 116 .
- a metal grid has a small contact area with the amorphous silicon and the amorphous silicon has relatively low carrier mobility, and thus, the metal grid may be difficult to collect the carriers. Therefore, the second transparent electrode layer 116 is advantageous to be formed on the second semiconductor type layer 115 .
- the second metal electrode layer 117 is formed by printing a second electrode paste on the second transparent electrode layer 116 by a screen printing method and heat-treating with a second temperature (that is the same as the first temperature).
- the second electrode 140 may be manufactured by selectively applying a second electrode paste that does not contain a glass frit and then low-temperature sintering at a second temperature.
- the second electrode paste may contain metal particles and a low-sintering organic binder material and the second electrode paste does not contain glass frit.
- the second temperature may be equal to or less than 250° C., for example, 100 to 200° C.
- a middle layer 120 is formed on the first semiconductor type layer 114 of the second solar cell 110 to electrically connect the first solar cell 130 and the second solar cell 110 (see FIG. 17 ).
- a transparent conductive material is deposited on the middle layer 120 in the present disclosure.
- the middle layer 120 is formed on the substrate using a widely-known sputtering method, for example, RF magnetron sputtering.
- a widely-known sputtering method for example, RF magnetron sputtering.
- fluorine tin oxide (FTO) was deposited to form the second transparent electrode layer 116 and aluminum doped zinc oxide (AZO) was used for the middle layer 120 , but the present disclosure is not limited thereto.
- various transparent conductive oxides, metallic materials, and conductive polymers may also be used.
- a second semiconductor type charge transport layer 131 is formed on the middle layer 120 (see FIG. 18 ).
- the second semiconductor type charge transport layer 121 may be a p-type hole transport layer or an n-type electron transport layer depending on the structure of the second solar cell 110 and the first semiconductor type layer 114 and the second semiconductor type layer 115 .
- C 60 was prepared using a solution method as a specific example material of the electron transport layer in the present disclosure.
- the solution process in the related art refers to a process such as inkjet printing, gravure printing, spray coating, doctor blade, bar coating, gravure coating, brush painting, and slot-die coating.
- a fullerene derivative containing C 60 is dissolved in a solvent and spin-coated for 10 to 30 seconds using the spin coating method, and then maintained at room temperature for 1 to 3 hours to form an electron transport layer.
- the second semiconductor type charge transport layer 131 is a p-type hole transport layer
- Spiro-OMeTAD was prepared as the p-type hole transport layer material using the solution method in the related art.
- a hole transport material consisting of 45.7 mM of 2,2′,7,7′-tetrakis(N,N-p-dimethoxyphenylamine)-9,9′-spirofluorene(spiro-OMeTAD, Merck), 220 mM of 4-tert-butylpyridine(TBP, Aldrich, 96%), and 20 mM of bis(trifluoromethane)sulfonimide lithium salt (LiClO 4 , Aldrich, 99.95%) in 1 mL of anhydrous chlorobenzene (Aldrich, 99.8%) was coated over the first semiconductor type charge transport layer 121 to form a hole transport layer.
- HTM hole transport material
- a perovskite absorption layer 132 is formed on the second semiconductor type charge transport layer 131 .
- the perovskite absorption layer 132 in the present disclosure may be made of methylamminium (MA)-based or formamidinium (FA)-based perovskite compounds that are widely used.
- example method of forming the perovskite absorption layer 132 in the present disclosure may include a thin film process in addition to the solution process in the related art.
- the solution process has an advantage in that the solution process is a simple, easy, and inexpensive process of applying and drying solution and is used to form a light absorber of a photoactive layer.
- crystallization is spontaneously performed by drying the applied solution to form the light absorber of coarse grains, and for example, the perovskite light absorber has excellent electron conductivity and hole conductivity.
- the solution process may have difficulty in forming a perovskite absorption layer with the same thickness while maintaining the texture shape under the perovskite absorption layer 132 , due to inherent characteristics of the solution process. Therefore, there is a possibility that the characteristics of the tandem solar cell may be deteriorated due to deviations in thickness and shape.
- an inorganic material layer was coated on the second semiconductor type charge transport layer 131 .
- the inorganic material layer in the present disclosure was prepared by the solution method using PbI 2 . 4 mmol of PbI 2 (Sigma-Aldrich, 99%) was dissolved in 4 ml of N,N-dimethylformamide (DMF) (Sigma-Aldrich, 99.8%) to prepare a PbI 2 solution. Then, 40 ml of the PbI 2 solution was rotated for 30 seconds at a speed of 500 to 5,000 rpm on the substrate on which the second semiconductor type charge transport layer 131 was formed by spin coating to coat the inorganic material layer. Then, the substrate coated with the inorganic material layer was dried at 100° C. for 15 minutes.
- an organic material layer was coated on the inorganic material layer.
- the substrate coated with the inorganic material layer was immersed using a 0.01 g/ml of (CH(NH 2 ) 2 )Br solution in 2-propanol (Sigma-Aldrich, 99.5%), rotated at a maximum of 3,000 rpm for 30 seconds, and then dried at 100° C. for 15 minutes.
- the perovskite absorption layer 132 in the present disclosure is formed by physical vapor deposition or chemical vapor deposition using sputtering or electron beam, in addition to the above solution process.
- the perovskite absorption layer may be formed by single step deposition or sequential step deposition and the sequential step is preferable due to the difficulty in manufacturing the uniform thin film using the single step.
- a post-heat treatment process was performed to change components of the perovskite absorption layer 132 into the perovskite material.
- the post-heat treatment process is performed within about 3 hours at a temperature range of room temperature to 200° C.
- a lower limit of the post-heat treatment temperature is not particularly limited, and if it is higher than 200° C., the polymer material of the perovskite absorption layer may be thermally degraded.
- each of precursor layers before the precursor layers react with each other to form a perovskite layer, each of precursor layers may be thermally decomposed or a composition change thereof may occur due to the thermal decomposition.
- a first semiconductor type charge transport layer 133 is formed on the perovskite absorption layer 132 .
- the first semiconductor type charge transport layer 133 is a p-type hole transport layer.
- the second semiconductor type charge transport layer 131 is a p-type hole transport layer
- the first semiconductor type charge transport layer 133 may be the n-type electron transport layer.
- a first transparent electrode layer 134 of a first electrode 150 is formed in the present disclosure (see FIG. 21 ).
- the first transparent electrode layer 134 is formed on an entire upper surface of the perovskite solar cell 130 and functions to collect electric charges generated by the perovskite solar cell 130 .
- the first transparent electrode layer 134 may be made of various transparent conductive materials, similar to the second transparent electrode layer 116 described above.
- the first metal electrode layer 135 of the first electrode 150 is disposed on the first transparent electrode layer 134 and is disposed in a partial region of the first transparent electrode layer 134 .
- the first metal electrode layer 135 of the first electrode 150 may be manufactured by selectively applying a first electrode paste not containing a glass frit and then low-sintering at a first temperature.
- the first electrode paste may contain metal particles and a low-sintering organic binder material and the first electrode paste does not contain glass frit.
- the first temperature may be equal to or less than 250° C., for example, 100 to 200° C. to protect the perovskite absorption layer 132 vulnerable to heat from a subsequent high-temperature process.
- FIG. 22 shows a result of evaluating a fill factor (FF) of a tandem solar cell manufactured by manufacturing methods in FIGS. 13 to 22 using a crystalline silicon substrate which is etched using SDE methods in embodiments and comparative examples of the present disclosure.
- FF fill factor
- the FF of the solar cell refers to a ratio of an actual output of a solar cell to maximum capacity thereof.
- the maximum capacity of the solar cell is determined as a product of Jsc and Voc.
- Jsc is a short circuit current density and refers to a current flowing when both electrodes of the solar cell are directly connected or an instantaneous maximum current that may flow through the solar cell.
- Voc is an open circuit voltage and refers to a voltage when nothing is connected to the solar cell or a maximum voltage of the solar cell (current is “0”).
- tandem solar cell manufactured using the SDE method according to the embodiment of the present disclosure has an improved FF by about 10% or more compared to the tandem solar cell using the SDE method according to the comparative example.
- the tandem solar cell using the SDE method in the comparative example has pyramid-shaped defects present on the surface of the crystalline silicon substrate, and due to the defects, a perovskite unit layer is locally thinned around the defects. Therefore, it was found that the tandem solar cell using the SDE method in comparative example has inferior FF characteristics due to the defects on the final substrate surface.
- tandem solar cell using the SDE method in the embodiment of the present disclosure has a uniform and defect-free crystalline silicon substrate surface. Therefore, it was found that the tandem solar cell of the present disclosure has excellent FF characteristics as the perovskite unit layer may be subsequently, uniformly coated.
Abstract
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PCT/KR2019/003147 WO2019182316A1 (en) | 2018-03-19 | 2019-03-18 | Tandem solar cell manufacturing method |
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CN114792704B (en) * | 2022-03-29 | 2023-04-07 | 宣城先进光伏技术有限公司 | Perovskite/silicon heterojunction laminated solar cell and preparation method thereof |
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EP3770978A4 (en) | 2021-10-27 |
CN111886706A (en) | 2020-11-03 |
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US20210005832A1 (en) | 2021-01-07 |
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