US11076482B2 - Printed circuit board - Google Patents
Printed circuit board Download PDFInfo
- Publication number
- US11076482B2 US11076482B2 US16/849,622 US202016849622A US11076482B2 US 11076482 B2 US11076482 B2 US 11076482B2 US 202016849622 A US202016849622 A US 202016849622A US 11076482 B2 US11076482 B2 US 11076482B2
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- United States
- Prior art keywords
- pattern
- insulating layer
- bonding pad
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/118—Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0277—Bendability or stretchability details
- H05K1/0278—Rigid circuit boards or rigid supports of circuit boards locally made bendable, e.g. by removal or replacement of material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/046—Means for drawing solder, e.g. for removing excess solder from pads
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present disclosure relates to a printed circuit board.
- a rigid flexible printed circuit board having flexibility may be often used due to the limitation of the internal layout space, or the like.
- a bonding pad of the board and a bump pad of the components may be connected by a thermal compression (TC) bonding process.
- TC thermal compression
- An aspect of the present disclosure is to improve reliability for connections between a printed circuit board and an electronic component.
- a printed circuit board may include an internal insulating layer, an internal conductive pattern layer disposed on the internal insulating layer and including a line portion and a bonding pad portion, and an external insulating layer disposed on the internal conductive pattern layer and the internal insulating layer and having an accommodation groove extending therethrough to expose the bonding pad portion.
- the bonding pad portion may include a connection pattern extending from the line portion of the internal conductive pattern layer embedded in the external insulating layer, and extending in the accommodation groove; a land pattern disposed closer to a center portion of the accommodation groove than the connection pattern; and a dam pattern connecting the connection pattern and the land pattern, in which a line width of the dam pattern is narrower than a line width of the land pattern.
- a printed circuit board includes an internal insulating layer having a flexible region and a rigid region, and an external insulating layer disposed in the rigid region.
- the printed circuit board includes an internal conductive pattern layer disposed on the internal insulating layer and including a line portion and a bonding pad portion both disposed in the rigid region, where the external insulating layer has an accommodation groove passing therethrough to expose the bonding pad portion.
- the bonding pad portion has one region disposed in a central portion of the accommodation groove, and another region extending from the one region to be connected to the line portion, in which at least a portion of a line width of the other region of the bonding pad portion is narrower than a line width of the one region of the bonding pad portion.
- a printed circuit board includes a first insulating layer, a conductive pattern disposed on the first insulating layer, and a second insulating layer disposed on the conductive pattern and the first insulating layer.
- a bonding pad portion of the conductive pattern is exposed through an opening in the second insulating layer, and the bonding pad portion of the conductive pattern includes a connection pattern extending in the opening in the second insulating layer from the conductive pattern layer embedded in the second insulating layer; a land pattern disposed closer to a center portion of the opening in the second insulating layer than the connection pattern; and a dam pattern connecting the connection pattern and the land pattern and having a line width narrower than a line width of the connection pattern.
- FIG. 1 is a cross-sectional side view schematically illustrating a printed circuit board according to an embodiment of the present disclosure.
- FIG. 2 is a view schematically illustrating portion A of FIG. 1 , as viewed from above in a downward direction.
- FIG. 3 is a cross-sectional view taken along line I-I′ of FIG. 2 .
- FIG. 4 is a view schematically illustrating a modification of portion A of FIG. 1 , corresponding to FIG. 2 .
- FIG. 5 is a cross-sectional side view schematically illustrating a printed circuit board according to another embodiment of the present disclosure
- FIG. 6 is a cross-sectional view taken along line II-II' of FIG. 2 .
- Coupled to may not only indicate that elements are directly and physically in contact with each other, but also include the configuration in which another element is interposed between the elements such that the elements are also in contact with the other component.
- an X direction refers to a first direction
- a W direction refers to a second direction
- a T direction refers to a third direction.
- FIG. 1 is a side cross-sectional view schematically illustrating a printed circuit board according to an embodiment of the present disclosure.
- FIG. 2 is a view schematically illustrating portion A of FIG. 1 , as viewed in a downward direction.
- FIG. 3 is a cross-sectional view taken along line I-I′ of FIG. 2 .
- FIG. 4 is a view schematically illustrating a modification of portion A of FIG. 1 , corresponding to FIG. 2 .
- a printed circuit board 1000 may include an internal insulating layer 100 , an internal conductive pattern layer 210 or 220 , an external insulating layer 310 , 320 , 330 , 340 , 350 , or 360 , and an accommodation groove C, and may further include an external conductive pattern layer 410 , 420 , 430 , 440 , 450 , or 460 , a protective layer SR, and a coverlay CL.
- the internal insulating layer 100 may include a flexible region F and a rigid region R.
- the internal insulating layer 100 may be continuously formed in the flexible region F and the rigid region R.
- the internal insulating layer 100 may be integrally formed in the flexible region F and the rigid region R.
- the printed circuit board 1000 according to the present disclosure may be distinguished from a rigid flexible printed circuit board manufactured by separately preparing a rigid printed circuit board and a flexible printed circuit board and bonding both thereof in a soldering process, or the like.
- the flexible region F and the rigid region R may refer to separate partial regions of the printed circuit board 1000 according to this embodiment. Therefore, the internal insulating layer 100 itself may not have the flexible region F and the rigid region R.
- the internal insulating layer 100 will also be described by using the flexible region F and the rigid region R, which may be partial regions of the printed circuit board 1000 of this embodiment. Therefore, the flexible region F of the internal insulating layer 100 may refer to a portion of the internal insulating layer 100 corresponding to the flexible region F of the printed circuit board 1000 .
- the rigid region R of the internal insulating layer 100 may refer to another portion of the internal insulating layer 100 corresponding to the rigid region R of the printed circuit board 1000 .
- the printed circuit board 1000 according to this embodiment may be a rigid flexible printed circuit board.
- the internal insulating layer 100 may be formed of a polyimide (PI) film, but is not limited thereto.
- PI polyimide
- any flexible electrical insulating material maybe used as the internal insulating layer 100 applied to this embodiment without limitation.
- the internal insulating layer 100 may be formed using a flexible copper clad laminate (FCCL) having a metal film such as a copper film attached to at least one surface of the flexible insulating film, but is not limited thereto.
- FCCL flexible copper clad laminate
- the internal conductive pattern layer 210 or 220 may be disposed on the internal insulating layer 100 , and may include a line portion 211 and a bonding pad portion 212 .
- the first and second internal conductive pattern layers 210 and 220 may be formed on both surfaces of the internal insulating layer 100 opposing or facing each other.
- Each of the first and second internal conductive pattern layers 210 and 220 may be formed in the flexible region F and the rigid region R of the internal insulating layer 100 , but are not limited thereto.
- a via passing through the internal insulating layer 100 may be formed in the internal insulating layer 100 to connect the internal conductive pattern layers 210 and 220 .
- the via may be formed by forming a via hole in the internal insulating layer 100 , and forming a conductive layer along an internal wall of the via hole, or filling a conductive material in the via hole.
- the first internal conductive pattern layer 210 may include the line portion 211 , and the bonding pad portion 212 connected to the line portion 211 and exposed to the accommodation groove C, which will be described later.
- the internal conductive pattern layers 210 and 220 may be formed by a method of forming a conductive pattern, such as a subtractive process, an additive process (AP), a semi-additive process, a modified semi-additive process (MSAP), or the like.
- a subtractive process such as an additive process (AP), a semi-additive process, a modified semi-additive process (MSAP), or the like.
- AP additive process
- MSAP modified semi-additive process
- the bonding pad portion 212 when the bonding pad portion 212 is formed by the subtractive process, the bonding pad portion 212 may be formed to have an area of a lower portion larger than an area of an upper portion.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be disposed on the internal insulating layer 100 and the internal conductive pattern layers 210 and 220 .
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be disposed only in the rigid region R of the internal insulating layer 100 .
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be have openings formed therein corresponding to the flexible region F.
- the printed circuit board 1000 may have rigidity in the rigid region R, and may have flexibility in the flexible region F.
- the plurality of external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be formed on both surfaces of the internal insulating layer 100 .
- a first external insulating layer 310 , a third external insulating layer 330 , and a fifth external insulating layer 350 may be sequentially formed on an upper surface of the internal insulating layer 100 in the Z direction.
- a second external insulating layer 320 , a fourth external insulating layer 340 , and a sixth external insulating layer 360 may be sequentially formed on a lower surface of the internal insulating layer 100 in the Z direction.
- the number of the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 illustrated in FIG. 1 may be merely illustrative, the number of the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 respectively stacked on both surfaces of the internal insulating layer 100 may be variously changed according to design requirements, and the like.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be formed of prepreg (PPG) containing an insulating resin such as an epoxy resin.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be formed of a buildup film such as an Ajinomoto build-up film (ABF) including an insulating resin such as an epoxy resin.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be photosensitive insulating layers including photosensitive electrically insulating resins.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be flexible insulating layers.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may include a reinforcing material contained in the electrically insulating resin.
- the reinforcing material may be at least one of glass cloth, glass fiber, inorganic filler, and organic filler.
- the reinforcing material may reinforce the rigidity of the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 , and may lower a coefficient of thermal expansion thereof.
- the inorganic filler at least one or more selected from a group consisting of silica (SiO 2 ), alumina (Al 2 O 3 ), silicon carbide (SiC), barium sulfate (BaSO 4 ), talc, mud, a mica powder, aluminum hydroxide (Al(OH) 3 ), magnesium hydroxide (Mg(OH) 2 ) calcium carbonate (CaCO 3 ), magnesium carbonate (MgCO 3 ), magnesium oxide (MgO), boron nitride (BN), aluminum borate (AlBO 3 ), barium titanate (BaTiO 3 ), and calcium zirconate (CaZrO 3 ) may be used.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 applied to this embodiment may be formed by appropriately mixing a low-flow type prepreg and a general prepreg.
- any one of the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be formed by sequentially stacking the low-flow type prepreg and the general prepreg.
- the above descriptions are merely illustrative.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may be stacked on the internal insulating layer 100 after processing an insulating material for forming the external insulating layer into a shape corresponding to the rigid region R.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may only be disposed in the rigid region R of the internal insulating layer 100 by stacking an insulating material covering the rigid region R and the flexible region F on the internal insulating layer 100 , and then only removing the insulating material in a region corresponding to the flexible region F.
- the above-described removal process may be performed after formation of every layer of the plurality of external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 as they are sequentially formed, or may be performed by forming all of the plurality of external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 and then collectively removing a region corresponding to the flexible region F among the plurality of external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 .
- the accommodation groove C may pass through the first, third, and fifth external insulating layers 310 , 330 , and 350 to expose the bonding pad portion 212 . Therefore, the bonding pad portion 212 of the first internal conductive pattern layer 210 and one surface of the internal insulating layer 100 may be exposed to the outside by the accommodation groove C.
- the accommodation groove C may also pass through the protective layer SR to be described later.
- the accommodation groove C may be a space in which active electronic components or passive electronic components are arranged and/or mounted, and may be formed in the first, third, and fifth external insulating layers 310 , 330 , and 350 in a size corresponding to sizes of the electronic components to be arranged or mounted.
- the first internal conductive pattern layer 210 may include the line portion 211 and the bonding pad portion 212 .
- the bonding pad portion 212 may include a connection pattern 212 - 1 extending from the line portion 211 of the internal conductive pattern layer 210 embedded in the first external insulating layer 310 , and exposed to the accommodation groove C; a land pattern 212 - 3 disposed closer to a center portion of the accommodation groove C than the connection pattern 212 - 1 ; and a dam pattern 212 - 2 connecting the connection pattern 212 - 1 and the land pattern 212 - 3 , in which a line width (W 2 ) of the dam pattern 212 - 2 is narrower than a line width (W 3 ) of the land pattern 212 - 3 .
- the connection pattern 212 - 1 , the dam pattern 212 - 2 , and the land pattern 212 - 3 may be sequentially disposed in the Y direction.
- the land pattern 212 - 3 of the bonding pad portion 212 may be connected to the electronic component disposed in the accommodation groove C by the thermal compression (TC) bonding process.
- TC thermal compression
- a metal bump of the electronic component and the land pattern 212 - 3 may be connected to each other through a solder.
- a TC bonding pad on a board may be formed in a bar type, and solder flow may occur in a conductive region, other than a land pattern, during a solder reflow process, and when an amount of a solder flowing into the conductive region, other than the land pattern, is high, a phenomenon in which an alignment between the metal bump and the land pattern is distorted may occur.
- the above-described phenomenon may be reduced by making the line width (W 2 ) of the dam pattern 212 - 2 narrower than the line width (W 3 ) of the land pattern 212 - 3 .
- the bonding pad portion 212 may be formed in the form of a bar as a whole, similar to the prior art, but the line width (W 2 ) of the dam pattern 212 - 2 is narrower than the line width (W 3 ) of the land pattern 212 - 3 . Therefore, the solder flow generated from the land pattern 212 - 3 to the dam pattern 212 - 2 may be reduced during the solder reflow process. For example, the solder flow in the Y direction of FIG. 2 may be reduced. As a result, in the solder reflow process, the phenomenon in which the alignment between the metal bump and the land pattern 212 - 3 is distorted may be reduced.
- a variation in line width between the plurality of bonding pad portions 212 may be relatively large.
- a variation in solder flow in each of the bonding pad portions 212 may be relatively large, and may thereby deteriorate reliability for connection between the metal bumps and the plurality of bonding pad portions 212 .
- the above-described phenomenon may be prevented by reducing the variation between solder reflow processes generated for each of the bonding pad portions 212 due to the dam pattern 212 - 2 .
- the line width (W 2 ) of the dam pattern 212 - 2 may be narrower than a line width (W 1 ) of the connection pattern 212 - 1 .
- the connection pattern 212 - 1 may be embedded in the first external insulating layer 310 to extend from the line portion 211 , which is not exposed to the accommodation groove C, to have the same line width as the line portion 211 .
- the line width (W 1 ) of the pattern 212 - 1 may be formed to be wider than the line width (W 2 ) of the dam pattern 212 - 2 , to minimize an increase in resistance during signal transmission, and minimize a decrease in bonding force between the first internal conductive pattern layer 210 and the internal insulating layer 100 .
- an area of a region formed with a relatively narrow line width may be minimized to significantly reduce side effects caused by this.
- a thickness of at least one of the land pattern 212 - 3 and the dam pattern 212 - 2 may be thicker than a thickness of the connection pattern 212 - 1 .
- the land pattern 212 - 3 may be formed to have a thickness thicker than the connection pattern 212 - 1 . Due to the land pattern 212 - 3 having a relatively thick thickness and the metal bump of the electronic component, the amount of solder used for connecting the two during the TC bonding process may be reduced.
- the dam pattern 212 - 2 may also be formed to have a thickness thicker than that of the connection pattern 212 - 1 according to design requirements, and the like.
- the line widths (W 1 , W 2 , and W 3 ) of the connection pattern 212 - 1 , the dam pattern 212 - 2 , and the land pattern 212 - 3 may be 30 ⁇ m, 15 ⁇ m, and 25 ⁇ m, respectively, but the present disclosure is not limited thereto.
- the numerical values mentioned above may be numerical values which do not reflect tolerances in the process, and even when the numerical values mentioned above have numerical values different from the above numerical values, the numerical values recognized as a range corresponding to the tolerances in the process may fall within the scope of the present disclosure.
- the bonding pad portion 212 may be formed, in plural, to be spaced apart from each other in the accommodation groove C.
- the bonding pad portion 212 may include a first bonding pad portion 212 disposed on a left side of the accommodation groove C, and a second bonding pad portion 212 disposed on a right side of the accommodation groove C, with reference to FIG. 2 .
- the first and second bonding pad portions 212 may be spaced apart from each other in the Y-direction of FIG. 2 , and each of the land patterns 212 - 3 may be arranged to face each other.
- each of the first bonding pad portion 212 and the second bonding pad portion 212 may be formed, in plural, to be spaced apart from each other in the X direction, perpendicular to the Y direction.
- FIG. 2 illustrates a total of 10 bonding pad portions 212 , but this is merely illustrative, and the number of bonding pad portions 212 may be changed according to the number of metal bumps of an electronic component.
- the bonding pad portion 212 may further include an auxiliary dam pattern 212 - 4 extending from the land pattern 212 - 3 to the central portion of the accommodation groove C, in which a line width (W 4 ) is narrower than the line width (W 3 ) of the land pattern 212 - 3 .
- the bonding pad portion 212 may have the connection pattern 212 - 1 , the dam pattern 212 - 2 , the land pattern 212 - 3 , and the auxiliary dam pattern 212 - 4 , sequentially arranged in the Y-direction of FIG. 4 .
- the dam pattern 212 - 2 and the auxiliary dam pattern 212 - 4 having the line widths narrower than the land pattern 212 - 3 and are formed on opposing sides (e.g., on one side and the other side) of the land pattern 212 - 3 , the above effect due to the dam pattern 212 - 2 may be improved.
- the line width (W 4 ) of the auxiliary dam pattern 212 - 4 may be substantially the same as the line width (W 2 ) of the dam pattern 212 - 2 , but is not limited thereto.
- the printed circuit board 1000 may further include the external conductive pattern layer 410 , 420 , 430 , 440 , 450 , or 460 disposed on the external insulating layer 310 , 320 , 330 , 340 , 350 , or 360 , and, in addition, may include a via passing through the external insulating layer 310 , 320 , 330 , 340 , 350 , or 360 to connect adjacent external conductive pattern layer 410 , 420 , 430 , 440 , 450 , or 460 to each other.
- Each of the internal conductive pattern layer 210 or 220 , the external conductive pattern layer 410 , 420 , 430 , 440 , 450 , or 460 , and the via may be formed of copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), or the like, having excellent electrical characteristics.
- the internal conductive pattern layer 210 or 220 , the external conductive pattern layer 410 , 420 , 430 , 440 , 450 , or 460 , and the via may each include an electroless copper plating layer as a seed layer.
- Each of the internal conductive pattern layer 210 or 220 , the external conductive pattern layer 410 , 420 , 430 , 440 , 450 , or 460 , and the via may further include a metal film layer, such as a copper film, as another seed layer.
- the printed circuit board 1000 may further include the protective layer SR and the coverlay CL.
- the protective layer SR may protect the external conductive pattern layers 450 and 460 , which are outermost layers formed in the rigid region R.
- the coverlay CL may protect an outermost conductive pattern layer formed in the flexible region F.
- the protective layer SR may be a photosensitive insulating material such as a solder resist or the like, but is not limited thereto.
- the coverlay CL may include a flexible insulating material such as polyimide or the like, but is not limited thereto.
- the outermost conductive pattern layer formed in the flexible region F may correspond to the internal conductive pattern layer 210 or 220 described above.
- the protective layer SR may be formed on the fifth external insulating layer 350 and the sixth external insulating layer 360 to protect the fifth external conductive pattern layer 450 and the sixth external conductive pattern layer 460 , respectively.
- the coverlay CL may be formed on both sides of the internal insulating layer 100 , to protect a portion of the first internal conductive pattern layer 210 formed in the flexible region F and a portion of the second internal conductive pattern layer 220 formed in the flexible region F.
- An opening may be formed in the protective layer SR to expose at least a portion of the outermost conductive pattern layer.
- the coverlay CL is illustrated to be only formed in the flexible region F of the internal insulating layer 100 . Since the coverlay CL above mentioned is only illustrative, the coverlay CL may be disposed on at least a portion of the rigid region R of the internal insulating layer 100 , in a different manner to FIG. 1 . In addition, FIG.
- the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 are rigid insulating layers, but when the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 , as described above, are formed of a flexible insulating film such as a polyimide film, a coverlay, an adhesive layer, or the like, may be additionally disposed between adjacent external insulating layers.
- a flexible insulating film such as a polyimide film, a coverlay, an adhesive layer, or the like
- FIG. 5 is a view schematically illustrating a printed circuit board according to another embodiment of the present disclosure.
- a printed circuit board 2000 according to another embodiment of the present disclosure may be different from the printed circuit board 1000 according to the first embodiment of the present disclosure, in view of the fact that rigid regions R 1 and R 2 of an internal insulating layer may be present.
- an internal insulating layer 100 applied to this embodiment may include a flexible region F, a first rigid region R 1 disposed on one side of the flexible region F, and a second rigid region R 2 disposed on another side of the flexible region F.
- An external insulating layer 310 , 320 , 330 , 340 , 350 , or 360 may be disposed in each of the first and second rigid regions R 1 and R 2 . Since the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may only be disposed in the first and second rigid regions R 1 and R 2 of the internal insulating layer 100 , the flexible region F of the internal insulating layer 100 may be exposed.
- portions of each of the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 disposed in the first rigid region R 1 , and portions of each of the external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 disposed in the second rigid region R 2 may be arranged in a form completely separated from each other, the two portions may be not be physically and/or directly connected to each other.
- the printed circuit board 2000 may be a rigid flexible printed circuit board, divided into the first rigid region R 1 , the flexible region F, and the second rigid region R 3 , as above described.
- the printed circuit board according to the present disclosure has been described that the rigid flexible printed circuit board is divided into the rigid regions R (e.g., R 1 and R 2 ) and the flexible region F, but is merely illustrative.
- the printed circuit board according to another embodiment of the present disclosure may be a rigid printed circuit board formed using a conventional rigid insulating layer.
- the internal insulating layer 100 described above may be a rigid insulating layer such as a prepreg or the like, not a flexible insulating layer such as polyimide or the like.
- the above-described external insulating layers 310 , 320 , 330 , 340 , 350 , and 360 may not only be formed in a portion of the internal insulating layer 100 , but also be formed to cover the entire region of the internal insulating layer 100 .
- the reliability for connection between the printed circuit board and the electronic component may be improved.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (19)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020190165447A KR102815912B1 (en) | 2019-12-12 | 2019-12-12 | Printed circuit board |
| KR10-2019-0165447 | 2019-12-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| US20210185806A1 US20210185806A1 (en) | 2021-06-17 |
| US11076482B2 true US11076482B2 (en) | 2021-07-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US16/849,622 Expired - Fee Related US11076482B2 (en) | 2019-12-12 | 2020-04-15 | Printed circuit board |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US11076482B2 (en) |
| KR (1) | KR102815912B1 (en) |
| CN (1) | CN112996237A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12414230B2 (en) | 2021-10-15 | 2025-09-09 | Samsung Electronics Co., Ltd. | Printed circuit board, fabrication method of the same and electronic device including the same |
| KR20240022056A (en) * | 2022-08-10 | 2024-02-20 | 엘지이노텍 주식회사 | Circuit board and semiconductor package comprising the same |
| KR20240121031A (en) * | 2023-02-01 | 2024-08-08 | 엘지이노텍 주식회사 | Circuit board and semiconductor package comprising the same |
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| JPH08236912A (en) | 1995-02-28 | 1996-09-13 | Sharp Corp | Printed wiring board |
| US5616888A (en) * | 1995-09-29 | 1997-04-01 | Allen-Bradley Company, Inc. | Rigid-flex circuit board having a window for an insulated mounting area |
| US20030141596A1 (en) * | 2000-02-28 | 2003-07-31 | Hidehiro Nakamura | Wiring board, semiconductor device, and method of manufacturing wiring board |
| US20040200638A1 (en) * | 2001-11-13 | 2004-10-14 | Lg Electronic Inc. | Bonding pads for a printed circuit board |
| US20060220242A1 (en) * | 2005-03-30 | 2006-10-05 | Mitsui Mining & Smelting Co., Ltd. | Method for producing flexible printed wiring board, and flexible printed wiring board |
| US20080047135A1 (en) * | 2006-08-28 | 2008-02-28 | Chipstack Inc. | Rigid flex printed circuit board |
| US20090011617A1 (en) * | 2007-07-02 | 2009-01-08 | Nitto Denko Corporation | Connection structure between printed circuit board and electronic component |
| US20100252308A1 (en) * | 2004-12-15 | 2010-10-07 | Ibiden Co., Ltd. | Printed wiring board and manufacturing method thereof |
| US20110075374A1 (en) * | 2009-09-25 | 2011-03-31 | Kang Jung Eun | Rigid-flexible circuit board and method of manufacturing the same |
| US20130020120A1 (en) * | 2011-07-22 | 2013-01-24 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
| US8395054B2 (en) * | 2009-03-12 | 2013-03-12 | Ibiden Co., Ltd. | Substrate for mounting semiconductor element and method for manufacturing substrate for mounting semiconductor element |
| KR20140010778A (en) | 2012-07-17 | 2014-01-27 | 에스케이하이닉스 주식회사 | Printed circuit board and semiconductor package having the same |
| US20150114690A1 (en) * | 2013-10-24 | 2015-04-30 | Ibiden Co., Ltd. | Flex-rigid wiring board and method for manufacturing flex-rigid wiring board |
| US10321560B2 (en) * | 2015-11-12 | 2019-06-11 | Multek Technologies Limited | Dummy core plus plating resist restrict resin process and structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2001068836A (en) * | 1999-08-27 | 2001-03-16 | Mitsubishi Electric Corp | Printed wiring board, semiconductor module, and method of manufacturing semiconductor module |
| JP3565835B1 (en) * | 2003-04-28 | 2004-09-15 | 松下電器産業株式会社 | Wiring board, method of manufacturing the same, semiconductor device and method of manufacturing the same |
| JPWO2009069683A1 (en) * | 2007-11-30 | 2011-04-14 | ソニーケミカル&インフォメーションデバイス株式会社 | Manufacturing method of multilayer printed wiring board |
-
2019
- 2019-12-12 KR KR1020190165447A patent/KR102815912B1/en active Active
-
2020
- 2020-04-15 US US16/849,622 patent/US11076482B2/en not_active Expired - Fee Related
- 2020-07-02 CN CN202010633472.6A patent/CN112996237A/en active Pending
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5206463A (en) * | 1990-07-24 | 1993-04-27 | Miraco, Inc. | Combined rigid and flexible printed circuits and method of manufacture |
| JPH08236912A (en) | 1995-02-28 | 1996-09-13 | Sharp Corp | Printed wiring board |
| US5616888A (en) * | 1995-09-29 | 1997-04-01 | Allen-Bradley Company, Inc. | Rigid-flex circuit board having a window for an insulated mounting area |
| US20030141596A1 (en) * | 2000-02-28 | 2003-07-31 | Hidehiro Nakamura | Wiring board, semiconductor device, and method of manufacturing wiring board |
| US20040200638A1 (en) * | 2001-11-13 | 2004-10-14 | Lg Electronic Inc. | Bonding pads for a printed circuit board |
| US20100252308A1 (en) * | 2004-12-15 | 2010-10-07 | Ibiden Co., Ltd. | Printed wiring board and manufacturing method thereof |
| US20060220242A1 (en) * | 2005-03-30 | 2006-10-05 | Mitsui Mining & Smelting Co., Ltd. | Method for producing flexible printed wiring board, and flexible printed wiring board |
| US20080047135A1 (en) * | 2006-08-28 | 2008-02-28 | Chipstack Inc. | Rigid flex printed circuit board |
| US20090011617A1 (en) * | 2007-07-02 | 2009-01-08 | Nitto Denko Corporation | Connection structure between printed circuit board and electronic component |
| US8395054B2 (en) * | 2009-03-12 | 2013-03-12 | Ibiden Co., Ltd. | Substrate for mounting semiconductor element and method for manufacturing substrate for mounting semiconductor element |
| US20110075374A1 (en) * | 2009-09-25 | 2011-03-31 | Kang Jung Eun | Rigid-flexible circuit board and method of manufacturing the same |
| US20130020120A1 (en) * | 2011-07-22 | 2013-01-24 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
| KR20140010778A (en) | 2012-07-17 | 2014-01-27 | 에스케이하이닉스 주식회사 | Printed circuit board and semiconductor package having the same |
| US20150114690A1 (en) * | 2013-10-24 | 2015-04-30 | Ibiden Co., Ltd. | Flex-rigid wiring board and method for manufacturing flex-rigid wiring board |
| US10321560B2 (en) * | 2015-11-12 | 2019-06-11 | Multek Technologies Limited | Dummy core plus plating resist restrict resin process and structure |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20210074609A (en) | 2021-06-22 |
| CN112996237A (en) | 2021-06-18 |
| KR102815912B1 (en) | 2025-06-04 |
| US20210185806A1 (en) | 2021-06-17 |
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