US10367376B2 - Wireless power transfer system supplying power required by adiabatic circuit - Google Patents

Wireless power transfer system supplying power required by adiabatic circuit Download PDF

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US10367376B2
US10367376B2 US15/263,376 US201615263376A US10367376B2 US 10367376 B2 US10367376 B2 US 10367376B2 US 201615263376 A US201615263376 A US 201615263376A US 10367376 B2 US10367376 B2 US 10367376B2
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circuit
power
alternating current
adiabatic
wireless power
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US20170187241A1 (en
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Chia-Hsiang Yang
Ping-Hsuan Hsieh
Hsin-Tzu Lin
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Winbond Electronics Corp
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Winbond Electronics Corp
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Assigned to WINBOND ELECTRONICS CORP. reassignment WINBOND ELECTRONICS CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HSIEH, PING-HSUAN, LIN, HSIN-TZU, YANG, CHIA-HSIANG
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J50/00Circuit arrangements or systems for wireless supply or distribution of electric power
    • H02J50/10Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
    • H02J50/12Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
    • H02J7/025

Definitions

  • the disclosure relates to a power transfer system; more particularly, the disclosure relates to a wireless power transfer (WPT) system that includes an adiabatic circuit.
  • WPT wireless power transfer
  • a WPT system is capable of generating a magnetic field through an induction coil and transmitting energy without using any conductive wire nor contacting any conductor, and therefore the WPT system is often applied for wireless radio frequency identification and applied in wireless charging apparatuses.
  • the WPT system has a circuit structure with low power consumption; specifically, the time spent on charging or discharging circuit devices is extended through employing alternating current (AC) power rather than the conventional direct current (DC) power, so as to reduce heat consumption and recycle energy stored in a node capacitor in the circuit.
  • AC alternating current
  • DC direct current
  • the WPT system usually includes a complementary metal-oxide semiconductor (CMOS) circuit.
  • CMOS complementary metal-oxide semiconductor
  • the entire system is required to include a current rectifying circuit, a voltage regulating circuit, a voltage boosting circuit, and so on. This will lead to additional power consumption.
  • the disclosure provides a WPT system capable of reducing energy loss.
  • a wireless power transfer system includes a power supply side and a power reception side.
  • the power supply side is configured to provide wireless power.
  • the power reception side is electrically connected to the power supply side.
  • the power reception side is configured to receive the wireless power and convert the wireless power into power of a required type.
  • the power reception side includes an adiabatic circuit operating at AC power.
  • the adiabatic circuit includes a first circuit and a second circuit. When the first circuit operates during one of a working period and a waiting period, the second circuit operates during the other one of the working period and the waiting period.
  • the WPT system provided in an embodiment of the disclosure includes the adiabatic circuit.
  • the power supply side provides the power required by the adiabatic circuit through performing a charging action in a wireless manner, so as to reduce energy loss resulting from power conversion.
  • FIG. 1 is schematic view briefly illustrating a WPT system according to an embodiment of the disclosure.
  • FIG. 2 is schematic view briefly illustrating a WPT system according to another embodiment of the disclosure.
  • FIG. 3 is schematic view briefly illustrating a control circuit according to an embodiment of the disclosure.
  • FIG. 4 is a schematic view illustrating a waveform of AC power according to an embodiment of the disclosure.
  • FIG. 5 , FIG. 6 , and FIG. 7 are schematic views illustrating waveforms of operating voltages at different circuit blocks according to an embodiment of the disclosure.
  • FIG. 8 is a schematic view illustrating an internal circuit of a comparator circuit provided in the embodiment shown in FIG. 3 .
  • FIG. 9 is a schematic view illustrating an internal circuit of a pulse generator circuit provided in the embodiment shown in FIG. 3 .
  • FIG. 10 is schematic view briefly illustrating an energy recycling logic circuit according to an embodiment of the disclosure.
  • FIG. 11 is schematic internal view illustrating an adiabatic circuit according to an embodiment of the disclosure.
  • Couple in the description and claims may refer to any direct or indirect connection.
  • first apparatus if a first apparatus is coupled to a second apparatus, it means that the first apparatus may be directly connected to the second apparatus or may be indirectly connected to the second apparatus through another apparatus or by another connection means.
  • signal may stand for at least one current, voltage, electric charge, temperature, data, electromagnetic wave, or any other signal or signals.
  • FIG. 1 is schematic view briefly illustrating a WPT system according to an embodiment of the disclosure.
  • the wireless power transfer system 100 provided herein includes a power supply side 110 and a power reception side 120 .
  • the power reception side 120 is electrically connected to the power supply side 110 .
  • the power supply side 110 is configured to provide wireless power to the power reception side 120 .
  • the power reception side 120 is configured to receive the wireless power and convert the wireless power into power of a required type.
  • the power of the required type includes at least one of AC power and DC power, for instance.
  • the WPT system 100 provided in the present embodiment generates a magnetic field through an induction coil and transmits power without using any conductive wire nor contacting any conductor, and therefore the WPT system 100 can be applied for wireless radio frequency identification and applied in wireless charging apparatuses, e.g., a sensing chargeable mobile phone, an implanted medical apparatus, and so on.
  • wireless charging apparatuses e.g., a sensing chargeable mobile phone, an implanted medical apparatus, and so on.
  • the power supply side 110 includes a power amplifier circuit 112 .
  • the power reception side 120 includes an adiabatic circuit 122 , a non-adiabatic circuit 124 , and a power conversion circuit 126 .
  • an input signal Vin received by the power amplifier circuit 112 is a radio frequency (RF) signal, for instance, which should however not be construed as a limitation to the disclosure.
  • RF radio frequency
  • a resistor Rs is an inner resistor of the power amplifier circuit 112
  • a transmission frequency of the power amplifier circuit 112 is a resonance frequency of a capacitor C 1 and an inductor L 1 . Inductance loss generated by the inductor L 1 is less than the loss of the resistor Rs in the power amplifier circuit 112 .
  • k is a coupling coefficient of the inductor L 1 and the inductor L 2 .
  • the value of k is affected by the distance between the two inductors L 1 and L 2 and the type of media.
  • the inductor L 2 of the power conversion circuit 126 serves as an induction coil for receiving wireless power provided by the power supply side 110 and converting the wireless power into power of a different type, and the converted power is transmitted to the adiabatic circuit 122 and the non-adiabatic circuit 124 .
  • the adiabatic circuit 122 operates at the AC power, for instance.
  • the adiabatic circuit 122 provided herein has a circuit structure with low power consumption; specifically, the time spent on charging or discharging circuit devices is extended through employing the AC power rather than the DC power, so as to reduce heat consumption and recycle energy stored in a node capacitor in the circuit.
  • the adiabatic circuit 122 is characterized by low energy consumption and slow operating speed.
  • the non-adiabatic circuit 124 converts the AC power into the DC power and operates at the DC power.
  • the non-adiabatic circuit 124 includes a rectifier circuit for converting the AC power into the DC power, for instance, such that the non-adiabatic circuit 124 operates at the DC power.
  • the method of converting the AC power into the DC power through the rectifier circuit can be derived from the art in the pertinent field and thus will not be elaborated hereinafter.
  • the adiabatic circuit 122 and the non-adiabatic circuit 124 act as the load circuits on the power reception side and can be represented by one set of capacitor and resistor connected in parallel, and the capacitance of the capacitor can be designed to resonate with the inductor L 2 at a frequency identical to the frequency of the input signal Vin.
  • the WPT system 100 provided herein is applied in an implanted medical apparatus, for instance, and this should by no means restrict the scope of protection provided in the disclosure.
  • the circuit e.g., the adiabatic circuit 122
  • the inductor L 2 is arranged in the implanted apparatus.
  • the power supply side 110 is arranged outside the human body, and the power required for operating the implanted apparatus is supplied through skin in a wireless transmission manner.
  • the wireless power provided by the power supply side 110 is categorized into the AC power and the DC power by the power reception side 120 .
  • the AC power generated by the inductor L 2 is rectified by the non-adiabatic circuit 124 to obtain the DC power, and the DC power is supplied to a memory circuit in the non-adiabatic circuit 124 , a latch circuit in the adiabatic circuit 122 , and so forth.
  • the AC power is supplied to the adiabatic circuit 122 and acts as the voltage of the specific type required for operation.
  • the AC power includes two sinusoidal clock voltage sources with opposite phases, for instance, and this should by no means restrict the scope of protection provided in the disclosure.
  • the WPT system 100 includes the adiabatic circuit 122 , and the power required by the adiabatic circuit 122 is directly supplied by the power supply side 110 in a wireless charging manner.
  • the power supply side 110 directly supplies the power required for operating the adiabatic circuit 122 , so as to reduce the energy loss caused by converting the AC power into the DC power.
  • the adiabatic circuit 122 is suitable for being applied in an implanted biomedical chip, for instance.
  • the power conversion circuit 126 is coupled to the adiabatic circuit 122 through a switching circuit, for instance. Through controlling the time period during which the switching circuit is switched on, the power reception side 120 allows the adiabatic circuit 122 to receive the voltage of the required type.
  • FIG. 2 is schematic view briefly illustrating a WPT system according to another embodiment of the disclosure.
  • the WPT system 200 provided in the present embodiment is similar to the WPT system 100 depicted in FIG. 1 , whereas one of the differences lies in that the power reception side 220 provided herein further includes a switching circuit 228 .
  • the switching circuit 228 is coupled between the power conversion circuit 226 and the adiabatic circuit 222 for selectively transmitting the AC power provided by the power conversion circuit 226 to a first circuit 221 or a second circuit 223 according to a first control signal Ctrl 1 and a second control signal Ctrl 2 .
  • the switching circuit 228 transfers the AC power to the first circuit 221 , the switching circuit 228 does not transfer the AC power to the second circuit 223 .
  • the switching circuit 228 transfers the AC power to the second circuit 223 .
  • the switching circuit 228 does not transfer the AC power to the first circuit 221 .
  • the switching circuit 228 includes a plurality of first switches 229 _ 1 and a plurality of second switches 229 _ 2 .
  • the first switches 229 _ 1 are coupled between the power conversion circuit 226 and the first circuit 221 and are controlled by the first control signal Ctrl 1 .
  • the first switches 229 _ 1 are configured to transfer the AC power to the first circuit 221 according to the first control signal Ctrl 1 .
  • the second switches 229 _ 2 are coupled between the power conversion circuit 226 and the second circuit 223 and are controlled by the second control signal Ctrl 2 .
  • the second switches 229 _ 2 are configured to transfer the AC power to the second circuit 223 according to the second control signal Ctrl 2 .
  • the first switches 229 _ 1 and the second switches 229 _ 2 are implemented in form of transmission gates, for instance, which should however not be construed as a limitation to the disclosure. Said implementation can be derived from the art in the pertinent field and thus will not be elaborated hereinafter.
  • the first switches 229 _ 1 and the second switches 229 _ 2 implemented in form of the transmission gates consume power in two different ways, i.e., power loss (first consumed power) due to the on-resistance of transistors in the transmission gates and power (second consumed power) consumed by gate capacitance of the transistors while the transmission gates are turned on or turned off.
  • first consumed power due to the on-resistance of transistors in the transmission gates
  • second consumed power consumed by gate capacitance of the transistors while the transmission gates are turned on or turned off.
  • the larger the devices in the transmission gates the smaller the conductive resistance (the smaller the first consumed power), and the larger the gate capacitance (the larger the second consumed power).
  • the total power consumed by the transmission gates has the minimum value.
  • the conductive resistances of the p-type metal-oxide semiconductor (pMOS) transistor and the n-type metal-oxide semiconductor (nMOS) have different values according to the present embodiment.
  • the operating voltage of the pMOS transistor is 0.5V to 1V.
  • the conductive resistance of the pMOS is increased.
  • the channel width of the nMOS is expanded, the conductive resistance of the pMOS is reduced when the pMOS operates at 0.5V, such that the level of variations in the conductive resistance within the entire operating voltage range is reduced.
  • the operating voltage of the nMOS transistor in the transmission gates is 0V to 0.5V.
  • the conductive resistance of the nMOS is reduced when the nMOS operates at 0.5V, such that the level of variations in the conductive resistance of different transistors within the entire operating voltage range is reduced.
  • the first switches 229 _ 1 and the second switches 229 _ 2 are implemented in form of the transmission gates, the proportion of the dimensions of the transistors in the transmission gates can be adjusted according to actual design requirements, which should not be construed as a limitation to the disclosure.
  • the switching circuit 228 selectively transmits the AC power provided by the power conversion circuit 226 to the first circuit 221 or the second circuit 223 according to the first control signal Ctrl 1 and the second control signal Ctrl 2 .
  • the power conversion circuit 226 provided herein transmits the AC power to the switching circuit 228 and the non-adiabatic circuit 224 through nodes N 1 and N 2 , respectively, for instance.
  • the non-adiabatic circuit 224 includes a rectifier circuit 225 and a memory circuit 227 , for instance, and this should by no means restrict the scope of protection provided in the disclosure.
  • the rectifier circuit 225 is configured to convert the AC power into the DC power and provide the DC power to the memory circuit 227 .
  • the memory circuit 227 operates at 0V and 1V, as exemplarily shown in FIG. 7 .
  • the WPT system 200 further includes a control circuit for generating the first control signal Ctrl 1 and the second control signal Ctrl 2 , for instance, so as to turn on or turn off the first switches 229 _ 1 and the second switches 229 _ 2 .
  • FIG. 3 is schematic view briefly illustrating a control circuit according to an embodiment of the disclosure.
  • FIG. 4 is a schematic view illustrating a waveform of AC power according to an embodiment of the disclosure.
  • FIG. 5 , FIG. 6 , and FIG. 7 are schematic views illustrating waveforms of operating voltages at different circuit blocks according to an embodiment of the disclosure.
  • the power conversion circuit 226 provided herein transmits the AC power to the switching circuit 228 and the non-adiabatic circuit 224 through the nodes N 1 and N 2 , respectively, for instance.
  • the signal waveform of the AC power at the nodes N 1 and N 2 is shown in FIG. 4 .
  • the AC power includes a first AC signal Va and a second AC signal Vb that are transmitted to the switching circuit 228 , the non-adiabatic circuit 224 , and the control circuit 300 through the nodes N 1 and N 2 , respectively.
  • the control circuit 300 is configured to compare a voltage of the first AC signal Va and a voltage of the second AC signal Vb, so as to generate the first control signal Ctrl 1 and the second control signal Ctrl 2 . If the voltage of the first AC signal Va is larger than the voltage of the second AC signal Vb, the control circuit 300 outputs the first control signal Ctrl 1 at logic 1 to turn on the first switches 229 _ 1 of the switching circuit 228 , for instance, such that the first switches 229 _ 1 transfer the AC power to the first circuit 221 according to the first control signal Ctrl 1 .
  • the control circuit 300 determines the time at which the first switches 229 _ 1 and the second switches 229 _ 2 are turned on or turned off according to the value of the voltage of the first AC signal Va and the value of the voltage of the second AC signal Vb.
  • the first circuit 221 , the second circuit 223 , and the memory circuit 227 provided herein respectively operate at the voltages with the waveform shown in FIG. 5 to FIG. 7 , for instance.
  • the first circuit 221 operates at the AC power with the waveforms VDD 1 and VSS 1 (half-circle sinusoidal waves) is given (as shown in FIG. 5 ), for instance.
  • the second circuit 223 operates at the AC power with the waveforms VDD 2 and VSS 2 (half-circle sinusoidal waves) is given (as shown in FIG. 6 ), for instance.
  • the memory circuit 227 operates at the DC power with the waveforms VDD 3 and VSS 3 is given (as shown in FIG. 7 ), for instance.
  • the voltage levels 0V, 0.5V, and 1V are merely exemplary and should not be construed as limitations to the disclosure.
  • FIG. 8 is a schematic view illustrating an internal circuit of a comparator circuit provided in the embodiment shown in FIG. 3 .
  • FIG. 9 is a schematic view illustrating an internal circuit of a pulse generator circuit provided in the embodiment shown in FIG. 3 .
  • FIG. 8 schematically illustrates the internal circuit of the comparator circuit 312 , for instance.
  • the internal circuit of the comparator circuit 314 can be deduced from and can be the same as or different from the internal circuit of the comparator circuit 312 .
  • FIG. 9 schematically illustrates the internal circuit of the pulse generator circuit 322 , for instance.
  • the internal circuit of the pulse generator circuit 324 can be deduced from and can be the same as or different from the internal circuit of the pulse generator circuit 322 .
  • the output signal Vout of the comparator circuit 312 is charged to reach the voltage VDD. If the voltage of the first AC signal Va is smaller than the voltage of the second AC signal Vb, the output signal Vout varies together with the waveform of the first AC signal Va (i.e., 0V-0.5V half-circle sinusoidal wave). After the output by the inverter 342 , significant delay may occur in the event of logic 1. The operation of the comparator circuit 314 can be deduced from the above and thus will not be further described.
  • the control circuit 300 further includes pulse generator circuits 322 and 324 as well as an S-R latch circuit 330 to detect falling edges of output signals of the inverters 342 and 344 ; thereby, balanced and accurate first control signal Ctrl 1 and second control signal Ctrl 2 can be obtained.
  • the delay circuit 321 of the pulse generator circuit 322 provided in the present embodiment includes an odd number of delay cells, for instance. According to the present embodiment, the method of operating the comparator circuits 312 and 314 , the pulse generator circuits 322 and 324 , and the S-R latch circuit 330 can be derived from the art in the pertinent field and thus will not be elaborated hereinafter.
  • the control circuit 300 if the voltage of the first AC signal Va is larger than the voltage of the second AC signal Vb, the control circuit 300 outputs the first control signal Ctrl 1 at logic 1 to turn on the first switches 221 _ 1 connected to the first circuit 221 and turn off the second switches 229 _ 2 connected to the second circuit 223 , for instance.
  • the control circuit 300 if the voltage of the first AC signal Va is smaller than the voltage of the second AC signal Vb, the control circuit 300 outputs the first control signal Ctrl 1 at logic 0 to turn off the first switches 221 _ 1 connected to the first circuit 221 and turn on the second switches 229 _ 2 connected to the second circuit 223 , for instance.
  • the first circuit 221 receives a half-circle sinusoidal wave VDD 1 at 0.5V-1V and a half-circle sinusoidal wave VSS 1 at 0V-0.5V
  • the second circuit 223 receives a half-circle sinusoidal wave VDD 2 at 0.5V-1V and a half-circle sinusoidal wave VSS 2 at 0V-0.5V.
  • each of the first circuit 221 and the second circuit 223 respectively includes an energy recycling logic circuit.
  • FIG. 10 is schematic view briefly illustrating an energy recycling logic circuit according to an embodiment of the disclosure. Specifically, FIG. 10 is schematic view briefly illustrating the energy recycling logic circuit 400 of the first circuit 221 , for instance. The internal structure of the energy recycling logic circuit of the second circuit 223 can be deduced from that of the energy recycling logic circuit 400 of the first circuit 221 . With reference to FIG. 2 , FIG. 5 , FIG. 6 , and FIG.
  • the energy recycling logic circuit 400 operates at the AC power VDD 1 and the AC power VSS 1 , and the energy recycling logic circuit 400 is configured to receive an input signal Vin 1 and generate an output signal Vout 1 according to the AC power VDD 1 and the AC power VSS 1 .
  • the energy recycling logic circuit 400 of the first circuit 221 operates during the working period T 1
  • the energy recycling logic circuit of the second circuit 223 operates during the waiting period T 2 .
  • the energy recycling logic circuit 400 of the first circuit 221 operates during the waiting period T 2
  • the energy recycling logic circuit of the second circuit 223 operates during the working period T 1 .
  • the working period T 1 includes an evaluation stage T 11 and a recycling stage T 12
  • the waiting period T 2 includes a first waiting stage T 21 and a second waiting stage T 22 .
  • the control circuit 300 controls the manner in which the switching circuit 228 transmits signals.
  • the first circuit 221 or the second circuit 223 receives the AC power
  • the first circuit 221 or the second circuit 223 operates during the working period T 1 .
  • the first circuit 221 or the second circuit 223 does not receive the AC power
  • the first circuit 221 or the second circuit 223 operates during the waiting period T 2 .
  • FIG. 11 is schematic internal view illustrating an adiabatic circuit according to an embodiment of the disclosure.
  • the first circuit 521 and the second circuit 523 are serially coupled to each other and alternately arranged.
  • a latch circuit 525 is further arranged between the first circuit 521 and the second circuit 523 .
  • the first circuit 521 operates at the AC power VDD 1 and the AC power VSS 1
  • the second circuit 523 operates at the AC power VDD 2 and the AC power VSS 2 .
  • each of the working period T 1 and the waiting period T 2 of the adiabatic circuit 522 accounts for half the cycle; hence, each circuit block in the pipelining structure is categorized into different blocks in the first and second circuits 521 and 523 that are alternately arranged.
  • the first circuit 521 works in the working period T 1
  • the second circuit 523 waits in the waiting period T 2 .
  • the first circuit 521 waits in the waiting period T 2 .
  • the wireless transmission technology is applied by the WPT system provided herein to operate the adiabatic circuit.
  • the adiabatic circuit characterized by low power consumption is suitable for being applied to the implanted biomedical apparatus and circuit, and the adiabatic circuit operates in a manner different from that of the conventional COMS circuit.
  • the WPT system requires the power transmitted through wireless transmission, which is also adapted to the operation of the adiabatic circuit.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
US15/263,376 2015-12-28 2016-09-13 Wireless power transfer system supplying power required by adiabatic circuit Active 2037-05-07 US10367376B2 (en)

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CN201510999018.1A CN106921216B (zh) 2015-12-28 2015-12-28 供应绝热电路操作的无线电力传输系统

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CN106921216B (zh) 2021-07-06
CN106921216A (zh) 2017-07-04

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