UA89909U - Current reflector - Google Patents

Current reflector

Info

Publication number
UA89909U
UA89909U UAU201306896U UAU201306896U UA89909U UA 89909 U UA89909 U UA 89909U UA U201306896 U UAU201306896 U UA U201306896U UA U201306896 U UAU201306896 U UA U201306896U UA 89909 U UA89909 U UA 89909U
Authority
UA
Ukraine
Prior art keywords
transistor
transistors
collector
united
bus
Prior art date
Application number
UAU201306896U
Other languages
Russian (ru)
Inventor
Алексей Дмитриевич Азаров
Сергей Витальевич Богомолов
Сергей Игоревич Павлович
Original Assignee
Винницкий Национальный Технический Университет
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Винницкий Национальный Технический Университет filed Critical Винницкий Национальный Технический Университет
Priority to UAU201306896U priority Critical patent/UA89909U/en
Publication of UA89909U publication Critical patent/UA89909U/en

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Abstract

A current reflector comprises three transistors, input and output buses, a zero bus, the input bus is connected to the collector of first transistor, the emitters of first and second transistors are united and connected to the zero bus, the bases of first and second transistors are united and connected to the collector of second transistor, as well as to the emitter of third transistor, the collector of third transistor is connected to the output bus; moreover, three transistors, two current sources and a voltage source are introduced. The input bus is connected to the united bases of fourth and sixth transistors, as well as to the united bases of fourth transistors and first current source, the emitters of fourth and sixth transistors are united and connected to the emitter of fifth transistor, the base of fifth transistor is connected to the united collectors of first transistor and second current source, the base of sixth transistor is connected to the emitter of third transistor, the collector of sixth transistor is connected to the output bus, the base of third transistor is connected to the voltage source, the collector of third transistor is connected to the collector of second transistor, the base of second transistor is connected to the base of first transistor; the first output of first current source and terminal of second current source are connected to the zero bus.
UAU201306896U 2013-06-01 2013-06-01 Current reflector UA89909U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
UAU201306896U UA89909U (en) 2013-06-01 2013-06-01 Current reflector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
UAU201306896U UA89909U (en) 2013-06-01 2013-06-01 Current reflector

Publications (1)

Publication Number Publication Date
UA89909U true UA89909U (en) 2014-05-12

Family

ID=52281270

Family Applications (1)

Application Number Title Priority Date Filing Date
UAU201306896U UA89909U (en) 2013-06-01 2013-06-01 Current reflector

Country Status (1)

Country Link
UA (1) UA89909U (en)

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