TWM465683U - Planar connector - Google Patents

Planar connector Download PDF

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Publication number
TWM465683U
TWM465683U TW102210913U TW102210913U TWM465683U TW M465683 U TWM465683 U TW M465683U TW 102210913 U TW102210913 U TW 102210913U TW 102210913 U TW102210913 U TW 102210913U TW M465683 U TWM465683 U TW M465683U
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Taiwan
Prior art keywords
substrate
flat
flat connector
conductive
hole
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TW102210913U
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Chinese (zh)
Inventor
Shinichi Hashimoto
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Tyco Electronics Japan G K
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Publication of TWM465683U publication Critical patent/TWM465683U/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/114Pad being close to via, but not surrounding the via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09445Pads for connections not located at the edge of the PCB, e.g. for flexible circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Connector Housings Or Holding Contact Members (AREA)

Abstract

Provided is a planar connector, which is to be used for the purpose of electrically connecting to each other the inner side and the outer side of an air-tight chamber partitioned by means of a partitioning wall, and which closes an opening formed in the partitioning wall to penetrate the air-tight chamber from the inside to the outside thereof, said planar connector being capable of effectively suppressing transmissivity of a gas, with which the inside of the air-tight chamber is filled, and reliably electrically connecting between the inner surface and the outer surface of a substrate. A planar connector (1) is provided with a planar substrate (10A) that closes an opening (41) in the partitioning wall (40). The substrate (10A) is provided with a conductor layer (11), that covers the inner surface (10a) of the substrate (10A), said inner surface being positioned to face the inner side of the air-tight chamber (C) and/or the outer surface (10b) of the substrate (10A), said outer surface being on the side reverse to the inner surface (10a).

Description

平板狀連接器Flat connector

本創作係關於一種用於電性相互連接以隔壁劃分之氣密室的內側及外側,以堵塞形成於隔壁而貫穿氣密室內部與外部之開口部的平板狀連接器。The present invention relates to a flat connector that is used to electrically connect the inside and the outside of an airtight chamber partitioned by a partition wall to block an opening formed in the partition wall and penetrate the inside of the airtight chamber and the outside.

先前即有要求電性相互連接以隔壁劃分之氣密室的內側及外側。例如在搭載積體電路之半導體晶片處理中,使用可將內部減壓至接近真空狀態的真空室,進行電性連接該真空室之內部及外部。此外,也以分子量少之氣體,例如氦氣或氫氣充滿以隔壁劃分之氣密室內部來進行減壓。電性連接此種壓力調整後之氣密室內部與外部時,須保持處理室內部之氣密性,同時還要求處理室內部與外部之確實電性連接性。Previously, there was an inner side and an outer side of an airtight chamber which were required to be electrically connected to each other by a partition wall. For example, in the semiconductor wafer processing in which the integrated circuit is mounted, a vacuum chamber that can be internally decompressed to a near vacuum state is used, and the inside and the outside of the vacuum chamber are electrically connected. Further, the inside of the airtight compartment partitioned by the partition wall is filled with a gas having a small molecular weight, for example, helium gas or hydrogen gas, to perform pressure reduction. When the pressure-controlled interior of the airtight chamber and the outside are electrically connected, the airtightness inside the processing chamber must be maintained, and the electrical connection between the interior of the chamber and the outside is required.

先前此種電性連接構造,已知例如第十一圖所示者(參照專利文獻1)。第十一圖係先前例之電性相互連接以隔壁劃分之壓力調整後的氣密室內側及外側之電性連接構造的模式圖。The electrical connection structure of the prior art is known, for example, as shown in the eleventh drawing (see Patent Document 1). The eleventh diagram is a schematic view showing the electrical connection structure of the airtight indoor side and the outer side of the pressure-adjusted pressure division of the prior art.

第十一圖所示之電性連接構造,係電性相互連接以隔壁(無圖示)劃分,調整內部壓力之處理室(無圖示)的內部A側及外部B側者。The electrical connection structure shown in FIG. 11 is electrically connected to each other by a partition wall (not shown), and the inner side A and the outer side B of the processing chamber (not shown) for adjusting the internal pressure.

該電性連接構造中,在隔壁形成有貫穿處理室內部A側與外部B側之開口部(無圖示)。而後,該開口部藉由平板狀連接器110堵塞。In the electrical connection structure, an opening (not shown) penetrating the inside of the processing chamber A side and the outside B side is formed in the partition wall. Then, the opening is blocked by the flat connector 110.

此處,在平板狀連接器110之基材中設有在內部填充了導體之複數個通孔(via hole)112。此外,在平板狀連接器110之內表面及外表面,設有藉由通孔112之導體而相互連接的1對導電焊墊113a,113b。Here, a plurality of via holes 112 filled with a conductor inside are provided in the base material of the flat connector 110. Further, on the inner surface and the outer surface of the flat connector 110, a pair of conductive pads 113a, 113b which are connected to each other by the conductor of the through hole 112 are provided.

而後,對平板狀連接器110在內側配置複數個第一連接器120A,並且對平板狀連接器110在外側配置有複數個第二連接器120B。Then, a plurality of first connectors 120A are disposed inside the flat connector 110, and a plurality of second connectors 120B are disposed outside the flat connector 110.

各第一連接器120A延伸於對平板狀連接器110正交之方向而配置,並沿著平板狀連接器110之長度方向(第十一圖中之上下方向)配置有複數個該第一連接器120A。此外,各第二連接器120B延伸於對平板狀連接器110正交之方向而配置,並與第一連接器120A相對地沿著平板狀連接器110之長度方向配置複數個該第二連接器120B。Each of the first connectors 120A is disposed to extend in a direction orthogonal to the flat connector 110, and a plurality of the first connections are disposed along a longitudinal direction of the flat connector 110 (upward and downward directions in the eleventh diagram) 120A. Further, each of the second connectors 120B extends in a direction orthogonal to the flat connector 110, and a plurality of the second connectors are disposed along the longitudinal direction of the flat connector 110 opposite to the first connector 120A. 120B.

此處,各第一連接器120A具備沿著對平板狀連接器110正交之方向而配置的第二基板121、及沿著第二基板121之寬度方向(第十一圖中對紙面正交之方向)以指定間距排列的複數個接點123。在第二基板121之表面(第十一圖中之上面),沿著第二基板121之寬度方向以指定間距設有複數個導電圖案124。各接點123連接於各導電圖案124之一端側。此外,在各導電圖案124之另一端側連接有信號線122。此外,各第二連接器120B具有與各第一連接器120A同樣之構成。Here, each of the first connectors 120A includes a second substrate 121 disposed along a direction orthogonal to the flat connector 110, and a width direction along the second substrate 121 (orthogonal to the paper surface in the eleventh drawing) The direction) a plurality of contacts 123 arranged at a specified pitch. On the surface of the second substrate 121 (upper in the eleventh drawing), a plurality of conductive patterns 124 are provided at a predetermined pitch along the width direction of the second substrate 121. Each of the contacts 123 is connected to one end side of each of the conductive patterns 124. Further, a signal line 122 is connected to the other end side of each of the conductive patterns 124. Further, each of the second connectors 120B has the same configuration as each of the first connectors 120A.

具有如此構成之電性連接構造101中,使第一連接器120A在第十一圖中箭頭F方向前進,而使接點123與設於平板狀連接器110內表面之導電焊墊113a接觸。另外,使第二連接器120B在第十一圖中箭頭F'方向前進,使接點123與設於平板狀連接器110外表面之導電焊墊113b接觸。藉此,處理室內部A側及外部B側之信號線122、122係經由處理室內部A側之導電 圖案124、接點123、平板狀連接器110內表面之導電焊墊113a、通孔112、平板狀連接器110外表面之導電焊墊113b、接點123、處理室外部B側之導電圖案124而電性連接者。In the electrical connection structure 101 having such a configuration, the first connector 120A is advanced in the direction of the arrow F in the eleventh diagram, and the contact 123 is brought into contact with the conductive pad 113a provided on the inner surface of the flat connector 110. Further, the second connector 120B is advanced in the direction of the arrow F' in the eleventh diagram, and the contact 123 is brought into contact with the conductive pad 113b provided on the outer surface of the flat connector 110. Thereby, the signal lines 122 and 122 on the inside of the chamber A side and the outside B side are electrically conducted via the processing chamber A side. The pattern 124, the contact 123, the conductive pad 113a on the inner surface of the flat connector 110, the through hole 112, the conductive pad 113b on the outer surface of the flat connector 110, the contact 123, and the conductive pattern 124 on the side B of the processing chamber B And the electrical connector.

另外,先前之多層印刷線路基板,已知例如第十二圖所示者(參照專利文獻2)。第十二圖係先前多層印刷線路基板之剖面圖。Further, the conventional multilayer printed wiring board is known, for example, as shown in Fig. 12 (see Patent Document 2). Figure 12 is a cross-sectional view of a prior multilayer printed wiring substrate.

第十二圖所示之多層印刷線路基板201藉由成為電源線或地線之面狀的銅箔圖案層203夾著高介電常數基板202之兩面。在銅箔圖案層203之外側形成絕緣層204,進一步在絕緣層204之外側形成有銅箔等之信號線205。The multilayer printed wiring board 201 shown in Fig. 12 is sandwiched between both surfaces of the high dielectric constant substrate 202 by a copper foil pattern layer 203 which is a surface of a power supply line or a ground line. An insulating layer 204 is formed on the outer side of the copper foil pattern layer 203, and a signal line 205 such as copper foil is further formed on the outer side of the insulating layer 204.

【先前技術文獻】[Previous Technical Literature]

【專利文獻】[Patent Literature]

[專利文獻1]日本特開2004-349073號公報[Patent Document 1] Japanese Patent Laid-Open Publication No. 2004-349073

[專利文獻2]日本實開平7-10979號公報[Patent Document 2] Japanese Unexamined Patent Publication No. Hei 7-10979

但是,該第十一圖所示之先前的電性連接構造101及第十二圖所示之先前的多層印刷線路基板201有以下的問題。However, the previous electrical connection structure 101 shown in the eleventh diagram and the previous multilayer printed wiring board 201 shown in the twelfth figure have the following problems.

亦即,第十一圖所示之電性連接構造101的情況,堵塞貫穿處理室內部A側與外部B側之開口部的平板狀連接器110之基材的露出面積大。換言之,在平板狀連接器110之基材的處理室內部A側面與外部B側面,沒有導電焊墊113a,113b而露出之部分的面積大。因而,無法有效抑制充滿於處理室內部A內之氣體透過外部B側的氣體透過率。In other words, in the case of the electrical connection structure 101 shown in FIG. 11, the exposed area of the base material of the flat connector 110 that blocks the opening inside the processing chamber A side and the outer B side is large. In other words, in the side surface of the processing chamber A of the base material of the flat connector 110 and the side surface of the external B, the area where the conductive pads 113a and 113b are not exposed is large. Therefore, the gas permeability of the gas filled in the inside of the processing chamber A through the external B side cannot be effectively suppressed.

另外,第十二圖所示之多層印刷線路基板201的情況下,以堵塞形成於隔壁之開口部的目的而使用時,亦可藉由面狀之銅箔圖案層203抑制氣體透過率。但是,由於未形成貫穿高介電常數基板202之兩面間的穿孔(through hole),因此無法電性連接高介電常數基板202之兩面間。若形成貫穿高介電常數基板202兩面間之穿孔時,則氣體會透過其穿孔而無法抑制氣體透過率。Further, in the case of the multilayer printed wiring board 201 shown in FIG. 12, when it is used for the purpose of blocking the opening formed in the partition wall, the gas permeability can be suppressed by the planar copper foil pattern layer 203. However, since the through holes penetrating between the both faces of the high dielectric constant substrate 202 are not formed, the two surfaces of the high dielectric constant substrate 202 cannot be electrically connected. When a perforation is formed between both surfaces of the high dielectric constant substrate 202, the gas permeates through the perforations, and the gas permeability cannot be suppressed.

因此,本創作係為了解決此等先前之問題而形成者,其目的為提供一種平板狀連接器,係用於電性相互連接以隔壁劃分之氣密室的內側及外側,以堵塞形成於隔壁而貫穿氣密室內部與外部之開口部,可有效抑制充滿於氣密室內部之氣體的氣體透過率,並且可電性確實連接基板之內表面及外表面間。Therefore, the present invention has been made to solve the above problems, and an object thereof is to provide a flat connector for electrically interconnecting the inner side and the outer side of an airtight chamber partitioned by a partition wall to block the formation on the partition wall. The gas passage rate of the gas filled inside the airtight chamber can be effectively suppressed by passing through the opening portion inside the airtight chamber and the outside, and the electrical property can be reliably connected between the inner surface and the outer surface of the substrate.

為了達成上述目的,本創作一種形態之平板狀連接器係用於電性相互連接以隔壁劃分之氣密室的內側及外側,以堵塞形成於前述隔壁而貫穿氣密室內部與外部之開口部,其特徵為:具備平板狀之基板,其係堵塞前述開口部,該基板具備導體層,其係覆蓋位於朝向該基板之前述氣密室內部側的內表面、與前述基板之前述內表面相反側的外表面、及存在於前述內表面與前述外表面之間的前述基板內部,而對前述內表面平行延伸之面中的至少一面。In order to achieve the above object, the flat connector of the present invention is used for electrically interconnecting the inside and the outside of the airtight chamber partitioned by the partition wall to block the opening formed in the partition wall and penetrating the inside of the airtight chamber and the outside. A flat plate-shaped substrate that blocks the opening, the substrate including a conductor layer covering an inner surface facing the inner side of the inner surface of the substrate and an outer surface opposite to the inner surface of the substrate a surface, and at least one of the surfaces of the substrate extending between the inner surface and the outer surface and extending parallel to the inner surface.

此處,所謂「覆蓋」,係指導體層在基板之內表面、基板之外表面、及存在於前述內表面與前述外表面之間的基板內部,而對前述內表面平行延伸之面中的至少一面,至少覆蓋該一面之一部分即可。另外, 導體層在基板之內表面及外表面中的至少一面,宜接近100%覆蓋該一面。Here, the term "covering" refers to guiding the bulk layer on at least the inner surface of the substrate, the outer surface of the substrate, and the inside of the substrate existing between the inner surface and the outer surface, and at least the surface extending parallel to the inner surface. On one side, at least one part of the one side can be covered. In addition, Preferably, the conductor layer covers at least one of the inner surface and the outer surface of the substrate.

此外,該平板狀連接器中,前述基板係2層基板,該2層基板具備平板狀之基材,其係堵塞前述開口部,前述導體層覆蓋前述基材之內表面及外表面中的至少一面,並宜具備通孔,其係電性相互連接前述基材之內表面及外表面間,且由設於貫穿前述基材之內表面及外表面間的貫穿孔內周面,並在前述基材之內表面及外表面間延伸的環狀導電電鍍部、及填充於該導電電鍍部內之填充材料構成。Further, in the flat connector, the substrate is a two-layer substrate including a flat substrate that blocks the opening, and the conductor layer covers at least at least an inner surface and an outer surface of the substrate. One side is preferably provided with through holes electrically connected to each other between the inner surface and the outer surface of the substrate, and provided by an inner peripheral surface of the through hole provided between the inner surface and the outer surface of the substrate, and An annular conductive plating portion extending between the inner surface and the outer surface of the substrate, and a filler filled in the conductive plating portion.

此外,該平板狀連接器中,在前述基材之前述內表面亦可形成沿著前述基材之外周連續環形地延伸的焊接層。Further, in the flat connector, a solder layer extending continuously annularly along the outer periphery of the substrate may be formed on the inner surface of the substrate.

再者,該平板狀連接器中,前述填充材料宜係有導電性之焊錫。Further, in the flat connector, the filler is preferably a conductive solder.

此外,該平板狀連接器中,前述基板係多層基板,且該多層基板具備:平板狀之第一基材;平板狀之第二基材,其係配置於位於朝向該第一基材之前述氣密室內部側的內表面,而堵塞前述開口部;及平板狀之第三基材,其係配置於前述第一基材之外表面;前述導體層覆蓋前述第二基材之內表面、前述第二基材之外表面、前述第一基材之內表面、前述第一基材之外表面、前述第三基材之內表面、及前述第三基材之外表面中的至少一面,亦可具備:通孔,其係電性相互連接前述第一基材之內表面及外表面間,且具備環狀之導電電鍍部,其係設於貫穿前述第一基材之內表面及外表面間的貫穿孔之內周面,並在前述第一基材之內表面及外表面間延伸;第一電鍍穿孔,其係相互連接前述第二基材之內表面及外表面間,並且與前述第一基材之通孔連接;及第二電鍍穿孔,其係相互連接前述第 三基材之內表面及外表面間,並且與前述第一基材之通孔連接。Further, in the flat connector, the substrate is a multilayer substrate, and the multilayer substrate includes a flat first substrate, and a flat second substrate disposed to face the first substrate. An inner surface on the inner side of the airtight chamber to block the opening; and a flat third substrate disposed on an outer surface of the first substrate; the conductor layer covering an inner surface of the second substrate; At least one of the outer surface of the second substrate, the inner surface of the first substrate, the outer surface of the first substrate, the inner surface of the third substrate, and the outer surface of the third substrate The method may include: a through hole electrically connected between the inner surface and the outer surface of the first substrate, and an annular conductive plating portion disposed on the inner surface and the outer surface of the first substrate The inner peripheral surface of the through hole extends between the inner surface and the outer surface of the first substrate; the first plated through hole is connected between the inner surface and the outer surface of the second substrate, and is a through hole connection of the first substrate; and a second Plating a perforation line interconnecting said first The inner surface and the outer surface of the three substrates are connected to the through holes of the first substrate.

此處,所謂「多層基板」,係指4層以上之多層基板。Here, the "multilayer substrate" means a multilayer substrate of four or more layers.

此外,該平板狀連接器中,亦可在前述第二基材之內表面形成沿著前述第二基材之外周而連續環形地延伸的焊接層。Further, in the flat connector, a solder layer extending continuously annularly along the outer circumference of the second substrate may be formed on the inner surface of the second substrate.

再者,該平板狀連接器中,前述通孔亦可具備填充於前述導電電鍍部內之填充材料。Further, in the flat connector, the through hole may have a filling material filled in the conductive plating portion.

此外,該平板狀連接器中,前述填充材料宜係有導電性之焊錫。Further, in the flat connector, the filler is preferably a conductive solder.

採用本創作之平板狀連接器時,具備堵塞隔壁之開口部的平板狀基板,該基板具備覆蓋位於朝向該基板之氣密室內部側的內表面、與前述基板之前述內表面相反側的外表面、及存在於前述內表面與前述外表面之間的前述基板內部,對前述內表面平行延伸之面中的至少一面之由複數個導體圖案構成的導體層。因而,即使填充於氣密室內部之氣體從氣密室內部向外部通過基板中,仍不致通過導體層,可有效抑制充滿於氣密室內部之氣體的氣體透過率。When the flat connector of the present invention is used, the flat substrate having the opening of the partition wall is provided, and the substrate has an outer surface covering the inner surface facing the inner side of the inner surface of the substrate and the inner surface opposite to the inner surface of the substrate And a conductor layer formed of a plurality of conductor patterns on at least one of the surfaces of the inner surface parallel to the inner surface of the substrate between the inner surface and the outer surface. Therefore, even if the gas filled in the airtight chamber passes through the substrate from the inside of the airtight chamber to the outside, the gas does not pass through the conductor layer, and the gas permeability of the gas filled inside the airtight chamber can be effectively suppressed.

另外,基板為玻璃環氧樹脂製的情況下,充滿於氣密室內部之氣體,特別是分子量少之氦氣或氫氣容易通過有機物之環氧樹脂的部分。但是,即使此種情況,填充於氣密室內部之氣體從氣密室內部向外部移動時,仍藉由導體層阻斷其移動。藉此,可更有效抑制充滿於氣密室內部之氣體的氣體透過率。Further, when the substrate is made of a glass epoxy resin, the gas which is filled in the airtight interior portion, in particular, a portion in which helium or hydrogen having a small molecular weight easily passes through the epoxy resin of the organic substance. However, even in such a case, when the gas filled in the airtight chamber moves outward from the inside of the airtight chamber, the movement of the gas is blocked by the conductor layer. Thereby, the gas permeability of the gas filled inside the airtight chamber can be more effectively suppressed.

此外,該平板狀連接器中,前述基板係2層基板,該2層基板 具備堵塞前述開口部之平板狀的基材,前述導體層覆蓋前述基材之內表面及外表面中的至少一面時,使用2層基板可有效抑制充滿於氣密室內部之氣體的氣體透過率。而後,平板狀連接器具備電性相互連接前述基材之內表面及外表面間的通孔。因而,可藉由通孔電性確實連接2層基板之基材的內表面及外表面間。此外,由於填充材料填充於構成通孔的導電電鍍部內,因此,可更進一步有效抑制充滿於氣密室內部之氣體的氣體透過率。Further, in the flat connector, the substrate is a two-layer substrate, and the two-layer substrate When the flat substrate having the opening is blocked, and the conductor layer covers at least one of the inner surface and the outer surface of the substrate, the gas permeability of the gas filled inside the airtight chamber can be effectively suppressed by using the two-layer substrate. Then, the flat connector has a through hole electrically connected between the inner surface and the outer surface of the substrate. Therefore, the inner surface and the outer surface of the substrate of the two-layer substrate can be reliably connected by the via hole electrical property. Further, since the filler is filled in the conductive plating portion constituting the through hole, the gas permeability of the gas filled inside the airtight chamber can be further effectively suppressed.

再者,該平板狀連接器中,前述基板係多層基板,該多層基板具備:平板狀之第一基材;配置於位於朝向該第一基材之前述氣密室內部側的內表面,而堵塞前述開口部之平板狀的第二基材;及配置於前述第一基材之外表面的平板狀之第三基材。而後,前述導體層覆蓋前述第二基材之內表面、前述第二基材之外表面、前述第一基材之內表面、前述第一基材之外表面、前述第三基材之內表面、及前述第三基材之外表面中的至少一面。此時,使用多層基板可有效抑制充滿於氣密室內部之氣體的氣體透過率。而後,平板狀連接器具備電性相互連接前述第一基材之內表面及外表面間的通孔。此外,平板狀連接器具備相互連接前述第二基材之內表面及外表面間,並且與前述第一基材之通孔連接的第一電鍍穿孔;及相互連接前述第三基材之內表面及外表面間,並且與前述第一基材之通孔連接的第二電鍍穿孔。因而,可藉由通孔、第一電鍍穿孔及第二電鍍穿孔電性確實連接多層基板之內表面及外表面間。另外,藉由第二基材堵塞通孔之內表面側,並藉由第三基材堵塞通孔之外表面側。因而,多層基板中,未必需要在構成通孔之導電電鍍部內填充填充材料。Further, in the flat connector, the substrate-based multilayer substrate includes a flat first substrate, and is disposed on an inner surface facing the airtight chamber side of the first substrate, and is clogged a flat second substrate of the opening; and a flat third substrate disposed on the outer surface of the first substrate. Then, the conductor layer covers the inner surface of the second substrate, the outer surface of the second substrate, the inner surface of the first substrate, the outer surface of the first substrate, and the inner surface of the third substrate And at least one of the outer surfaces of the third substrate. At this time, the gas permeability of the gas filled inside the airtight chamber can be effectively suppressed by using the multilayer substrate. Then, the flat connector has a through hole electrically connected between the inner surface and the outer surface of the first substrate. Further, the flat connector has a first plated perforation that is connected between the inner surface and the outer surface of the second substrate, and is connected to the through hole of the first substrate; and interconnects the inner surface of the third substrate And a second plated perforation between the outer surface and the through hole of the first substrate. Therefore, the inner surface and the outer surface of the multilayer substrate can be reliably connected by the through hole, the first plated through hole and the second plated through hole. Further, the inner surface side of the through hole is blocked by the second substrate, and the outer surface side of the through hole is blocked by the third substrate. Therefore, in the multilayer substrate, it is not always necessary to fill the conductive plating portion constituting the through hole with a filling material.

1‧‧‧平板狀連接器1‧‧‧flat connector

10‧‧‧基材10‧‧‧Substrate

10A‧‧‧基板10A‧‧‧Substrate

10a‧‧‧內表面10a‧‧‧ inner surface

10b‧‧‧外表面10b‧‧‧ outer surface

10c‧‧‧寬度方向右端面10c‧‧‧width direction right end face

10d‧‧‧寬度方向左端面10d‧‧‧width direction left end

10e‧‧‧長度方向後端面10e‧‧‧ Length direction rear end face

10f‧‧‧長度方向前端面10f‧‧‧ Length direction front face

11‧‧‧導體層11‧‧‧Conductor layer

11a,11b‧‧‧導體圖案11a, 11b‧‧‧ conductor pattern

11c‧‧‧導體圖案列間延設部11c‧‧‧Extensions between conductor patterns

12‧‧‧貫穿孔12‧‧‧through holes

13‧‧‧導電電鍍部13‧‧‧Electrical plating department

14‧‧‧填充材料14‧‧‧ Filling materials

15‧‧‧通孔15‧‧‧through hole

16‧‧‧導電焊墊16‧‧‧Electrical pads

17‧‧‧焊接層17‧‧‧welding layer

18‧‧‧抗蝕層18‧‧‧resist

19‧‧‧缺口19‧‧ ‧ gap

19a‧‧‧內側面19a‧‧‧ inside

19b‧‧‧底面19b‧‧‧ bottom

20‧‧‧第一電路基板20‧‧‧First circuit board

21‧‧‧接點21‧‧‧Contacts

30‧‧‧第二電路基板30‧‧‧Second circuit substrate

31‧‧‧接點31‧‧‧Contacts

40‧‧‧隔壁40‧‧‧ next door

41‧‧‧開口部41‧‧‧ openings

42‧‧‧氣體注入用開口部42‧‧‧ openings for gas injection

50‧‧‧平板狀連接器50‧‧‧flat connector

51‧‧‧平板狀連接器51‧‧‧flat connector

60‧‧‧第一基材60‧‧‧First substrate

60A‧‧‧基板60A‧‧‧Substrate

60a‧‧‧內表面60a‧‧‧ inner surface

60b‧‧‧外表面60b‧‧‧ outer surface

61‧‧‧貫穿孔61‧‧‧through holes

62‧‧‧第一導電電鍍部(導電電鍍部)62‧‧‧First Conductive Plating Department (Electrical Plating Department)

63‧‧‧填充材料63‧‧‧Filling materials

64‧‧‧通孔64‧‧‧through hole

65‧‧‧第一導電層65‧‧‧First conductive layer

66‧‧‧第二導電層66‧‧‧Second conductive layer

67‧‧‧空間67‧‧‧ Space

70‧‧‧第二基材70‧‧‧Second substrate

70a‧‧‧內表面70a‧‧‧ inner surface

70b‧‧‧外表面70b‧‧‧ outer surface

71‧‧‧貫穿孔71‧‧‧through holes

72‧‧‧第二導電電鍍部72‧‧‧Second Conductive Plating Department

73‧‧‧第一電鍍穿孔73‧‧‧First electroplated perforation

74‧‧‧導電焊墊74‧‧‧Electrical pads

75‧‧‧空間75‧‧‧ Space

80‧‧‧第三基材80‧‧‧ Third substrate

80a‧‧‧內表面80a‧‧‧ inner surface

80b‧‧‧外表面80b‧‧‧ outer surface

81‧‧‧貫穿孔81‧‧‧through holes

82‧‧‧第三導電電鍍部82‧‧‧ Third Conductive Plating Department

83‧‧‧第二電鍍穿孔83‧‧‧Second electroplated perforation

84‧‧‧導電焊墊84‧‧‧Electrical pads

85‧‧‧空間85‧‧‧ Space

90‧‧‧導體層90‧‧‧Conductor layer

91‧‧‧焊接層91‧‧‧welding layer

101‧‧‧電性連接構造101‧‧‧Electrical connection structure

110‧‧‧平板狀連接器110‧‧‧flat connector

112‧‧‧通孔112‧‧‧through hole

113a,113b‧‧‧導電焊墊113a, 113b‧‧‧ conductive pads

120A‧‧‧第一連接器120A‧‧‧First connector

120B‧‧‧第二連接器120B‧‧‧Second connector

121‧‧‧第二基板121‧‧‧second substrate

122‧‧‧信號線122‧‧‧ signal line

123‧‧‧接點123‧‧‧Contacts

124‧‧‧導電圖案124‧‧‧ conductive pattern

201‧‧‧多層印刷線路基板201‧‧‧Multilayer printed circuit board

202‧‧‧高介電常數基板202‧‧‧High dielectric constant substrate

203‧‧‧銅箔圖案層203‧‧‧ copper foil pattern layer

204‧‧‧絕緣層204‧‧‧Insulation

205‧‧‧信號線205‧‧‧ signal line

C‧‧‧氣密室C‧‧‧Airlock

F,F'‧‧‧箭頭F, F'‧‧‧ arrows

S‧‧‧焊錫S‧‧‧ solder

第一圖係使用本創作之平板狀連接器的第一種實施形態之電性連接構造的概略模式圖。The first drawing is a schematic view showing an electrical connection structure of a first embodiment of the flat connector of the present invention.

第二圖係在使用第一圖所示之平板狀連接器的電性連接構造中,詳細顯示平板狀連接器之周邊的剖面圖。The second drawing shows a cross-sectional view of the periphery of the flat connector in detail in the electrical connection structure using the flat connector shown in the first figure.

第三圖係第一圖所示之平板狀連接器的平面圖。The third figure is a plan view of the flat connector shown in the first figure.

第四圖係沿著第三圖之4-4線的剖面圖。The fourth figure is a cross-sectional view taken along line 4-4 of the third figure.

第五圖係第四圖中之通孔及其周邊的放大圖。The fifth figure is an enlarged view of the through hole and its periphery in the fourth figure.

第六圖係從第一圖所示之平板狀連接器除去導體層後之平板狀連接器的平面圖。Figure 6 is a plan view of the flat connector after removing the conductor layer from the flat connector shown in Fig. 1.

第七圖係第一圖所示之平板狀連接器的變形例之平面圖。The seventh drawing is a plan view showing a modification of the flat connector shown in the first figure.

第八圖顯示本創作之平板狀連接器的第二種實施形態,(A)係平面圖,(B)係沿著(A)中之8B-8B線的剖面圖。Figure 8 shows a second embodiment of the flat connector of the present invention, (A) is a plan view, and (B) is a cross-sectional view taken along line 8B-8B of (A).

第九圖顯示第八圖所示之平板狀連接器的第一變形例,(A)係平面圖,(B)係沿著(A)中之9B-9B線的剖面圖。Fig. 9 shows a first modification of the flat connector shown in Fig. 8, (A) is a plan view, and (B) is a cross-sectional view taken along line 9B-9B of (A).

第十圖顯示第八圖所示之平板狀連接器的第二變形例,(A)係橫剖面圖,(B)係沿著(A)中之10B-10B線的剖面圖。Fig. 10 shows a second modification of the flat connector shown in Fig. 8, (A) is a cross-sectional view, and (B) is a cross-sectional view taken along line 10B-10B in (A).

第十一圖係先前例之電性相互連接以隔壁劃分之調整壓力後的氣密室之內側及外側的電性連接構造之模式圖。The eleventh figure is a schematic view showing an electrical connection structure of the inner side and the outer side of the airtight chamber in which the electric pressure is connected to each other by the partition wall.

第十二圖係先前之多層印刷線路基板的剖面圖。Figure 12 is a cross-sectional view of a prior multilayer printed wiring substrate.

以下,參照圖式說明使用本創作之平板狀連接器的電性連接 構造之實施形態。Hereinafter, an electrical connection using the flat connector of the present invention will be described with reference to the drawings. The embodiment of the structure.

第一圖中顯示有使用本創作之平板狀連接器的第一種實施形態之電性連接構造,該電性連接構造中,使用平板狀連接器1電性相互連接以隔壁40劃分而內部保持氣密之氣密室C的內側及外側。氣密室C之內部亦可為接近真空之狀態,亦可以分子量少之氣體,例如以氦氣或氫氣充滿,而減壓成比外氣壓低的壓力狀態。此外,氣密室C之內部亦可為比外氣壓高之壓力狀態。The first figure shows an electrical connection structure of a first embodiment using the flat connector of the present invention. In the electrical connection structure, the flat connector 1 is electrically connected to each other and partitioned by the partition 40 to be internally retained. Inside and outside of the airtight airtight chamber C. The inside of the airtight chamber C may be in a state close to a vacuum, or may be a gas having a small molecular weight, for example, filled with helium or hydrogen, and depressurized to a pressure lower than the external pressure. Further, the inside of the airtight chamber C may be in a pressure state higher than the external air pressure.

此處,隔壁40中形成有貫穿氣密室C之內部與外部的開口部41。此外,隔壁40中形成有用於在隔壁40之氣密室C內注入氣體的氣體注入用開口部42。該隔壁40係金屬製。Here, the partition 40 is formed with an opening 41 that penetrates the inside and the outside of the airtight chamber C. Further, a gas injection opening portion 42 for injecting a gas into the airtight chamber C of the partition wall 40 is formed in the partition wall 40. The partition 40 is made of metal.

而後,如第一圖及第二圖所示,隔壁40之開口部41藉由平板狀連接器1堵塞。Then, as shown in the first figure and the second figure, the opening portion 41 of the partition wall 40 is closed by the flat connector 1.

如第二圖所示,平板狀連接器1具備堵塞開口部41之基板10A。基板10A係2層基板,該2層基板具備堵塞開口部41之基材10。如第三圖所示,基材10係延伸於寬度方向(第三圖中之上下方向)及長度方向(第三圖中之左右方向)之概略矩形形狀的平板狀部件。如第二圖至第四圖所示,基材10具有位於朝向氣密室C內部側之內表面10a、及與內表面10a相反側之外表面10b。此外,基材10具有寬度方向右端面10c、寬度方向左端面10d、長度方向後端面10e及長度方向前端面10f。在基材10之內表面10a形成有指定寬度之缺口19,其係沿著基材10之外周連續環形地延伸,且具有內側面19a及底面19b。基材10例如係含玻璃環氧樹脂製。此處,請求項1所規定之「位於朝向基板之氣密室內部側的內表面」,即對應基材10之內表面 10a,「與基板之前述內表面相反側的外表面」即對應基材10之外表面10b。此外,請求項1所規定之「存在於內表面與外表面之間的基板內部,對內表面平行延伸之面」,在平板狀連接器1中不存在。As shown in the second figure, the flat connector 1 is provided with a substrate 10A that blocks the opening 41. The substrate 10A is a two-layer substrate including a substrate 10 that blocks the opening 41. As shown in the third figure, the base material 10 is a flat-shaped member having a substantially rectangular shape extending in the width direction (upward and downward directions in the third drawing) and the longitudinal direction (left-right direction in the third drawing). As shown in the second to fourth figures, the substrate 10 has an inner surface 10a facing the inner side of the airtight chamber C and an outer surface 10b opposite to the inner surface 10a. Further, the base material 10 has a right end surface 10c in the width direction, a left end surface 10d in the width direction, a rear end surface 10e in the longitudinal direction, and a front end surface 10f in the longitudinal direction. A notch 19 of a predetermined width is formed on the inner surface 10a of the substrate 10, which extends continuously annularly along the outer circumference of the substrate 10, and has an inner side surface 19a and a bottom surface 19b. The substrate 10 is made of, for example, a glass epoxy resin. Here, the "inner surface on the side of the airtight chamber facing the substrate" defined in the claim 1 corresponds to the inner surface of the substrate 10. 10a, "the outer surface on the side opposite to the inner surface of the substrate" corresponds to the outer surface 10b of the substrate 10. Further, the "surface existing in the substrate between the inner surface and the outer surface and extending in parallel with the inner surface" defined in the claim 1 does not exist in the flat connector 1.

此外,如第二圖及第三圖所示,基材10中設有導體層11。該導體層11由形成於基材10之內表面10a的2列狀之複數個導體圖案11a、形成於基材10之外表面10b的2列狀之複數個導體圖案11a、及包圍此等複數個導體圖案11a之外側而設的導體圖案11b而構成。形成於基材10之內表面10a的2列狀之複數個導體圖案11a中的一方列者,在基材10之寬度方向右側,以沿著基材10之長度方向而相鄰之各導體圖案11a不致短路程度的間距排列。此外,形成於基材10之內表面10a的2列狀之複數個導體圖案11a中的另一方列者,在基材10之寬度方向左側,以沿著基材10之長度方向相鄰的各導體圖案11a不致短路程度的間距排列。再者,形成於基材10之外表面10b的2列狀之複數個導體圖案11a中的一方列者,在基材10之寬度方向右側,以沿著基材10之長度方向相鄰的各導體圖案11a不致短路程度的間距排列。此外,形成於基材10之外表面10b的2列狀之複數個導體圖案11a中的另一方列者,在基材10之寬度方向左側,以沿著基材10之長度方向相鄰的各導體圖案11a不致短路程度的間距排列。導體層11之導體圖案11b覆蓋平板狀連接器1之基材10的內表面10a、缺口19之內側面19a及底面19b、及基材10之外表面10b。而後,導體層11之導體圖案11b具有在分別形成於基材10之內表面10a及外表面10b的2列狀之導體圖案11a的列間延伸的導體圖案列間延設部11c。Further, as shown in the second and third figures, the conductor layer 11 is provided in the substrate 10. The conductor layer 11 includes a plurality of conductor patterns 11a formed in two rows on the inner surface 10a of the substrate 10, a plurality of conductor patterns 11a formed in two rows on the outer surface 10b of the substrate 10, and a plurality of conductor patterns 11a. The conductor pattern 11b provided on the outer side of the conductor pattern 11a is comprised. One of the plurality of rows of the plurality of conductor patterns 11a formed on the inner surface 10a of the substrate 10 is adjacent to each other along the longitudinal direction of the substrate 10 on the right side in the width direction of the substrate 10. 11a is arranged without spacing the degree of short circuit. Further, the other of the plurality of the plurality of conductor patterns 11a formed on the inner surface 10a of the substrate 10 is adjacent to each other in the longitudinal direction of the substrate 10 on the left side in the width direction of the substrate 10. The conductor patterns 11a are arranged without being spaced apart by the degree of short circuit. Further, one of the plurality of two conductor patterns 11a formed in the outer surface 10b of the substrate 10 is adjacent to each other in the longitudinal direction of the substrate 10 on the right side in the width direction of the substrate 10. The conductor patterns 11a are arranged without being spaced apart by the degree of short circuit. Further, the other of the plurality of two conductor patterns 11a formed in the outer surface 10b of the substrate 10 is adjacent to each other in the longitudinal direction of the substrate 10 on the left side in the width direction of the substrate 10. The conductor patterns 11a are arranged without being spaced apart by the degree of short circuit. The conductor pattern 11b of the conductor layer 11 covers the inner surface 10a of the substrate 10 of the flat connector 1, the inner side surface 19a and the bottom surface 19b of the notch 19, and the outer surface 10b of the substrate 10. Then, the conductor pattern 11b of the conductor layer 11 has the conductor pattern-column extending portion 11c extending between the rows of the two-row conductor patterns 11a formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively.

分別形成於基材10之內表面10a及外表面10b的2列狀之導體圖案11a鄰接的導體圖案11a間、導體圖案11b與2列狀的導體圖案11a之間、 及導體圖案列間延設部11c與2列狀的導體圖案11a之間具有同一寬度,且係基材10露出之部分。Between the conductor patterns 11a adjacent to the two-row conductor pattern 11a formed on the inner surface 10a and the outer surface 10b of the substrate 10, and between the conductor pattern 11b and the two-row conductor pattern 11a, The conductor pattern row extending portion 11c and the two row-shaped conductor patterns 11a have the same width and are exposed portions of the substrate 10.

此處,導體層11不限於上述情況,只須覆蓋基材10之內表面10a及外表面10b中的至少一面即可。而此處所謂「覆蓋」,係指複數個導體圖案11a,11b在基材10之內表面10a及外表面10b中的至少一面,至少覆蓋該一面的一部分即可。另外,複數個導體圖案11a,11b宜在基材10之內表面10a及外表面10b中的至少一面,以鄰接之各個貼合裝置10a,10b不致短路的狀態下接近100%覆蓋該一面。導體層11例如藉由銅箔而形成。Here, the conductor layer 11 is not limited to the above, and it is only necessary to cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10. Here, "covering" means that a plurality of conductor patterns 11a, 11b may cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10, and cover at least a part of the surface. Further, it is preferable that the plurality of conductor patterns 11a, 11b cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10 so as to approach 100% of the adjacent bonding devices 10a, 10b without short-circuiting. The conductor layer 11 is formed, for example, by a copper foil.

此外,在基板10A之基材10中,設有電性相互連接基材10之內表面10a及外表面10b間的複數個通孔15。如第三圖所示,通孔15就各導體圖案11a各設1個,並且在導體圖案11b中,於各列之導體圖案11a的長度方向兩旁各設1個,合計設4個。各通孔15由設於貫穿基材10之內表面10a與外表面10b的貫穿孔12內周面之環狀導電電鍍部13、及填充於導電電鍍部13內部之填充材料14而構成。導電電鍍部13在基材10之內表面10a與外表面10b之間延伸。該導電電鍍部13例如以鍍錫或鍍金而形成。由於將填充材料14填充於導電電鍍部13內,因此可有效抑制充滿於氣密室內部之氣體的氣體透過率。該填充材料14在本實施形態之情況係使用有導電性之焊錫。填充材料14使用有導電性之焊錫時,不但可確實進行基材10之內表面10a與外表面10b的電性連接,而且當填充於氣密室C內部之氣體從氣密室C內部向外部移動時,藉由焊錫可有效阻斷其移動。藉此,可更有效抑制充滿於氣密室C內部之氣體的氣體透過率。另外,填充材料14未必需要具導電性,亦可為具有氣密性之樹脂(例如商品名稱「Torr Seal」(登錄商標))。Further, in the substrate 10 of the substrate 10A, a plurality of through holes 15 electrically connected between the inner surface 10a and the outer surface 10b of the substrate 10 are provided. As shown in the third figure, the through holes 15 are provided for each of the conductor patterns 11a, and one of the conductor patterns 11b is provided on each side in the longitudinal direction of each of the conductor patterns 11a of the respective rows, and a total of four are provided. Each of the through holes 15 is formed by an annular conductive plating portion 13 provided on the inner circumferential surface of the through hole 12 penetrating the inner surface 10a and the outer surface 10b of the base material 10, and a filler 14 filled in the conductive plating portion 13. The conductive plating portion 13 extends between the inner surface 10a and the outer surface 10b of the substrate 10. The conductive plating portion 13 is formed, for example, by tin plating or gold plating. Since the filler 14 is filled in the conductive plating portion 13, the gas permeability of the gas filled inside the airtight chamber can be effectively suppressed. In the case of this embodiment, the filler 14 is made of conductive solder. When the conductive material 14 is made of a conductive solder, the electrical connection between the inner surface 10a of the substrate 10 and the outer surface 10b can be surely performed, and when the gas filled in the interior of the airtight chamber C moves from the inside to the outside of the airtight chamber C. With solder, it can effectively block its movement. Thereby, the gas permeability of the gas filled in the inside of the airtight chamber C can be more effectively suppressed. Further, the filler 14 does not necessarily have to be electrically conductive, and may be a resin having airtightness (for example, trade name "Torr Seal" (registered trademark).

如第四圖及第五圖清楚顯示,基材10之內表面10a及外表面10b的導體圖案11a,在設於基材10之貫穿孔12的內周面與導電電鍍部13之間延伸。而後,在該導體圖案11a之內周面設有導電電鍍部13。該導體圖案11a與導電電鍍部13之間被密封,導電電鍍部13與填充材料14之間亦被密封。藉此,氣體不致從氣密室C之內部經由通孔15洩漏。As clearly shown in the fourth and fifth figures, the conductor pattern 11a of the inner surface 10a and the outer surface 10b of the substrate 10 extends between the inner circumferential surface of the through hole 12 of the substrate 10 and the conductive plating portion 13. Then, a conductive plating portion 13 is provided on the inner circumferential surface of the conductor pattern 11a. The conductor pattern 11a and the conductive plating portion 13 are sealed, and the conductive plating portion 13 and the filling material 14 are also sealed. Thereby, the gas does not leak from the inside of the airtight chamber C via the through hole 15.

而後,在基材10之內表面10a及外表面10b的導體圖案11a上,設有藉由通孔15之導電電鍍部13而相互連接的1對導電焊墊16。此等導電焊墊16係與導電電鍍部13分開形成者,不過也未必需要分開形成。亦即,亦可將基材10之內表面10a及外表面10b側的導電電鍍部13本身作為導電焊墊16。Then, on the conductor pattern 11a of the inner surface 10a and the outer surface 10b of the substrate 10, a pair of conductive pads 16 which are connected to each other by the conductive plating portion 13 of the through holes 15 are provided. These conductive pads 16 are formed separately from the conductive plating portion 13, but they do not necessarily need to be formed separately. That is, the conductive plating portion 13 on the inner surface 10a and the outer surface 10b side of the substrate 10 may be used as the conductive pad 16.

再者,如第二圖至第五圖所示,在基材10之內表面10a的導體圖案11b中,形成有沿著基材10之外周連續環形地延伸的焊接層17。如第三圖及第五圖清楚顯示,焊接層17從基材10之內表面10a經過缺口19之內側面19a及底面19b,而延伸至基材10之寬度方向右端面10c、寬度方向左端面10d、長度方向後端面10e及長度方向前端面10f。焊接層17例如以鍍錫或鍍金而形成。另外,在第二圖、第四圖及第五圖中的符號18係抗蝕層。Further, as shown in the second to fifth figures, in the conductor pattern 11b of the inner surface 10a of the substrate 10, a solder layer 17 extending continuously annularly along the outer periphery of the substrate 10 is formed. As clearly shown in the third and fifth figures, the solder layer 17 extends from the inner surface 10a of the substrate 10 through the inner side surface 19a and the bottom surface 19b of the notch 19 to the right end surface 10c in the width direction of the substrate 10, and the left end surface in the width direction. 10d, the longitudinal direction rear end surface 10e and the longitudinal direction front end surface 10f. The solder layer 17 is formed, for example, by tin plating or gold plating. In addition, the symbols 18 in the second, fourth, and fifth figures are resist layers.

其次,使用平板狀連接器1電性相互連接氣密室C之內側及外側時,首先如第一圖所示,先將第一電路基板20配置於氣密室C內。而後如第二圖所示,使平板狀連接器1之內表面10a為隔壁40側,而朝向開口部41側。而後,藉由焊錫S將在基材10之內表面10a側的焊接層17連接於隔壁40。藉此,將平板狀連接器1固定於隔壁40,並且藉由平板狀連接器1堵塞開口部41。此外,平板狀連接器1之內表面10a側的導電焊墊16與設於第一 電路基板20之接點21接觸。Next, when the flat connector 1 is electrically connected to the inside and the outside of the airtight chamber C, first, as shown in the first figure, the first circuit board 20 is first placed in the airtight chamber C. Then, as shown in the second figure, the inner surface 10a of the flat connector 1 is on the side of the partition 40, and faces the side of the opening 41. Then, the solder layer 17 on the inner surface 10a side of the substrate 10 is joined to the partition wall 40 by the solder S. Thereby, the flat connector 1 is fixed to the partition 40, and the opening 41 is blocked by the flat connector 1. In addition, the conductive pad 16 on the inner surface 10a side of the flat connector 1 is disposed first The contacts 21 of the circuit substrate 20 are in contact.

而後,如第一圖所示,使設於第二電路基板30之接點31與在平板狀連接器1之外表面10b的導電焊墊16接觸。藉此,第一電路基板20及第二電路基板30經由平板狀連接器1而電性相互連接。Then, as shown in the first figure, the contact 31 provided on the second circuit substrate 30 is brought into contact with the conductive pad 16 on the outer surface 10b of the flat connector 1. Thereby, the first circuit board 20 and the second circuit board 30 are electrically connected to each other via the flat connector 1 .

此處,係就本實施形態中如第三圖所示,設有導體層11之平板狀連接器1,以及如第六圖所示,除去導體層11之平板狀連接器51,在基材10之內表面10a及外表面10b中基材露出面積如何變化作說明。Here, in the present embodiment, as shown in the third embodiment, the flat connector 1 provided with the conductor layer 11, and the flat connector 51 from which the conductor layer 11 is removed, as shown in Fig. 6, is on the substrate. The change in the exposed area of the substrate in the inner surface 10a and the outer surface 10b of 10 is explained.

如第三圖所示,設有導體層11之平板狀連接器1的情況下,在基材10之內表面10a及外表面10b上的基材露出面積係12.01mm2 。另外,如第六圖所示,除去導體層11之平板狀連接器51的情況下係89.15mm2 。如此,本實施形態亦即如第三圖所示,設有導體層11之平板狀連接器1的情況下,在基材10之內表面10a及外表面10b上的基材露出面積,與除去導體層11之平板狀連接器51的情況比較,減少約1/7。As shown in the third figure, in the case of the flat connector 1 in which the conductor layer 11 is provided, the exposed area of the substrate on the inner surface 10a and the outer surface 10b of the substrate 10 is 12.01 mm 2 . Further, as shown in the sixth figure, in the case where the flat connector 51 of the conductor layer 11 is removed, it is 89.15 mm 2 . As described above, in the third embodiment, when the flat connector 1 having the conductor layer 11 is provided, the exposed area of the substrate on the inner surface 10a and the outer surface 10b of the substrate 10 is removed. In the case of the flat connector 51 of the conductor layer 11, the ratio is reduced by about 1/7.

結果,充滿於氣密室C內部之氣體的透過(mol/s.Pa),如第三圖所示,在設有導體層11之平板狀連接器1的情況下,因應基材露出面積之減少率,與除去導體層11之平板狀連接器51的情況比較,減少約1/7。As a result, the permeation (mol/s. Pa) of the gas filled in the inside of the airtight chamber C, as shown in the third figure, in the case of the flat connector 1 provided with the conductor layer 11, the reduction in the exposed area of the substrate The rate is reduced by about 1/7 as compared with the case of the flat connector 51 from which the conductor layer 11 is removed.

因此,按照本實施形態之平板狀連接器1時,基板10A係2層基板,該2層基板具備堵塞開口部41之平板狀基材10,導體層11覆蓋基材10之內表面10a及外表面10b中的至少一面。因而,即使填充於氣密室C內部之氣體從氣密室C內部向外部而通過基材10中,仍無法通過導體層11,可有效抑制充滿於氣密室C內部之氣體的氣體透過率。而使用2層基板可有效抑制充滿於氣密室C內部之氣體的氣體透過率。Therefore, according to the flat connector 1 of the present embodiment, the substrate 10A is a two-layer substrate having a flat substrate 10 that blocks the opening 41, and the conductor layer 11 covers the inner surface 10a of the substrate 10 and the outside. At least one of the surfaces 10b. Therefore, even if the gas filled in the inside of the airtight chamber C passes through the base material 10 from the inside to the outside of the airtight chamber C, the conductor layer 11 cannot pass through, and the gas permeability of the gas filled in the inside of the airtight chamber C can be effectively suppressed. The use of the two-layer substrate can effectively suppress the gas permeability of the gas filled inside the airtight chamber C.

另外,基材10係玻璃環氧樹脂製情況下,充滿於氣密室C內部之氣體,特別是分子量少之氦氣或氫氣容易通過有機物之環氧樹脂部分。但是,即使該情況,填充於氣密室C內部之氣體從氣密室C內部向外部移動時,仍藉由導體層11阻斷其移動。藉此,可更有效抑制充滿於氣密室C內部之氣體的氣體透過率。Further, in the case where the substrate 10 is made of a glass epoxy resin, the gas filled in the inside of the airtight chamber C, in particular, helium or hydrogen having a small molecular weight easily passes through the epoxy resin portion of the organic substance. However, even in this case, when the gas filled in the inside of the airtight chamber C moves from the inside to the outside of the airtight chamber C, the movement thereof is blocked by the conductor layer 11. Thereby, the gas permeability of the gas filled in the inside of the airtight chamber C can be more effectively suppressed.

此外,按照該平板狀連接器1時,具備電性相互連接基材10之內表面10a及外表面10b間的通孔15。因而,可藉由通孔15電性確實連接2層基板之基材10的內表面10a及外表面10b間。此外,由於在構成通孔15之導電電鍍部13內填充有填充材料14,因此,可更有效抑制充滿於氣密室C內部之氣體的氣體透過率。Further, according to the flat connector 1, the through hole 15 between the inner surface 10a and the outer surface 10b of the base material 10 is electrically connected to each other. Therefore, the inner surface 10a and the outer surface 10b of the substrate 10 of the two-layer substrate can be electrically connected by the through hole 15 electrically. Further, since the filler plating material 14 is filled in the conductive plating portion 13 constituting the through hole 15, the gas permeability of the gas filled inside the airtight chamber C can be more effectively suppressed.

此外,在基材10之內表面10a形成有沿著基材10之外周連續環形地延伸的焊接層17。因而,藉由將在基材10之內表面10a側的焊接層17藉由焊錫S連接於隔壁40,可將構成平板狀連接器1之基板10A固定於隔壁40。Further, a solder layer 17 extending continuously annularly along the outer circumference of the substrate 10 is formed on the inner surface 10a of the substrate 10. Therefore, the substrate 10A constituting the flat connector 1 can be fixed to the partition 40 by soldering the solder layer 17 on the inner surface 10a side of the substrate 10 to the partition 40 by solder S.

其次,參照第七圖說明第一圖所示之平板狀連接器1的變形例。Next, a modification of the flat connector 1 shown in the first figure will be described with reference to the seventh embodiment.

第七圖所示之平板狀連接器1中,與第一圖、第三圖所示之平板狀連接器1同樣地,在基材10中設有導體層11。該導體層11由形成於基材10之內表面10a的2列狀之複數個導體圖案11a、形成於基材10之外表面10b的2列狀之複數個內表面10a、及包圍此等複數個導體圖案11a之外側而設的導體圖案11b構成。各導體圖案11a之面積比第三圖所示之平板狀連接器1的導體圖案11a大。但是,導體層11之導體圖案11b與第三圖所示之導體圖案11b 不同,並未形成在分別形成於基材10之內表面10a及外表面10b的2列狀之導體圖案11a的列間延伸的導體圖案列間延設部11c。In the flat connector 1 shown in FIG. 7, the conductor layer 11 is provided in the base material 10 similarly to the flat connector 1 shown in FIG. 1 and FIG. The conductor layer 11 is composed of a plurality of conductor patterns 11a formed in two rows on the inner surface 10a of the substrate 10, a plurality of inner surfaces 10a formed in two rows on the outer surface 10b of the substrate 10, and a plurality of inner surfaces 10a. The conductor pattern 11b provided on the outer side of the conductor pattern 11a is comprised. The area of each conductor pattern 11a is larger than the conductor pattern 11a of the flat connector 1 shown in the third figure. However, the conductor pattern 11b of the conductor layer 11 and the conductor pattern 11b shown in the third figure Unlike the conductor pattern row extending portion 11c extending between the rows of the two-row conductor patterns 11a formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively.

形成於基材10之內表面10a的2列狀之複數個導體圖案11a中的一方列者,在基材10之寬度方向右側,以沿著基材10之長度方向相鄰的各導體圖案11a不致短路程度之間距排列。此外,形成於基材10之內表面10a的2列狀之複數個導體圖案11a中的另一方列者,在基材10之寬度方向左側,以沿著基材10之長度方向相鄰的各導體圖案11a不致短路程度之間距排列。再者,形成於基材10之外表面10b的2列狀之複數個導體圖案11a中的一方列者,在基材10之寬度方向右側,以沿著基材10之長度方向相鄰的各導體圖案11a不致短路程度之間距排列。此外,形成於基材10之外表面10b的2列狀之複數個導體圖案11a中的另一方列者,在基材10之寬度方向左側,以沿著基材10之長度方向相鄰的各導體圖案11a不致短路程度之間距排列。One of the plurality of the plurality of conductor patterns 11a formed in the inner surface 10a of the substrate 10 is adjacent to each other in the longitudinal direction of the substrate 10 in the longitudinal direction of the substrate 10. Do not arrange the distance between the short circuits. Further, the other of the plurality of the plurality of conductor patterns 11a formed on the inner surface 10a of the substrate 10 is adjacent to each other in the longitudinal direction of the substrate 10 on the left side in the width direction of the substrate 10. The conductor patterns 11a are arranged without being short-circuited. Further, one of the plurality of two conductor patterns 11a formed in the outer surface 10b of the substrate 10 is adjacent to each other in the longitudinal direction of the substrate 10 on the right side in the width direction of the substrate 10. The conductor patterns 11a are arranged without being short-circuited. Further, the other of the plurality of two conductor patterns 11a formed in the outer surface 10b of the substrate 10 is adjacent to each other in the longitudinal direction of the substrate 10 on the left side in the width direction of the substrate 10. The conductor patterns 11a are arranged without being short-circuited.

分別形成於基材10之內表面10a及外表面10b的2列狀之導體圖案11a鄰接的導體圖案11a間、導體圖案11b與2列狀的導體圖案11a之間、及2列狀的導體圖案11a之列間具有同一寬度,且係基材10露出之部分。The conductor patterns 11a adjacent to the two-row conductor pattern 11a formed on the inner surface 10a and the outer surface 10b of the substrate 10, the conductor pattern 11b and the two-row conductor pattern 11a, and the two-row conductor pattern The columns 11a have the same width and are the exposed portions of the substrate 10.

此外,如第七圖所示,就各導體圖案11a係各設置1個通孔15,不過與第三圖所示的平板狀連接器1不同之處為導體圖案11b中並未設置。Further, as shown in FIG. 7, one through hole 15 is provided for each of the conductor patterns 11a. However, unlike the flat connector 1 shown in FIG. 3, the conductor pattern 11b is not provided.

如該第七圖所示,設有導體層11之平板狀連接器1的情況下,在基材10之內表面10a及外表面10b中的基材露出面積係21.44mm2 。如該第七圖所示,設有導體層11之平板狀連接器1的情況下,在基材10之內表面10a及外表面10b中的基材露出面積,與第六圖所示之除去導體層11的平 板狀連接器51之情況比較,減少約1/4。As shown in the seventh figure, in the case of the flat connector 1 in which the conductor layer 11 is provided, the exposed area of the substrate in the inner surface 10a and the outer surface 10b of the substrate 10 is 21.44 mm 2 . As shown in the seventh figure, in the case of the flat connector 1 in which the conductor layer 11 is provided, the exposed area of the substrate in the inner surface 10a and the outer surface 10b of the substrate 10 is removed as shown in FIG. In the case of the flat connector 51 of the conductor layer 11, the ratio is reduced by about 1/4.

結果,充滿於氣密室C內部之氣體的透過(mol/s.Pa),如第七圖所示,在設有導體層11之平板狀連接器1的情況下,因應基材露出面積之減少率,與除去導體層11之平板狀連接器51的情況比較,減少約1/4。As a result, the permeation (mol/s. Pa) of the gas filled in the inside of the airtight chamber C, as shown in the seventh diagram, in the case of the flat connector 1 in which the conductor layer 11 is provided, the reduction in the exposed area of the substrate The rate is reduced by about 1/4 as compared with the case of the flat connector 51 from which the conductor layer 11 is removed.

其次,參照第八圖至第十圖說明本創作之平板狀連接器的第二種實施形態。Next, a second embodiment of the flat connector of the present invention will be described with reference to the eighth to tenth drawings.

第八(A),(B)圖中顯示本創作之平板狀連接器的第二種實施形態,該平板狀連接器50取代第一種實施形態之平板狀連接器1,而用於第一圖所示的電性連接構造。A second embodiment of the flat connector of the present invention is shown in the eighth (A) and (B). The flat connector 50 replaces the flat connector 1 of the first embodiment, and is used for the first The electrical connection structure shown in the figure.

第八(A),(B)圖所示之平板狀連接器50堵塞隔壁40之開口部41,並電性連接氣密室C之內側及外側。The flat connector 50 shown in the eighth (A) and (B) blocks the opening 41 of the partition 40 and is electrically connected to the inner side and the outer side of the airtight chamber C.

該平板狀連接器50具備堵塞隔壁40之開口部41的基板60A。該基板60A係作為多層基板之4層基板。基板60A具備平板狀之第一基材60、配置於第一基材60之內表面60a而堵塞開口部41的第二基材70、及配置於第一基材60之外表面60b的平板狀之第三基材80。The flat connector 50 includes a substrate 60A that blocks the opening 41 of the partition 40. This substrate 60A is a four-layer substrate which is a multilayer substrate. The substrate 60A includes a flat first substrate 60, a second substrate 70 disposed on the inner surface 60a of the first substrate 60 to block the opening 41, and a flat plate disposed on the outer surface 60b of the first substrate 60. The third substrate 80.

此處,第一基材60係在寬度方向(第八(A)圖中之左右方向)及長度方向(第八(A)圖中之上下方向)延伸的概略矩形形狀之平板狀部件。第一基材60具有位於朝向氣密室C(參照第一圖)之內部側的內表面60a、以及與其第一內表面60a相反側之外表面60b。第一基材60例如係含玻璃環氧樹脂製。Here, the first base material 60 is a flat rectangular member having a rectangular shape extending in the width direction (the horizontal direction in the eighth (A) diagram) and the longitudinal direction (the upper and lower directions in the eighth (A) diagram). The first base material 60 has an inner surface 60a located on the inner side toward the airtight chamber C (refer to the first figure) and an outer surface 60b on the side opposite to the first inner surface 60a. The first base material 60 is made of, for example, a glass epoxy resin.

此外,如第八(B)圖所示,第一基材60中形成有電性相互連接第一基材60之內表面60a及外表面60b間的複數個通孔64。複數個通孔 64在第一基材60之寬度方向2列狀地形成。各列通孔64沿著長度方向以指定間距而形成,不過無圖示。而各通孔64具備施行於貫穿第一基材60之內表面60a及外表面60b間的貫穿孔61內周面之環狀的第一導電電鍍部62。在第一導電電鍍部62之內部填充有填充材料63。第一導電電鍍部62在第一基材60之內表面60a及外表面60b間延伸。該第一導電電鍍部62例如以鍍錫或鍍金而形成。此外,填充材料63使用有導電性之焊錫。填充材料63使用有導電性之焊錫時,不僅可確實進行第一基材60之內表面60a與外表面60b的電性連接,當填充於氣密室C內部之氣體從氣密室C內部向外部移動時,藉由焊錫可有效阻斷其移動。藉此,可更有效抑制充滿於氣密室C內部之氣體的氣體透過率。另外,填充材料14未必需要具導電性,亦可係具有氣密性之樹脂(例如商品名稱「Torr Seal」(登錄商標))。Further, as shown in the eighth (B) diagram, a plurality of through holes 64 electrically connected between the inner surface 60a and the outer surface 60b of the first substrate 60 are formed in the first base material 60. Multiple through holes 64 is formed in two rows in the width direction of the first base material 60. Each of the column through holes 64 is formed at a predetermined pitch along the longitudinal direction, but is not shown. Each of the through holes 64 is provided with an annular first conductive plating portion 62 that is applied to the inner circumferential surface of the through hole 61 that penetrates between the inner surface 60a and the outer surface 60b of the first base material 60. The inside of the first conductive plating portion 62 is filled with a filling material 63. The first conductive plating portion 62 extends between the inner surface 60a and the outer surface 60b of the first substrate 60. The first conductive plating portion 62 is formed, for example, by tin plating or gold plating. Further, the filler 63 is made of a conductive solder. When the conductive material 63 is made of a conductive solder, not only the electrical connection between the inner surface 60a of the first substrate 60 and the outer surface 60b can be reliably performed, but when the gas filled in the interior of the airtight chamber C moves from the inside to the outside of the airtight chamber C. When it is soldered, it can effectively block its movement. Thereby, the gas permeability of the gas filled in the inside of the airtight chamber C can be more effectively suppressed. Further, the filler 14 does not necessarily have to be electrically conductive, and may be a resin having airtightness (for example, trade name "Torr Seal" (registered trademark).

此外,在第一基材60之內表面60a,設有連接於第一導電電鍍部62之內表面60a側的複數個第一導電層65。此外,在第一基材60之外表面60b,設有連接於第一導電電鍍部62之外表面60b側的複數個第二導電層66。Further, a plurality of first conductive layers 65 connected to the inner surface 60a side of the first conductive plating portion 62 are provided on the inner surface 60a of the first substrate 60. Further, on the outer surface 60b of the first substrate 60, a plurality of second conductive layers 66 connected to the outer surface 60b side of the first conductive plating portion 62 are provided.

而第二基材70係延伸於寬度方向(第八(A)圖中之左右方向)及長度方向(第八(A)圖中之上下方向)延伸的概略矩形形狀之平板狀部件。第二基材70具有與第一基材60之內表面60a同一寬度及長度。而第二基材70具有位於朝向第一圖所示之氣密室C內部側的內表面70a、以及與該內表面70a相反側之外表面70b。第二基材70例如係含玻璃環氧樹脂製。The second base material 70 is a flat rectangular member extending in the width direction (the horizontal direction in the eighth (A) drawing) and the longitudinal direction (the upper and lower directions in the eighth (A) drawing). The second substrate 70 has the same width and length as the inner surface 60a of the first substrate 60. The second substrate 70 has an inner surface 70a located toward the inner side of the airtight chamber C shown in the first figure, and an outer surface 70b opposite to the inner surface 70a. The second substrate 70 is made of, for example, a glass epoxy resin.

此外,如第八(B)圖所示,第二基材70中形成有相互連接第二基材70之內表面70a及外表面70b間的第一電鍍穿孔73。複數個第一電 鍍穿孔73在第二基材70之寬度方向,比通孔64在外側位置形成2列狀。各列之第一電鍍穿孔73在貫穿第二基材70之內表面70a及外表面70b間的貫穿孔71內周面施行第二導電電鍍部72。第二導電電鍍部72在第二基材70之內表面70a及外表面70b間延伸。如第八(B)圖所示,第二導電電鍍部72以全部埋入貫穿孔71之內部的方式形成。而後,各第二導電電鍍部72之外表面70b側與第一導電層65連接,該第一導電層65與構成形成於第一基材60之通孔64的第一導電電鍍部62之內表面60a側連接。此外,在第二基材70之內表面70a設有連接於第二導電電鍍部72之內表面側的複數個導電焊墊74。如第八(A)圖所示,複數個導電焊墊74在第二基材70之內表面70a,於寬度方向形成2列狀。各導電焊墊74形成長方形狀。Further, as shown in the eighth (B) diagram, the second substrate 70 is formed with a first plating via 73 interposed between the inner surface 70a and the outer surface 70b of the second substrate 70. Multiple first electric The plated perforations 73 are formed in a line shape in the width direction of the second base material 70 at the outer position than the through hole 64. The first electroplated perforations 73 of the respective rows are subjected to the second electroconductive plating portion 72 on the inner circumferential surface of the through hole 71 penetrating between the inner surface 70a and the outer surface 70b of the second substrate 70. The second conductive plating portion 72 extends between the inner surface 70a and the outer surface 70b of the second substrate 70. As shown in the eighth (B) diagram, the second conductive plating portion 72 is formed so as to be entirely buried inside the through hole 71. Then, the outer surface 70b side of each of the second conductive plating portions 72 is connected to the first conductive layer 65, and the first conductive layer 65 and the first conductive plating portion 62 constituting the through hole 64 formed in the first substrate 60 are formed. The surface 60a is connected to the side. Further, a plurality of conductive pads 74 connected to the inner surface side of the second conductive plating portion 72 are provided on the inner surface 70a of the second substrate 70. As shown in the eighth (A) diagram, the plurality of conductive pads 74 are formed in two rows in the width direction on the inner surface 70a of the second substrate 70. Each of the conductive pads 74 is formed in a rectangular shape.

再者,第三基材80係延伸於寬度方向(第八(A)圖中之左右方向)及長度方向(第八(A)圖中之上下方向)之概略矩形形狀的平板狀部件。第三基材80具有與第一基材60之外表面60b同一寬度及長度。而後,第三基材80具有位於朝向第一圖所示之氣密室C內部側的內表面80a與相反側之外表面80b。第三基材80例如係含玻璃環氧樹脂製。Further, the third base material 80 is a flat rectangular member extending in the width direction (the horizontal direction in the eighth (A) drawing) and the longitudinal direction (the upper and lower directions in the eighth (A) drawing). The third substrate 80 has the same width and length as the outer surface 60b of the first substrate 60. Then, the third base material 80 has an inner surface 80a and an opposite side outer surface 80b which are located toward the inner side of the airtight chamber C shown in the first figure. The third substrate 80 is made of, for example, a glass epoxy resin.

此外,如第八(B)圖所示,第三基材80中形成有相互連接第三基材80之內表面80a及外表面80b間的複數個第二電鍍穿孔83。複數個第二電鍍穿孔83在第三基材80之寬度方向,在比通孔64外側之位置形成2列狀。各列之第二電鍍穿孔83在貫穿第三基材80之內表面80a及外表面80b間的貫穿孔81內周面施行第三導電電鍍部82。第三導電電鍍部82在第三基材80之內表面80a及外表面80b間延伸。如第八(B)圖所示,第三導電電鍍部82以全部埋入貫穿孔81內部之方式而形成。而後,各第三導電電鍍部82之 內表面80a側與第二導電層66連接,該第二導電層66與構成形成於第一基材60之通孔64的第一導電電鍍部62之外表面60b側連接。此外,在第三基材80之外表面80b設有與第三導電電鍍部82之外表面側連接的複數個導電焊墊84。複數個導電焊墊84在第三基材80之外表面80b,於寬度方向形成2列狀,不過無圖示。各導電焊墊84形成長方形狀。Further, as shown in the eighth (B) diagram, a plurality of second plated perforations 83 interposed between the inner surface 80a and the outer surface 80b of the third substrate 80 are formed in the third substrate 80. The plurality of second plating perforations 83 are formed in a line shape at a position outside the through hole 64 in the width direction of the third base material 80. The second electroplated portion 82 of each row is subjected to a third conductive plating portion 82 on the inner peripheral surface of the through hole 81 penetrating between the inner surface 80a and the outer surface 80b of the third base member 80. The third conductive plating portion 82 extends between the inner surface 80a and the outer surface 80b of the third substrate 80. As shown in the eighth (B) diagram, the third conductive plating portion 82 is formed so as to be entirely buried inside the through hole 81. Then, each of the third conductive plating portions 82 The inner surface 80a side is connected to the second conductive layer 66, and the second conductive layer 66 is connected to the outer surface 60b side of the first conductive plating portion 62 constituting the through hole 64 formed in the first substrate 60. Further, a plurality of conductive pads 84 connected to the outer surface side of the third conductive plating portion 82 are provided on the outer surface 80b of the third substrate 80. The plurality of conductive pads 84 are formed in two rows on the outer surface 80b of the third substrate 80 in the width direction, but are not shown. Each of the conductive pads 84 has a rectangular shape.

此處,如第八(B)圖所示,第二基材70之外表面70b以接觸於第一基材60之內表面60a的方式配置,並藉由第二基材70堵塞形成於第一基材60之通孔64的內表面側。此外,第三基材80之內表面80a以與第一基材60之外表面60b接觸的方式配置,並藉由第三基材80堵塞形成於第一基材60之通孔64的外表面側。Here, as shown in the eighth (B), the outer surface 70b of the second substrate 70 is disposed in contact with the inner surface 60a of the first substrate 60, and is formed by the second substrate 70 being clogged. The inner surface side of the through hole 64 of a substrate 60. Further, the inner surface 80a of the third substrate 80 is disposed in contact with the outer surface 60b of the first substrate 60, and is blocked by the third substrate 80 on the outer surface of the through hole 64 of the first substrate 60. side.

此外,如第八(A),(B)圖所示,在第二基材70之內表面70a設有導體層90。該導體層90以包圍在第二基材70之內表面70a於寬度方向形成2列狀的複數個導電焊墊74外側之方式形成概略矩形形狀。導體層90以避免與導電焊墊74間短路之方式,對各導電焊墊74隔開指定間隔而配置。導體層90在第二基材70之內表面70a中,以大致覆蓋除去後述之沿著第二基材70外周而連續環形延伸的焊接層91之部分而設置。導體層90例如藉由銅箔而形成。Further, as shown in the eighth (A) and (B), the conductor layer 90 is provided on the inner surface 70a of the second substrate 70. The conductor layer 90 is formed in a substantially rectangular shape so as to surround the outer surface 70a of the second base material 70 so as to form a plurality of outer sides of the plurality of conductive pads 74 in the width direction. The conductor layer 90 is disposed so as to be short-circuited with the conductive pads 74, and the conductive pads 74 are arranged at a predetermined interval. The conductor layer 90 is provided on the inner surface 70a of the second base material 70 so as to substantially cover a portion of the weld layer 91 which is continuously annularly extended along the outer periphery of the second base material 70, which will be described later. The conductor layer 90 is formed, for example, by a copper foil.

該導體層90不限於覆蓋第二基材70之內表面70a的情況,只須覆蓋第二基材70之內表面70a、第二基材70之外表面70b、第一基材60之內表面60a、第一基材60之外表面60b、第三基材80之內表面80a、及第三基材80之外表面80b中的至少一面即可。此處所謂「覆蓋」,係指導體層90在第二基材70之內表面70a、第二基材70之外表面70b、第一基材60之內表面 60a、第一基材60之外表面60b、第三基材80之內表面80a、及第三基材80之外表面80b中的至少一面,至少覆蓋該一面的一部分即可。另外,導體層90宜接近100%覆蓋該一面。The conductor layer 90 is not limited to covering the inner surface 70a of the second substrate 70, and only covers the inner surface 70a of the second substrate 70, the outer surface 70b of the second substrate 70, and the inner surface of the first substrate 60. The outer surface 60b of the first base material 60, the inner surface 80a of the third base material 80, and the outer surface 80b of the third base material 80 may be at least one surface. The term "covering" as used herein refers to the inner surface 70a of the second substrate 70, the outer surface 70b of the second substrate 70, and the inner surface of the first substrate 60. At least one of the outer surface 60b of the first base material 60, the inner surface 80a of the third base material 80, and the outer surface 80b of the third base material 80 may cover at least a part of the one surface. In addition, the conductor layer 90 should preferably cover 100% of the side.

再者,如第八(A),(B)圖所示,在第二基材70之內表面70a形成有沿著第二基材70之外周以指定寬度連續環形地延伸的焊接層91。焊接層91例如以鍍錫或鍍金而形成。Further, as shown in the eighth (A) and (B), the inner surface 70a of the second substrate 70 is formed with a solder layer 91 extending continuously annularly at a predetermined width along the outer circumference of the second substrate 70. The solder layer 91 is formed, for example, by tin plating or gold plating.

另外,請求項1中規定之「位於朝向基板之氣密室內部側的內表面」,係對應第二基材70之內表面70a,「與基板之前述內表面相反側的外表面」,係對應第三基材80之外表面80b。此外,請求項1中規定之「對存在於內表面與外表面間之基板內部的內表面平行延伸之面」,係對應第二基材70之外表面70b、第一基材60之內表面60a、第一基材60之外表面60b、及第三基材80之內表面80a。In addition, the "inner surface located on the inner side of the airtight chamber facing the substrate" defined in the claim 1 corresponds to the inner surface 70a of the second base material 70 and the "outer surface opposite to the inner surface of the substrate". The outer surface 80b of the third substrate 80. Further, the "face extending parallel to the inner surface of the substrate existing between the inner surface and the outer surface" specified in the claim 1 corresponds to the outer surface 70b of the second substrate 70 and the inner surface of the first substrate 60. 60a, the outer surface 60b of the first substrate 60, and the inner surface 80a of the third substrate 80.

其次,使用平板狀連接器50電性相互連接氣密室C之內側及外側時,首先如第一圖所示,先將第一電路基板20配置於氣密室C內。而後,以平板狀連接器50之第二基材70的內表面70a為隔壁40側,並朝向開口部41側,不過無圖示。而後,藉由焊錫將在第二基材70之內表面70a側的焊接層91連接於隔壁40。藉此,平板狀連接器50固定於隔壁40,並且藉由平板狀連接器50堵塞開口部41。此外,平板狀連接器50之第二基材70的內表面70a側之導電焊墊74與設於第一電路基板20之接點21接觸。Next, when the flat connector 50 is electrically connected to the inside and the outside of the airtight chamber C, first, as shown in the first figure, the first circuit board 20 is first placed in the airtight chamber C. Then, the inner surface 70a of the second base material 70 of the flat connector 50 is on the side of the partition 40, and faces the side of the opening 41, but is not shown. Then, the solder layer 91 on the inner surface 70a side of the second substrate 70 is bonded to the partition wall 40 by soldering. Thereby, the flat connector 50 is fixed to the partition wall 40, and the opening portion 41 is blocked by the flat connector 50. Further, the conductive pads 74 on the inner surface 70a side of the second substrate 70 of the flat connector 50 are in contact with the contacts 21 provided on the first circuit substrate 20.

而後,使設於第二電路基板30之接點31與在平板狀連接器50之第三基材80的外表面80b側之導電焊墊84接觸。藉此,經由平板狀連接器50而電性相互連接第一電路基板20及第二電路基板30。Then, the contact 31 provided on the second circuit substrate 30 is brought into contact with the conductive pad 84 on the outer surface 80b side of the third substrate 80 of the flat connector 50. Thereby, the first circuit board 20 and the second circuit board 30 are electrically connected to each other via the flat connector 50.

按照該實施形態之平板狀連接器50時,堵塞開口部41之基板60A係作為多層基板之4層基板。而後,基板60A具備平板狀之第一基材60;配置於第一基材60之內表面60a,而堵塞開口部41之平板狀的第二基材70;及配置於第一基材60之外表面60b的平板狀之第三基材80。此外,導體層90覆蓋第二基材70之內表面70a的一面。因而,填充於氣密室C內部之氣體即使從氣密室C內部朝向外部,通過第二基材70、第一基材60及第三基材80中,仍無法通過導體層90。藉此,使用作為多層基板之4層基板,可有效抑制填充於氣密室C內部之氣體的氣體透過率。According to the flat connector 50 of the embodiment, the substrate 60A that blocks the opening 41 serves as a four-layer substrate of the multilayer substrate. Then, the substrate 60A includes a flat first substrate 60; a flat second substrate 70 that is disposed on the inner surface 60a of the first substrate 60 to block the opening 41; and is disposed on the first substrate 60. A flat third substrate 80 having an outer surface 60b. Further, the conductor layer 90 covers one side of the inner surface 70a of the second substrate 70. Therefore, the gas filled in the inside of the airtight chamber C cannot pass through the conductor layer 90 through the second base material 70, the first base material 60, and the third base material 80 even from the inside to the outside of the airtight chamber C. Thereby, the gas permeability of the gas filled in the inside of the airtight chamber C can be effectively suppressed by using the four-layer substrate which is a multilayer substrate.

而後,平板狀連接器50具備電性相互連接第一基材60之內表面60a及外表面60b間的通孔64。此外,平板狀連接器50具備相互連接第二基材70之內表面70a及外表面70b間,並且與第一基材60之通孔64連接的第一電鍍穿孔73。再者,平板狀連接器50具備相互連接第三基材80之內表面80a及外表面80b間,並且與第一基材60之通孔64連接的第二電鍍穿孔83。因而,可藉由通孔64、第一電鍍穿孔73及第二電鍍穿孔83電性確實連接4層基板之內表面60a及外表面80b間。另外,藉由第二基材70堵塞通孔64之內表面60a側,並藉由第三基材80堵塞通孔64之外表面60b側。因而,在4層基板中,於構成通孔64之第一導電電鍍部62內未必需要填充填充材料63。如本實施形態,在第一導電電鍍部62內填充填充材料63情況下,更可抑制充滿於氣密室C內部之氣體的氣體透過率。Then, the flat connector 50 is provided with a through hole 64 electrically connected between the inner surface 60a and the outer surface 60b of the first base material 60. Further, the flat connector 50 is provided with a first plated through hole 73 which is connected between the inner surface 70a and the outer surface 70b of the second substrate 70 and is connected to the through hole 64 of the first substrate 60. Further, the flat connector 50 is provided with a second plated through hole 83 which is connected between the inner surface 80a and the outer surface 80b of the third base material 80 and is connected to the through hole 64 of the first base material 60. Therefore, the through hole 64, the first plated through hole 73 and the second plated through hole 83 can be electrically connected between the inner surface 60a and the outer surface 80b of the four-layer substrate. Further, the inner surface 60a side of the through hole 64 is blocked by the second base material 70, and the outer surface 60b side of the through hole 64 is blocked by the third base material 80. Therefore, in the four-layer substrate, it is not necessary to fill the filling material 63 in the first conductive plating portion 62 constituting the through hole 64. In the present embodiment, when the filling material 63 is filled in the first conductive plating portion 62, the gas permeability of the gas filled in the inside of the airtight chamber C can be further suppressed.

其次,參照第九(A),(B)圖說明第八(A)、(B)圖所示之平板狀連接器的第一變形例。Next, a first modification of the flat connector shown in the eighth (A) and (B) will be described with reference to the ninth (A) and (B) drawings.

第九(A),(B)圖所示之平板狀連接器50與第八(A)、(B) 圖所示之平板狀連接器50的基本構成相同,不過差異之處為構成通孔64之第一導電電鍍部62內不填充填充材料63,而作為空間67。如前述,藉由第二基材70堵塞通孔64之內表面60a側,並藉由第三基材80堵塞通孔64之外表面60b側。因而,在4層基板中,於構成通孔64之第一導電電鍍部62內未必需要填充填充材料63(參照第八(B)圖)。The flat connector 50 and the eighth (A), (B) shown in the ninth (A) and (B) The basic configuration of the flat connector 50 shown in the drawing is the same, except that the first conductive plating portion 62 constituting the through hole 64 is not filled with the filling material 63 as the space 67. As described above, the inner surface 60a side of the through hole 64 is blocked by the second base material 70, and the outer surface 60b side of the through hole 64 is blocked by the third base material 80. Therefore, in the four-layer substrate, it is not necessary to fill the filling material 63 in the first conductive plating portion 62 constituting the through hole 64 (refer to FIG. 8(B)).

此外,第九(A),(B)圖所示之平板狀連接器50在各第一電鍍穿孔73中,於第二導電電鍍部72之內部形成有空間75。此外,各第二電鍍穿孔83中,在第三導電電鍍部82之內部亦形成有空間85。第八(A),(B)圖所示之平板狀連接器50中,第二導電電鍍部72及第三導電電鍍部82以全部埋入貫穿孔71、81之內部的方式而形成。關於這些部分,第九(A),(B)圖所示之平板狀連接器50與第八(A),(B)圖所示之平板狀連接器50不同。在第二導電電鍍部72及第三導電電鍍部82之內部形成空間75、85者,在各第一電鍍穿孔73及第二電鍍穿孔83中,當貫穿孔71、81之直徑大時有效。Further, in the flat connector 50 shown in the ninth (A) and (B), a space 75 is formed in each of the first plating vias 73 inside the second conductive plating portion 72. Further, in each of the second plating vias 83, a space 85 is formed inside the third conductive plating portion 82. In the flat connector 50 shown in the eighth (A) and (B), the second conductive plating portion 72 and the third conductive plating portion 82 are formed so as to be entirely buried inside the through holes 71 and 81. Regarding these portions, the flat connector 50 shown in the ninth (A) and (B) is different from the flat connector 50 shown in the eighth (A) and (B). When the spaces 75 and 85 are formed inside the second conductive plating portion 72 and the third conductive plating portion 82, it is effective when the diameters of the through holes 71 and 81 are large in each of the first plating vias 73 and the second plating vias 83.

即使是第九(A),(B)圖所示之平板狀連接器50,堵塞開口部41之基板60A仍係作為多層基板之4層基板。而後,基板60A具備平板狀之第一基材60;配置於第一基材60之內表面60a,並堵塞開口部41之平板狀的第二基材70;及配置於第一基材60之外表面60b的平板狀之第三基材80。此外,導體層90覆蓋第二基材70之內表面70a。因而即使填充於氣密室C內部之氣體從氣密室C內部向外部通過第二基材70、第一基材60及第三基材80中,仍無法通過導體層90。藉此,使用作為多層基板之4層基板,可有效抑制充滿於氣密室C內部之氣體的氣體透過率。Even in the flat connector 50 shown in the ninth (A) and (B), the substrate 60A that blocks the opening portion 41 serves as a four-layer substrate of the multilayer substrate. Then, the substrate 60A includes a flat first substrate 60, a flat second substrate 70 that is disposed on the inner surface 60a of the first substrate 60 and blocks the opening 41, and is disposed on the first substrate 60. A flat third substrate 80 having an outer surface 60b. Further, the conductor layer 90 covers the inner surface 70a of the second substrate 70. Therefore, even if the gas filled in the inside of the airtight chamber C passes through the second base material 70, the first base material 60, and the third base material 80 from the inside to the outside of the airtight chamber C, the conductor layer 90 cannot pass. Thereby, the gas permeability of the gas filled in the inside of the airtight chamber C can be effectively suppressed by using the four-layer substrate which is a multilayer substrate.

再者,參照第十(A),(B)圖說明第八(A)、(B)圖所示之平板狀連接器的第二變形例。Further, a second modification of the flat connector shown in Figs. 8(A) and (B) will be described with reference to the tenth (A) and (B) drawings.

第十(A),(B)圖所示之平板狀連接器50與第八(A),(B)圖所示之平板狀連接器50的基本構成相同,不過差異之處為並非覆蓋第二基材70之內表面70a,而係以覆蓋第一基材60之內表面60a的方式設置導體層90。The flat connector 50 shown in the tenth (A) and (B) is the same as the basic configuration of the flat connector 50 shown in the eighth (A) and (B), but the difference is not the coverage. The inner surface 70a of the second substrate 70 is provided with a conductor layer 90 so as to cover the inner surface 60a of the first substrate 60.

具體敘述時,導體層90係以覆蓋在第二基材70之內表面70a於寬度方向形成2列狀的複數個第一導電層65之外側的方式形成概略矩形形狀。導體層90以與各第一導電層65之間不致短路的方式,對各第一導電層65隔開指定間隔而配置。導體層90以覆蓋第二基材70之內表面70a的大致全面之方式而設置。Specifically, the conductor layer 90 is formed into a substantially rectangular shape so as to cover the outer surface of the plurality of first conductive layers 65 in which the inner surface 70a of the second base material 70 is formed in a row in the width direction. The conductor layer 90 is disposed at a predetermined interval from each of the first conductive layers 65 so as not to be short-circuited with each of the first conductive layers 65. The conductor layer 90 is disposed in a substantially uniform manner covering the inner surface 70a of the second substrate 70.

此外,第十(A),(B)圖所示之平板狀連接器50與第八(A),(B)圖所示之平板狀連接器50不同之處為,構成通孔64之第一導電電鍍部62內不填充填充材料63,而作為空間67。Further, the flat connector 50 shown in the tenth (A) and (B) is different from the flat connector 50 shown in the eighth (A) and (B) in that the through hole 64 is formed. A filling material 63 is not filled in the conductive plating portion 62 as a space 67.

即使是該平板狀連接器50,堵塞開口部41之基板60A仍係作為多層基板之4層基板。而後,基板60A具備平板狀之第一基材60;配置於第一基材60之內表面60a,並堵塞開口部41之平板狀的第二基材70;及配置於第一基材60之外表面60b的平板狀之第三基材80。此外,導體層90覆蓋第一基材60之內表面60a。因而,填充於氣密室C內部之氣體即使從氣密室C內部向外部通過第二基材70、第一基材60及第三基材80,仍無法通過導體層90。藉此,使用作為多層基板之4層基板,可有效抑制充滿於氣密室C內部之氣體的氣體透過率。Even in the flat connector 50, the substrate 60A that blocks the opening portion 41 serves as a four-layer substrate of the multilayer substrate. Then, the substrate 60A includes a flat first substrate 60, a flat second substrate 70 that is disposed on the inner surface 60a of the first substrate 60 and blocks the opening 41, and is disposed on the first substrate 60. A flat third substrate 80 having an outer surface 60b. Further, the conductor layer 90 covers the inner surface 60a of the first substrate 60. Therefore, even if the gas filled in the inside of the airtight chamber C passes through the second base material 70, the first base material 60, and the third base material 80 from the inside to the outside of the airtight chamber C, the gas cannot pass through the conductor layer 90. Thereby, the gas permeability of the gas filled in the inside of the airtight chamber C can be effectively suppressed by using the four-layer substrate which is a multilayer substrate.

以上,係就本創作之實施形態作說明,不過本創作不限定於此,可進行各種變更、改良。The above description has been made on the embodiment of the present creation, but the present creation is not limited thereto, and various modifications and improvements can be made.

例如,導體層11只須覆蓋基材10之內表面10a及外表面10b中的至少一面即可,未必需要覆蓋平板狀連接器1之基材10的內表面10a、缺口19之內側面19a及底面19b、及基材10之外表面10b。For example, the conductor layer 11 only needs to cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10, and it is not necessary to cover the inner surface 10a of the substrate 10 of the flat connector 1, the inner side surface 19a of the notch 19, and The bottom surface 19b and the outer surface 10b of the substrate 10.

此外,在基材10之內表面10a亦可不形成沿著基材10外周而連續環形地延伸之焊接層17。Further, the inner surface 10a of the substrate 10 may not form the solder layer 17 which continuously extends annularly along the outer periphery of the substrate 10.

此外,在第二基材70之內表面70a亦可不形成沿著第二基材70外周以指定寬度連續環形地延伸的焊接層91。Further, the inner surface 70a of the second substrate 70 may not form the solder layer 91 extending continuously annularly at a predetermined width along the outer circumference of the second substrate 70.

再者,多層基板在第八圖至第十圖中係說明使用4層基板之例,不過亦可為6層以上之多層基板。此時,導體層只須覆蓋位於朝向多層基板之氣密室C內部側的內表面、與多層基板之前述內表面相反側之外表面、及存在於前述內表面與前述外表面間的前述多層基板內部之對前述內表面平行延伸之面中的至少一面即可。Further, in the eighth to tenth embodiments, the multilayer substrate is described as an example in which a four-layer substrate is used, but it may be a multilayer substrate of six or more layers. In this case, the conductor layer only needs to cover the inner surface located on the inner side of the airtight chamber C facing the multilayer substrate, the outer surface opposite to the inner surface of the multilayer substrate, and the aforementioned multilayer substrate existing between the inner surface and the outer surface. The inner portion may have at least one of the faces extending parallel to the inner surface.

此外,第一圖至第七圖所示之平板狀連接器1中,分別形成於基材10之內表面10a及外表面10b的導電焊墊16上亦可連接金屬製之接點。此外,該導電焊墊16上亦可連接安裝於絕緣性之機架上的金屬製之接點。Further, in the flat connector 1 shown in the first to seventh embodiments, metal contacts can be connected to the conductive pads 16 formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively. In addition, the conductive pad 16 may also be connected to a metal contact mounted on an insulating frame.

再者,第八圖至第十圖所示之平板狀連接器50中,分別形成於第二基材70之內表面70a及第三基材80之外表面80b的導電焊墊74、84上亦可連接金屬製之接點。此外,該導電焊墊74、84上亦可連接安裝於絕緣性之機架上的金屬製之接點。Furthermore, the flat connectors 50 shown in the eighth to tenth embodiments are respectively formed on the inner surfaces 70a of the second substrate 70 and the conductive pads 74, 84 of the outer surface 80b of the third substrate 80. Metal joints can also be connected. In addition, the conductive pads 74, 84 can also be connected to metal contacts mounted on an insulating frame.

1‧‧‧平板狀連接器1‧‧‧flat connector

20‧‧‧第一電路基板20‧‧‧First circuit board

21‧‧‧接點21‧‧‧Contacts

30‧‧‧第二電路基板30‧‧‧Second circuit substrate

31‧‧‧接點31‧‧‧Contacts

40‧‧‧隔壁40‧‧‧ next door

41‧‧‧開口部41‧‧‧ openings

42‧‧‧氣體注入用開口部42‧‧‧ openings for gas injection

C‧‧‧氣密室C‧‧‧Airlock

Claims (8)

一種平板狀連接器,係用於電性相互連接以隔壁劃分之氣密室的內側及外側,以堵塞形成於前述隔壁而貫穿氣密室內部與外部之開口部,其特徵為:具備平板狀之基板,其係堵塞前述開口部,該基板具備導體層,其係覆蓋位於朝向該基板之前述氣密室內部側的內表面、與前述基板之前述內表面相反側的外表面、及存在於前述內表面與前述外表面之間的前述基板內部,而對前述內表面平行延伸之面中的至少一面。A flat-plate connector for electrically interconnecting an inner side and an outer side of an airtight chamber partitioned by a partition wall to block an opening formed in the partition wall and penetrating inside the airtight chamber and the outside, and is characterized in that: a flat substrate is provided The clogging of the opening, the substrate including a conductor layer covering an inner surface facing the inner side of the inner surface of the substrate, an outer surface opposite to the inner surface of the substrate, and the inner surface At least one of the surfaces of the aforementioned substrate between the outer surface and the outer surface extending parallel to the inner surface. 如申請專利範圍第1項之平板狀連接器,其中前述基板係2層基板,該2層基板具備平板狀之基材,其係堵塞前述開口部,前述導體層覆蓋前述基材之內表面及外表面中的至少一面,並具備通孔,其係電性相互連接前述基材之內表面及外表面間,且由設於貫穿前述基材之內表面及外表面間的貫穿孔內周面,並在前述基材之內表面及外表面間延伸的環狀導電電鍍部、及填充於該導電電鍍部內之填充材料構成。The flat connector of the first aspect of the invention, wherein the substrate is a two-layer substrate, wherein the two-layer substrate includes a flat substrate that blocks the opening, and the conductor layer covers an inner surface of the substrate and At least one of the outer surfaces and the through holes are electrically connected to each other between the inner surface and the outer surface of the substrate, and are provided by the inner peripheral surface of the through hole provided between the inner surface and the outer surface of the substrate And comprising an annular conductive plating portion extending between the inner surface and the outer surface of the substrate, and a filler filled in the conductive plating portion. 如申請專利範圍第2項之平板狀連接器,其中在前述基材之前述內表面形成沿著前述基材之外周連續環形地延伸的焊接層。A flat connector according to claim 2, wherein a solder layer extending continuously annularly along the outer periphery of the substrate is formed on the inner surface of the substrate. 如申請專利範圍第2項或第3項之平板狀連接器,其中前述填充材料係有導電性之焊錫。A flat connector according to claim 2 or 3, wherein the filler material is a conductive solder. 如申請專利範圍第1項之平板狀連接器,其中前述基板係多層基板,且該多層基板具備:平板狀之第一基材;平板狀之第二基材,其係配置於位於朝向該第一基材之前述氣密室內部側的內表面,而堵塞前述 開口部;及平板狀之第三基材,其係配置於前述第一基材之外表面;前述導體層覆蓋前述第二基材之內表面、前述第二基材之外表面、前述第一基材之內表面、前述第一基材之外表面、前述第三基材之內表面、及前述第三基材之外表面中的至少一面,並具備:通孔,其係電性相互連接前述第一基材之內表面及外表面間,且具備環狀之導電電鍍部,其係設於貫穿前述第一基材之內表面及外表面間的貫穿孔之內周面,並在前述第一基材之內表面及外表面間延伸;第一電鍍穿孔,其係相互連接前述第二基材之內表面及外表面間,並且與前述第一基材之通孔連接;及第二電鍍穿孔,其係相互連接前述第三基材之內表面及外表面間,並且與前述第一基材之通孔連接。The flat connector of the first aspect of the invention, wherein the substrate is a multilayer substrate, and the multilayer substrate includes: a first substrate having a flat shape; and a second substrate having a flat shape disposed to face the first substrate An inner surface of the inner surface of the inner surface of the inner surface of the substrate, which blocks the foregoing And a third substrate having a flat shape disposed on an outer surface of the first substrate; the conductor layer covering an inner surface of the second substrate, an outer surface of the second substrate, and the first surface At least one of an inner surface of the substrate, an outer surface of the first substrate, an inner surface of the third substrate, and an outer surface of the third substrate, and a through hole electrically connected to each other Between the inner surface and the outer surface of the first substrate, an annular conductive plating portion is provided on the inner circumferential surface of the through hole penetrating between the inner surface and the outer surface of the first substrate, and a first plated perforation extending between the inner surface and the outer surface of the second substrate and connected to the through hole of the first substrate; and a second The electroplated perforations are connected between the inner surface and the outer surface of the third substrate, and are connected to the through holes of the first substrate. 如申請專利範圍第5項之平板狀連接器,其中在前述第二基材之內表面形成沿著前述第二基材之外周而連續環形地延伸的焊接層。The flat connector of claim 5, wherein the inner surface of the second substrate forms a solder layer extending continuously annularly along the outer circumference of the second substrate. 如申請專利範圍第5項或第6項之平板狀連接器,其中前述通孔具備填充於前述導電電鍍部內之填充材料。A flat connector according to claim 5 or 6, wherein the through hole has a filling material filled in the conductive plating portion. 如申請專利範圍第7項之平板狀連接器,其中前述填充材料係有導電性之焊錫。The flat connector of claim 7, wherein the filler material is a conductive solder.
TW102210913U 2012-07-19 2013-06-11 Planar connector TWM465683U (en)

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