WO2014013644A1 - Planar connector - Google Patents

Planar connector Download PDF

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Publication number
WO2014013644A1
WO2014013644A1 PCT/JP2013/002413 JP2013002413W WO2014013644A1 WO 2014013644 A1 WO2014013644 A1 WO 2014013644A1 JP 2013002413 W JP2013002413 W JP 2013002413W WO 2014013644 A1 WO2014013644 A1 WO 2014013644A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
base material
flat connector
flat
conductive
Prior art date
Application number
PCT/JP2013/002413
Other languages
French (fr)
Japanese (ja)
Inventor
橋本 信一
Original Assignee
タイコエレクトロニクスジャパン合同会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by タイコエレクトロニクスジャパン合同会社 filed Critical タイコエレクトロニクスジャパン合同会社
Priority to CN201380038423.6A priority Critical patent/CN104471794B/en
Priority to TW102210913U priority patent/TWM465683U/en
Publication of WO2014013644A1 publication Critical patent/WO2014013644A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/114Pad being close to via, but not surrounding the via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09445Pads for connections not located at the edge of the PCB, e.g. for flexible circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers

Definitions

  • the present invention is used for electrically interconnecting the inside and outside of an airtight chamber defined by a partition wall, and is a flat plate connector formed in the partition wall for closing an opening that penetrates the inside and the outside of the airtight chamber. About.
  • an airtight chamber partitioned by a partition wall For example, in a semiconductor chip process in which an integrated circuit is mounted, a vacuum chamber capable of reducing the pressure to near vacuum is used, and the inside and outside of the vacuum chamber are electrically connected.
  • the inside of an airtight chamber partitioned by a partition wall is filled with a gas having a low molecular weight, for example, He gas or hydrogen gas, and decompressed.
  • a gas having a low molecular weight for example, He gas or hydrogen gas
  • FIG. 11 is a schematic diagram of an electrical connection structure for electrically interconnecting the inside and outside of a hermetic chamber, which is partitioned by a partition wall and adjusted in pressure, according to a conventional example.
  • the electrical connection structure shown in FIG. 11 electrically interconnects the interior A side and exterior B side of a chamber (not shown) that is partitioned by a partition wall (not shown) and whose internal pressure is adjusted.
  • the partition wall is formed with an opening (not shown) penetrating the inside A side and the outside B side of the chamber.
  • the opening is closed by the flat connector 110.
  • the base material of the flat connector 110 is provided with a plurality of via holes 112 filled with a conductor.
  • a pair of conductive pads 113 a and 113 b interconnected by the conductors of the via holes 112 are provided on the inner surface and the outer surface of the flat connector 110.
  • a plurality of first connectors 120 ⁇ / b> A are disposed inside the flat connector 110, and a plurality of second connectors 120 ⁇ / b> B are disposed outside the flat connector 110.
  • Each first connector 120A is arranged so as to extend in a direction orthogonal to the flat connector 110, and a plurality of the first connectors 120A are arranged along the longitudinal direction (vertical direction in FIG. 11) of the flat connector 110.
  • Each of the second connectors 120B is disposed so as to extend in a direction orthogonal to the flat connector 110.
  • the second connector 120B extends along the longitudinal direction of the flat connector 110 so that the second connector 120B faces the first connector 120A. Are arranged.
  • each first connector 120A is arranged so as to extend in a direction orthogonal to the flat connector 110, and the width direction of the second substrate 121 (perpendicular to the paper surface in FIG. 11). And a plurality of contacts 123 arranged at a predetermined pitch along the direction). On the surface of the second substrate 121 (the upper surface in FIG. 11), a plurality of conductive patterns 124 are provided at a predetermined pitch along the width direction of the second substrate 121. Each contact 123 is connected to one end side of each conductive pattern 124. A signal line 122 is connected to the other end side of each conductive pattern 124.
  • Each second connector 120B has the same configuration as each first connector 120A.
  • the first connector 120A is advanced in the direction of arrow F in FIG. 11, and the contact 123 is brought into contact with the conductive pad 113a provided on the inner surface of the flat connector 110.
  • the second connector 120B is advanced in the direction of arrow F ′ in FIG. 11, and the contact 123 is brought into contact with the conductive pad 113 b provided on the outer surface of the flat connector 110.
  • the signal lines 122 and 122 on the chamber inner side A and the outer side B are connected to the conductive pattern 124 on the chamber inner side A, the contact 123, the conductive pad 113a on the inner surface of the flat connector 110, the via hole 112, and the flat connector. It is electrically connected through the conductive pad 113b on the outer surface 110, the contact 123, and the conductive pattern 124 on the chamber outside B side.
  • FIG. 12 is a cross-sectional view of a conventional multilayer printed wiring board.
  • a multilayer printed wiring board 201 shown in FIG. 12 both surfaces of a high dielectric constant substrate 202 are sandwiched between planar copper foil pattern layers 203 serving as power supply lines or ground lines.
  • An insulating layer 204 is formed outside the copper foil pattern layer 203, and a signal line 205 such as a copper foil is further formed outside the insulating layer 204.
  • JP 2004-349073 A Japanese Utility Model Publication No. 7-10979
  • the conventional electrical connection structure 101 shown in FIG. 11 and the conventional multilayer printed wiring board 201 shown in FIG. 12 have the following problems. That is, in the case of the electrical connection structure 101 shown in FIG. 11, the exposed area of the base material of the flat connector 110 that closes the opening that penetrates the inside A side and the outside B side of the chamber is large. That is, the areas of the exposed portions without the conductive pads 113a and 113b are large on the inner side A side and the outer side B side of the base material chamber of the flat connector 110. For this reason, the gas permeability which the gas with which the inside A of a chamber is filled permeate
  • the planar copper foil pattern layer 203 may suppress the gas permeability. Is possible. However, since there is no through-hole penetrating between both surfaces of the high dielectric constant substrate 202, the both surfaces of the high dielectric constant substrate 202 cannot be electrically connected. If a through hole penetrating between both surfaces of the high dielectric constant substrate 202 is formed, gas passes through the through hole and the gas permeability cannot be suppressed.
  • the present invention has been made to solve these conventional problems, and the object thereof is used to electrically interconnect the inside and outside of an airtight chamber partitioned by a partition, and is formed in the partition.
  • the flat connector that closes the opening that penetrates the inside and outside of the hermetic chamber, the gas permeability of the gas filled inside the hermetic chamber can be effectively suppressed, and the inside of the substrate
  • An object of the present invention is to provide a flat connector that can electrically and reliably connect a surface and an outer surface.
  • a flat connector is used to electrically interconnect the inside and outside of an airtight chamber partitioned by a partition, and is formed in the partition.
  • a flat connector for closing an opening penetrating the inside and outside of the hermetic chamber comprising a flat substrate for closing the opening, the substrate facing the inside of the hermetic chamber of the substrate An inner surface located, an outer surface opposite to the inner surface of the substrate, and a surface extending parallel to the inner surface present in the substrate between the inner surface and the outer surface
  • a conductive layer covering at least one surface is provided.
  • covering means that the conductor layer extends parallel to the inner surface of the substrate, the outer surface of the substrate, and the inner surface existing inside the substrate between the inner surface and the outer surface. It means that at least one part of the surface should cover at least a part of the surface.
  • the conductor layer preferably covers nearly 100% of at least one of the inner surface and the outer surface of the substrate.
  • the substrate is a two-layer substrate
  • the two-layer substrate includes a flat substrate that closes the opening
  • the conductor layer includes an inner surface and an outer surface of the substrate.
  • a via that covers at least one surface of the base material and electrically interconnects the inner surface and the outer surface of the base material, the inner surface of the through-hole penetrating between the inner surface and the outer surface of the base material. It is preferable to include the via made of an annular conductive plating portion that is provided and extends between the inner surface and the outer surface of the substrate and a filler filled in the conductive plating portion.
  • a soldering layer that extends continuously and endlessly along the outer periphery of the base material may be formed on the inner surface of the base material. Furthermore, in this flat connector, it is preferable that the filler is a conductive solder.
  • the substrate is a multilayer substrate, and the multilayer substrate is formed on a flat plate-like first base material and an inner surface of the first base material positioned toward the inside of the airtight chamber.
  • a flat plate-like second base material arranged to close the opening; and a flat plate-like third base material arranged on an outer surface of the first base material, wherein the conductor layer is formed of the second base material.
  • a via that covers at least one surface of the first substrate and electrically interconnects the inner surface and the outer surface of the first base material, the inner surface of the through hole penetrating between the inner surface and the outer surface of the first base material;
  • the via provided with an annular conductive plating portion provided on a peripheral surface and extending between an inner surface and an outer surface of the first substrate; and the second group A first plated through hole interconnecting the inner and outer surfaces of the first substrate and the vias of the first substrate, and interconnecting the inner and outer surfaces of the third substrate and the first substrate
  • the “multilayer substrate” means a multilayer substrate having four or more layers.
  • a soldering layer that extends continuously and endlessly along the outer periphery of the second base material may be formed on the inner surface of the second base material.
  • the via may include a filler filled in the conductive plating portion. In the flat connector, it is preferable that the filler is conductive solder.
  • the flat board includes a flat board that closes the opening of the partition wall, and the board includes an inner surface that is located toward an inner side of the hermetic chamber of the board, and the inner surface of the board.
  • a conductor composed of a plurality of conductor patterns covering at least one of the outer surface opposite to the inner surface and a surface extending in parallel to the inner surface existing inside the substrate between the inner surface and the outer surface With layers. For this reason, even if the gas filled in the hermetic chamber can pass through the substrate from the inside of the hermetic chamber to the outside, it cannot pass through the conductor layer, and the gas permeation of the gas filled in the hermetic chamber is prevented. The rate can be effectively suppressed.
  • the gas filled in the hermetic chamber particularly He gas or hydrogen gas having a low molecular weight
  • the epoxy part which is an organic substance easily passes through the epoxy part which is an organic substance.
  • the gas filled in the hermetic chamber moves from the inside of the hermetic chamber toward the outside, the movement is blocked by the conductor layer. Thereby, the gas permeability of the gas with which the inside of an airtight chamber is filled can be suppressed more effectively.
  • the substrate is a two-layer substrate
  • the two-layer substrate includes a flat substrate that closes the opening
  • the conductor layer includes an inner surface and an outer surface of the substrate.
  • the flat connector includes vias that electrically interconnect the inner surface and the outer surface of the substrate. For this reason, the inner surface and the outer surface of the base material of the two-layer substrate can be electrically and reliably connected by vias.
  • the conductive plating part constituting the via is filled with the filler, the gas permeability of the gas filled in the airtight chamber can be further effectively suppressed.
  • the substrate is a multilayer substrate
  • the multilayer substrate is formed on a flat plate-like first base material and an inner surface of the first base material facing the inside of the hermetic chamber.
  • a flat plate-like second base material that is arranged and closes the opening, and a flat plate-like third base material that is arranged on the outer surface of the first base material.
  • the conductor layer includes an inner surface of the second substrate, an outer surface of the second substrate, an inner surface of the first substrate, an outer surface of the first substrate, and an inner surface of the third substrate. Covering at least one of the surface and the outer surface of the third substrate. In this case, the gas permeability of the gas filled in the hermetic chamber can be effectively suppressed using the multilayer substrate.
  • the flat connector includes a via that electrically interconnects the inner surface and the outer surface of the first base material.
  • the flat connector includes a first plated through hole that interconnects the inner surface and the outer surface of the second base material and connects to the via of the first base material, the inner surface of the third base material, and A second plated through hole interconnecting the outer surfaces and connecting to the via of the first substrate is provided.
  • the inner surface and the outer surface of the multilayer substrate can be electrically and reliably connected by the via, the first plated through hole, and the second plated through hole.
  • the inner surface side of the via is closed by the second base material, and the outer surface side of the via is closed by the third base material. For this reason, in the multilayer substrate, it is not always necessary to fill the conductive plating portion constituting the via with a filler.
  • FIG. 2 is a cross-sectional view showing in detail the periphery of the flat connector in the electrical connection structure using the flat connector shown in FIG. 1.
  • FIG. 4 is a cross-sectional view taken along line 4-4 in FIG.
  • FIG. 5 is an enlarged view of the via and its periphery in FIG. 4.
  • It is a top view of the flat connector which removed the conductor layer from the flat connector shown in FIG. It is a top view of the modification of the flat connector shown in FIG. FIG.
  • FIG. 2A is a plan view of a flat connector according to the present invention
  • FIG. 4B is a cross-sectional view taken along line 8B-8B in FIG. 8 shows a first modification of the flat connector shown in FIG. 8, (A) is a plan view, and (B) is a sectional view taken along line 9B-9B in (A). 8 shows a second modification of the flat connector shown in FIG. 8, (A) is a cross-sectional view, and (B) is a cross-sectional view taken along line 10B-10B in (A).
  • It is a schematic diagram of the electrical connection structure which electrically interconnects the inner side and the outer side of the airtight chamber in which the pressure was adjusted divided by the partition of a prior art example. It is sectional drawing of the conventional multilayer printed wiring board.
  • FIG. 1 shows an electrical connection structure using the flat connector according to the first embodiment of the present invention.
  • an airtight chamber C partitioned by a partition wall 40 and kept airtight.
  • the inside of the airtight chamber C may be in a state close to a vacuum, or may be filled with a gas having a low molecular weight, such as He gas or hydrogen gas, and reduced in pressure to a pressure lower than the external pressure. Further, the inside of the airtight chamber C may be in a state of a pressure higher than the external pressure.
  • the partition wall 40 is formed with an opening 41 penetrating the inside and the outside of the hermetic chamber C. Further, the partition wall 40 is formed with a gas injection opening 42 for injecting gas into the hermetic chamber C of the partition wall 40.
  • the partition 40 is made of metal. And the opening part 41 of the partition 40 is block
  • the flat connector 1 includes a substrate 10A that closes the opening 41 as shown in FIG.
  • the substrate 10 ⁇ / b> A is a two-layer substrate, and the two-layer substrate includes a base material 10 that closes the opening 41.
  • the base material 10 is a substantially rectangular flat plate member extending in the width direction (up and down direction in FIG. 3) and the longitudinal direction (left and right direction in FIG. 3).
  • the base material 10 has an inner surface 10a positioned toward the inner side of the airtight chamber C and an outer surface 10b opposite to the inner surface 10a.
  • the base material 10 has the width direction right end surface 10c, the width direction left end surface 10d, the longitudinal direction rear end surface 10e, and the longitudinal direction front end surface 10f.
  • the inner surface 10a of the base material 10 is formed with a notch 19 having a predetermined width and extending in an endless manner along the outer periphery of the base material 10 and having an inner side surface 19a and a bottom surface 19b.
  • the base material 10 is made of glass-filled epoxy, for example.
  • the “inner surface located toward the inner side of the hermetic chamber of the substrate” defined in claim 1 corresponds to the inner surface 10a of the base material 10 and “the opposite side of the inner surface of the substrate”.
  • the “outer surface” corresponds to the outer surface 10 b of the substrate 10.
  • the “plane extending parallel to the inner surface existing inside the substrate between the inner surface and the outer surface” defined in claim 1 does not exist in the flat connector 1.
  • the base material 10 is provided with a conductor layer 11.
  • the conductor layer 11 includes a plurality of two rows of conductor patterns 11a formed on the inner surface 10a of the substrate 10, a plurality of two rows of conductor patterns 11a formed on the outer surface 10b of the substrate 10, and these The conductor pattern 11b is provided so as to surround the outside of the plurality of conductor patterns 11a.
  • One of the two rows of conductive patterns 11a formed on the inner surface 10a of the base material 10 is a conductor pattern adjacent along the longitudinal direction of the base material 10 on the right side in the width direction of the base material 10. 11a is arranged at a pitch that does not short-circuit each other.
  • the other row of the plurality of two-row conductive patterns 11 a formed on the inner surface 10 a of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10.
  • the conductor patterns 11a are arranged at a pitch that does not cause a short circuit.
  • one row of the plurality of two rows of conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the width direction of the base material 10 along the longitudinal direction of the base material 10.
  • the conductor patterns 11a are arranged at a pitch that does not cause a short circuit.
  • the other row of the plurality of two-row conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10.
  • the conductor patterns 11a are arranged at a pitch that does not cause a short circuit.
  • the conductor pattern 11 b of the conductor layer 11 covers the inner surface 10 a of the substrate 10 of the flat connector 1, the inner surface 19 a and the bottom surface 19 b of the notch 19, and the outer surface 10 b of the substrate 10.
  • the conductor pattern 11b of the conductor layer 11 has the conductor pattern row
  • the conductor layer 11 is not limited to the above case, and may cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10.
  • “covering” as used herein means that the plurality of conductor patterns 11a and 11b may cover at least a part of one surface of at least one of the inner surface 10a and the outer surface 10b of the base material 10. Means that.
  • the plurality of conductor patterns 11a and 11b cover almost 100% of the inner surface 10a and the outer surface 10b of the base material 10 in a state where adjacent conductor patterns 10a and 10b are not short-circuited.
  • the conductor layer 11 is formed of, for example, copper foil.
  • the base material 10 of the substrate 10A is provided with a plurality of vias 15 that electrically interconnect the inner surface 10a and the outer surface 10b of the base material 10.
  • a via 15 is provided for each conductor pattern 11a, and four conductors 11b are provided on each side of the conductor pattern 11b in the longitudinal direction of each row of conductor patterns 11a.
  • Each via 15 includes an annular conductive plating portion 13 provided on the inner peripheral surface of the through hole 12 that penetrates the inner surface 10 a and the outer surface 10 b of the base material 10, and filling that is filled in the conductive plating portion 13. It consists of material 14.
  • the conductive plating portion 13 extends between the inner surface 10 a and the outer surface 10 b of the base material 10.
  • the conductive plating portion 13 is formed by, for example, tin plating or gold plating. Since the conductive material 13 is filled with the filler 14, the gas permeability of the gas filled in the airtight chamber can be effectively suppressed.
  • the filler 14 is made of conductive solder. When conductive solder is used for the filler 14, not only can the electrical connection between the inner surface 10 a and the outer surface 10 b of the base material 10 be ensured, but the gas filled in the hermetic chamber C is airtight. When moving from the inside of the chamber C toward the outside, the movement can be effectively blocked by the solder. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled can be suppressed more effectively.
  • the filler 14 does not necessarily need to be electrically conductive, and may be an airtight resin (for example, trade name “Torr Seal” (registered trademark)).
  • the conductor pattern of the inner surface 10 a and the outer surface 10 b of the base material 10. 11a extends.
  • the conductive plating part 13 is provided in the internal peripheral surface of this conductor pattern 11a.
  • the conductor pattern 11a and the conductive plating portion 13 are sealed, and the conductive plating portion 13 and the filler 14 are also sealed. Thereby, there is no gas leakage from the inside of the airtight chamber C through the via 15.
  • a pair of conductive pads 16 interconnected by the conductive plating part 13 of the via 15 are provided. These conductive pads 16 are formed separately from the conductive plating portion 13, but are not necessarily formed separately. That is, the conductive plating part 13 itself on the inner surface 10 a and outer surface 10 b side of the base material 10 may be used as the conductive pad 16.
  • a soldering layer 17 extending continuously and endlessly along the outer periphery of the base material 10 is formed on the conductor pattern 11 b on the inner surface 10 a of the base material 10. .
  • the soldering layer 17 passes through the inner surface 19 a and the bottom surface 19 b of the notch 19 from the inner surface 10 a of the substrate 10, and the width direction right end surface 10 c and the width direction left end surface of the substrate 10. 10d, the longitudinal rear end surface 10e, and the longitudinal front end surface 10f.
  • the soldering layer 17 is formed by, for example, tin plating or gold plating. 2, 4, and 5, reference numeral 18 denotes a resist layer.
  • the first circuit board 20 is disposed in the hermetic chamber C as shown in FIG. Keep it. Then, as shown in FIG. 2, the inner surface 10a of the flat connector 1 is directed toward the opening 41 with the partition wall 40 side. Then, the soldering layer 17 on the inner surface 10 a side of the base material 10 is connected to the partition wall 40 by the solder S. Thereby, the flat connector 1 is fixed to the partition wall 40 and the opening 41 is closed by the flat connector 1. In addition, the conductive pad 16 on the inner surface 10 a side of the flat connector 1 contacts the contact 21 provided on the first circuit board 20.
  • the contact 31 provided on the second circuit board 30 is brought into contact with the conductive pad 16 on the outer surface 10 b of the flat connector 1.
  • the first circuit board 20 and the second circuit board 30 are electrically connected to each other via the flat connector 1.
  • the flat connector 1 provided with the conductor layer 11 as shown in FIG. 3 and the flat connector 51 with the conductor layer 11 removed as shown in FIG. A description will be given of how the substrate exposed area on the outer surface 10b and the outer surface 10b has changed.
  • the substrate exposed area on the inner surface 10 a and the outer surface 10 b of the substrate 10 was 12.01 mm 2 .
  • the flat connector 51 with the conductor layer 11 removed as shown in FIG. 6 it was 89.15 mm 2 .
  • the substrate exposed areas on the inner surface 10a and the outer surface 10b of the substrate 10 are the conductor layers. Compared with the case of the flat connector 51 from which 11 is removed, it is reduced to about 1/7.
  • the substrate 10A is a two-layer substrate, and the two-layer substrate includes the flat substrate 10 that closes the opening 41, and the conductor layer 11 has a base layer. At least one of the inner surface 10a and the outer surface 10b of the material 10 is covered.
  • the gas filled in the airtight chamber C can pass through the base material 10 from the inside of the airtight chamber C to the outside, it cannot pass through the conductor layer 11 and fills the inside of the airtight chamber C. It is possible to effectively suppress the gas permeability of the gas being used. And the gas permeability of the gas with which the inside of the airtight chamber C is filled using a 2 layer board
  • the gas filled in the hermetic chamber C particularly He gas or hydrogen gas having a low molecular weight
  • the epoxy part which is an organic substance easily passes through the epoxy part which is an organic substance.
  • the gas filled in the airtight chamber C moves from the inside of the airtight chamber C toward the outside, the movement is blocked by the conductor layer 11. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled can be suppressed more effectively.
  • the via 15 for electrically interconnecting the inner surface 10 a and the outer surface 10 b of the substrate 10 is provided. For this reason, the inner surface 10a and the outer surface 10b of the base material 10 of the two-layer substrate can be electrically and reliably connected by the via 15. Moreover, since the filler 14 is filled in the conductive plating part 13 constituting the via 15, the gas permeability of the gas filled in the airtight chamber C can be more effectively suppressed.
  • a soldering layer 17 extending continuously and endlessly along the outer periphery of the substrate 10 is formed on the inner surface 10a of the substrate 10. For this reason, by connecting the soldering layer 17 on the inner surface 10a side of the base material 10 to the partition wall 40 with the solder S, the substrate 10A constituting the flat connector 1 can be fixed to the partition wall 40.
  • the conductor layer 11 is provided in the base material 10 similarly to the flat connector 1 shown in FIG. 1, FIG.
  • the conductor layer 11 includes a plurality of two rows of conductor patterns 11a formed on the inner surface 10a of the substrate 10, a plurality of two rows of conductor patterns 11a formed on the outer surface 10b of the substrate 10, and these
  • the conductor pattern 11b is provided so as to surround the outside of the plurality of conductor patterns 11a.
  • the area of each conductor pattern 11a is larger than the conductor pattern 11a of the flat connector 1 shown in FIG.
  • the conductor pattern 11b of the conductor layer 11 is a conductor extending between the two rows of conductor patterns 11a formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively.
  • the extension part 11c between pattern rows is not formed.
  • One of the two rows of conductive patterns 11a formed on the inner surface 10a of the base material 10 is a conductor pattern adjacent along the longitudinal direction of the base material 10 on the right side in the width direction of the base material 10. 11a is arranged at a pitch that does not short-circuit each other.
  • the other row of the plurality of two-row conductive patterns 11 a formed on the inner surface 10 a of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10.
  • the conductor patterns 11a are arranged at a pitch that does not cause a short circuit.
  • one row of the plurality of two rows of conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the width direction of the base material 10 along the longitudinal direction of the base material 10.
  • the conductor patterns 11a are arranged at a pitch that does not cause a short circuit.
  • the other row of the plurality of two-row conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10.
  • the conductor patterns 11a are arranged at a pitch that does not cause a short circuit.
  • the substrate exposed area on the inner surface 10 a and the outer surface 10 b of the substrate 10 was 21.44 mm 2 .
  • the substrate exposed areas on the inner surface 10a and the outer surface 10b of the substrate 10 are removed from the conductor layer 11 shown in FIG.
  • the gas permeation (mol / s ⁇ Pa) filled in the airtight chamber C is the flat connector 1 provided with the conductor layer 11 as shown in FIG.
  • FIGS. 8A and 8B show a second embodiment of a flat connector according to the present invention, and this flat connector 50 is replaced with the flat connector 1 of the first embodiment shown in FIG. Used in the electrical connection structure shown in FIG.
  • the flat connector 50 shown in FIGS. 8A and 8B closes the opening 41 of the partition wall 40 and electrically connects the inside and the outside of the airtight chamber C.
  • the flat connector 50 includes a board 60 ⁇ / b> A that closes the opening 41 of the partition wall 40.
  • This substrate 60A is a four-layer substrate as a multilayer substrate.
  • the substrate 60 ⁇ / b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and an outer surface of the first base material 60.
  • a flat plate-like third base member 80 disposed at 60b.
  • the first base member 60 is a substantially rectangular flat plate member extending in the width direction (left-right direction in FIG. 8A) and the longitudinal direction (up-down direction in FIG. 8A).
  • the first base member 60 has an inner surface 60a positioned toward the inner side of the hermetic chamber C (see FIG. 1), and an outer surface 60b opposite to the inner surface 60a.
  • the first base material 60 is made of glass-containing epoxy, for example.
  • the first base material 60 is formed with a plurality of vias 64 that electrically interconnect the inner surface 60 a and the outer surface 60 b of the first base material 60.
  • the plurality of vias 64 are formed in two rows in the width direction of the first base material 60. Although not shown, the vias 64 in each row are formed at a predetermined pitch along the longitudinal direction.
  • Each via 64 includes an annular first conductive plating portion 62 provided on the inner peripheral surface of the through hole 61 penetrating between the inner peripheral surface 60 a and the outer surface 60 b of the first base material 60.
  • a filler 63 is filled in the first conductive plating part 62.
  • the first conductive plating portion 62 extends between the inner peripheral surface 60 a and the outer surface 60 b of the first base material 60.
  • the first conductive plating part 62 is formed by, for example, tin plating or gold plating.
  • the filler 63 is made of conductive solder. When conductive solder is used for the filler 63, not only can the electrical connection between the inner surface 60a and the outer surface 60b of the first base member 60 be ensured, but also the gas filled in the hermetic chamber C. However, when moving from the inside of the airtight chamber C to the outside, the movement can be effectively blocked by the solder. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled can be suppressed more effectively.
  • the filler 14 does not necessarily need to be electrically conductive, and may be an airtight resin (for example, trade name “Torr Seal” (registered trademark)).
  • a plurality of first conductive layers 65 connected to the inner surface 60 a side of the first conductive plating portion 62 are provided on the inner surface 60 a of the first base material 60.
  • a plurality of second conductive layers 66 connected to the outer surface 60 b side of the first conductive plating portion 62 are provided on the outer surface 60 b of the first base material 60.
  • the second base material 70 is a substantially rectangular flat plate member extending in the width direction (left-right direction in FIG. 8A) and the longitudinal direction (up-down direction in FIG. 8A).
  • the second base material 70 has the same width and length as the inner surface 60 a of the first base material 60.
  • the 2nd base material 70 has the inner surface 70a located toward the inner side of the airtight chamber C shown in FIG. 1, and the outer surface 70b on the opposite side to this inner surface 70a.
  • the second base material 70 is made of glass-containing epoxy, for example.
  • the second base material 70 is formed with a plurality of first plated through holes 73 that interconnect the inner surface 70 a and the outer surface 70 b of the second base material 70.
  • the plurality of first plated through holes 73 are formed in two rows at positions outside the vias 64 in the width direction of the second base material 70.
  • the first plated through hole 73 in each row is formed by providing a second conductive plating portion 72 on the inner peripheral surface of the through hole 71 that penetrates between the inner surface 70 a and the outer surface 70 b of the second base material 70.
  • the second conductive plating part 72 extends between the inner surface 70 a and the outer surface 70 b of the second base material 70.
  • the second conductive plating portion 72 is formed so as to completely fill the inside of the through hole 71. Then, the outer surface 70 b side of each second conductive plating part 72 is connected to the inner surface 60 a side of the first conductive plating part 62 constituting the via 64 formed on the first base material 60. Connect with. A plurality of conductive pads 74 connected to the inner surface side of the second conductive plating part 72 are provided on the inner surface 70 a of the second base material 70. As shown in FIG. 8A, the plurality of conductive pads 74 are formed in two rows in the width direction on the inner surface 70 a of the second base material 70. Each conductive pad 74 is formed in a rectangular shape.
  • the third base member 80 is a substantially rectangular flat plate member extending in the width direction (left-right direction in FIG. 8A) and the longitudinal direction (up-down direction in FIG. 8A).
  • the third substrate 80 has the same width and length as the outer surface 60 b of the first substrate 60.
  • the 3rd base material 80 has the inner surface 80a located toward the inner side of the airtight chamber C shown in FIG. 1, and the outer surface 80b on the opposite side.
  • the third substrate 80 is made of glass-containing epoxy, for example.
  • the third base material 80 is formed with a plurality of second plating through holes 83 interconnecting the inner surface 80a and the outer surface 80b of the second base material 80.
  • the plurality of second plated through holes 83 are formed in two rows at positions outside the vias 64 in the width direction of the third base material 80.
  • the second plated through hole 83 in each row is formed by providing a third conductive plated portion 82 on the inner peripheral surface of the through hole 81 that penetrates between the inner surface 80a and the outer surface 80b of the third substrate 80.
  • the third conductive plating portion 82 extends between the inner surface 80 a and the outer surface 80 b of the third base material 80.
  • the third conductive plating portion 82 is formed so as to completely fill the inside of the through hole 81. Then, the inner surface 80a side of each third conductive plating portion 82 is connected to the second conductive layer 66 connected to the outer surface 60b side of the first conductive plating portion 62 constituting the via 64 formed on the first base member 60. Connect with.
  • a plurality of conductive pads 84 connected to the outer surface side of the third conductive plating portion 82 are provided on the outer surface 80 b of the third base material 80. Although not shown, the plurality of conductive pads 84 are formed in two rows in the width direction on the outer surface 80 b of the third base material 80. Each conductive pad 84 is formed in a rectangular shape.
  • the second base material 70 is arranged so that the outer surface 70 b of the second base material 70 is in contact with the inner surface 60 a of the first base material 60.
  • the inner surface side of the via 64 formed in 60 is closed.
  • the inner surface 80a of the third base material 80 is disposed so as to contact the outer surface 60b of the first base material 60, and the outer surface side of the via 64 formed on the first base material 60 by the third base material 80 is It is blocked.
  • a conductor layer 90 is provided on the inner surface 70 a of the second base material 70.
  • the conductor layer 90 is formed in a substantially rectangular shape so as to surround the outside of the plurality of conductive pads 74 formed in two rows in the width direction on the inner surface 70 a of the second base material 70.
  • the conductor layer 90 is arranged at a predetermined interval with respect to each conductive pad 74 so as not to be short-circuited with each conductive pad 74.
  • the conductor layer 90 is provided so as to substantially cover a portion of the inner surface 70a of the second base material 70 excluding a soldering layer 91 that continuously extends endlessly along the outer periphery of the second base material 70, which will be described later. It is done.
  • the conductor layer 90 is formed of, for example, copper foil.
  • the conductor layer 90 is not limited to covering the inner surface 70 a of the second base material 70, but the inner surface 70 a of the second base material 70, the outer surface 70 b of the second base material 70, and the inner surface of the first base material 60. It is only necessary to cover at least one of 60a, the outer surface 60b of the first substrate 60, the inner surface 80a of the third substrate 80, and the outer surface 80b of the third substrate 80.
  • “covering” means that the conductor layer 90 has the inner surface 70 a of the second base material 70, the outer surface 70 b of the second base material 70, the inner surface 60 a of the first base material 60, and the first base material 60. It means that at least one part of the outer surface 60b, the inner surface 80a of the third base member 80, and the outer surface 80b of the third base member 80 only needs to be covered. Note that the conductor layer 90 preferably covers nearly 100% of the one surface.
  • the inner surface 70a of the second base material 70 is soldered to extend continuously and endlessly with a predetermined width along the outer periphery of the second base material 70.
  • a layer 91 is formed.
  • the soldering layer 91 is formed by, for example, tin plating or gold plating.
  • the “inner surface located toward the inner side of the hermetic chamber of the substrate” defined in claim 1 corresponds to the inner surface 70a of the second base material 70, and “the opposite side of the inner surface of the substrate”.
  • the “surface extending parallel to the inner surface existing inside the substrate between the inner surface and the outer surface” defined in claim 1 is the outer surface 70b of the second base material 70, the first surface.
  • the inner surface 60a of the substrate 60, the outer surface 60b of the first substrate 60, and the inner surface 80a of the third substrate 80 correspond to each other.
  • the first circuit board 20 is disposed in the hermetic chamber C as shown in FIG. Keep it.
  • the inner surface 70a of the 2nd base material 70 of the flat connector 50 is turned to the partition 40 side, and is turned to the opening part 41 side.
  • the soldering layer 91 in the inner surface 70a side of the 2nd base material 70 is connected to the partition 40 with solder. Accordingly, the flat connector 50 is fixed to the partition wall 40 and the opening 41 is closed by the flat connector 50. Further, the conductive pads 74 on the inner surface 70 a side of the second base material 70 of the flat connector 50 come into contact with the contacts 21 provided on the first circuit board 20.
  • the substrate 60A that closes the opening 41 is a four-layer substrate as a multilayer substrate.
  • the substrate 60 ⁇ / b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and the first base material 60.
  • the conductor layer 90 covers one surface of the inner surface 70 a of the second base material 70. For this reason, even if the gas filled in the airtight chamber C can pass through the second base material 70, the first base material 60, and the third base material 80 from the inside of the airtight chamber C to the outside. It cannot pass through the conductor layer 90. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled using the four-layer board
  • the flat connector 50 includes a via 64 that electrically interconnects the inner surface 60a and the outer surface 60b of the first base member 60.
  • the flat connector 50 includes a first plated through hole 73 that interconnects the inner surface 70 a and the outer surface 70 b of the second base material 70 and connects to the via 64 of the first base material 60.
  • the flat connector 50 includes a second plated through hole 83 that interconnects the inner surface 80 a and the outer surface 80 b of the third base member 80 and connects to the via 64 of the first base member 60. Therefore, the inner surface 60a and the outer surface 80b of the four-layer substrate can be electrically and reliably connected by the via 64, the first plating through hole 73, and the second plating through hole 83.
  • the inner surface 60 a side of the via 64 is closed by the second base material 70, and the outer surface 60 b side of the via 64 is closed by the third base material 80. For this reason, in the four-layer substrate, it is not always necessary to fill the filler 63 in the first conductive plating part 62 constituting the via 64. When the filler 63 is filled in the first conductive plating part 62 as in the present embodiment, the gas permeability of the gas filled in the airtight chamber C can be further suppressed.
  • the flat connector 50 shown in FIGS. 9A and 9B has the same basic configuration as the flat connector 50 shown in FIGS. 8A and 8B, but the first conductive plating constituting the via 64 is the same. The difference is that the space 63 is not filled with the filler 63 in the portion 62. As described above, the inner surface 60 a side of the via 64 is closed by the second base material 70, and the outer surface 60 b side of the via 64 is closed by the third base material 80. Therefore, in the four-layer substrate, it is not always necessary to fill the filler 63 (see FIG. 8B) in the first conductive plating portion 62 constituting the via 64.
  • a space 75 is formed inside the second conductive plating portion 72 in each first plating through hole 73.
  • a space 85 is also formed inside the third conductive plating portion 82.
  • the second conductive plating portion 72 and the third conductive plating portion 82 are formed so as to completely fill the insides of the through holes 71 and 81. In these respects, the flat connector 50 shown in FIGS. 9A and 9B is different from the flat connector 50 shown in FIGS. 8A and 8B.
  • the spaces 75 and 85 are formed inside the second conductive plating part 72 and the third conductive plating part 82 because the diameters of the through holes 71 and 81 in each of the first plating through hole 73 and the second plating through hole 83 are the same. Effective when large.
  • the board 60A that closes the opening 41 is a four-layer board as a multilayer board also by the flat connector 50 shown in FIGS.
  • the substrate 60 ⁇ / b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and the first base material 60.
  • a flat plate-like third base material 80 disposed on the outer surface 60b.
  • the conductor layer 90 covers the inner surface 70 a of the second base material 70.
  • the flat connector 50 shown in FIGS. 10 (A) and 10 (B) has the same basic configuration as the flat connector 50 shown in FIGS. 8 (A) and 8 (B). The difference is that it is provided so as to cover not the inner surface 70 a of the 70 but the inner surface 60 a of the first base material 60.
  • the conductor layer 90 is formed in a substantially rectangular shape so as to surround the outer sides of the plurality of first conductive layers 65 formed in two rows in the width direction on the inner surface 70a of the second base material 70. ing.
  • the conductor layer 90 is arranged at a predetermined interval with respect to each first conductive layer 65 so as not to be short-circuited with each first conductive layer 65.
  • the conductor layer 90 is provided so as to cover almost the entire inner surface 70 a of the second base material 70.
  • the flat connector 50 shown in FIGS. 10A and 10B does not fill the filler 63 in the first conductive plating portion 62 that constitutes the via 64 but forms a space 67 in FIG. ), Different from the flat connector 50 shown in FIG. Even with the flat connector 50, the board 60A that closes the opening 41 is a four-layer board as a multilayer board.
  • the substrate 60 ⁇ / b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and the first base material 60.
  • a flat plate-like third base material 80 disposed on the outer surface 60b.
  • the conductor layer 90 covers the inner surface 60 a of the first base material 60. For this reason, even if the gas filled in the airtight chamber C can pass through the second base material 70, the first base material 60, and the third base material 80 from the inside of the airtight chamber C to the outside. It cannot pass through the conductor layer 90. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled using the four-layer board
  • the conductor layer 11 only needs to cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10, and the inner surface 10a of the substrate 10 of the flat connector 1, the inner surface 19a of the notch 19, and The bottom surface 19b and the outer surface 10b of the base material 10 may not be covered.
  • the soldering layer 17 that extends continuously and endlessly along the outer periphery of the base material 10 may not be formed on the inner surface 10 a of the base material 10.
  • the soldering layer 91 that extends continuously and endlessly with a predetermined width along the outer periphery of the second base material 70 may not be formed on the inner surface 70 a of the second base material 70.
  • the conductor layer has an inner surface located toward the inner side of the airtight chamber C of the multilayer substrate, an outer surface opposite to the inner surface of the multilayer substrate, and the inner surface and the outer surface between the inner surface and the outer surface. What is necessary is just to make it cover at least 1 side of the surfaces extended in parallel with the said inner surface which exists in the inside of a multilayer substrate.
  • metal contacts may be connected to the conductive pads 16 formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively. Further, a metal contact attached to an insulating housing may be connected to the conductive pad 16. Further, in the flat connector 50 shown in FIGS. 8 to 10, the conductive pads 74 and 84 formed on the inner surface 70 a of the second substrate 70 and the outer surface 70 b of the third substrate 80 are made of metal. Contacts may be connected. Further, metal contacts attached to an insulating housing may be connected to the conductive pads 74 and 84.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Connector Housings Or Holding Contact Members (AREA)

Abstract

Provided is a planar connector, which is to be used for the purpose of electrically connecting to each other the inner side and the outer side of an air-tight chamber partitioned by means of a partitioning wall, and which closes an opening formed in the partitioning wall to penetrate the air-tight chamber from the inside to the outside thereof, said planar connector being capable of effectively suppressing transmissivity of a gas, with which the inside of the air-tight chamber is filled, and reliably electrically connecting between the inner surface and the outer surface of a substrate. A planar connector (1) is provided with a planar substrate (10A) that closes an opening (41) in the partitioning wall (40). The substrate (10A) is provided with a conductor layer (11), that covers the inner surface (10a) of the substrate (10A), said inner surface being positioned to face the inner side of the air-tight chamber (C) and/or the outer surface (10b) of the substrate (10A), said outer surface being on the side reverse to the inner surface (10a).

Description

平板状コネクタFlat connector
 本発明は、隔壁で区画される気密チャンバの内側及び外側を電気的に相互接続するために用いられ、隔壁に形成された、気密チャンバの内部と外部とを貫通する開口部を塞ぐ平板状コネクタに関する。 The present invention is used for electrically interconnecting the inside and outside of an airtight chamber defined by a partition wall, and is a flat plate connector formed in the partition wall for closing an opening that penetrates the inside and the outside of the airtight chamber. About.
 従来より、隔壁で区画される気密チャンバの内側及び外側を電気的に相互接続する要請がある。例えば、集積回路を搭載した半導体チッププロセスにおいて内部を真空に近い状態にまで減圧することが可能な真空チャンバを用い、この真空チャンバの内部及び外部を電気的に接続することが行われる。また、隔壁で区画される気密チャンバの内部を分子量の少ないガス、例えばHeガスや水素ガスで充満させて減圧することも行われている。このような圧力が調整された気密チャンバの内部と外部との電気的接続に際しては、チャンバ内部の気密性を保持すると同時に、チャンバの内部と外部との確実な電気的接続性が求められる。 Conventionally, there is a demand to electrically interconnect the inside and outside of an airtight chamber partitioned by a partition wall. For example, in a semiconductor chip process in which an integrated circuit is mounted, a vacuum chamber capable of reducing the pressure to near vacuum is used, and the inside and outside of the vacuum chamber are electrically connected. In addition, the inside of an airtight chamber partitioned by a partition wall is filled with a gas having a low molecular weight, for example, He gas or hydrogen gas, and decompressed. In the electrical connection between the inside and outside of the hermetic chamber whose pressure is adjusted, the airtightness inside the chamber is maintained, and at the same time, reliable electrical connectivity between the inside and outside of the chamber is required.
 従来のこの種の電気接続構造として、例えば、図11に示すものが知られている(特許文献1参照)。図11は、従来例の、隔壁で区画される、圧力が調整された気密チャンバの内側及び外側を電気的に相互接続する電気接続構造の模式図である。
 図11に示す電気接続構造は、隔壁(図示せず)で区画され内部の圧力が調整されるチャンバ(図示せず)の内部A側及び外部B側を電気的に相互接続するものである。
As a conventional electrical connection structure of this type, for example, the one shown in FIG. 11 is known (see Patent Document 1). FIG. 11 is a schematic diagram of an electrical connection structure for electrically interconnecting the inside and outside of a hermetic chamber, which is partitioned by a partition wall and adjusted in pressure, according to a conventional example.
The electrical connection structure shown in FIG. 11 electrically interconnects the interior A side and exterior B side of a chamber (not shown) that is partitioned by a partition wall (not shown) and whose internal pressure is adjusted.
 この電気接続構造において、隔壁には、チャンバの内部A側と外部B側とを貫通する開口部(図示せず)が形成されている。そして、この開口部は、平板状コネクタ110によって塞がれている。
 ここで、平板状コネクタ110の基材には、内部に導電体が充填された複数のバイアホール112が設けられている。また、平板状コネクタ110の内表面及び外表面には、バイアホール112の導電体によって相互接続された1対の導電パッド113a,113bが設けられている。
In this electrical connection structure, the partition wall is formed with an opening (not shown) penetrating the inside A side and the outside B side of the chamber. The opening is closed by the flat connector 110.
Here, the base material of the flat connector 110 is provided with a plurality of via holes 112 filled with a conductor. In addition, a pair of conductive pads 113 a and 113 b interconnected by the conductors of the via holes 112 are provided on the inner surface and the outer surface of the flat connector 110.
 そして、平板状コネクタ110に対して内側に複数の第1コネクタ120Aが配置されると共に、平板状コネクタ110に対して外側に複数の第2コネクタ120Bが配置されている。
 各第1コネクタ120Aは、平板状コネクタ110に対して直交する方向に延びるように配置され、この第1コネクタ120Aが平板状コネクタ110の長手方向(図11における上下方向)に沿って複数配置されている。また、各第2コネクタ120Bは、平板状コネクタ110に対して直交する方向に延びるように配置され、この第2コネクタ120Bが第1コネクタ120Aと対向するように平板状コネクタ110の長手方向に沿って複数配置されている。
A plurality of first connectors 120 </ b> A are disposed inside the flat connector 110, and a plurality of second connectors 120 </ b> B are disposed outside the flat connector 110.
Each first connector 120A is arranged so as to extend in a direction orthogonal to the flat connector 110, and a plurality of the first connectors 120A are arranged along the longitudinal direction (vertical direction in FIG. 11) of the flat connector 110. ing. Each of the second connectors 120B is disposed so as to extend in a direction orthogonal to the flat connector 110. The second connector 120B extends along the longitudinal direction of the flat connector 110 so that the second connector 120B faces the first connector 120A. Are arranged.
 ここで、各第1コネクタ120Aは、平板状コネクタ110に対して直交する方向に延びるように配置された第2基板121と、第2基板121の幅方向(図11において紙面に対して直交する方向)に沿って所定ピッチで配列された複数のコンタクト123とを備えている。第2基板121の表面(図11における上面)には、第2基板121の幅方向に沿って所定ピッチで複数の導電パターン124が設けられている。各コンタクト123は、各導電パターン124の一端側に接続される。また、各導電パターン124の他端側には、信号線122が接続されている。また、各第2コネクタ120Bは、各第1コネクタ120Aと同様の構成を有する。 Here, each first connector 120A is arranged so as to extend in a direction orthogonal to the flat connector 110, and the width direction of the second substrate 121 (perpendicular to the paper surface in FIG. 11). And a plurality of contacts 123 arranged at a predetermined pitch along the direction). On the surface of the second substrate 121 (the upper surface in FIG. 11), a plurality of conductive patterns 124 are provided at a predetermined pitch along the width direction of the second substrate 121. Each contact 123 is connected to one end side of each conductive pattern 124. A signal line 122 is connected to the other end side of each conductive pattern 124. Each second connector 120B has the same configuration as each first connector 120A.
 このような構成を有する電気接続構造101において、第1コネクタ120Aを図11における矢印F方向に前進させ、コンタクト123を平板状コネクタ110の内表面に設けられた導電パッド113aに接触させる。一方、第2コネクタ120Bを図11における矢印F’方向に前進させ、コンタクト123を平板状コネクタ110の外表面に設けられた導電パッド113bに接触させる。これにより、チャンバ内部A側及び外部B側の信号線122、122は、チャンバ内部A側の導電パターン124、コンタクト123、平板状コネクタ110の内表面の導電パッド113a、バイアホール112、平板状コネクタ110の外表面の導電パッド113b、コンタクト123、チャンバ外部B側の導電パターン124を経由して電気的に接続されるのである。 In the electrical connection structure 101 having such a configuration, the first connector 120A is advanced in the direction of arrow F in FIG. 11, and the contact 123 is brought into contact with the conductive pad 113a provided on the inner surface of the flat connector 110. On the other hand, the second connector 120B is advanced in the direction of arrow F ′ in FIG. 11, and the contact 123 is brought into contact with the conductive pad 113 b provided on the outer surface of the flat connector 110. Thereby, the signal lines 122 and 122 on the chamber inner side A and the outer side B are connected to the conductive pattern 124 on the chamber inner side A, the contact 123, the conductive pad 113a on the inner surface of the flat connector 110, the via hole 112, and the flat connector. It is electrically connected through the conductive pad 113b on the outer surface 110, the contact 123, and the conductive pattern 124 on the chamber outside B side.
 一方、従来の多層プリント配線基板として、例えば、図12に示すものが知られている(特許文献2参照)。図12は、従来の多層プリント配線基板の断面図である。
 図12に示す多層プリント配線基板201は、高誘電率基板202の両面を電源線またはグランド線となる面状の銅箔パターン層203により挟んでいる。銅箔パターン層203の外側に絶縁層204が形成され、さらに、絶縁層204の外側に銅箔等の信号線205が形成されている。
On the other hand, as a conventional multilayer printed wiring board, for example, the one shown in FIG. 12 is known (see Patent Document 2). FIG. 12 is a cross-sectional view of a conventional multilayer printed wiring board.
In a multilayer printed wiring board 201 shown in FIG. 12, both surfaces of a high dielectric constant substrate 202 are sandwiched between planar copper foil pattern layers 203 serving as power supply lines or ground lines. An insulating layer 204 is formed outside the copper foil pattern layer 203, and a signal line 205 such as a copper foil is further formed outside the insulating layer 204.
特開2004-349073号公報JP 2004-349073 A 実開平7-10979号公報Japanese Utility Model Publication No. 7-10979
 しかしながら、この図11に示した従来の電気接続構造101及び図12に示した従来の多層プリント配線基板201にあっては、以下の問題点があった。
 即ち、図11に示す電気接続構造101の場合、チャンバの内部A側と外部B側とを貫通する開口部を塞ぐ平板状コネクタ110の基材の露出面積が大きい。つまり、平板状コネクタ110の基材のチャンバの内部A側面と外部B側面において、導電パッド113a、113bがなく露出している部分の面積が大きい。このため、チャンバの内部A内に充満されているガスが外部B側に透過してしまうガス透過率を効果的に抑制することができない。
However, the conventional electrical connection structure 101 shown in FIG. 11 and the conventional multilayer printed wiring board 201 shown in FIG. 12 have the following problems.
That is, in the case of the electrical connection structure 101 shown in FIG. 11, the exposed area of the base material of the flat connector 110 that closes the opening that penetrates the inside A side and the outside B side of the chamber is large. That is, the areas of the exposed portions without the conductive pads 113a and 113b are large on the inner side A side and the outer side B side of the base material chamber of the flat connector 110. For this reason, the gas permeability which the gas with which the inside A of a chamber is filled permeate | transmits to the external B side cannot be suppressed effectively.
 一方、図12に示した多層プリント配線基板201の場合には、隔壁に形成された開口部を塞ぐ目的で使用されると、面状の銅箔パターン層203によりガス透過率を抑制することも可能である。しかし、高誘電率基板202の両面間を貫通するスルーホールが形成されていないので、高誘電率基板202の両面間を電気的に接続することができない。仮に、高誘電率基板202の両面間を貫通するスルーホールを形成すると、そのスルーホールをガスが透過し、ガス透過率を抑制することができない。 On the other hand, in the case of the multilayer printed wiring board 201 shown in FIG. 12, when used for the purpose of closing the opening formed in the partition wall, the planar copper foil pattern layer 203 may suppress the gas permeability. Is possible. However, since there is no through-hole penetrating between both surfaces of the high dielectric constant substrate 202, the both surfaces of the high dielectric constant substrate 202 cannot be electrically connected. If a through hole penetrating between both surfaces of the high dielectric constant substrate 202 is formed, gas passes through the through hole and the gas permeability cannot be suppressed.
 従って、本発明はこれら従来の課題を解決するためになされたものであり、その目的は、隔壁で区画される気密チャンバの内側及び外側を電気的に相互接続するために用いられ、隔壁に形成された、気密チャンバの内部と外部とを貫通する開口部を塞ぐ平板状コネクタにおいて、気密チャンバの内部に充満されているガスのガス透過率を効果的に抑制することができるとともに、基板の内表面及び外表面間を電気的に確実に接続することができる平板状コネクタを提供することにある。 Accordingly, the present invention has been made to solve these conventional problems, and the object thereof is used to electrically interconnect the inside and outside of an airtight chamber partitioned by a partition, and is formed in the partition. In the flat connector that closes the opening that penetrates the inside and outside of the hermetic chamber, the gas permeability of the gas filled inside the hermetic chamber can be effectively suppressed, and the inside of the substrate An object of the present invention is to provide a flat connector that can electrically and reliably connect a surface and an outer surface.
 上記目的を達成するために、本発明のうちある形態に係る平板状コネクタは、隔壁で区画される気密チャンバの内側及び外側を電気的に相互接続するために用いられ、前記隔壁に形成された、気密チャンバの内部と外部とを貫通する開口部を塞ぐ平板状コネクタであって、前記開口部を塞ぐ平板状の基板を備え、該基板は、該基板の前記気密チャンバの内部側に向けて位置する内表面、前記基板の前記内表面と反対側の外表面、及び前記内表面と前記外表面との間の前記基板の内部に存在する前記内表面に対して平行に延びる面のうちの少なくとも一面を覆う導体層を備えていることを特徴としている。 In order to achieve the above object, a flat connector according to an aspect of the present invention is used to electrically interconnect the inside and outside of an airtight chamber partitioned by a partition, and is formed in the partition. A flat connector for closing an opening penetrating the inside and outside of the hermetic chamber, comprising a flat substrate for closing the opening, the substrate facing the inside of the hermetic chamber of the substrate An inner surface located, an outer surface opposite to the inner surface of the substrate, and a surface extending parallel to the inner surface present in the substrate between the inner surface and the outer surface A conductive layer covering at least one surface is provided.
 ここで、「覆う」とは、導体層が、基板の内表面、基板の外表面、及び前記内表面と前記外表面との間の基板の内部に存在する前記内表面に対して平行に延びる面のうちの少なくとも一面において、少なくとも当該一面の一部を覆っていればよいことを意味する。なお、導体層が、基板の内表面及び外表面のうちの少なくとも一面において、当該一面を100%近く覆っていることが好ましい。 Here, “covering” means that the conductor layer extends parallel to the inner surface of the substrate, the outer surface of the substrate, and the inner surface existing inside the substrate between the inner surface and the outer surface. It means that at least one part of the surface should cover at least a part of the surface. The conductor layer preferably covers nearly 100% of at least one of the inner surface and the outer surface of the substrate.
 また、この平板状コネクタにおいて、前記基板は2層基板であり、該2層基板は、前記開口部を塞ぐ平板状の基材を備え、前記導体層は、前記基材の内表面及び外表面のうちの少なくとも一面を覆い、前記基材の内表面及び外表面間を電気的に相互接続するバイアであって、前記基材の内表面及び外表面間を貫通する貫通孔の内周面に設けられ、前記基材の内表面及び外表面間を延びる環状の導電めっき部及び該導電めっき部内に充填された充填材からなる前記バイアを備えていることが好ましい。
 また、この平板状コネクタにおいて、前記基材の前記内表面に、前記基材の外周に沿って連続的に無端状に延びる半田付け層を形成してもよい。
 更に、この平板状コネクタにおいて、前記充填材が導電性のある半田であることが好ましい。
Further, in this flat connector, the substrate is a two-layer substrate, the two-layer substrate includes a flat substrate that closes the opening, and the conductor layer includes an inner surface and an outer surface of the substrate. A via that covers at least one surface of the base material and electrically interconnects the inner surface and the outer surface of the base material, the inner surface of the through-hole penetrating between the inner surface and the outer surface of the base material. It is preferable to include the via made of an annular conductive plating portion that is provided and extends between the inner surface and the outer surface of the substrate and a filler filled in the conductive plating portion.
In this flat connector, a soldering layer that extends continuously and endlessly along the outer periphery of the base material may be formed on the inner surface of the base material.
Furthermore, in this flat connector, it is preferable that the filler is a conductive solder.
 また、この平板状コネクタにおいて、前記基板は多層基板であり、該多層基板は、平板状の第1基材と、該第1基材の前記気密チャンバの内部側に向けて位置する内表面に配置されて前記開口部を塞ぐ平板状の第2基材と、前記第1基材の外表面に配置される平板状の第3基材とを備え、前記導体層は、前記第2基材の内表面、前記第2基材の外表面、前記第1基材の内表面、前記第1基材の外表面、前記第3基材の内表面、及び前記第3基材の外表面のうちの少なくとも一面を覆い、前記第1基材の内表面及び外表面間を電気的に相互接続するバイアであって、前記第1基材の内表面及び外表面間を貫通する貫通孔の内周面に設けられ、前記第1基材の内表面及び外表面間を延びる環状の導電めっき部を備えた前記バイアと、前記第2基材の内表面及び外表面間を相互接続するとともに前記第1基材のバイアと接続する第1めっきスルーホールと、前記第3基材の内表面及び外表面間を相互接続するとともに前記第1基材のバイアと接続する第2めっきスルーホールとを備えていてもよい。 Further, in this flat connector, the substrate is a multilayer substrate, and the multilayer substrate is formed on a flat plate-like first base material and an inner surface of the first base material positioned toward the inside of the airtight chamber. A flat plate-like second base material arranged to close the opening; and a flat plate-like third base material arranged on an outer surface of the first base material, wherein the conductor layer is formed of the second base material. An inner surface of the second substrate, an inner surface of the first substrate, an outer surface of the first substrate, an inner surface of the third substrate, and an outer surface of the third substrate. A via that covers at least one surface of the first substrate and electrically interconnects the inner surface and the outer surface of the first base material, the inner surface of the through hole penetrating between the inner surface and the outer surface of the first base material; The via provided with an annular conductive plating portion provided on a peripheral surface and extending between an inner surface and an outer surface of the first substrate; and the second group A first plated through hole interconnecting the inner and outer surfaces of the first substrate and the vias of the first substrate, and interconnecting the inner and outer surfaces of the third substrate and the first substrate There may be provided a second plated through hole connected to the via of the material.
 ここで、「多層基板」とは、4層以上の多層基板を意味する。
 また、この平板状コネクタにおいて、前記第2基材の内表面に、前記第2基材の外周に沿って連続的に無端状に延びる半田付け層を形成してもよい。
 更に、この平板状コネクタにおいて、前記バイアは、前記導電めっき部内に充填された充填材を備えていてもよい。
 また、この平板状コネクタにおいて、前記充填材が導電性のある半田であることが好ましい。
Here, the “multilayer substrate” means a multilayer substrate having four or more layers.
In this flat connector, a soldering layer that extends continuously and endlessly along the outer periphery of the second base material may be formed on the inner surface of the second base material.
Furthermore, in this flat connector, the via may include a filler filled in the conductive plating portion.
In the flat connector, it is preferable that the filler is conductive solder.
 本発明に係る平板状コネクタによれば、隔壁の開口部を塞ぐ平板状の基板を備え、該基板は、該基板の気密チャンバの内部側に向けて位置する内表面、前記基板の前記内表面と反対側の外表面、及び前記内表面と前記外表面との間の前記基板の内部に存在する前記内表面に対して平行に延びる面のうちの少なくとも一面を覆う複数の導体パターンからなる導体層を備えている。このため、気密チャンの内部に充填されているガスが気密チャンバ内部から外部に向けて基板中を通過できたとしても導体層を通過できず、気密チャンバの内部に充満されているガスのガス透過率を効果的に抑制することができる。 According to the flat connector according to the present invention, the flat board includes a flat board that closes the opening of the partition wall, and the board includes an inner surface that is located toward an inner side of the hermetic chamber of the board, and the inner surface of the board. A conductor composed of a plurality of conductor patterns covering at least one of the outer surface opposite to the inner surface and a surface extending in parallel to the inner surface existing inside the substrate between the inner surface and the outer surface With layers. For this reason, even if the gas filled in the hermetic chamber can pass through the substrate from the inside of the hermetic chamber to the outside, it cannot pass through the conductor layer, and the gas permeation of the gas filled in the hermetic chamber is prevented. The rate can be effectively suppressed.
 なお、基板がガラスエポキシ製の場合には、気密チャンバの内部に充満されているガス、特に分子量の少ないHeガスや水素ガスが、有機物であるエポキシの部分を通過し易い。しかし、この場合でも、気密チャンバの内部に充填されているガスが気密チャンバ内部から外部に向けて移動する際に導体層によってその移動が遮断される。これにより、気密チャンバの内部に充満されているガスのガス透過率をより効果的に抑制することができる。 When the substrate is made of glass epoxy, the gas filled in the hermetic chamber, particularly He gas or hydrogen gas having a low molecular weight, easily passes through the epoxy part which is an organic substance. However, even in this case, when the gas filled in the hermetic chamber moves from the inside of the hermetic chamber toward the outside, the movement is blocked by the conductor layer. Thereby, the gas permeability of the gas with which the inside of an airtight chamber is filled can be suppressed more effectively.
 また、この平板状コネクタにおいて、前記基板は2層基板であり、該2層基板は、前記開口部を塞ぐ平板状の基材を備え、前記導体層は、前記基材の内表面及び外表面のうちの少なくとも一面を覆う場合、2層基板を用いて気密チャンバの内部に充満されているガスのガス透過率を効果的に抑制することができる。そして、平板状コネクタは、前記基材の内表面及び外表面間を電気的に相互接続するバイアを備えている。このため、2層基板の基材の内表面及び外表面間をバイアによって電気的に確実に接続することができる。また、バイアを構成する導電めっき部内に充填材が充填されているので、気密チャンバの内部に充満されているガスのガス透過率をより一層効果的に抑制することができる。 Further, in this flat connector, the substrate is a two-layer substrate, the two-layer substrate includes a flat substrate that closes the opening, and the conductor layer includes an inner surface and an outer surface of the substrate. When covering at least one of the two layers, the gas permeability of the gas filled in the airtight chamber can be effectively suppressed using the two-layer substrate. The flat connector includes vias that electrically interconnect the inner surface and the outer surface of the substrate. For this reason, the inner surface and the outer surface of the base material of the two-layer substrate can be electrically and reliably connected by vias. Moreover, since the conductive plating part constituting the via is filled with the filler, the gas permeability of the gas filled in the airtight chamber can be further effectively suppressed.
 更に、この平板状コネクタにおいて、前記基板は多層基板であり、該多層基板は、平板状の第1基材と、該第1基材の前記気密チャンバの内部側に向けて位置する内表面に配置されて前記開口部を塞ぐ平板状の第2基材と、前記第1基材の外表面に配置される平板状の第3基材とを備える。そして、前記導体層は、前記第2基材の内表面、前記第2基材の外表面、前記第1基材の内表面、前記第1基材の外表面、前記第3基材の内表面、及び前記第3基材の外表面のうちの少なくとも一面を覆う。この場合、多層基板を用いて気密チャンバの内部に充満されているガスのガス透過率を効果的に抑制することができる。そして、平板状コネクタは、前記第1基材の内表面及び外表面間を電気的に相互接続するバイアを備えている。また、平板状コネクタは、前記第2基材の内表面及び外表面間を相互接続するとともに前記第1基材のバイアと接続する第1めっきスルーホールと、前記第3基材の内表面及び外表面間を相互接続するとともに前記第1基材のバイアと接続する第2めっきスルーホールとを備えている。このため、多層基板の内表面及び外表面間をバイア、第1めっきスルーホール、及び第2めっきスルーホールによって電気的に確実に接続することができる。なお、バイアの内表面側を第2基材によって塞ぎ、バイアの外表面側を第3基材によって塞いでいる。このため、多層基板において、バイアを構成する導電めっき部内には、充填材を必ずしも充填する必要はない。 Furthermore, in this flat connector, the substrate is a multilayer substrate, and the multilayer substrate is formed on a flat plate-like first base material and an inner surface of the first base material facing the inside of the hermetic chamber. A flat plate-like second base material that is arranged and closes the opening, and a flat plate-like third base material that is arranged on the outer surface of the first base material. The conductor layer includes an inner surface of the second substrate, an outer surface of the second substrate, an inner surface of the first substrate, an outer surface of the first substrate, and an inner surface of the third substrate. Covering at least one of the surface and the outer surface of the third substrate. In this case, the gas permeability of the gas filled in the hermetic chamber can be effectively suppressed using the multilayer substrate. The flat connector includes a via that electrically interconnects the inner surface and the outer surface of the first base material. The flat connector includes a first plated through hole that interconnects the inner surface and the outer surface of the second base material and connects to the via of the first base material, the inner surface of the third base material, and A second plated through hole interconnecting the outer surfaces and connecting to the via of the first substrate is provided. For this reason, the inner surface and the outer surface of the multilayer substrate can be electrically and reliably connected by the via, the first plated through hole, and the second plated through hole. Note that the inner surface side of the via is closed by the second base material, and the outer surface side of the via is closed by the third base material. For this reason, in the multilayer substrate, it is not always necessary to fill the conductive plating portion constituting the via with a filler.
本発明に係る平板状コネクタの第1実施形態を用いた電気接続構造の概略模式図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a schematic diagram of the electrical connection structure using 1st Embodiment of the flat connector which concerns on this invention. 図1に示す平板状コネクタを用いた電気接続構造において、平板状コネクタの周辺を詳細に示す断面図である。FIG. 2 is a cross-sectional view showing in detail the periphery of the flat connector in the electrical connection structure using the flat connector shown in FIG. 1. 図1に示す平板状コネクタの平面図である。It is a top view of the flat connector shown in FIG. 図3における4-4線に沿う断面図である。FIG. 4 is a cross-sectional view taken along line 4-4 in FIG. 図4におけるバイア及びその周辺の拡大図である。FIG. 5 is an enlarged view of the via and its periphery in FIG. 4. 図1に示す平板状コネクタから導体層を取り除いた平板状コネクタの平面図である。It is a top view of the flat connector which removed the conductor layer from the flat connector shown in FIG. 図1に示す平板状コネクタの変形例の平面図である。It is a top view of the modification of the flat connector shown in FIG. 本発明に係る平板状コネクタの第2実施形態を示し、(A)は平面図、(B)は(A)における8B-8B線に沿う断面図である。FIG. 2A is a plan view of a flat connector according to the present invention, and FIG. 4B is a cross-sectional view taken along line 8B-8B in FIG. 図8に示す平板状コネクタの第1変形例を示し、(A)は平面図、(B)は(A)における9B-9B線に沿う断面図である。8 shows a first modification of the flat connector shown in FIG. 8, (A) is a plan view, and (B) is a sectional view taken along line 9B-9B in (A). 図8に示す平板状コネクタの第2変形例を示し、(A)は横断面図、(B)は(A)における10B-10B線に沿う断面図である。8 shows a second modification of the flat connector shown in FIG. 8, (A) is a cross-sectional view, and (B) is a cross-sectional view taken along line 10B-10B in (A). 従来例の、隔壁で区画される、圧力が調整された気密チャンバの内側及び外側を電気的に相互接続する電気接続構造の模式図である。It is a schematic diagram of the electrical connection structure which electrically interconnects the inner side and the outer side of the airtight chamber in which the pressure was adjusted divided by the partition of a prior art example. 従来の多層プリント配線基板の断面図である。It is sectional drawing of the conventional multilayer printed wiring board.
 以下、本発明に係る平板状コネクタを用いた電気接続構造の実施形態を図面を参照して説明する。
 図1には、本発明に係る平板状コネクタの第1実施形態を用いた電気接続構造が示されており、この電気接続構造において、隔壁40で区画され内部が気密に保たれる気密チャンバCの内側及び外側を平板状コネクタ1を用いて電気的に相互接続する。気密チャンバCの内部は、真空に近い状態であってもよいし、分子量の少ないガス、例えばHeガスや水素ガスで充満させて外気圧よりも低い圧力の状態に減圧してもよい。また、気密チャンバCの内部は、外気圧よりも高い圧力の状態であってもよい。
Hereinafter, an embodiment of an electrical connection structure using a flat connector according to the present invention will be described with reference to the drawings.
FIG. 1 shows an electrical connection structure using the flat connector according to the first embodiment of the present invention. In this electrical connection structure, an airtight chamber C partitioned by a partition wall 40 and kept airtight. Are electrically interconnected using a flat connector 1. The inside of the airtight chamber C may be in a state close to a vacuum, or may be filled with a gas having a low molecular weight, such as He gas or hydrogen gas, and reduced in pressure to a pressure lower than the external pressure. Further, the inside of the airtight chamber C may be in a state of a pressure higher than the external pressure.
 ここで、隔壁40には、気密チャンバCの内部と外部とを貫通する開口部41が形成されている。また、隔壁40には、隔壁40の気密チャンバC内にガスを注入するためのガス注入用開口部42が形成されている。この隔壁40は、金属製である。
 そして、隔壁40の開口部41は、図1及び図2に示すように、平板状コネクタ1によって塞がれる。
Here, the partition wall 40 is formed with an opening 41 penetrating the inside and the outside of the hermetic chamber C. Further, the partition wall 40 is formed with a gas injection opening 42 for injecting gas into the hermetic chamber C of the partition wall 40. The partition 40 is made of metal.
And the opening part 41 of the partition 40 is block | closed with the flat connector 1 as shown in FIG.1 and FIG.2.
 平板状コネクタ1は、図2に示すように、開口部41を塞ぐ基板10Aを備えている。基板10Aは2層基板であり、この2層基板は、開口部41を塞ぐ基材10を備えている。基材10は、図3に示すように、幅方向(図3における上下方向)及び長手方向(図3における左右方向)に延びる略矩形形状の平板状部材である。基材10は、図2乃至図4に示すように、気密チャンバCの内部側に向けて位置する内表面10a、及び内表面10aと反対側の外表面10bを有する。また、基材10は、幅方向右端面10c、幅方向左端面10d、長手方向後端面10e、及び長手方向前端面10fを有する。基材10の内表面10aには、基材10の外周に沿って連続的に無端状に延びる、内側面19a及び底面19bを有する所定幅の切欠19が形成されている。基材10は、例えば、ガラス入りエポキシ製である。ここで、請求項1で規定している「基板の気密チャンバの内部側に向けて位置する内表面」は、基材10の内表面10aが対応し、「基板の前記内表面と反対側の外表面」は、基材10の外表面10bが対応する。また、請求項1で規定している「内表面と外表面との間の基板の内部に存在する内表面に対して平行に延びる面」は、平板状コネクタ1には存在しない。 The flat connector 1 includes a substrate 10A that closes the opening 41 as shown in FIG. The substrate 10 </ b> A is a two-layer substrate, and the two-layer substrate includes a base material 10 that closes the opening 41. As shown in FIG. 3, the base material 10 is a substantially rectangular flat plate member extending in the width direction (up and down direction in FIG. 3) and the longitudinal direction (left and right direction in FIG. 3). As shown in FIGS. 2 to 4, the base material 10 has an inner surface 10a positioned toward the inner side of the airtight chamber C and an outer surface 10b opposite to the inner surface 10a. Moreover, the base material 10 has the width direction right end surface 10c, the width direction left end surface 10d, the longitudinal direction rear end surface 10e, and the longitudinal direction front end surface 10f. The inner surface 10a of the base material 10 is formed with a notch 19 having a predetermined width and extending in an endless manner along the outer periphery of the base material 10 and having an inner side surface 19a and a bottom surface 19b. The base material 10 is made of glass-filled epoxy, for example. Here, the “inner surface located toward the inner side of the hermetic chamber of the substrate” defined in claim 1 corresponds to the inner surface 10a of the base material 10 and “the opposite side of the inner surface of the substrate”. The “outer surface” corresponds to the outer surface 10 b of the substrate 10. Further, the “plane extending parallel to the inner surface existing inside the substrate between the inner surface and the outer surface” defined in claim 1 does not exist in the flat connector 1.
 また、図2及び図3に示すように、基材10には、導体層11が設けられている。この導体層11は、基材10の内表面10aに形成された2列状の複数の導体パターン11a、基材10の外表面10bに形成された2列状の複数の導体パターン11a、及びこれら複数の導体パターン11aの外側を囲むように設けられた導体パターン11bからなる。基材10の内表面10aに形成された2列状の複数の導体パターン11aのうち一方列のものは、基材10の幅方向右側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。また、基材10の内表面10aに形成された2列状の複数の導体パターン11aのうち他方列のものは、基材10の幅方向左側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。更に、基材10の外表面10bに形成された2列状の複数の導体パターン11aのうち一方列のものは、基材10の幅方向右側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。また、基材10の外表面10bに形成された2列状の複数の導体パターン11aのうち他方列のものは、基材10の幅方向左側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。導体層11の導体パターン11bは、平板状コネクタ1の基材10の内表面10a、切欠19の内側面19a及び底面19b、および基材10の外表面10bを覆う。そして、導体層11の導体パターン11bは、基材10の内表面10a及び外表面10bにそれぞれ形成された2列状の導体パターン11aの列間に延びる導体パターン列間延設部11cを有している。 Further, as shown in FIGS. 2 and 3, the base material 10 is provided with a conductor layer 11. The conductor layer 11 includes a plurality of two rows of conductor patterns 11a formed on the inner surface 10a of the substrate 10, a plurality of two rows of conductor patterns 11a formed on the outer surface 10b of the substrate 10, and these The conductor pattern 11b is provided so as to surround the outside of the plurality of conductor patterns 11a. One of the two rows of conductive patterns 11a formed on the inner surface 10a of the base material 10 is a conductor pattern adjacent along the longitudinal direction of the base material 10 on the right side in the width direction of the base material 10. 11a is arranged at a pitch that does not short-circuit each other. The other row of the plurality of two-row conductive patterns 11 a formed on the inner surface 10 a of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10. The conductor patterns 11a are arranged at a pitch that does not cause a short circuit. Furthermore, one row of the plurality of two rows of conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the width direction of the base material 10 along the longitudinal direction of the base material 10. The conductor patterns 11a are arranged at a pitch that does not cause a short circuit. The other row of the plurality of two-row conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10. The conductor patterns 11a are arranged at a pitch that does not cause a short circuit. The conductor pattern 11 b of the conductor layer 11 covers the inner surface 10 a of the substrate 10 of the flat connector 1, the inner surface 19 a and the bottom surface 19 b of the notch 19, and the outer surface 10 b of the substrate 10. And the conductor pattern 11b of the conductor layer 11 has the conductor pattern row | line extension part 11c extended between the row | line | columns of the two-row-like conductor pattern 11a each formed in the inner surface 10a and the outer surface 10b of the base material 10. ing.
 基材10の内表面10a及び外表面10bにそれぞれ形成された2列状の導体パターン11aの隣接する導体パターン11a間、導体パターン11bと2列状の導体パターン11aとの間、及び導体パターン列間延設部11cと2列状の導体パターン11aとの間は、同一の幅を有し、基材10が露出する部分である。
 ここで、導体層11は、上記場合に限らず、基材10の内表面10a及び外表面10bのうちの少なくとも一面を覆えばよい。そして、ここにいう「覆う」とは、複数の導体パターン11a,11bが、基材10の内表面10a及び外表面10bのうちの少なくとも一面において、少なくとも当該一面の一部を覆っていればよいことを意味する。なお、複数の導体パターン11a,11bが、基材10の内表面10a及び外表面10bのうちの少なくとも一面において、隣接する導体パターン10a,10b同士が短絡しない状態で当該一面を100%近く覆っていることが好ましい。導体層11は、例えば、銅箔によって形成される。
Between the adjacent conductor patterns 11a of the two rows of conductor patterns 11a respectively formed on the inner surface 10a and the outer surface 10b of the base material 10, between the conductor patterns 11b and the two rows of conductor patterns 11a, and the conductor pattern rows The space between the extended portion 11c and the two rows of conductor patterns 11a is a portion having the same width and exposing the base material 10.
Here, the conductor layer 11 is not limited to the above case, and may cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10. And "covering" as used herein means that the plurality of conductor patterns 11a and 11b may cover at least a part of one surface of at least one of the inner surface 10a and the outer surface 10b of the base material 10. Means that. Note that the plurality of conductor patterns 11a and 11b cover almost 100% of the inner surface 10a and the outer surface 10b of the base material 10 in a state where adjacent conductor patterns 10a and 10b are not short-circuited. Preferably it is. The conductor layer 11 is formed of, for example, copper foil.
 また、基板10Aの基材10には、基材10の内表面10a及び外表面10b間を電気的に相互接続する複数のバイア15が設けられている。バイア15は、図3に示すように、各導体パターン11aにつき1個づつ設けられるとともに、導体パターン11bにおいて各列の導体パターン11aの長手方向両脇に1個づつ合計4個設けられている。各バイア15は、基材10の内表面10aと外表面10bとを貫通する貫通孔12の内周面に設けられた環状の導電めっき部13と、導電めっき部13の内部に充填された充填材14とからなっている。導電めっき部13は、基材10の内表面10aと外表面10bとの間を延びている。この導電めっき部13は、例えば、すずめっきあるいは金めっきで形成される。充填材14を導電めっき部13内に充填しているので、気密チャンバの内部に充満されているガスのガス透過率を効果的に抑制することができる。この充填材14は、本実施形態の場合、導電性のある半田が使用される。充填材14に導電性のある半田を用いると、基材10の内表面10aと外表面10bとの電気的接続が確実に行えるばかりでなく、気密チャンバCの内部に充填されているガスが気密チャンバCの内部から外部に向けて移動する際に半田によってその移動を効果的に遮断できる。これにより、気密チャンバCの内部に充満されているガスのガス透過率をより効果的に抑制することができる。なお、充填材14は、必ずしも導電性は必要なく、気密性を有する樹脂(例えば、商品名「Torr Seal」(登録商標))であってもよい。 Also, the base material 10 of the substrate 10A is provided with a plurality of vias 15 that electrically interconnect the inner surface 10a and the outer surface 10b of the base material 10. As shown in FIG. 3, one via 15 is provided for each conductor pattern 11a, and four conductors 11b are provided on each side of the conductor pattern 11b in the longitudinal direction of each row of conductor patterns 11a. Each via 15 includes an annular conductive plating portion 13 provided on the inner peripheral surface of the through hole 12 that penetrates the inner surface 10 a and the outer surface 10 b of the base material 10, and filling that is filled in the conductive plating portion 13. It consists of material 14. The conductive plating portion 13 extends between the inner surface 10 a and the outer surface 10 b of the base material 10. The conductive plating portion 13 is formed by, for example, tin plating or gold plating. Since the conductive material 13 is filled with the filler 14, the gas permeability of the gas filled in the airtight chamber can be effectively suppressed. In this embodiment, the filler 14 is made of conductive solder. When conductive solder is used for the filler 14, not only can the electrical connection between the inner surface 10 a and the outer surface 10 b of the base material 10 be ensured, but the gas filled in the hermetic chamber C is airtight. When moving from the inside of the chamber C toward the outside, the movement can be effectively blocked by the solder. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled can be suppressed more effectively. The filler 14 does not necessarily need to be electrically conductive, and may be an airtight resin (for example, trade name “Torr Seal” (registered trademark)).
 基材10に設けられた貫通孔12の内周面と導電めっき部13との間には、図4及び図5によく示すように、基材10の内表面10a及び外表面10bの導体パターン11aが延びている。そして、この導体パターン11aの内周面に導電めっき部13が設けられている。この導体パターン11aと導電めっき部13との間は密封され、導電めっき部13と充填材14との間も密封される。これにより、気密チャンバCの内部からバイア15を介してのガスの漏れはない。 Between the inner peripheral surface of the through-hole 12 provided in the base material 10 and the conductive plating portion 13, as shown in FIGS. 4 and 5, the conductor pattern of the inner surface 10 a and the outer surface 10 b of the base material 10. 11a extends. And the conductive plating part 13 is provided in the internal peripheral surface of this conductor pattern 11a. The conductor pattern 11a and the conductive plating portion 13 are sealed, and the conductive plating portion 13 and the filler 14 are also sealed. Thereby, there is no gas leakage from the inside of the airtight chamber C through the via 15.
 そして、基材10の内表面10a及び外表面10bの導体パターン11a上には、バイア15の導電めっき部13によって相互接続された1対の導電パッド16が設けられている。これら導電パッド16は、導電めっき部13と別個に形成されたものとなっているが、必ずしも別個に形成する必要はない。即ち、基材10の内表面10a及び外表面10b側の導電めっき部13自体を導電パッド16としてもよい。 And on the conductor pattern 11a of the inner surface 10a and the outer surface 10b of the base material 10, a pair of conductive pads 16 interconnected by the conductive plating part 13 of the via 15 are provided. These conductive pads 16 are formed separately from the conductive plating portion 13, but are not necessarily formed separately. That is, the conductive plating part 13 itself on the inner surface 10 a and outer surface 10 b side of the base material 10 may be used as the conductive pad 16.
 更に、基材10の内表面10aの導体パターン11bには、図2乃至図5に示すように、基材10の外周に沿って連続的に無端状に延びる半田付け層17が形成されている。図3及び図5によく示すように、半田付け層17は、基材10の内表面10aから切欠19の内側面19a及び底面19bを経て基材10の幅方向右端面10c、幅方向左端面10d、長手方向後端面10e、及び長手方向前端面10fに至るまで延びている。半田付け層17は、例えば、すずめっきあるいは金めっきで形成される。なお、図2、図4、及び図5において、符号18は、レジスト層である。 Further, as shown in FIGS. 2 to 5, a soldering layer 17 extending continuously and endlessly along the outer periphery of the base material 10 is formed on the conductor pattern 11 b on the inner surface 10 a of the base material 10. . As shown well in FIGS. 3 and 5, the soldering layer 17 passes through the inner surface 19 a and the bottom surface 19 b of the notch 19 from the inner surface 10 a of the substrate 10, and the width direction right end surface 10 c and the width direction left end surface of the substrate 10. 10d, the longitudinal rear end surface 10e, and the longitudinal front end surface 10f. The soldering layer 17 is formed by, for example, tin plating or gold plating. 2, 4, and 5, reference numeral 18 denotes a resist layer.
 次に、気密チャンバCの内側及び外側を平板状コネクタ1を用いて電気的に相互接続する際には、先ず、図1に示すように、第1回路基板20を気密チャンバC内に配置しておく。そして、図2に示すように、平板状コネクタ1の内表面10aを隔壁40側にして開口部41側に向ける。そして、基材10の内表面10a側にある半田付け層17を半田Sによって隔壁40に接続する。これにより、平板状コネクタ1が隔壁40に固定されると共に、開口部41が平板状コネクタ1によって塞がれる。また、平板状コネクタ1の内表面10a側の導電パッド16が第1回路基板20に設けられたコンタクト21に接触する。 Next, when the inner side and the outer side of the hermetic chamber C are electrically interconnected using the flat connector 1, first, the first circuit board 20 is disposed in the hermetic chamber C as shown in FIG. Keep it. Then, as shown in FIG. 2, the inner surface 10a of the flat connector 1 is directed toward the opening 41 with the partition wall 40 side. Then, the soldering layer 17 on the inner surface 10 a side of the base material 10 is connected to the partition wall 40 by the solder S. Thereby, the flat connector 1 is fixed to the partition wall 40 and the opening 41 is closed by the flat connector 1. In addition, the conductive pad 16 on the inner surface 10 a side of the flat connector 1 contacts the contact 21 provided on the first circuit board 20.
 そして、図1に示すように、第2回路基板30に設けられたコンタクト31を、平板状コネクタ1の外表面10bにある導電パッド16に接触させる。これにより、第1回路基板20及び第2回路基板30が平板状コネクタ1を介して電気的に相互接続される。
 ここで、本実施形態において図3に示すように導体層11を設けた平板状コネクタ1と、図6に示すように導体層11を取り除いた平板状コネクタ51とで、基材10の内表面10a及び外表面10bにおける基材露出面積がどのように変化したか、について説明する。
Then, as shown in FIG. 1, the contact 31 provided on the second circuit board 30 is brought into contact with the conductive pad 16 on the outer surface 10 b of the flat connector 1. As a result, the first circuit board 20 and the second circuit board 30 are electrically connected to each other via the flat connector 1.
Here, in this embodiment, the flat connector 1 provided with the conductor layer 11 as shown in FIG. 3 and the flat connector 51 with the conductor layer 11 removed as shown in FIG. A description will be given of how the substrate exposed area on the outer surface 10b and the outer surface 10b has changed.
 図3に示すように導体層11を設けた平板状コネクタ1の場合には、基材10の内表面10a及び外表面10bにおける基材露出面積は12.01mmであった。これに対して、図6に示すように導体層11を取り除いた平板状コネクタ51の場合には、89.15mmであった。このように、本実施形態、即ち図3に示すように導体層11を設けた平板状コネクタ1の場合には、基材10の内表面10a及び外表面10bにおける基材露出面積が、導体層11を取り除いた平板状コネクタ51の場合と比較して約1/7に減少する。 In the case of the flat connector 1 provided with the conductor layer 11 as shown in FIG. 3, the substrate exposed area on the inner surface 10 a and the outer surface 10 b of the substrate 10 was 12.01 mm 2 . On the other hand, in the case of the flat connector 51 with the conductor layer 11 removed as shown in FIG. 6, it was 89.15 mm 2 . Thus, in this embodiment, that is, in the case of the flat connector 1 provided with the conductor layer 11 as shown in FIG. 3, the substrate exposed areas on the inner surface 10a and the outer surface 10b of the substrate 10 are the conductor layers. Compared with the case of the flat connector 51 from which 11 is removed, it is reduced to about 1/7.
 この結果、気密チャンバCの内部に充満されているガスの透過(mol/s・Pa)が、図3に示すように導体層11を設けた平板状コネクタ1の場合には、基材露出面積の減少率に応じて、導体層11を取り除いた平板状コネクタ51の場合と比較して約1/7に減少する。
 従って、本実施形態に係る平板状コネクタ1によれば、基板10Aは2層基板であり、この2層基板は、開口部41を塞ぐ平板状の基材10を備え、導体層11は、基材10の内表面10a及び外表面10bのうちの少なくとも一面を覆う。このため、気密チャンバCの内部に充填されているガスが気密チャンバCの内部から外部に向けて基材10中を通過できたとしても導体層11を通過できず、気密チャンバCの内部に充満されているガスのガス透過率を効果的に抑制することができる。そして、2層基板を用いて気密チャンバCの内部に充満されているガスのガス透過率を効果的に抑制することができる。
As a result, when the gas permeation (mol / s · Pa) filled in the hermetic chamber C is the flat connector 1 provided with the conductor layer 11 as shown in FIG. Is reduced to about 1/7 as compared with the case of the flat connector 51 from which the conductor layer 11 is removed.
Therefore, according to the flat connector 1 according to the present embodiment, the substrate 10A is a two-layer substrate, and the two-layer substrate includes the flat substrate 10 that closes the opening 41, and the conductor layer 11 has a base layer. At least one of the inner surface 10a and the outer surface 10b of the material 10 is covered. For this reason, even if the gas filled in the airtight chamber C can pass through the base material 10 from the inside of the airtight chamber C to the outside, it cannot pass through the conductor layer 11 and fills the inside of the airtight chamber C. It is possible to effectively suppress the gas permeability of the gas being used. And the gas permeability of the gas with which the inside of the airtight chamber C is filled using a 2 layer board | substrate can be suppressed effectively.
 なお、基材10がガラスエポキシ製の場合には、気密チャンバCの内部に充満されているガス、特に分子量の少ないHeガスや水素ガスが、有機物であるエポキシの部分を通過し易い。しかし、この場合でも、気密チャンバCの内部に充填されているガスが気密チャンバCの内部から外部に向けて移動する際に導体層11によってその移動が遮断される。これにより、気密チャンバCの内部に充満されているガスのガス透過率をより効果的に抑制することができる。 When the substrate 10 is made of glass epoxy, the gas filled in the hermetic chamber C, particularly He gas or hydrogen gas having a low molecular weight, easily passes through the epoxy part which is an organic substance. However, even in this case, when the gas filled in the airtight chamber C moves from the inside of the airtight chamber C toward the outside, the movement is blocked by the conductor layer 11. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled can be suppressed more effectively.
 また、この平板状コネクタ1によれば、基材10の内表面10a及び外表面10b間を電気的に相互接続するバイア15を備えている。このため、2層基板の基材10の内表面10a及び外表面10b間をバイア15によって電気的に確実に接続することができる。また、バイア15を構成する導電めっき部13内に充填材14が充填されているので、気密チャンバCの内部に充満されているガスのガス透過率をより効果的に抑制することができる。 Further, according to the flat connector 1, the via 15 for electrically interconnecting the inner surface 10 a and the outer surface 10 b of the substrate 10 is provided. For this reason, the inner surface 10a and the outer surface 10b of the base material 10 of the two-layer substrate can be electrically and reliably connected by the via 15. Moreover, since the filler 14 is filled in the conductive plating part 13 constituting the via 15, the gas permeability of the gas filled in the airtight chamber C can be more effectively suppressed.
 また、基材10の内表面10aに、基材10の外周に沿って連続的に無端状に延びる半田付け層17を形成してある。このため、基材10の内表面10a側にある半田付け層17を半田Sによって隔壁40に接続することにより、平板状コネクタ1を構成する基板10Aを隔壁40に固定することができる。 Further, a soldering layer 17 extending continuously and endlessly along the outer periphery of the substrate 10 is formed on the inner surface 10a of the substrate 10. For this reason, by connecting the soldering layer 17 on the inner surface 10a side of the base material 10 to the partition wall 40 with the solder S, the substrate 10A constituting the flat connector 1 can be fixed to the partition wall 40.
 次に、図7を参照して図1に示す平板状コネクタ1の変形例を説明する。
 図7に示す平板状コネクタ1においては、図1、図3に示す平板状コネクタ1と同様に、基材10に、導体層11を設けている。この導体層11は、基材10の内表面10aに形成された2列状の複数の導体パターン11a、基材10の外表面10bに形成された2列状の複数の導体パターン11a、及びこれら複数の導体パターン11aの外側を囲むように設けられた導体パターン11bからなる。各導体パターン11aの面積は、図3に示す平板状コネクタ1の導体パターン11aよりも大きい。しかし、導体層11の導体パターン11bは、図3に示す導体パターン11bと異なり、基材10の内表面10a及び外表面10bにそれぞれ形成された2列状の導体パターン11aの列間に延びる導体パターン列間延設部11cが形成されていない。
Next, a modification of the flat connector 1 shown in FIG. 1 will be described with reference to FIG.
In the flat connector 1 shown in FIG. 7, the conductor layer 11 is provided in the base material 10 similarly to the flat connector 1 shown in FIG. 1, FIG. The conductor layer 11 includes a plurality of two rows of conductor patterns 11a formed on the inner surface 10a of the substrate 10, a plurality of two rows of conductor patterns 11a formed on the outer surface 10b of the substrate 10, and these The conductor pattern 11b is provided so as to surround the outside of the plurality of conductor patterns 11a. The area of each conductor pattern 11a is larger than the conductor pattern 11a of the flat connector 1 shown in FIG. However, unlike the conductor pattern 11b shown in FIG. 3, the conductor pattern 11b of the conductor layer 11 is a conductor extending between the two rows of conductor patterns 11a formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively. The extension part 11c between pattern rows is not formed.
 基材10の内表面10aに形成された2列状の複数の導体パターン11aのうち一方列のものは、基材10の幅方向右側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。また、基材10の内表面10aに形成された2列状の複数の導体パターン11aのうち他方列のものは、基材10の幅方向左側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。更に、基材10の外表面10bに形成された2列状の複数の導体パターン11aのうち一方列のものは、基材10の幅方向右側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。また、基材10の外表面10bに形成された2列状の複数の導体パターン11aのうち他方列のものは、基材10の幅方向左側において、基材10の長手方向に沿って隣り合う導体パターン11a同士が短絡しない程度のピッチで配列される。 One of the two rows of conductive patterns 11a formed on the inner surface 10a of the base material 10 is a conductor pattern adjacent along the longitudinal direction of the base material 10 on the right side in the width direction of the base material 10. 11a is arranged at a pitch that does not short-circuit each other. The other row of the plurality of two-row conductive patterns 11 a formed on the inner surface 10 a of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10. The conductor patterns 11a are arranged at a pitch that does not cause a short circuit. Furthermore, one row of the plurality of two rows of conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the width direction of the base material 10 along the longitudinal direction of the base material 10. The conductor patterns 11a are arranged at a pitch that does not cause a short circuit. The other row of the plurality of two-row conductive patterns 11 a formed on the outer surface 10 b of the base material 10 is adjacent to the left side of the base material 10 along the longitudinal direction of the base material 10. The conductor patterns 11a are arranged at a pitch that does not cause a short circuit.
 基材10の内表面10a及び外表面10bにそれぞれ形成された2列状の導体パターン11aの隣接する導体パターン11a間、導体パターン11bと2列状の導体パターン11aとの間、及び2列状の導体パターン11aの列間は、同一の幅を有し、基材10が露出する部分である。
 また、バイア15は、図7に示すように、各導体パターン11aにつき1個づつ設けられるが、導体パターン11bには設けられていない点で図3に示す平板状コネクタ1と異なる。
Between the adjacent conductor patterns 11a of the two rows of conductor patterns 11a formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively, between the conductor patterns 11b and the two rows of conductor patterns 11a, and in two rows Between the rows of the conductor patterns 11a, the portions having the same width and the substrate 10 are exposed.
Further, as shown in FIG. 7, one via 15 is provided for each conductor pattern 11a, but is different from the flat connector 1 shown in FIG. 3 in that it is not provided on the conductor pattern 11b.
 この図7に示すように導体層11を設けた平板状コネクタ1の場合には、基材10の内表面10a及び外表面10bにおける基材露出面積は21.44mmであった。この図7に示すように導体層11を設けた平板状コネクタ1の場合には、基材10の内表面10a及び外表面10bにおける基材露出面積が、図6に示す導体層11を取り除いた平板状コネクタ51の場合と比較して約1/4に減少する。
 この結果、気密チャンバCの内部に充満されているガスの透過(mol/s・Pa)が、図7に示すように導体層11を設けた平板状コネクタ1の場合には、基材露出面積の減少率に応じて、導体層11を取り除いた平板状コネクタ51の場合と比較して約1/4に減少する。
As shown in FIG. 7, in the case of the flat connector 1 provided with the conductor layer 11, the substrate exposed area on the inner surface 10 a and the outer surface 10 b of the substrate 10 was 21.44 mm 2 . In the case of the flat connector 1 provided with the conductor layer 11 as shown in FIG. 7, the substrate exposed areas on the inner surface 10a and the outer surface 10b of the substrate 10 are removed from the conductor layer 11 shown in FIG. Compared to the case of the flat connector 51, it is reduced to about 1/4.
As a result, when the gas permeation (mol / s · Pa) filled in the airtight chamber C is the flat connector 1 provided with the conductor layer 11 as shown in FIG. In accordance with the decrease rate of the flat connector 51, it is reduced to about 1/4 compared with the case of the flat connector 51 from which the conductor layer 11 is removed.
 次に、本発明に係る平板状コネクタの第2実施形態について図8乃至図10を参照して説明する。
 図8(A),(B)には、本発明に係る平板状コネクタの第2実施形態が示され、この平板状コネクタ50は、第1実施形態の平板状コネクタ1の代わりに、図1に示されている電気接続構造に用いられる。
 図8(A),(B)に示す平板状コネクタ50は、隔壁40の開口部41を塞ぎ、気密チャンバCの内側及び外側を電気的に接続する。
Next, a second embodiment of the flat connector according to the present invention will be described with reference to FIGS.
8A and 8B show a second embodiment of a flat connector according to the present invention, and this flat connector 50 is replaced with the flat connector 1 of the first embodiment shown in FIG. Used in the electrical connection structure shown in FIG.
The flat connector 50 shown in FIGS. 8A and 8B closes the opening 41 of the partition wall 40 and electrically connects the inside and the outside of the airtight chamber C.
 この平板状コネクタ50は、隔壁40の開口部41を塞ぐ基板60Aを備えている。この基板60Aは、多層基板としての4層基板である。基板60Aは、平板状の第1基材60と、第1基材60の内表面60aに配置されて開口部41を塞ぐ平板状の第2基材70と、第1基材60の外表面60bに配置される平板状の第3基材80とを備えている。
 ここで、第1基材60は、幅方向(図8(A)における左右方向)及び長手方向(図8(A)における上下方向)に延びる略矩形形状の平板状部材である。第1基材60は、気密チャンバC(図1参照)の内部側に向けて位置する内表面60aと、その内表面60aと反対側の外表面60bとを有する。第1基材60は、例えば、ガラス入りエポキシ製である。
The flat connector 50 includes a board 60 </ b> A that closes the opening 41 of the partition wall 40. This substrate 60A is a four-layer substrate as a multilayer substrate. The substrate 60 </ b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and an outer surface of the first base material 60. And a flat plate-like third base member 80 disposed at 60b.
Here, the first base member 60 is a substantially rectangular flat plate member extending in the width direction (left-right direction in FIG. 8A) and the longitudinal direction (up-down direction in FIG. 8A). The first base member 60 has an inner surface 60a positioned toward the inner side of the hermetic chamber C (see FIG. 1), and an outer surface 60b opposite to the inner surface 60a. The first base material 60 is made of glass-containing epoxy, for example.
 また、第1基材60には、図8(B)に示すように、第1基材60の内表面60a及び外表面60b間を電気的に相互接続する複数のバイア64が形成されている。複数のバイア64は、第1基材60の幅方向において2列状に形成されている。図示はしないが、各列のバイア64は、長手方向に沿って所定ピッチで形成されている。そして、各バイア64は、第1基材60の内周面60a及び外表面60b間を貫通する貫通孔61の内周面に施された環状の第1導電めっき部62を備えている。第1導電めっき部62の内部には、充填材63が充填されている。第1導電めっき部62は、第1基材60の内周面60a及び外表面60b間を延びている。この第1導電めっき部62は、例えば、すずめっきあるいは金めっきで形成される。また、充填材63は、導電性のある半田が使用される。充填材63に導電性のある半田を用いると、第1基材60の内表面60aと外表面60bとの電気的接続が確実に行えるばかりでなく、気密チャンバCの内部に充填されているガスが気密チャンバCの内部から外部に向けて移動する際に半田によってその移動を効果的に遮断できる。これにより、気密チャンバCの内部に充満されているガスのガス透過率をより効果的に抑制することができる。なお、充填材14は、必ずしも導電性は必要なく、気密性を有する樹脂(例えば、商品名「Torr Seal」(登録商標))であってもよい。 In addition, as shown in FIG. 8B, the first base material 60 is formed with a plurality of vias 64 that electrically interconnect the inner surface 60 a and the outer surface 60 b of the first base material 60. . The plurality of vias 64 are formed in two rows in the width direction of the first base material 60. Although not shown, the vias 64 in each row are formed at a predetermined pitch along the longitudinal direction. Each via 64 includes an annular first conductive plating portion 62 provided on the inner peripheral surface of the through hole 61 penetrating between the inner peripheral surface 60 a and the outer surface 60 b of the first base material 60. A filler 63 is filled in the first conductive plating part 62. The first conductive plating portion 62 extends between the inner peripheral surface 60 a and the outer surface 60 b of the first base material 60. The first conductive plating part 62 is formed by, for example, tin plating or gold plating. The filler 63 is made of conductive solder. When conductive solder is used for the filler 63, not only can the electrical connection between the inner surface 60a and the outer surface 60b of the first base member 60 be ensured, but also the gas filled in the hermetic chamber C. However, when moving from the inside of the airtight chamber C to the outside, the movement can be effectively blocked by the solder. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled can be suppressed more effectively. The filler 14 does not necessarily need to be electrically conductive, and may be an airtight resin (for example, trade name “Torr Seal” (registered trademark)).
 また、第1基材60の内表面60aには、第1導電めっき部62の内表面60a側に接続された複数の第1導電層65が設けられている。また、第1基材60の外表面60bには、第1導電めっき部62の外表面60b側に接続された複数の第2導電層66が設けられている。
 そして、第2基材70は、幅方向(図8(A)における左右方向)及び長手方向(図8(A)における上下方向)に延びる略矩形形状の平板状部材である。第2基材70は、第1基材60の内表面60aと同一の幅及び長さを有する。そして、第2基材70は、図1に示す気密チャンバCの内部側に向けて位置する内表面70aと、この内表面70aと反対側の外表面70bとを有する。第2基材70は、例えば、ガラス入りエポキシ製である。
A plurality of first conductive layers 65 connected to the inner surface 60 a side of the first conductive plating portion 62 are provided on the inner surface 60 a of the first base material 60. A plurality of second conductive layers 66 connected to the outer surface 60 b side of the first conductive plating portion 62 are provided on the outer surface 60 b of the first base material 60.
The second base material 70 is a substantially rectangular flat plate member extending in the width direction (left-right direction in FIG. 8A) and the longitudinal direction (up-down direction in FIG. 8A). The second base material 70 has the same width and length as the inner surface 60 a of the first base material 60. And the 2nd base material 70 has the inner surface 70a located toward the inner side of the airtight chamber C shown in FIG. 1, and the outer surface 70b on the opposite side to this inner surface 70a. The second base material 70 is made of glass-containing epoxy, for example.
 また、第2基材70には、図8(B)に示すように、第2基材70の内表面70a及び外表面70b間を相互接続する複数の第1めっきスルーホール73が形成されている。複数の第1めっきスルーホール73は、第2基材70の幅方向においてバイア64よりも外側の位置に2列状に形成されている。各列の第1めっきスルーホール73は、第2基材70の内表面70a及び外表面70b間を貫通する貫通孔71の内周面に、第2導電めっき部72を施してなる。第2導電めっき部72は、第2基材70の内表面70a及び外表面70b間を延びる。第2導電めっき部72は、図8(B)に示すように、貫通孔71の内部をすべて埋め尽くすように形成されている。そして、各第2導電めっき部72の外表面70b側は、第1基材60に形成されたバイア64を構成する第1導電めっき部62の内表面60a側に接続された第1導電層65と接続する。また、第2基材70の内表面70aには、第2導電めっき部72の内表面側に接続された複数の導電パッド74が設けられている。複数の導電パッド74は、図8(A)に示すように、第2基材70の内表面70aにおいて、幅方向に2列状に形成される。各導電パッド74は、長方形状に形成される。 Further, as shown in FIG. 8B, the second base material 70 is formed with a plurality of first plated through holes 73 that interconnect the inner surface 70 a and the outer surface 70 b of the second base material 70. Yes. The plurality of first plated through holes 73 are formed in two rows at positions outside the vias 64 in the width direction of the second base material 70. The first plated through hole 73 in each row is formed by providing a second conductive plating portion 72 on the inner peripheral surface of the through hole 71 that penetrates between the inner surface 70 a and the outer surface 70 b of the second base material 70. The second conductive plating part 72 extends between the inner surface 70 a and the outer surface 70 b of the second base material 70. As shown in FIG. 8B, the second conductive plating portion 72 is formed so as to completely fill the inside of the through hole 71. Then, the outer surface 70 b side of each second conductive plating part 72 is connected to the inner surface 60 a side of the first conductive plating part 62 constituting the via 64 formed on the first base material 60. Connect with. A plurality of conductive pads 74 connected to the inner surface side of the second conductive plating part 72 are provided on the inner surface 70 a of the second base material 70. As shown in FIG. 8A, the plurality of conductive pads 74 are formed in two rows in the width direction on the inner surface 70 a of the second base material 70. Each conductive pad 74 is formed in a rectangular shape.
 更に、第3基材80は、幅方向(図8(A)における左右方向)及び長手方向(図8(A)における上下方向)に延びる略矩形形状の平板状部材である。第3基材80は、第1基材60の外表面60bと同一の幅及び長さを有する。そして、第3基材80は、図1に示す気密チャンバCの内部側に向けて位置する内表面80aと反対側の外表面80bとを有する。第3基材80は、例えば、ガラス入りエポキシ製である。 Furthermore, the third base member 80 is a substantially rectangular flat plate member extending in the width direction (left-right direction in FIG. 8A) and the longitudinal direction (up-down direction in FIG. 8A). The third substrate 80 has the same width and length as the outer surface 60 b of the first substrate 60. And the 3rd base material 80 has the inner surface 80a located toward the inner side of the airtight chamber C shown in FIG. 1, and the outer surface 80b on the opposite side. The third substrate 80 is made of glass-containing epoxy, for example.
 また、第3基材80には、図8(B)に示すように、第2基材80の内表面80a及び外表面80b間を相互接続する複数の第2めっきスルーホール83が形成されている。複数の第2めっきスルーホール83は、第3基材80の幅方向においてバイア64よりも外側の位置に2列状に形成されている。各列の第2めっきスルーホール83は、第3基材80の内表面80a及び外表面80b間を貫通する貫通孔81の内周面に、第3導電めっき部82を施してなる。第3導電めっき部82は、第3基材80の内表面80a及び外表面80b間を延びる。第3導電めっき部82は、図8(B)に示すように、貫通孔81の内部をすべて埋め尽くすように形成されている。そして、各第3導電めっき部82の内表面80a側は、第1基材60に形成されたバイア64を構成する第1導電めっき部62の外表面60b側に接続された第2導電層66と接続する。また、第3基材80の外表面80bには、第3導電めっき部82の外表面側に接続された複数の導電パッド84が設けられている。複数の導電パッド84は、図示はしないが、第3基材80の外表面80bにおいて、幅方向に2列状に形成される。各導電パッド84は、長方形状に形成される。 Further, as shown in FIG. 8B, the third base material 80 is formed with a plurality of second plating through holes 83 interconnecting the inner surface 80a and the outer surface 80b of the second base material 80. Yes. The plurality of second plated through holes 83 are formed in two rows at positions outside the vias 64 in the width direction of the third base material 80. The second plated through hole 83 in each row is formed by providing a third conductive plated portion 82 on the inner peripheral surface of the through hole 81 that penetrates between the inner surface 80a and the outer surface 80b of the third substrate 80. The third conductive plating portion 82 extends between the inner surface 80 a and the outer surface 80 b of the third base material 80. As shown in FIG. 8B, the third conductive plating portion 82 is formed so as to completely fill the inside of the through hole 81. Then, the inner surface 80a side of each third conductive plating portion 82 is connected to the second conductive layer 66 connected to the outer surface 60b side of the first conductive plating portion 62 constituting the via 64 formed on the first base member 60. Connect with. A plurality of conductive pads 84 connected to the outer surface side of the third conductive plating portion 82 are provided on the outer surface 80 b of the third base material 80. Although not shown, the plurality of conductive pads 84 are formed in two rows in the width direction on the outer surface 80 b of the third base material 80. Each conductive pad 84 is formed in a rectangular shape.
 ここで、図8(B)に示すように、第2基材70の外表面70bが第1基材60の内表面60aに接するように配置されて、第2基材70によって第1基材60に形成されたバイア64の内表面側が塞がれる。また、第3基材80の内表面80aが第1基材60の外表面60bに接するように配置されて、第3基材80によって第1基材60に形成されたバイア64の外表面側が塞がれる。 Here, as shown in FIG. 8B, the second base material 70 is arranged so that the outer surface 70 b of the second base material 70 is in contact with the inner surface 60 a of the first base material 60. The inner surface side of the via 64 formed in 60 is closed. In addition, the inner surface 80a of the third base material 80 is disposed so as to contact the outer surface 60b of the first base material 60, and the outer surface side of the via 64 formed on the first base material 60 by the third base material 80 is It is blocked.
 また、図8(A),(B)に示すように、第2基材70の内表面70aには、導体層90が設けられている。この導体層90は、第2基材70の内表面70aに幅方向に2列状に形成された複数の導電パッド74の外側を囲むように略矩形形状に形成されている。導体層90は、各導電パッド74との間で短絡しないように各導電パッド74に対して所定間隔をあけて配置される。導体層90は、第2基材70の内表面70aのうち、後述する、第2基材70の外周に沿って連続的に無端状に延びる半田付け層91を除く部分をほぼ覆うように設けられる。導体層90は、例えば、銅箔によって形成される。 Further, as shown in FIGS. 8A and 8B, a conductor layer 90 is provided on the inner surface 70 a of the second base material 70. The conductor layer 90 is formed in a substantially rectangular shape so as to surround the outside of the plurality of conductive pads 74 formed in two rows in the width direction on the inner surface 70 a of the second base material 70. The conductor layer 90 is arranged at a predetermined interval with respect to each conductive pad 74 so as not to be short-circuited with each conductive pad 74. The conductor layer 90 is provided so as to substantially cover a portion of the inner surface 70a of the second base material 70 excluding a soldering layer 91 that continuously extends endlessly along the outer periphery of the second base material 70, which will be described later. It is done. The conductor layer 90 is formed of, for example, copper foil.
 この導体層90は、第2基材70の内表面70aを覆う場合に限らず、第2基材70の内表面70a、第2基材70の外表面70b、第1基材60の内表面60a、第1基材60の外表面60b、第3基材80の内表面80a、及び第3基材80の外表面80bのうちの少なくとも一面を覆うようにすればよい。ここで、「覆う」とは、導体層90が、第2基材70の内表面70a、第2基材70の外表面70b、第1基材60の内表面60a、第1基材60の外表面60b、第3基材80の内表面80a、及び第3基材80の外表面80bのうちの少なくとも一面において、少なくとも当該一面の一部を覆っていればよいことを意味する。なお、導体層90が、当該一面を100%近く覆っていることが好ましい。 The conductor layer 90 is not limited to covering the inner surface 70 a of the second base material 70, but the inner surface 70 a of the second base material 70, the outer surface 70 b of the second base material 70, and the inner surface of the first base material 60. It is only necessary to cover at least one of 60a, the outer surface 60b of the first substrate 60, the inner surface 80a of the third substrate 80, and the outer surface 80b of the third substrate 80. Here, “covering” means that the conductor layer 90 has the inner surface 70 a of the second base material 70, the outer surface 70 b of the second base material 70, the inner surface 60 a of the first base material 60, and the first base material 60. It means that at least one part of the outer surface 60b, the inner surface 80a of the third base member 80, and the outer surface 80b of the third base member 80 only needs to be covered. Note that the conductor layer 90 preferably covers nearly 100% of the one surface.
 更に、第2基材70の内表面70aには、図8(A),(B)に示すように、第2基材70の外周に沿って所定幅で連続的に無端状に延びる半田付け層91が形成されている。半田付け層91は、例えば、すずめっきあるいは金めっきで形成される。
 なお、請求項1で規定している「基板の気密チャンバの内部側に向けて位置する内表面」は、第2基材70の内表面70aが対応し、「基板の前記内表面と反対側の外表面」は、第3基材80の外表面80bが対応する。また、請求項1で規定している「内表面と外表面との間の基板の内部に存在する内表面に対して平行に延びる面」は、第2基材70の外表面70b、第1基材60の内表面60a、第1基材60の外表面60b、及び第3基材80の内表面80aが対応する。
Further, as shown in FIGS. 8A and 8B, the inner surface 70a of the second base material 70 is soldered to extend continuously and endlessly with a predetermined width along the outer periphery of the second base material 70. A layer 91 is formed. The soldering layer 91 is formed by, for example, tin plating or gold plating.
The “inner surface located toward the inner side of the hermetic chamber of the substrate” defined in claim 1 corresponds to the inner surface 70a of the second base material 70, and “the opposite side of the inner surface of the substrate”. Corresponds to the outer surface 80b of the third base member 80. Further, the “surface extending parallel to the inner surface existing inside the substrate between the inner surface and the outer surface” defined in claim 1 is the outer surface 70b of the second base material 70, the first surface. The inner surface 60a of the substrate 60, the outer surface 60b of the first substrate 60, and the inner surface 80a of the third substrate 80 correspond to each other.
 次に、気密チャンバCの内側及び外側を平板状コネクタ50を用いて電気的に相互接続する際には、先ず、図1に示すように、第1回路基板20を気密チャンバC内に配置しておく。そして、図示はしないが、平板状コネクタ50の第2基材70の内表面70aを隔壁40側にして開口部41側に向ける。そして、第2基材70の内表面70a側にある半田付け層91を半田によって隔壁40に接続する。これにより、平板状コネクタ50が隔壁40に固定されると共に、開口部41が平板状コネクタ50によって塞がれる。また、平板状コネクタ50の第2基材70の内表面70a側の導電パッド74が第1回路基板20に設けられたコンタクト21に接触する。 Next, when the inner side and the outer side of the hermetic chamber C are electrically interconnected using the flat connector 50, first, the first circuit board 20 is disposed in the hermetic chamber C as shown in FIG. Keep it. And although not shown in figure, the inner surface 70a of the 2nd base material 70 of the flat connector 50 is turned to the partition 40 side, and is turned to the opening part 41 side. And the soldering layer 91 in the inner surface 70a side of the 2nd base material 70 is connected to the partition 40 with solder. Accordingly, the flat connector 50 is fixed to the partition wall 40 and the opening 41 is closed by the flat connector 50. Further, the conductive pads 74 on the inner surface 70 a side of the second base material 70 of the flat connector 50 come into contact with the contacts 21 provided on the first circuit board 20.
 そして、第2回路基板30に設けられたコンタクト31を、平板状コネクタ50の第3基材80の外表面80b側にある導電パッド84に接触させる。これにより、第1回路基板20及び第2回路基板30が平板状コネクタ50を介して電気的に相互接続される。
 この実施形態に係る平板状コネクタ50によれば、開口部41を塞ぐ基板60Aは多層基板としての4層基板である。そして、基板60Aは、平板状の第1基材60と、第1基材60の内表面60aに配置されて開口部41を塞ぐ平板状の第2基材70と、第1基材60の外表面60bに配置される平板状の第3基材80とを備える。また、導体層90が、第2基材70の内表面70aの一面を覆う。このため、気密チャンバCの内部に充填されているガスが気密チャンバCの内部から外部に向けて第2基材70、第1基材60、及び第3基材80中を通過できたとしても導体層90を通過できない。これにより、多層基板としての4層基板を用いて気密チャンバCの内部に充満されているガスのガス透過率を効果的に抑制することができる。
Then, the contact 31 provided on the second circuit board 30 is brought into contact with the conductive pad 84 on the outer surface 80 b side of the third base member 80 of the flat connector 50. As a result, the first circuit board 20 and the second circuit board 30 are electrically connected to each other via the flat connector 50.
According to the flat connector 50 according to this embodiment, the substrate 60A that closes the opening 41 is a four-layer substrate as a multilayer substrate. The substrate 60 </ b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and the first base material 60. A flat plate-like third base material 80 disposed on the outer surface 60b. The conductor layer 90 covers one surface of the inner surface 70 a of the second base material 70. For this reason, even if the gas filled in the airtight chamber C can pass through the second base material 70, the first base material 60, and the third base material 80 from the inside of the airtight chamber C to the outside. It cannot pass through the conductor layer 90. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled using the four-layer board | substrate as a multilayer board | substrate can be suppressed effectively.
 そして、平板状コネクタ50は、第1基材60の内表面60a及び外表面60b間を電気的に相互接続するバイア64を備えている。また、平板状コネクタ50は、第2基材70の内表面70a及び外表面70b間を相互接続するとともに第1基材60のバイア64と接続する第1めっきスルーホール73を備えている。更に、平板状コネクタ50は、第3基材80の内表面80a及び外表面80b間を相互接続するとともに第1基材60のバイア64と接続する第2めっきスルーホール83を備えている。このため、4層基板の内表面60a及び外表面80b間をバイア64、第1めっきスルーホール73、及び第2めっきスルーホール83によって電気的に確実に接続することができる。なお、バイア64の内表面60a側を第2基材70によって塞ぎ、バイア64の外表面60b側を第3基材80によって塞いでいる。このため、4層基板において、バイア64を構成する第1導電めっき部62内には、充填材63を必ずしも充填する必要はない。本実施形態のように、第1導電めっき部62内に充填材63を充填した場合、気密チャンバCの内部に充満されているガスのガス透過率をより抑制することができる。 The flat connector 50 includes a via 64 that electrically interconnects the inner surface 60a and the outer surface 60b of the first base member 60. In addition, the flat connector 50 includes a first plated through hole 73 that interconnects the inner surface 70 a and the outer surface 70 b of the second base material 70 and connects to the via 64 of the first base material 60. Further, the flat connector 50 includes a second plated through hole 83 that interconnects the inner surface 80 a and the outer surface 80 b of the third base member 80 and connects to the via 64 of the first base member 60. Therefore, the inner surface 60a and the outer surface 80b of the four-layer substrate can be electrically and reliably connected by the via 64, the first plating through hole 73, and the second plating through hole 83. Note that the inner surface 60 a side of the via 64 is closed by the second base material 70, and the outer surface 60 b side of the via 64 is closed by the third base material 80. For this reason, in the four-layer substrate, it is not always necessary to fill the filler 63 in the first conductive plating part 62 constituting the via 64. When the filler 63 is filled in the first conductive plating part 62 as in the present embodiment, the gas permeability of the gas filled in the airtight chamber C can be further suppressed.
 次に、図8(A)、(B)に示す平板状コネクタの第1変形例を図9(A),(B)を参照して説明する。
 図9(A),(B)に示す平板状コネクタ50は、図8(A),(B)に示す平板状コネクタ50と基本構成は同一であるが、バイア64を構成する第1導電めっき部62内に充填材63を充填せず、空間67とした点で異なっている。前述したように、バイア64の内表面60a側を第2基材70によって塞ぎ、バイア64の外表面60b側を第3基材80によって塞いでいる。このため、4層基板において、バイア64を構成する第1導電めっき部62内には、充填材63(図8(B)参照)を必ずしも充填する必要はない。
Next, a first modification of the flat connector shown in FIGS. 8A and 8B will be described with reference to FIGS. 9A and 9B.
The flat connector 50 shown in FIGS. 9A and 9B has the same basic configuration as the flat connector 50 shown in FIGS. 8A and 8B, but the first conductive plating constituting the via 64 is the same. The difference is that the space 63 is not filled with the filler 63 in the portion 62. As described above, the inner surface 60 a side of the via 64 is closed by the second base material 70, and the outer surface 60 b side of the via 64 is closed by the third base material 80. Therefore, in the four-layer substrate, it is not always necessary to fill the filler 63 (see FIG. 8B) in the first conductive plating portion 62 constituting the via 64.
 また、図9(A),(B)に示す平板状コネクタ50は、各第1めっきスルーホール73において、第2導電めっき部72の内部に空間75を形成している。また、各第2めっきスルーホール83において、第3導電めっき部82の内部にも空間85を形成している。図8(A),(B)に示す平板状コネクタ50においては、第2導電めっき部72及び第3導電めっき部82が貫通孔71、81の内部をすべて埋め尽くすように形成されている。これらの点で、図9(A),(B)に示す平板状コネクタ50は、図8(A),(B)に示す平板状コネクタ50と異なっている。第2導電めっき部72及び第3導電めっき部82の内部に空間75、85を形成するのは、各第1めっきスルーホール73及び第2めっきスルーホール83において、貫通孔71、81の径が大きい場合に有効である。 Further, in the flat connector 50 shown in FIGS. 9A and 9B, a space 75 is formed inside the second conductive plating portion 72 in each first plating through hole 73. In each second plating through hole 83, a space 85 is also formed inside the third conductive plating portion 82. In the flat connector 50 shown in FIGS. 8A and 8B, the second conductive plating portion 72 and the third conductive plating portion 82 are formed so as to completely fill the insides of the through holes 71 and 81. In these respects, the flat connector 50 shown in FIGS. 9A and 9B is different from the flat connector 50 shown in FIGS. 8A and 8B. The spaces 75 and 85 are formed inside the second conductive plating part 72 and the third conductive plating part 82 because the diameters of the through holes 71 and 81 in each of the first plating through hole 73 and the second plating through hole 83 are the same. Effective when large.
 図9(A),(B)に示す平板状コネクタ50によっても、開口部41を塞ぐ基板60Aは多層基板としての4層基板である。そして、基板60Aは、平板状の第1基材60と、第1基材60の内表面60aに配置されて開口部41を塞ぐ平板状の第2基材70と、第1基材60の外表面60bに配置される平板状の第3基材80とを備える。また、導体層90が、第2基材70の内表面70aを覆う。このため、気密チャンバCの内部に充填されているガスが気密チャンバCの内部から外部に向けて第2基材70、第1基材60、及び第3基材80中を通過できたとしても導体層90を通過できない。これにより、多層基板としての4層基板を用いて気密チャンバCの内部に充満されているガスのガス透過率を効果的に抑制することができる。 9A and 9B, the board 60A that closes the opening 41 is a four-layer board as a multilayer board also by the flat connector 50 shown in FIGS. The substrate 60 </ b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and the first base material 60. A flat plate-like third base material 80 disposed on the outer surface 60b. In addition, the conductor layer 90 covers the inner surface 70 a of the second base material 70. For this reason, even if the gas filled in the airtight chamber C can pass through the second base material 70, the first base material 60, and the third base material 80 from the inside of the airtight chamber C to the outside. It cannot pass through the conductor layer 90. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled using the four-layer board | substrate as a multilayer board | substrate can be suppressed effectively.
 更に、図8(A)、(B)に示す平板状コネクタの第2変形例を図10(A),(B)を参照して説明する。
 図10(A),(B)に示す平板状コネクタ50は、図8(A),(B)に示す平板状コネクタ50と基本構成は同一であるが、導体層90を、第2基材70の内表面70aではなく、第1基材60の内表面60aを覆うように設けている点で相違している。
 具体的に述べると、導体層90は、第2基材70の内表面70aに幅方向に2列状に形成された複数の第1導電層65の外側を囲むように略矩形形状に形成されている。導体層90は、各第1導電層65との間で短絡しないように各第1導電層65に対して所定間隔をあけて配置される。導体層90は、第2基材70の内表面70aのほぼ全面を覆うように設けられている。
Further, a second modification of the flat connector shown in FIGS. 8A and 8B will be described with reference to FIGS.
The flat connector 50 shown in FIGS. 10 (A) and 10 (B) has the same basic configuration as the flat connector 50 shown in FIGS. 8 (A) and 8 (B). The difference is that it is provided so as to cover not the inner surface 70 a of the 70 but the inner surface 60 a of the first base material 60.
Specifically, the conductor layer 90 is formed in a substantially rectangular shape so as to surround the outer sides of the plurality of first conductive layers 65 formed in two rows in the width direction on the inner surface 70a of the second base material 70. ing. The conductor layer 90 is arranged at a predetermined interval with respect to each first conductive layer 65 so as not to be short-circuited with each first conductive layer 65. The conductor layer 90 is provided so as to cover almost the entire inner surface 70 a of the second base material 70.
 また、図10(A),(B)に示す平板状コネクタ50は、バイア64を構成する第1導電めっき部62内に充填材63を充填せず、空間67とした点で図8(A),(B)に示す平板状コネクタ50と異なっている。
 この平板状コネクタ50によっても、開口部41を塞ぐ基板60Aは多層基板としての4層基板である。そして、基板60Aは、平板状の第1基材60と、第1基材60の内表面60aに配置されて開口部41を塞ぐ平板状の第2基材70と、第1基材60の外表面60bに配置される平板状の第3基材80とを備える。また、導体層90が、第1基材60の内表面60aを覆う。このため、気密チャンバCの内部に充填されているガスが気密チャンバCの内部から外部に向けて第2基材70、第1基材60、及び第3基材80中を通過できたとしても導体層90を通過できない。これにより、多層基板としての4層基板を用いて気密チャンバCの内部に充満されているガスのガス透過率を効果的に抑制することができる。
Further, the flat connector 50 shown in FIGS. 10A and 10B does not fill the filler 63 in the first conductive plating portion 62 that constitutes the via 64 but forms a space 67 in FIG. ), Different from the flat connector 50 shown in FIG.
Even with the flat connector 50, the board 60A that closes the opening 41 is a four-layer board as a multilayer board. The substrate 60 </ b> A includes a flat plate-like first base material 60, a flat plate-like second base material 70 that is disposed on the inner surface 60 a of the first base material 60 and closes the opening 41, and the first base material 60. A flat plate-like third base material 80 disposed on the outer surface 60b. Further, the conductor layer 90 covers the inner surface 60 a of the first base material 60. For this reason, even if the gas filled in the airtight chamber C can pass through the second base material 70, the first base material 60, and the third base material 80 from the inside of the airtight chamber C to the outside. It cannot pass through the conductor layer 90. Thereby, the gas permeability of the gas with which the inside of the airtight chamber C is filled using the four-layer board | substrate as a multilayer board | substrate can be suppressed effectively.
 以上、本発明の実施形態について説明してきたが、本発明はこれに限定されず、種々の変更、改良を行うことができる。
 例えば、導体層11は、基材10の内表面10a及び外表面10bのうちの少なくとも一面を覆えばよく、必ずしも、平板状コネクタ1の基材10の内表面10a、切欠19の内側面19a及び底面19b、および基材10の外表面10bを覆わなくてもよい。
 また、基材10の内表面10aに、基材10の外周に沿って連続的に無端状に延びる半田付け層17を形成しなくてもよい。
 また、第2基材70の内表面70aに、第2基材70の外周に沿って所定幅で連続的に無端状に延びる半田付け層91を形成しなくてもよい。
As mentioned above, although embodiment of this invention was described, this invention is not limited to this, A various change and improvement can be performed.
For example, the conductor layer 11 only needs to cover at least one of the inner surface 10a and the outer surface 10b of the substrate 10, and the inner surface 10a of the substrate 10 of the flat connector 1, the inner surface 19a of the notch 19, and The bottom surface 19b and the outer surface 10b of the base material 10 may not be covered.
Further, the soldering layer 17 that extends continuously and endlessly along the outer periphery of the base material 10 may not be formed on the inner surface 10 a of the base material 10.
Further, the soldering layer 91 that extends continuously and endlessly with a predetermined width along the outer periphery of the second base material 70 may not be formed on the inner surface 70 a of the second base material 70.
 更に、多層基板として図8乃至図10に4層基板を用いる例を説明したが、6層以上の多層基板としてもよい。この場合、導体層は、多層基板の気密チャンバCの内部側に向けて位置する内表面、多層基板の前記内表面と反対側の外表面、及び前記内表面と前記外表面との間の前記多層基板の内部に存在する前記内表面に対して平行に延びる面のうちの少なくとも一面を覆うようにすればよい。 Furthermore, although the example using a four-layer substrate in FIGS. 8 to 10 has been described as a multilayer substrate, a multilayer substrate having six or more layers may be used. In this case, the conductor layer has an inner surface located toward the inner side of the airtight chamber C of the multilayer substrate, an outer surface opposite to the inner surface of the multilayer substrate, and the inner surface and the outer surface between the inner surface and the outer surface. What is necessary is just to make it cover at least 1 side of the surfaces extended in parallel with the said inner surface which exists in the inside of a multilayer substrate.
 また、図1乃至図7に示した平板状コネクタ1において、基材10の内表面10a及び外表面10bのそれぞれに形成された導電パッド16に、金属製のコンタクトを接続してもよい。また、当該導電パッド16に、絶縁性のハウジングに取り付けられた金属製のコンタクトを接続してもよい。
 更に、図8乃至図10に示した平板状コネクタ50において、第2基材70の内表面70a及び第3基材80の外表面70bにそれぞれ形成された導電パッド74、84に、金属製のコンタクトを接続してもよい。また、当該導電パッド74、84に、絶縁性のハウジングに取り付けられた金属製のコンタクトを接続してもよい。
Further, in the flat connector 1 shown in FIGS. 1 to 7, metal contacts may be connected to the conductive pads 16 formed on the inner surface 10a and the outer surface 10b of the substrate 10, respectively. Further, a metal contact attached to an insulating housing may be connected to the conductive pad 16.
Further, in the flat connector 50 shown in FIGS. 8 to 10, the conductive pads 74 and 84 formed on the inner surface 70 a of the second substrate 70 and the outer surface 70 b of the third substrate 80 are made of metal. Contacts may be connected. Further, metal contacts attached to an insulating housing may be connected to the conductive pads 74 and 84.
 1 平板状コネクタ
 10A 基板
 10 基材
 10a 内表面
 10b 外表面
 11 導体層
 11a,11b 導体パターン
 12 貫通孔
 13 導電めっき部
 14 充填材
 15 バイア
 17 半田付け層
 40 隔壁
 41 開口部
 50 平板状コネクタ
 60A 基板
 60 第1基材
 60a 内表面
 60b 外表面
 61 貫通孔
 62 第1導電めっき部(導電めっき部)
 63 充填材
 64 バイア
 70 第2基材
 70a 内表面
 70b 外表面
 73 第1めっきスルーホール
 80 第3基材
 80a 内表面
 80b 外表面
 83 第2めっきスルーホール
 90 導体層
 91 半田付け層
 C 気密チャンバ
DESCRIPTION OF SYMBOLS 1 Flat connector 10A Board | substrate 10 Base material 10a Inner surface 10b Outer surface 11 Conductor layer 11a, 11b Conductor pattern 12 Through-hole 13 Conductive plating part 14 Filler 15 Via 17 Soldering layer 40 Partition 41 Opening 50 Flat connector 60A board 60 1st base material 60a Inner surface 60b Outer surface 61 Through-hole 62 1st electroconductive plating part (electroconductive plating part)
63 Filler 64 Via 70 Second substrate 70a Inner surface 70b Outer surface 73 First plated through hole 80 Third substrate 80a Inner surface 80b Outer surface 83 Second plated through hole 90 Conductive layer 91 Soldering layer C Airtight chamber

Claims (8)

  1.  隔壁で区画される気密チャンバの内側及び外側を電気的に相互接続するために用いられ、前記隔壁に形成された、気密チャンバの内部と外部とを貫通する開口部を塞ぐ平板状コネクタであって、
     前記開口部を塞ぐ平板状の基板を備え、該基板は、該基板の前記気密チャンバの内部側に向けて位置する内表面、前記基板の前記内表面と反対側の外表面、及び前記内表面と前記外表面との間の前記基板の内部に存在する前記内表面に対して平行に延びる面のうちの少なくとも一面を覆う導体層を備えていることを特徴とする平板状コネクタ。
    A flat connector that is used to electrically interconnect the inside and outside of an airtight chamber defined by a partition wall and closes an opening formed in the partition wall that passes through the inside and the outside of the airtight chamber. ,
    A flat substrate that closes the opening; the substrate being an inner surface of the substrate facing the inner side of the hermetic chamber; an outer surface of the substrate opposite to the inner surface; and the inner surface A flat connector having a conductor layer covering at least one of the surfaces extending in parallel to the inner surface existing inside the substrate between the outer surface and the outer surface.
  2.  前記基板は2層基板であり、該2層基板は、前記開口部を塞ぐ平板状の基材を備え、
     前記導体層は、前記基材の内表面及び外表面のうちの少なくとも一面を覆い、
     前記基材の内表面及び外表面間を電気的に相互接続するバイアであって、前記基材の内表面及び外表面間を貫通する貫通孔の内周面に設けられ、前記基材の内表面及び外表面間を延びる環状の導電めっき部及び該導電めっき部内に充填された充填材からなる前記バイアを備えていること特徴とする請求項1記載の平板状コネクタ。
    The substrate is a two-layer substrate, and the two-layer substrate includes a flat base material that closes the opening,
    The conductor layer covers at least one of the inner surface and the outer surface of the substrate;
    A via that electrically interconnects the inner surface and the outer surface of the substrate, and is provided on an inner peripheral surface of a through-hole that penetrates between the inner surface and the outer surface of the substrate. 2. The flat connector according to claim 1, further comprising an annular conductive plating portion extending between the surface and the outer surface, and the via made of a filler filled in the conductive plating portion.
  3.  前記基材の前記内表面に、前記基材の外周に沿って連続的に無端状に延びる半田付け層を形成したことを特徴とする請求項2記載の平板状コネクタ。 3. The flat connector according to claim 2, wherein a soldering layer extending continuously and endlessly along the outer periphery of the base material is formed on the inner surface of the base material.
  4.  前記充填材が導電性のある半田であること特徴とする請求項2又は3記載の平板状コネクタ。 The flat connector according to claim 2 or 3, wherein the filler is a conductive solder.
  5.  前記基板は多層基板であり、該多層基板は、平板状の第1基材と、該第1基材の前記気密チャンバの内部側に向けて位置する内表面に配置されて前記開口部を塞ぐ平板状の第2基材と、前記第1基材の外表面に配置される平板状の第3基材とを備え、
     前記導体層は、前記第2基材の内表面、前記第2基材の外表面、前記第1基材の内表面、前記第1基材の外表面、前記第3基材の内表面、及び前記第3基材の外表面のうちの少なくとも一面を覆い、
     前記第1基材の内表面及び外表面間を電気的に相互接続するバイアであって、前記第1基材の内表面及び外表面間を貫通する貫通孔の内周面に設けられ、前記第1基材の内表面及び外表面間を延びる環状の導電めっき部を備えた前記バイアと、前記第2基材の内表面及び外表面間を相互接続するとともに前記第1基材のバイアと接続する第1めっきスルーホールと、前記第3基材の内表面及び外表面間を相互接続するとともに前記第1基材のバイアと接続する第2めっきスルーホールとを備えていることを特徴とする請求項1記載の平板状コネクタ。
    The substrate is a multilayer substrate, and the multilayer substrate is disposed on a flat plate-like first base material and an inner surface of the first base material facing the inner side of the hermetic chamber to block the opening. A flat second substrate and a flat third substrate disposed on the outer surface of the first substrate;
    The conductor layer includes an inner surface of the second substrate, an outer surface of the second substrate, an inner surface of the first substrate, an outer surface of the first substrate, an inner surface of the third substrate, And covering at least one of the outer surfaces of the third base material,
    A via for electrically interconnecting the inner surface and the outer surface of the first base material, provided on an inner peripheral surface of a through-hole penetrating between the inner surface and the outer surface of the first base material, The via having an annular conductive plating portion extending between the inner surface and the outer surface of the first substrate, and the via of the first substrate interconnecting the inner surface and the outer surface of the second substrate A first plated through hole to be connected; and a second plated through hole for interconnecting an inner surface and an outer surface of the third base material and connected to a via of the first base material. The flat connector according to claim 1.
  6.  前記第2基材の内表面に、前記第2基材の外周に沿って連続的に無端状に延びる半田付け層を形成したことを特徴とする請求項5記載の平板状コネクタ。 6. The flat connector according to claim 5, wherein a soldering layer continuously extending endlessly along the outer periphery of the second base material is formed on the inner surface of the second base material.
  7.  前記バイアは、前記導電めっき部内に充填された充填材を備えていることを特徴とする請求項5又は6記載の平板状コネクタ。 The flat connector according to claim 5 or 6, wherein the via includes a filler filled in the conductive plating portion.
  8.  前記充填材が導電性のある半田であること特徴とする請求項7記載の平板状コネクタ。 The flat connector according to claim 7, wherein the filler is a conductive solder.
PCT/JP2013/002413 2012-07-19 2013-04-09 Planar connector WO2014013644A1 (en)

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