TWM462949U - Package substrate - Google Patents

Abstract

Disclosed is a package substrate, including a board body having a dielectric layer, a plurality of conductive blind vias formed in the dielectric layer, a plurality of electrical contact pads formed on an end surface of the conductive blind vias, an insulating protective layer formed on the dielectric layer and exposing the conductive blind vias and electrical contact pads therefrom, and a conductive tower disposed on the exposed end surface of the conductive blind vias while enclosing the electrical contact pads, wherein the width of the end surface of electrical contact pads is smaller than the width of the end surface of conductive blind vias, thereby increasing the distance between each of the electrical contact pads to thus increase the layout space.

Description

Package substrate

The present invention relates to a package substrate, and more particularly to a package substrate capable of improving reliability.

With the development of the electronics industry, today's electronic products have been designed in a light, short, and versatile manner, and semiconductor packaging technologies have also developed different packaging types. For various package structures, package substrates for various packages have also been developed. Generally, a flip-chip package substrate has a crystallizing region on a surface of the substrate body, a plurality of electrical contact pads are formed in the crystallographic region, and a solder resist layer is formed on the substrate body, the solder resist layer having a plurality of openings to correspond to The electrical contact pad is exposed. In the crystallizing process, a semiconductor wafer is mounted on the seeding region, and the semiconductor wafer is electrically connected to the electrical contact pad in a flip chip manner.

1A to 1D are schematic cross-sectional views showing a method of manufacturing the conventional package substrate 1.

As shown in FIG. 1A, a board body 10 is provided. The board body 10 has at least one internal line 11 and at least one dielectric layer 12, and a plurality of blind holes 120 are formed on the dielectric layer 12 to make the internal line 11 A portion of the surface is exposed to the blind hole 120.

As shown in FIG. 1B, a conductive layer 13 is formed on the dielectric layer 12 and the blind via 120, and a resist layer 14 is formed on the conductive layer 13, and the resist layer 14 is formed with a plurality of open regions 140. A portion of the conductive layer 13 on the dielectric layer 12 and the blind via 120 are exposed to the open regions 140.

Then, a circuit layer 15 and a conductive via hole 16 are plated in the opening region 140. The conductive via 16 is formed in the blind via 120 to electrically connect the internal line 11 .

Furthermore, the circuit layer 15 is formed on the dielectric layer 12, and the circuit layer 15 has a plurality of conductive traces 15a having a circular electrical contact pad 150 at the end of the conductive trace 15a (eg, 1C). The electrical contact pad 150 is formed on the end surface 16a of the conductive via hole 16 to electrically connect the conductive via hole 16 to the circuit layer 15.

The resist layer 14 and the underlying conductive layer 13 are removed as shown in Figs. 1C and 1C'. Then, a solder resist layer 17 is formed on the dielectric layer 12 and the circuit layer 15 , and the solder resist layer 17 has a plurality of openings 170 to expose the electrical contact pads 150 to the openings 170 . The opening 170 is a circular hole.

As shown in FIG. 1D, a solder material is formed in the opening 170 to be reflowed into the conductive bumps 19.

However, in the conventional package substrate 1 , since the electrical contact pad 150 is formed with a wing structure 150 a , the electrical contact pad 150 covers the entire end surface 16 a of the conductive blind hole 16 , and the electrical contact pad 150 The diameter of the opening 170 is also larger than the diameter of the opening 170, so that the wiring space between the electrical contact pads 150 is reduced, and the wiring density is not increased, and the conductive bumps 19 need to be kept at a certain distance to avoid bridging. The distance between the conductive bumps 19 cannot be reduced, and thus the requirements of fine pitch and multiple contacts cannot be satisfied.

Therefore, how to overcome the various problems of the above-mentioned prior art has become a difficult problem to be overcome in the industry.

In view of the above-mentioned various deficiencies of the prior art, the present invention provides a package substrate, comprising: a plate body having at least one dielectric layer, wherein the dielectric layer has a plurality of blind holes; and the plurality of conductive blind holes are respectively disposed on In the blind hole of the dielectric layer, the height of the end face of the conductive blind hole is lower than the surface height of the dielectric layer; the plurality of electrical contact pads are respectively disposed on the end faces of the conductive blind hole, and the electrical property The width of the end surface of the contact pad is smaller than the width of the end surface of the conductive blind hole; and the insulating protective layer is disposed on the dielectric layer, and the insulating protective layer has a plurality of openings to make the end face and the electrical conductivity of the conductive blind hole The contact pad is exposed to the opening, and the diameter of the opening of the insulating protective layer is smaller than the width of the end surface of the conductive blind hole; and the plurality of conductive towers are respectively disposed on the end faces of the conductive blind holes exposed in the opening And covering the electrical contact pad, the conductive tower has opposite bottom and end portions, the bottom covering the electrical contact pad, and the width of the bottom portion is greater than the width of the end portion.

In the above package substrate, the board body has a circuit layer formed on the dielectric layer. The circuit layer has a plurality of conductive traces, and the electrical contact pads are electrically connected to the ends of the conductive traces.

In the above package substrate, the length of the end surface of the electrical contact pad is greater than the width of the end surface of the electrical contact pad.

It can be seen that the package substrate of the present invention has a width of an end surface of the electrical contact pad that is smaller than a width of an end surface of the conductive via hole, and an end surface length of the electrical contact pad is greater than an end surface of the electrical contact pad. The width is such that the electrical contact pad does not form a wing structure in a single axial direction, thereby increasing the distance between each of the electrical contact pads to increase the wiring space, thereby increasing the wiring density.

1,2,2'‧‧‧Package substrate

10,20‧‧‧ board

11, 21‧‧‧ internal lines

12,22‧‧‧ dielectric layer

120,220‧‧‧blind holes

13,23a, 23b‧‧‧ conductive layer

14‧‧‧Resist layer

140‧‧‧Open area

15,25‧‧‧ circuit layer

15a, 25a‧‧‧ conductive traces

150,250‧‧‧Electrical contact pads

150a‧‧‧wing structure

16,26‧‧‧conductive blind holes

16a, 26a‧‧‧ end face

17‧‧‧ solder mask

170,270‧‧‧ openings

19‧‧‧Electrical bumps

22a‧‧‧ surface

24a‧‧‧First resistance layer

240a‧‧‧First opening area

24b‧‧‧second barrier layer

240b‧‧‧Second opening area

27‧‧‧Insulation protective layer

28‧‧‧metal layer

29,29’‧‧‧Conducting Tower

29a‧‧‧ bottom

29b‧‧‧End

290‧‧ ‧ tower

291‧‧‧ solder materials

t, h‧‧‧ height

d, w, s‧‧‧ width

R‧‧‧diameter

X‧‧‧ face width

Y‧‧‧ end length

P‧‧‧ distance

1A to 1D are schematic cross-sectional views showing a method of fabricating a conventional package substrate; wherein the 1st C' is a partial top view of FIG. 1C;

2A to 2G are schematic cross-sectional views showing a method of fabricating a package substrate; wherein the 2C' and 2G' diagrams are partial top views of the 2C and 2G diagrams;

The 2Hth diagram is another embodiment of the 2Gth diagram.

The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily appreciate other advantages and functions of the present invention from the disclosure of the present disclosure.

It is to be understood that the structure, the proportions, the size and the like of the drawings are only used in conjunction with the disclosure of the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effectiveness and the purpose of the creation. The technical content revealed by the creation can be covered. In the meantime, the terms "upper", "lower", "first", "second", and "one" as used in this specification are for convenience only, and are not intended to limit the creation. The scope of the implementation, the change or adjustment of its relative relationship, is also considered to be within the scope of the creation of the creation of the product without substantial change.

2A to 2G are schematic cross-sectional views showing the method of manufacturing the package substrate 2.

As shown in FIG. 2A, a board body 20 is provided. The board body 20 has at least one internal line 21 and at least one dielectric layer 22, and a plurality of blind holes 220 are formed on the dielectric layer 22 to make the internal line 21 A portion of the surface is exposed to the blind hole 220.

In the present embodiment, the outermost layer of the plate body 20 is fabricated, so only the outermost dielectric layer 22 is shown. Therefore, the overall structure of the board 20 is not limited to the drawings, and may have a plurality of dielectric layers and a plurality of internal lines, or only one dielectric layer and one internal line.

As shown in FIG. 2B, a conductive layer 23a is formed on the surface 22a of the dielectric layer 22 and the blind via 220, and a first resist layer 24a is formed on the conductive layer 23a and the blind via 220. a first resistive layer 24a is formed with a plurality of first open regions 240a, such that a portion of the conductive layer 23a on the surface 22a of the dielectric layer 22 and a portion of the blind via 220 are exposed to the first open regions 240a. The resist layer 24a extends into a portion of the space of the blind via 220.

Then, a circuit layer 25 and a plurality of conductive blind vias 26 are plated in the first opening region 240a.

In the embodiment, the conductive blind hole 26 is formed in the blind hole 220 to electrically connect the internal line 21 .

Moreover, the circuit layer 25 is formed on the surface 22a of the dielectric layer 22, and the circuit layer 25 has a plurality of conductive traces 25a and a plurality of electrical contact pads 250, and the ends of the conductive traces 25a are electrically connected. The electrical contact pads 250 are connected to the end faces 26a of the conductive blind vias 26, and the conductive vias 26 are electrically connected to the circuit layer. 25.

As shown in FIG. 2C, the first resist layer 24a and the underlying conductive layer 23a are removed.

In this embodiment, since the first resist layer 24a extends into a portion of the space of the blind via 220, the height h of the end face 26a of the conductive via 26 is lower than the dielectric layer after the conductive via 26 is plated. The height t of the surface 22a of 22. Thereby, the material of the conductive blind via 26 does not extend to the surface 22a of the dielectric layer 22, so that the problem of dendritic electrical bridging of the metal material (such as copper) can be reduced.

Moreover, the end face width X of the electrical contact pad 250 is smaller than the width d of the end face 26a of the conductive blind hole 26, and the end face length Y of the electrical contact pad 250 is greater than the end face width X of the electrical contact pad 250. The end surface of the electrical contact pad 250 is formed into a rectangular shape with rounded corners, as shown in FIG. 2C'. Therefore, the electrical contact pad 250 does not form a wing structure in a single axial direction (ie, the direction of the end face width X), so that the distance between each of the electrical contact pads 250 can be increased to increase the wiring space, and Meet the needs of fine pitch and multiple contacts.

As shown in FIG. 2D, an insulating protective layer 27 is formed on the dielectric layer 22, the circuit layer 25 and the conductive via hole 26, and the insulating protective layer 27 has a plurality of openings 270 for the conductive vias 26 to be formed. A portion of the surface is exposed to the openings 270 corresponding to the electrical contact pads 250.

In the embodiment, the opening 270 is a circular hole, and the diameter r of the opening 270 is smaller than the width d of the end surface 26a of the conductive blind hole 26 and larger than the width X of the end surface of the electrical contact pad 250, so that The insulating protective layer 27 and the electrical contact pad 250 are formed in a single axial non-solder mask define (NSMD) design.

As shown in FIG. 2E, a conductive layer 23b is formed on a portion of the surface of the insulating protective layer 27 and the conductive via 26 and the conductive contact pads 250 to form a metal layer 28.

Then, a second resistive layer 24b is formed on the metal layer 28, and the second resistive layer 24b is formed with a plurality of second open regions 240b of the exposed metal layer 28, so that the second resistive layer 24b correspondingly covers the conductive layer. Metal layer 28 on blind hole 26.

As shown in FIG. 2F, the metal layer 28 in the second open region 240b is removed by etching, and the remaining metal layer 28 is used as the conductive tower 29.

In this embodiment, the conductive tower 29 is disposed on a portion of the end surface 26a of the conductive blind hole 26 exposed by the opening 270 of the insulating protective layer 27 and covers the electrical contact pad 250, and the conductive tower is 29 has an opposite bottom portion 29a and an end portion 29b that encases the electrical contact pad 250.

Moreover, the diameter r of the opening 270 is smaller than the width d of the end surface 26a of the conductive blind hole 26 to increase the distance P between the conductive trace 25a and the conductive tower 29, so that metal material (such as copper) can be avoided. The problem of dendritic electrical bridges (dendrite).

As shown in FIG. 2G, the second resist layer 24b and the underlying conductive layer 23b are removed to expose the end portion 29b of the conductive tower 29 for bonding the semiconductor wafer (not shown).

In this embodiment, the width of the bottom portion 29a is greater than the width s of the end portion 29b by utilizing the characteristics of the etched metal layer, so that the end portion 29b does not form a wing structure on the insulating protective layer 27. The distance between each of the conductive towers 29 can be increased, as shown in Fig. 2G' to meet the requirements of fine pitch and multiple contacts.

Furthermore, since the conductive tower 29 does not form a wing structure, when the temperature cycle test (TCT) is performed, the insulating protective layer 27 has no metal material, so that the crack caused by the uneven thermal stress can be avoided ( Crack) phenomenon. Therefore, not only the reliability of the package substrate 2 of the present invention can be improved, but also the test of the package substrate 2 is successful.

In another embodiment, as shown in FIG. 2H, in a subsequent process, the pillar 290 of the structure of the conductive tower 29 is coated with a solder material 291, so that the conductive tower 29' is connected to the tower 290. The solder material 291 is composed of. Specifically, the solder material 291 is formed by a printing technique (SOP), an electroplating technique, an electroless plating technique, a tin-spraying technique, or a dry film printing. Therefore, compared with the solder ball composed of the conventional pure solder material, the solder material 291 covers the contact structure formed by the column 290, and the resistance value of the contact structure can be reduced.

Moreover, the conductive tower 29 (or the column 290) is of a structure that is narrow and wide, such that the diameter r of the opening 270 can be the same as the maximum diameter of the conductive tower 29 (or the column 290) (ie, the bottom 29a) The width w) can enhance the reliability of the conductive tower 29 (or the column 290), so that the contact structure formed by the solder material 291 and the conductive tower 29 (or the tower 290) is subjected to a push-pull ball test. When you can avoid the ball drop problem.

In addition, the narrow and wide structure above the conductive tower 29 (or the column 290) has a larger surface area, so that the area of the conductive tower 29 (or the column 290) and the solder material 291 can be increased, thereby increasing the The bonding force between the conductive tower 29 (or the column 290) and the solder material 291.

As shown in Figures 2G and 2H, the present invention provides a package substrate 2, 2' comprising: a plate body 20, a plurality of conductive blind holes 26, a plurality of electrical contact pads 250, an insulating protective layer 27, and a plurality of conductive towers. 29,29'.

The plate body 20 has at least one dielectric layer 22, and the dielectric layer 22 has a plurality of blind holes 220.

The conductive blind vias 26 are formed in the blind vias 220 of the dielectric layer 22, and the height h of the end faces 26a of the conductive vias 26 is lower than the height t of the surface 22a of the dielectric layer 22.

The electrical contact pad 250 is formed on a portion of the end surface 26a of the conductive via hole 26, and the end surface width X of the electrical contact pad 250 is smaller than the width d of the end surface 26a of the conductive via hole 26.

The insulating protective layer 27 is formed on the dielectric layer 22, and the insulating protective layer 27 has a plurality of openings 270 for exposing a portion of the end surface 26a of the conductive blind via 26 and the electrical contact pad 250 to the opening. The hole 270, and the diameter r of the opening of the insulating protective layer is smaller than the width d of the end surface of the conductive blind hole.

The conductive towers 29, 29' are respectively disposed on the end faces 26a of the conductive blind holes 26 exposed in the opening 270 and cover the electrical contact pads 250, and the conductive towers 29 (or another aspect) The tower 290) of the conductive tower 29' has an opposite bottom portion 29a and an end portion 29b. The bottom portion 29a covers the electrical contact pad 250, and the width 29 of the bottom portion 29a is greater than the width s of the end portion 29b.

In one embodiment, the board body 20 has a circuit layer 25 formed on the dielectric layer 22, and the circuit layer 25 has a plurality of conductive traces 25a, and the electrical contact pads 250 are electrically connected to the conductive layer. At the end of trace 25a.

In one embodiment, the length Y of the end surface of the electrical contact pad 250 is greater than the width X of the end surface of the electrical contact pad 250. For example, the end surface of the electrical contact pad has an elliptical shape, a rectangular shape, and a rectangular shape with rounded corners ( As shown in Figure 2C') or playground shape.

In summary, the package substrate of the present invention is mainly characterized in that the width of the end surface of the electrical contact pad is smaller than the width of the end surface of the conductive blind hole, and the length of the end surface of the electrical contact pad is greater than that of the electrical contact pad. The width of the end face is such that the electrical contact pad does not form a wing structure in a single axial direction, thereby increasing the distance between each of the electrical contact pads to increase the wiring space, thereby increasing the wiring density.

Furthermore, the height of the end face of the conductive blind via is lower than the height of the surface of the dielectric layer, and the distance between the conductive trace and the conductive tower is increased to overcome the dendriticity of the metal material (such as copper) during the detection. The problem of electrical bridging can improve reliability.

The above embodiments are intended to illustrate the principles of the present invention and its effects, and are not intended to limit the present invention. Anyone who is familiar with the art may modify the above embodiments without departing from the spirit and scope of the creation. Therefore, the scope of protection of this creation should be as listed in the scope of patent application described later.

2‧‧‧Package substrate

20‧‧‧ board

21‧‧‧Internal lines

22‧‧‧Dielectric layer

25‧‧‧Line layer

25a‧‧‧conductive traces

250‧‧‧Electrical contact pads

26‧‧‧ Conductive blind holes

26a‧‧‧ end face

27‧‧‧Insulation protective layer

270‧‧‧ openings

29‧‧‧Conducting tower

29a‧‧‧ bottom

29b‧‧‧End

t, h‧‧‧ height

d, w, s‧‧‧ width

R‧‧‧diameter

Claims (4)

A package substrate includes:
The plate body has at least one dielectric layer, and the dielectric layer has a plurality of blind holes;
The plurality of conductive blind vias are respectively disposed in the blind vias of the dielectric layer, and the height of the end faces of the conductive vias is lower than the surface height of the dielectric layer;
a plurality of electrical contact pads are respectively disposed on the end faces of the conductive via holes, and an end face width of the electrical contact pads is smaller than a width of an end face of the conductive via holes; and an insulating protective layer is disposed on the dielectric layer And the insulating protective layer has a plurality of openings, so that the end surface of the conductive blind hole and the electrical contact pad are exposed to the opening, and the diameter of the opening of the insulating protective layer is smaller than the width of the end surface of the conductive blind hole; And a plurality of conductive towers respectively disposed on the end faces of the conductive blind holes exposed in the openings and covering the electrical contact pads, the conductive towers having opposite bottom and ends, the bottom covering the electrical contacts The pad, in turn, has a width greater than the width of the end. The package substrate of claim 1, wherein the plate body has a circuit layer formed on the dielectric layer. The package substrate of claim 2, wherein the circuit layer has a plurality of conductive traces, and the electrical contact pads are electrically connected to the ends of the conductive traces. The package substrate of claim 1, wherein the length of the end face of the electrical contact pad is greater than the width of the end face of the electrical contact pad.