TWM257073U - Controller of series LED lamp set - Google Patents

Description

M257073

[Technical field to which the new type belongs] This creation provides _ Su, the total ED lamp group control circuit 3 in the integrated circuit (1 C) of the serial L data line (DAT Α), its main characteristics are the use of buffer circuit will be The distance between the serially connected devices Γ pulse line (CL 〇◦ Κ) is enlarged to extend each pulse to increase the entire system. The data line (DATA) is delayed by half a time to simplify the external connection and the green flash lock. The signal is generated by the dream department of the circuit. According to the requirements, to obtain the control objectives of the tandem-type lamp group [previously L plus also pushed the ED response results to a large-scale independent learning technology] ED launched its application products This device simplified the device special string L Ε Effective control technology methods: One is that each one is far away, often two, with one lamp group that is distributed or at the same time, each light and one polar body are used for deep research and development and manufacturing of seams. On the one hand, the wiring can be unified. It is the field system of tandem L D lamp group. In this type of string control box control, the application of this kind of arrangement and irregular one cable is widely used, and LED is used. This device is the accumulated experience of the company, and R & D increases the stability of the system. The system is designed and integrated, and the growth period of the brightness of each LED lamp can be controlled by LED. On the one hand, the main application group can be connected to the LED. There are about all the following lamp groups, and the cost is lower by cable. However, in each case, the length of the cable is not the same.

Page 5 M257073, Creation Note (2) Installation is a very difficult problem, so this μ cannot be widely promoted, and it is rarely used and °° T. It appeared in the early stage. The second design is addressing. Design in series, each system circuit, and give each lamp group a set to install one in the group. Just connect the power and signal wires to each _, address / ID), because of this, this system comparison Simple, as it is, and the system can work with a controller that requires a controller, its cost: f, a few disadvantages, because each lamp group needs to set a different ID, so; combined 7 system at the same time due to each external maintenance It is also necessary to adjust the equipment D to make it difficult to make it ^ J σ, which is quite a problem; ^ 亍 Replacement is also made. The third design is to use a tandem control circuit. Subdivided, ", the original way was in the first-germline: Yu then by the string ... one by one-all the lights are connected: that is, the group is completely similar @ 'can simplify the entire system so ~ the difficulty of each subsequent maintenance. Wiring, security and

M257073 3. Creation instructions (3) The eighth picture is the seventh picture lamp unit (internal structure, its four groups of circuits are for illustration only, Lian ia ~ 1 〇1 e) have different uses, the signal group (? Λ * Number of circuits, depending on the application ... " as another-signal terminal, signal group displacement recorder, when receiving external: letter 3 d) constitute a group of s — R external data (DATI) # a 二 KI) 〇3 ..., at the same time, the lock device (203a ~ 2 (DAT〇) is sent to the next and 4 people by another data line after the data is located ... Let the four groups of DT ype flash lock, tiger (STB 1) Will be presented by another group DT ... ask the lock to: ~,? Ί ') input a ~ 2〇2d), and then hand it over to LE atch] (202 external LED (2 1 3 a ~ 2) ^ moving circuit (2 〇1) Drive 2 〇5, 206, 2 〇7) Eight ^ support 'buffers (204, output (DATO) flash lock; No. signal control output (〇E〇) output slow CSTB 〇) and the brightness connection signal (DAT, CL · K, S τ B ,, the four minimum requirements listed here, if there are other functions need I _? E}, for this type of system this design is only the original; : Set: === will : Zengzhong's originality is not high. The mother lamp group needs a lot of two because of the Lishu system method = the length of the line is different and because of the difference between each batch and the appearance of a ^ transmission error (the fourth picture to the first) II: Furious and easy A. There will be said on page 7 (M257073 g, creative outline). Therefore, this device has developed this device by L α manufacturing experience. Ϊ́ :: Two years of similar system design = can also be a large number Reduce the connection line and improve the stability of the entire system. Stop at 3 o'clock when the bar is terminated (lock the other 4 new-type, the whole signal and its different pulse e). Enter the content: a picture of a wire (e) 3 0 device two picture two: step use, which detects less than 50 segments 8) select D d) out (then for the creation of the LED connection method road device in addition to power (VDD, G CLK and daT) can work as the indicated five lamp group units, 3) is the output terminal, each lamp group is very simple. For the structure description of this creation, and the first, in the data output (DAT〇2D T ype latch [l can delay the output data by half a clock detection circuit (4 0 8) When the data 2) is sent, the clock (after CLKI (figure 3 of 5 0 4 T 1 will automatically generate a latch signal (4 0 7) to get the flash lock signal Type flash lock [L atc will The original S-R displacement recorder (4 4 1 5) is locked to produce L and passed to the LED drive circuit (4 0 block diagram, ND from the figure), only two are needed. (3 0 1 a ( 3 0 2) There are only four circuits connected between the inputs ο a graph ST gives 4 Γα structure 4 1 and 1 pass a CD 3 knot} 0 electricity via and No. 2 E formula one by one ~ ^ plus 15 This, / ^ ο 4 letter L is the control of H Zeng Ding,} 74 ~ brake transmission c, As &81; drive control drive map 1 2 0 Figure 314 330} 8} a 〇C and 04choEl

III surface, page 8 M257073 g, creation instructions (5) (4 1 9 a to 4: (STB), the latch signal (STB mod) of the circuit elasticity setting (STB mod)-in the figure) and Figure 8 For the circuit (4 0 8) system in the third figure, the design of the 2 system is different. The fourth figure to the first principle and its importance (6 1 0 a) in) latch the previous group 3) 'And under the clock (6 1 4) let the output data (out (6 0 4), latch (6 1 0 edge (6 2 0, β output (6 0 4 lock (6 1 0) L 9 c: Latch letter can be composed of TB) (41 clocks (work with the same timing diagram 0us' The value of the six diagrams is clear, the clock of the device (CL a latch 6 0 3, so you can reduce the number of shouting selection circuits (40 γ system designers need to select 'This selection is controlled by mode 1), in this creative CLK) buffer (4, only to say the principle, its In figure two, T 1 〇s 1 0 0 u S is the ideal value.

Not limited. In this creation, a device (the 60th TCLK out (DAK 60 0 lock (6) is delayed half way, the next c) is locked 2 and 1) and it is buffered 6 2 2), as mentioned above 0 c) are locked, because the 10 will be installed when the previous description will be postponed here four figures) 1) 6 0 2 reverse (b) arteries, and set (the Pulses (6 packs, each data is stable to ensure a connection line) is to increase the use of internal or external selection wiring (not important in S. 0 4, 4 0 5 clock detection time is generally 'but not due to For the entire half of the clock, the data latch positive edge (6 1 1) is locked (6 0 〇 1 a), so that it will become another data 0 5) ascending set (Fourth picture) After the input data is latched (the data changes every clock

Page 9 M257073 Fourth, the data (D A T) captured by the creation note (6) (CLK) is very correct. [Embodiment]

In the timing diagram of the sixth figure, the shaded area is the data instability area. The reason for this instability area is that each batch of ICs will produce timing (CLK) output faster or slower than data (DAT) output due to different manufacturing processes. Some, because each digital signal is not non-π Ο π or π 1 π, it will have a slope due to the influence of line capacitance resistance, and each IC's internal latch (Latch 6 1 0 a, c) The data grabbing voltage is different [about +/- 20% VDD spectrum], it will also produce timing differences.

If the output of the clock (CLK) and lean material (DAT) based on the traditional design theory of Figure 8 is very close in time (between several ns to dozens of ns), once the ICs of different batches When connected together, it is easy to produce data errors. Such errors have little effect on the short distance within the same circuit board, but when the two devices are more than 100 mm apart, the effect becomes very large. For example, the data (DAT 6 0 3) captured by the clock (CLK 6 0 5) of the timing (6 3 1, 6 3 2) in the fourth to sixth figures falls in the unstable area and cannot be 1 0 0% caught the right information. In addition, the function of controlling brightness from the outside can be sent by a serial signal and processed by the internal logic circuit to subtract another connection line (Figure 8E). This technique is not special and is not described here.

Page 10 M257073 4. Creation Instructions (7) From the above, this creative device can greatly improve system stability and reduce the cost of the entire device. In addition, the integrated circuit design can greatly reduce the volume. It should be within the next few years. One device mainstream in the tandem LED lamp system. [Illustration of the symbols in the diagram] The connection signal of the lamp unit (101a ~ 10le) (1 0 2, 1 0 3), the driving circuit (2 0 1), the latch (2 0 2 a ~ 2 0 2 d), the latch Locker (2 0 3 a to 2 0 3 d) Buffer (204, 205, 206, 207) LED (213a to 213c) Signal group (2 1 0) Signal group (2 1 1) Data line (DAT) Data (DATI) Data line (DA 丁 〇) Clock line (CLK) Clock signal (CLKI) Latch signal (STB) Latch signal (STB 1) Output enable (〇E) Brightness control output (〇E〇)

M257073 8 Ming said that the four electric ground lamp input L latch latch slow latch time L input latch L time T input c c single-ended D register register short selection D credits DC source line group in and out E lock shift lock punch lock pulse type E lock out E pulse

DDDNVG 6 1 ± 0 3-a 1 XJ 0 2 3 3 0 0 (33 yuan cc road ^ " visit area 焉 oa 4 4 3 X) / \) / 00 X) / 5 7 0) 4 IX 1 ± s 4 4 c 1 4}}, ao 6 > (^ 4 (578 a 2434 device electric c number 1119) ocoo select line letter 44411 4 device 44 select detection system CCC40 丨 record 5 d) 3 do 2 4 o ~ c 9 1 ± 4 2 \ ly \) y 4 6 3o) (o) 5 1 out of 6 4 C ο lose C ο s 6 material 6 〇c equipment capital c 1 pulse lock Page 12 of M257073

Page 13 M257073 Schematic description The first picture is a block diagram of the connection method of the creative LED. The second picture is an illustration of the structure and content of the creation. The third picture is the timing diagram of the creation. The fourth figure is a schematic diagram of the principle of delaying the data by half a clock. The fifth picture is another schematic diagram of the principle of creating another half of the clock. The sixth picture is the timing diagram of the fourth and fifth pictures. The seventh figure is a block diagram of the conventional technology LED connection. The eighth figure is a schematic diagram of the internal structure of the lamp unit of the conventional technology L E D seventh figure.

Page 14

Claims (1)

M257073 5. Scope of patent application 1 · A series-connected LED light unit control device, recorder, latch recorder, and LED driver = To include multiple sets of special internal flash lock signals that generate electrical ^ = ,,, 'It is characterized by using one channel and a set of circuit design devices that can delay the output data by half = reducing the stability of the external connection line system. A pulsed circuit to improve the system. 2 · As described in item 范围 of the scope of the patent application, where L · Ξ D lamp group control device, = ED lamp group control device requires only two signal lines to work. In addition to the power supply in the fixed circuit. There are only four circuits between each lamp group. 3. If the scope of the patent application is set, the LED driving clock synchronization D is half the clock, and after the device data is sent, the clock stops the latch signal, and passes the flash lock group DT y P e The latch material is locked to generate the LE driving LED, and the circuit can be added to reduce the external latch signal. The circuit described in item 1 adds a signal selector to the ype flash for a period of time, and the original D control letter is connected by one less and can be connected by a series data wheel lock. After one hour, the family gets the S-R number, and then Wiring, system design. Ten LED lights are provided before it. It can send the pulse short circuit detection circuit to ask the lock signal displacement record to the LE. The latcher installs a reverse output data delay circuit on request. The output of the D drive circuit signal that is generated by one device and transmitted to the other device can be selected internally or 4. As described in the scope of patent application 帛 1, the control surface of the series-connected LED lamp set M257073 5. Application scope of patent The data latch can lock the output of the previous set of latches at the positive edge of the clock and let the next latch actuate when the clock is reversed, which can delay the output data by half Clock, and become another output, so that the next data latch will lock the output of the previous device at the rising edge of the buffered clock. According to the data, each input data latch will Its Locked, so you can guarantee that the data captured by each clock is very accurate. Page 16