TWI843367B - Method for recycling wafers - Google Patents

Abstract

A method for recycling wafers includes providing a wafer including a wafer base and a film. The wafer base includes a main surface, a surface layer and a base layer; and the film is disposed on the main surface and includes a dielectric portion, a semiconductor portion and a conductor portion. The method for recycling wafers also includes performing a first laser process to irradiate the main surface or the surface layer of the wafer with laser, such that the film is separated from the main surface; performing a second laser process to irradiate the main surface or the surface layer of the wafer with laser, thereby changing the surface roughness of the main surface; and performing a third laser process to irradiate the main surface or the surface layer of the wafer with laser, thereby changing the crystallinity of the surface layer.

Description

Wafer recycling method

The present invention relates to a method for recycling semiconductor wafers, and in particular to a method for recycling single crystal wafers.

In the semiconductor manufacturing process, a variety of semiconductor manufacturing equipment are used, such as thin film deposition equipment, photolithography equipment, ion implantation equipment, diffusion equipment, etc., to produce the required integrated circuits in the semiconductor wafer.

In order to confirm whether the process parameters of the process equipment meet the specifications, test wafers are usually used to pass through different process equipment (e.g., epitaxial process, thin film process, patterning process) before the formal production of integrated circuits to evaluate and adjust the process parameters of the process equipment. In order to reuse these processed test wafers, it is often necessary to undergo complex recycling processes to allow the test wafers to be regenerated (reclamation), and the known test wafer recycling includes multiple steps such as wet etching film removal, grinding and polishing.

On the other hand, in addition to test wafers, prime wafers may also need to be recycled and regenerated due to structural defects and/or electrical defects after being processed by process machines. Similarly, this regeneration process is complicated and usually includes multiple steps such as wet etching, film removal, grinding and polishing.

As for wet etching film removal, since it is usually accompanied by the use of chemicals such as strong acid or strong alkali, this greatly increases the danger and pollution of the wafer recycling step, which is not conducive to environmental protection and sustainable development. Therefore, the industry has an urgent need for a safe and simple wafer recycling method.

To achieve the above-mentioned purpose, the present invention provides a wafer recycling method, which includes providing a wafer, wherein the wafer includes a wafer body and a thin film, wherein the wafer body includes a main surface, a surface layer and a main layer, and the thin film is disposed on the main surface and includes a dielectric portion, a semiconductor portion and a conductor portion. The wafer recycling method also includes performing a first laser process to irradiate the main surface or surface layer of the wafer with a laser so that the interface between the main surface and the thin film is separated; performing a second laser process to irradiate the main surface or surface layer of the wafer with a laser so as to change the surface roughness of the main surface; and performing a third laser process to irradiate the main surface or surface layer of the wafer with a laser so as to change the crystallinity of the surface layer.

The wafer recycling method provided by the present invention is highly safe and simple, and does not require a wet etching process, which can further enhance the green value of the present invention.

1000:Test wafer

100: Test wafer body

100A: Main layer

100B: Surface layer

100T: Main surface

102: Semiconductor layer

104:Metal electrode

106: Dielectric layer

108: Plug

110: Solder pad layer

200: Film

F: Focus

G: Laser generating device

L:Laser

La: Light spot

Lv: Focus depth

P: Scan path

Pr: protrusion

T: Scan width

θ: Laser angle

D1: First direction

D2: Second direction

S1-S4: Steps

Figure 1 is a schematic diagram of a partial cross section of a test wafer to be recycled.

Figure 2 is a three-dimensional schematic diagram of a multi-pass laser process according to an embodiment of the present invention.

Figure 3 is a three-dimensional schematic diagram of the laser process of an embodiment of the present invention.

FIG4 is a schematic diagram of an embodiment of the present invention performing a second laser process or a third laser process after the first laser process.

FIG5 is a top view of the laser scanning path of the laser process in different embodiments of the present invention.

Figure 6 is a flow chart of the wafer recycling method of the present invention.

In order to enable a person skilled in the art who is familiar with the technical field to which the present invention belongs to further understand the present invention, several preferred embodiments of the present invention are listed below, and the components and intended effects of the present invention are described in detail with the accompanying drawings. Moreover, a person skilled in the art who is familiar with the technical field to which the present invention belongs can also refer to the following embodiments without departing from the spirit of the present invention, and replace, reorganize, and mix the features in several different embodiments to complete other embodiments.

Please refer to FIG. 1, which shows a partial cross-sectional schematic diagram of a test wafer to be recycled. As shown in FIG. 1, the local area of the test wafer 1000 includes a test wafer body 100, such as a single crystal wafer substrate composed of one or more elements such as silicon, silicon carbide, gallium nitride, aluminum nitride, gallium arsenide, indium phosphide, sapphire, etc., but not limited thereto. According to the material of the test wafer body 100, the test wafer body 100 has different rigidity performances, and the thickness of the test wafer body 100 can be 0.3 mm to 1.5 mm. The test wafer body 100 includes a main body layer 100A, a surface layer 100B and a main surface 100T. According to different process tests performed on the test wafer, the thickness of the surface layer 100B can be 50 microns to 500 microns. In one embodiment, the surface layer 100B is a layer region whose lattice or structure is affected by the process above the main surface 100T, and the main layer 100A is a layer region whose lattice or structure is not affected by the process. In one embodiment, the surface layer 100B includes an insulating trench and a doped region, and the main layer 100A includes a doped region.

A thin film 200 may be disposed on the main surface 100T of the test wafer body 100, which includes a dielectric portion, a semiconductor portion, and a conductor portion, but is not limited thereto. In one embodiment, the dielectric portion may include a gate insulating layer, a gate spacer, an interlayer dielectric layer, or a passivation layer; the semiconductor portion may include a stress buffer layer, a high resistance layer, or a gate semiconductor layer; the conductor portion may include a field plate, an electrode, an interconnect layer, or a pad layer, but is not limited thereto. In one embodiment, a semiconductor layer 102, a metal electrode 104, and a dielectric layer 106 may be disposed on the main surface 100T of the test wafer 1000. A conductive interconnect layer, such as a plurality of plugs 108, may be provided in the dielectric layer 106. The plugs 108 may be formed by forming a plurality of trenches in the dielectric layer 106 through an appropriate etching process, and filling the plurality of trenches with metal materials. The pad layer 110 may be provided on the dielectric layer 106, and the pad layer 110 may be formed by performing an appropriate film deposition process and a patterning process to form the pad layer 110 on the plurality of plugs 108.

According to different actual test requirements, the semiconductor process performed on the main surface 100T of the test wafer body 100 may include an epitaxial process, a thin film process, an etching process, a patterning process and a grinding process, but is not limited thereto. Therefore, the components or parts in the thin film 200 of the test wafer to be recovered by the present invention are not limited to FIG. 1 or the above-mentioned embodiments. For example, the semiconductor layer 102 in the thin film 200 can be a non-continuous layer, so that the dielectric layer 106 fills the gap between the semiconductor layers 102 and contacts the main surface 100T.

FIG. 2 is a three-dimensional schematic diagram showing the implementation of the first laser process, the second laser process and the third laser process according to an embodiment of the present invention, wherein FIG. 2 omits the thin film 200 of the test wafer 1000. First, the first laser process is fully implemented on the main surface 100T along multiple paths parallel to the first direction D1. For example, the laser generating device G generates laser L, and the laser L is used to irradiate the main surface 100T, the surface layer 100B or the thin film (not shown) of the test wafer 1000, so that the interface between the main surface 100T and the thin film (not shown) is separated, that is, the thin film (not shown) is no longer tightly attached to the main surface 100T. Then, the second laser process is implemented along multiple paths parallel to the first direction D1. For example, a laser generating device G generates laser L, and the laser L is used to irradiate the main surface 100T or the surface layer 100B of the test wafer 1000, thereby changing the surface roughness of the main surface 100T. Then, a third laser process is performed along a multi-path parallel to the first direction D1. For example, a laser generating device G generates laser L, and the laser L is used to irradiate the main surface 100T or the surface layer 100B of the test wafer 1000, thereby changing the crystallinity of the surface layer 100B or reducing the influence of the damage layer of the surface layer 100B. The damage layer can be located between about 100 nanometers and 10 microns below the main surface 100T.

It should be noted that, in this article, irradiating a surface or a layer with laser light means that the focus of the laser light is on the surface or in the layer. For example, when the laser light L is irradiated on the main surface 100T, it means that the focus of the laser light L emitted by the laser generating device G is on the main surface 100T, and when the laser light L is irradiated on the surface layer 100B, it means that the focus of the laser light L emitted by the laser generating device G is in the surface layer 100B.

In FIG. 2 , the laser L and the main surface 100T of the test wafer 1000 have a laser angle θ, and the laser angles in the first laser process, the second laser process, and the third laser process can be 30° to 90°. According to different laser processing areas, such as the edge area of the test wafer, the laser angles of the first laser process, the second laser process, and the third laser process can be 30° to 60°.

According to different requirements, before the first laser process, an optical detection instrument can be used to detect the test wafer 1000 to obtain the thickness of the film 200, so that the laser L of the first laser process is focused on the interface between the film 200 and the main surface 100T, which is conducive to the rapid separation or removal of the film 200.

According to different requirements, before the second laser process and the third laser process, the main surface 100T can be inspected by a surface roughness meter or a scanning electron microscope (SEM) to determine whether the second laser process and the third laser process are full scans or partial scans. The main purpose of the second laser process is to reduce the surface roughness added by the first laser process on the main surface 100T to facilitate the smooth progress of the subsequent flattening process; in one embodiment, after the first laser process, the second laser process and the third laser process can be performed.

According to different requirements, the implementation time of the first laser process, the implementation time of the second laser process and the implementation time of the third laser process can be arranged arbitrarily or performed simultaneously. For example, the implementation time of the first laser process is earlier than the implementation time of the second laser process and the implementation time of the third laser process, or the first laser process, the second laser process and the third laser process are performed in sequence, but not limited to this.

When the first laser process and the second laser process are performed, at least a portion of the semiconductor layer 102 adjacent to the main surface 100T in the test wafer 1000 of FIG. 1 can be cracked, melted or vaporized. According to different implementations, when the first laser process and the second laser process are performed, at least one of a portion of the dielectric portion, a portion of the semiconductor portion and a portion of the conductive portion adjacent to the interface between the test wafer main body 100 and the film 200 will be cracked, melted or vaporized.

FIG3 is a three-dimensional schematic diagram of a laser process of an embodiment of the present invention, and further magnifies the laser L emitted by the laser generating device G, wherein FIG3 omits the thin film 200 of the test wafer 1000. The laser generating device G can perform the first laser process, the second laser process, and the third laser process along the scanning path P and other scanning paths. The laser L emitted by the laser generating device G has a focus F, and the laser L has a spot La on the outermost exposed surface of the test wafer 1000 (e.g., the main surface 100T or the surface of the thin film (not shown)). In one embodiment, the spot size of the laser L of the first laser process has a diameter greater than 0.05 mm, or greater than 0.1 mm. In another embodiment, the spot size of the laser of the first laser process is greater than the spot size of the laser of the second laser process and the third laser process. It should be noted that although the focus F of the laser L in FIG. 3 is located above the outermost exposed surface of the test wafer 1000, when the focus F of the laser L is located below the outermost exposed surface (e.g., the surface of the film 200), the outermost exposed surface of the test wafer 1000 will still have a spot La.

FIG4 is a schematic diagram showing an embodiment of the present invention in which a second laser process or a third laser process is performed after a first laser process, wherein the test wafer body 100 of FIG4 is a partial cross-sectional view, and FIG4 omits the film fragments or residues that may remain on the main surface 100T of the test wafer 1000 after the first laser process. After the film 200 of FIG1 is removed by the first laser process, a plurality of protrusions Pr are generated on the main surface 100T of the test wafer 1000. In order to make the main surface 100T of the test wafer 1000 meet the surface roughness specification of the subsequent planarization process, the second laser process can be performed to melt or vaporize the plurality of protrusions Pr on the main surface 100T, so that the arithmetic average height (Ra) of the main surface 100T is less than 1 micron. In other words, before the second laser process is performed, the main surface 100T of the test wafer 1000 has a first roughness (e.g., arithmetic mean height (Ra)), and after the second laser process is performed, the main surface 100T of the test wafer 1000 has a second roughness (e.g., arithmetic mean height (Ra)), and the first roughness is greater than the second roughness.

In order to eliminate the damage caused by the first laser process to the test wafer body 100, such as lattice dislocation or contaminant doping, but not limited to this, a third laser process can be further performed to anneal the test wafer body 100, which can effectively reduce or eliminate the inserted oxygen defects in the surface layer 100B, wherein the inserted oxygen defects include point defects caused by oxygen precipitation. The damage caused by the first laser process is distributed on the surface layer 100B of the test wafer body 100. The third laser process can change the crystallinity of the surface layer 100B, thereby releasing the stress of the surface layer 100B. Specifically, the entropy of the surface layer 100B can be reduced. Microscopically, the amorphous or polycrystalline area can be repaired to a single crystal lattice arrangement.

The focus depth Lv of the second laser process and the third laser process can be adjusted according to the damage caused by the first laser treatment and the surface roughness to be achieved. In one embodiment, the focus depth Lv of the laser L of the second laser process and the third laser process is 0.01 micron to 10 microns below the main surface 100T. In one embodiment, the pulse frequency of the first laser process, the second laser process and the third laser process is 10kHz to 100kHz, and the pulse width is 100 nanoseconds to 500 nanoseconds. The first power density of the first laser process can be 500uJ/pulse to 700uJ/pulse, the second power density of the second laser process can be 200uJ/pulse to 500uJ/pulse, and the third power density of the third laser process is less than 200uJ/pulse. In another embodiment, the first power density of the first laser process is 600uJ/pulse to 800uJ/pulse, the second power density of the second laser process can be 300uJ/pulse to 600uJ/pulse, and the third power density of the third laser process is less than 300uJ/pulse. It should be noted that the power density of the present invention is the energy of each pulse laser, and the energy received by the irradiated surface of the wafer per unit time is not only related to the power density, but also to the pulse width. Specifically, the energy (uJ/ns) received by the irradiated surface of the wafer can be obtained by dividing the power density by the pulse width.

According to different requirements, the first laser process, the second laser process, and the third laser process can be pulsed lasers with the same or different pulse widths. In one embodiment, the first laser process and the second laser process can be nanosecond lasers, picosecond lasers, or femtosecond lasers, and the third laser process can be nanosecond lasers. By using pulsed lasers, cracking, melting, or vaporization can be caused in selected local areas without affecting unselected areas.

According to actual needs, the main surface 100T of the recovered test wafer 1000 can be modified. For example, the first laser process, the second laser process or the third laser process in an oxygen atmosphere can thermally oxidize part of the single crystal silicon surface layer 100B into silicon dioxide. Alternatively, when the third laser process is performed, a hydrophilic polymer (for example, a photocurable water-based coating) is applied to the main surface 100T of the test wafer 1000, and the hydrophilic polymer is cured to the main surface 100T by laser L to obtain a hydrophilic surface.

According to the above-mentioned embodiment, the test wafer is used as the main recycling target of the recycling method of the present invention, but the present invention is not limited to this. According to the actual situation, the wafer recycling method of the present invention is not limited to recycling test wafers, but is also applicable to recycling standard wafers (prime wafers) that have been processed by process machines (such as thin film deposition machines, etching machines, etc.) but have not been cut. Such processed standard wafers may be unsuitable for further processing into semiconductor components due to structural defects and/or electrical defects. That is, the above-mentioned test wafers and test wafer bodies can also be replaced by standard wafers and standard wafer bodies. According to an embodiment of the present disclosure, the wafer recycling method of the present invention is applicable to recycling defective standard wafers on a production line. The defective standard wafer may be a standard wafer that has undergone at least one process and includes a thin film dielectric part, a semiconductor part, a conductor part or any combination thereof. By implementing the wafer recycling method of the present invention, the defective standard wafer can be reused as a test wafer.

FIG5 shows a top view of the laser scanning path of the laser process implemented in different embodiments of the present invention. The scanning paths P of the first laser process, the second laser process and the third laser process of the present invention may be the same or different. As shown in FIG5(a), the scanning path P may be performed linearly along a second direction D2, and two adjacent scanning paths P have a scanning width T. According to different requirements, for example, when the diameter of the laser spot size is greater than 5 microns, the scanning width of the laser may be 2 microns to 100 microns, so that the test wafer 1000 can be fully scanned. The scanning pitch of the laser is the spacing distance of the laser emitted by the laser generating device. In one embodiment, the scanning pitch is 1 micron to 100 microns. As shown in FIG5(b), the scanning path P can be performed linearly along the first direction D1; as shown in FIG5(c), the scanning path P can be performed linearly along the first direction D1 first and then along the second direction D2, or first along the second direction D2 and then along the first direction D1; as shown in FIG5(d), the scanning path P can be performed linearly along the second direction D2 first and then along two other different scanning directions in sequence to form a plurality of polygonal scanning areas; as shown in FIG5(e), the scanning path P can be performed along a concentric path.

According to different requirements, the scanning paths of the first laser process, the second laser process and the third laser process can be any combination of Figure 5(a) to Figure 5(e), but are not limited thereto. In one embodiment, the scanning path of the first laser process is shown in Figure 5(c), the scanning path of the second laser process is shown in Figure 5(d), and the scanning path of the third laser process is shown in Figure 5(e). In another embodiment, the scanning path of the first laser process is shown in Figure 5(d), the scanning path of the second laser process is shown in Figure 5(c), and the scanning path of the third laser process is shown in Figure 5(a).

FIG6 is a flow chart of the wafer recovery method of the present invention. As shown in FIG6 , the wafer recovery method may include step S1, step S2, step S3 and step S4. As shown in FIG6 , in step S1, a wafer is provided. In step S2, a first laser process is applied to irradiate the main surface or surface layer of the wafer with a laser, so that the interface between the main surface and the film is separated. In step S3, a second laser process is performed to irradiate the main surface or surface layer of the wafer with a laser, thereby changing the surface roughness of the main surface. In step S4, a third laser process is performed to irradiate the main surface or surface layer of the wafer with a laser, thereby changing the crystallinity of the surface layer. According to different requirements, the order of steps S2 to S4 can be rearranged or performed simultaneously. In one embodiment, after executing steps S1 to S4, the wafer recovery method further includes performing a planarization process (such as chemical mechanical polishing) on the main surface of the wafer, and then performing a cleaning process (such as ultrasonic cleaning) on the main surface of the wafer.

According to the above-mentioned embodiment of the present invention, a laser process is used to remove the thin film disposed on a test wafer body or a standard wafer body (referred to as a wafer body), thereby avoiding the use of a wet etching film removal process or reducing the amount of chemicals used in the wet etching film removal process, which is beneficial to environmental protection and sustainable development. In addition, since a pulsed laser is used during film removal, and the focus of the laser can be focused on the interface between the thin film and the wafer body, it is possible to avoid laser damage to other unselected areas and accelerate the efficiency of film removal. Furthermore, the laser process can also be used to adjust the surface roughness of the wafer body, thereby avoiding the use of a flattening process or reducing the processing time of the flattening process. In addition, the laser process can also be used to remove lattice defects in the surface layer of the wafer body, thereby avoiding the use of wet etching or heat treatment processes, or reducing the processing time of wet etching or heat treatment processes. The wafer recycling method of the present invention is environmentally friendly, safe and has a simple process, thus meeting the industry's demand for wafer recycling methods.

The above is only the preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

1000:Test wafer

100: Test wafer body

100A: Main layer

100B: Surface layer

100T: Main surface

G: Laser generating device

L:Laser

θ: Laser angle

D1: First direction

Claims (10)

A wafer recycling method comprises: providing a wafer, the wafer comprising: a wafer body comprising a main surface, a surface layer and a main body layer; a thin film disposed on the main surface and comprising a dielectric part, a semiconductor part and a conductor part; performing a first laser process to irradiate the main surface or the surface layer of the wafer with a laser, so that an interface between the main surface and the thin film is separated; performing a second laser process to irradiate the surface layer of the wafer with a laser, thereby changing the surface roughness of the main surface; and performing a third laser process to irradiate the surface layer of the wafer with a laser, thereby changing the crystallinity of the surface layer, wherein the focusing depth of the lasers of the second laser process and the third laser process is within the surface layer. For example, the recycling method in item 1 of the patent application scope, wherein the first laser process is performed earlier than the second laser process and the third laser process. For example, in the recycling method of item 1 of the patent application, the first laser process is performed earlier than the second laser process, and the second laser process is performed earlier than the third laser process. For example, the recycling method of item 1 of the patent application scope, wherein the recycling method further comprises: performing a planarization process on the main surface of the wafer; and After performing the planarization process, performing a cleaning process on the main surface of the wafer. As in the recycling method of item 1 of the patent application, the focusing depth of the lasers of the second laser process and the third laser process is 0.01 microns to 10 microns below the main surface of the wafer. As in the recycling method of item 1 of the patent application, when the first laser process and the second laser process are performed, at least one of a portion of the dielectric portion, a portion of the semiconductor portion, and a portion of the conductive portion adjacent to the interface will be cracked, melted, or vaporized. For example, in the recycling method of item 1 of the patent application, when the second laser process is performed, the surface roughness of the main surface is converted from the first roughness to the second roughness, and the first roughness is greater than the second roughness. For example, in the recycling method of item 1 of the patent application, the scanning path of the laser is linear, the scanning pitch is 1 micron to 100 microns, and the scanning width is 2 microns to 100 microns. For example, in the recycling method of item 1 of the patent application, the diameter of the laser spot size of the first laser process is greater than 0.05 mm. For example, the recycling method of item 1 of the patent application scope, wherein after the second laser process is performed, the arithmetic average height (Ra) of the main surface of the wafer is less than 1 micron.

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