TWI841322B - Pixel circuit and driving method thereof - Google Patents

Abstract

A pixel circuit and a driving method are provided. The pixel circuit includes a driving circuit, a data writing circuit and a voltage regulator. The driving circuit generates a driving current according to a lighting control signal. The data writing circuit provides a data voltage to an input terminal according to a source driving signal. The voltage regulator adjusts voltage levels of a first control terminal and a second control terminal according to the lighting control signal, the source driving signal and a previous stage source driving signal.

Description

Pixel circuit and driving method thereof

The present invention relates to a display device, and in particular to a pixel circuit and a driving method thereof.

In display devices, when the manufacturing process varies, the threshold voltage of the driving transistor in the pixel circuit tends to drift, causing unexpected changes in the current flowing through the light-emitting element, which in turn causes the brightness of the display panel to be unstable, affecting the quality of the display screen.

On the other hand, the driver circuit in the pixel circuit is also easily affected by the line resistance of the transmission path, resulting in different terminal voltages for each pixel, which in turn causes errors in the current flowing through the light-emitting element in each pixel.

In view of this, how to improve the impact of process variation on pixel circuits and effectively reduce the power consumption of pixel circuits to improve the display quality of the display will be an important topic for relevant technical personnel in this field.

The present invention provides a pixel circuit that can compensate for the critical voltage of the driving transistor through timing control and effectively reduce the power consumption of the pixel circuit, thereby improving the quality of the display image.

The pixel circuit of the present invention includes a driving circuit, a data writing circuit and a voltage regulator. The driving circuit generates a driving current according to a light emission control signal. The data writing circuit has an input terminal, the data writing circuit is coupled to the driving circuit, and provides a data voltage to the input terminal according to a source driving signal. The voltage regulator has a first control terminal and a second control terminal, the voltage regulator is coupled to the driving circuit and the data writing circuit, and adjusts the voltage level of the first control terminal and the second control terminal according to the light emission control signal, the source driving signal and the previous source driving signal.

The driving method of the pixel circuit of the present invention includes: providing a driving circuit to generate a driving current according to a light emission control signal; providing a data writing circuit with an input end, and making the data writing circuit provide a data voltage to the input end according to a source driving signal; and providing a voltage regulator with a first control end and a second control end, and making the voltage regulator adjust the voltage level of the first control end and the second control end according to the light emission control signal, the source driving signal and the previous source driving signal.

Based on the above, the pixel circuits described in the embodiments of the present invention can compensate for the critical voltage of the driving transistor through timing control, and make the current size of the driving current independent of the critical voltage of the driving transistor, the system high voltage, and the system low voltage. In this way, the pixel circuit of the present invention can effectively eliminate the offset of the critical voltage of the driving transistor caused by process variation, and the driving current is less likely to be affected by the line resistance in the path of the system high voltage and the system low voltage and cause errors.

100: Pixel circuit

110:Drive circuit

120: Data writing circuit

130: Voltage regulator

AT: test signal

C1: Capacitor

CT1, CT2: control terminal

CDP: compensation and data writing phase

EM: luminous control signal

EP: Luminescence phase

ID: driving current

LED: light-emitting element

PIN: Input terminal

RP: Reset phase

SN: Source drive signal

SN-1: Preamplifier source drive signal

S410~S430: Steps

T1~T9: Transistor

TFR: Pixel Period

VDATA: data voltage

VDD: system high voltage

VSS: System low voltage

VREF1, VREF2: reference voltage

Figure 1 is a schematic diagram of a pixel circuit according to an embodiment of the present invention.

FIG2 is a timing diagram of the pixel circuit according to the embodiment of FIG1 of the present invention.

Figures 3A to 3C are equivalent circuit diagrams of the pixel circuit according to the embodiment of Figure 1 of the present invention when operating at various stages.

Figure 4 is a flow chart of a method for driving a pixel circuit according to an embodiment of the present invention.

The term "coupled (or connected)" used in the entire specification of this case (including the scope of the patent application) may refer to any direct or indirect means of connection. For example, if the text describes that a first device is coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or some connection means. In addition, wherever possible, elements/components/steps with the same number in the drawings and embodiments represent the same or similar parts. Elements/components/steps with the same number or the same terminology in different embodiments can refer to each other for related descriptions.

FIG1 is a schematic diagram of a pixel circuit according to an embodiment of the present invention. Referring to FIG1, in this embodiment, the pixel circuit 100 includes a driving circuit 110, a data writing circuit 120, and a voltage regulator 130. The driving circuit 110 includes a light-emitting element LED and transistors T1 and T2. The anode terminal of the light-emitting element LED is coupled to the system high voltage VDD. The first end of the transistor T1 is coupled to the cathode terminal of the light-emitting element LED, the second end of the transistor T1 is coupled to the control terminal CT2 of the voltage regulator 130, and the control terminal of the transistor T1 receives the light control signal EM. The first end of the transistor T2 is coupled to the data voltage VDATA, the second end of the transistor T2 is coupled to the cathode terminal of the light-emitting element LED, and the control terminal of the transistor T2 receives the test signal AT.

Specifically, in this embodiment, when the pixel circuit 100 operates in the test phase (that is, when the pixel circuit 100 is not provided with the light-emitting element LED), the transistor T2 of the driving circuit 110 can receive the enabled (for example, low voltage level) test signal AT and be turned on according to the test signal AT. In this case, the pixel circuit 100 can provide the data voltage VDATA to the pixel circuit 100 by controlling the timing state of the light control signal EM, the source drive signal SN and the previous source drive signal SN-1 during the test phase to detect the current state of each path and thereby test whether the operation of the pixel circuit 100 is normal.

Then, when the pixel circuit 100 operates in the operation phase after the test phase (that is, when the pixel circuit 100 is provided with a light-emitting element LED), the transistor T2 of the driving circuit 110 can receive a disabled (for example, a high voltage level) test signal AT and be disconnected according to the test signal AT. In the operation phase, the transistor T1 of the driving circuit 110 can provide a driving current ID according to the light control signal and light up the light-emitting element LED accordingly. Among them, the light-emitting element LED of this embodiment can be, for example, an organic light emitting diode (OLED), a sub-millimeter light-emitting diode (mini LED) or other micro light-emitting elements, and the present invention is not particularly limited.

The data write circuit 120 is coupled to the drive circuit 110. The data write circuit 120 has an input terminal PIN. The data write circuit 120 can provide a data voltage VDATA to the input terminal PIN according to the source drive signal SN. In this embodiment, the data write circuit 120 includes a capacitor C1 and transistors T3 and T4. The capacitor C1 is coupled between the input terminal PIN and the drive circuit 110. The first end of the transistor T3 is coupled to the system low voltage VSS, the second end of the transistor T3 is coupled to the input terminal PIN, and the control end of the transistor T3 receives the previous source drive signal SN-1. The first end of transistor T4 is coupled to the data voltage VDATA, the second end of transistor T4 is coupled to the input terminal PIN, and the control end of transistor T4 receives the source drive signal SN.

On the other hand, the voltage regulator 130 is coupled to the driving circuit 110 and the data writing circuit 120. The voltage regulator 130 has control terminals CT1 and CT2. The voltage regulator 130 can adjust the voltage levels of the control terminals CT1 and CT2 according to the luminous control signal EM, the source driving signal SN, and the previous source driving signal SN-1.

The voltage regulator 130 includes transistors T5 to T9. The first end of transistor T5 is coupled to the input terminal PIN, the second end of transistor T5 is coupled to the control terminal CT1, and the control terminal of transistor T5 receives the light control signal EM. The first end of transistor T6 is coupled to the reference voltage VREF2, the second end of transistor T6 is coupled to the control terminal CT1, and the control terminal of transistor T6 receives the previous source drive signal SN-1. The first end of transistor T7 is coupled to the reference voltage VREF1, the second end of transistor T7 is coupled to the control terminal CT1, and the control terminal of transistor T7 receives the source drive signal SN.

The first end of transistor T8 (for example, a driving transistor) is coupled to the system low voltage VSS, the second end of transistor T8 is coupled to the control end CT2, and the control end of transistor T8 is coupled to the control end CT1. The first end of transistor T9 is coupled to the reference voltage VREF2, the second end of transistor T9 is coupled to the control end CT2, and the control end of transistor T9 receives the previous source drive signal SN-1.

It is worth mentioning that in the design of transistors T1~T9, the transistors T1~T9 of this embodiment can be P-type transistors, but the embodiments of the present invention are not limited to this. In addition, in the design of system high voltage VDD, system low voltage VSS, reference voltage VREF1 and reference voltage VREF2, the voltage values of each voltage can be reference voltage VREF2, system high voltage VDD, reference voltage VREF1 and system low voltage VSS in descending order.

FIG. 2 is a timing diagram of a pixel circuit according to the embodiment of FIG. 1 of the present invention. Referring to FIG. 2, in the present embodiment, a pixel period TFR of the pixel circuit 100 can be divided into a reset phase RP, a compensation and data writing phase CDP, and a light emitting phase EP. The pixel circuit 100 can be operated in the reset phase RP, the compensation and data writing phase CDP, and the light emitting phase EP in sequence. The reset phase RP, the compensation and data writing phase CDP, and the light emitting phase EP do not overlap with each other.

For details of the implementation of the pixel circuit 100, please refer to FIG. 2 and FIG. 3A to FIG. 3C. FIG. 3A to FIG. 3C are equivalent circuit diagrams of the pixel circuit 100 according to the embodiment of FIG. 1 of the present invention when operating at various stages. It should be noted that, for the sake of convenience, the disconnected transistors in FIG. 3A to FIG. 3C are indicated by a cross, and the turned-on transistors are indicated by an uncross.

Please refer to FIG. 2 and FIG. 3A at the same time. In this embodiment, FIG. 3A is an equivalent circuit diagram of the pixel circuit 100 when operating in the reset phase RP. Specifically, in the reset phase RP, the source drive signal SN and the light control signal EM can be set to a high voltage level, and the previous source drive signal SN-1 can be set to a low voltage level.

Specifically, in the reset phase RP, the data write circuit 120 can provide the system low voltage VSS to the input terminal PIN through the conduction path of the transistor T3 according to the pulled-down previous source drive signal SN-1, so that the voltage level of the input terminal PIN is correspondingly pulled down to a voltage value equal to the system low voltage VSS.

Then, the voltage regulator 130 can provide the reference voltage VREF2 to the control terminal CT1 through the conduction path of the transistor T6 according to the pulled-down front-stage source drive signal SN-1. In addition, the voltage regulator 130 can provide the reference voltage VREF2 to the control terminal CT2 through the conduction path of the transistor T9 according to the pulled-down front-stage source drive signal SN-1. In this case, the voltage regulator 130 can adjust the voltage levels of the control terminal CT1 and the control terminal CT2 to the voltage value equal to the reference voltage VREF2.

After completing the reset operation of each node, please refer to FIG. 2 and FIG. 3B at the same time. In this embodiment, FIG. 3B is an equivalent circuit diagram of the pixel circuit 100 operating in the compensation and data writing phase CDP. Specifically, in the compensation and data writing phase CDP, the previous source driving signal SN-1 and the luminescence control signal EM can be set to a high voltage level, and the source driving signal SN can be set to a low voltage level.

Specifically, in the compensation and data writing phase CDP, the data writing circuit 120 can provide the data voltage VDATA to the input terminal PIN through the conduction path of the transistor T4 according to the pulled-down source driving signal SN, so that the voltage level of the input terminal PIN is pulled up to the voltage value of the data voltage VDATA.

Then, the voltage regulator 130 can provide the reference voltage VREF1 to the control terminal CT1 through the conduction path of the transistor T7 according to the pulled-down source driving signal SN, so that the voltage level of the control terminal CT1 is pulled down to the voltage value of the reference voltage VREF1.

It is worth mentioning that, since the reference voltage VREF1 of the present embodiment is designed to be lower than the reference voltage VREF2 by at least one threshold voltage VTH8 of the transistor T8, the transistor T8 of the voltage regulator 130 can be turned on according to the voltage level of the control terminal CT1, and the voltage level of the control terminal CT2 is pulled down to the voltage difference between the voltage value of the reference voltage VREF1 and the voltage value of the threshold voltage VTH8 of the transistor T8 (i.e., VREF1-|VTH8|).

Please refer to FIG. 2 and FIG. 3C at the same time. In this embodiment, FIG. 3C is an equivalent circuit diagram of the pixel circuit 100 when operating in the light-emitting stage EP. Specifically, in the light-emitting stage EP, the source driving signal SN and the previous source driving signal SN-1 can be set to a high voltage level, and the light-emitting control signal EM can be set to a low voltage level.

Specifically, in the light-emitting phase EP, the transistor T8 (e.g., the driving transistor) of the voltage regulator 130 can generate a driving current ID according to the voltage state of the control terminal CT1, and the driving circuit 110 can light up the light-emitting element LED through the conduction path of the transistor T1 according to the light-emitting control signal EM that is pulled down and the driving current ID. In this case, the voltage regulator 130 can pull down the voltage level of the control terminal CT2 to the voltage difference between the voltage value of the system high voltage VDD and the voltage value of the conduction voltage VLED of the light-emitting element LED (i.e., VDD-VLED).

On the other hand, the voltage regulator 130 can connect the input terminal PIN and the control terminal CT1 to each other through the conduction path of the transistor T5 according to the light control signal EM that is pulled down. Then, based on the coupling effect of the capacitor C1 and the voltage state of the input terminal PIN and the control terminal CT1 during the compensation and data writing phase CDP, the voltage regulator 130 can further pull down the voltage level of the input terminal PIN and the control terminal CT1 to the voltage value of VDATA+(VDD-VLED)-(VREF1-VTH8).

Therefore, when the pixel circuit 100 operates in the light-emitting phase EP and the transistor T8 operates in the saturation region, the transistor T8 can generate a driving current ID. At this time, the driving current ID flowing through the light-emitting element LED can be expressed as follows: ID=K(VDATA-VREF1)^2

Among them, the above ID is the current value of the driving current ID; K is the process parameter of the transistor T8; VDATA is the voltage value of the data voltage VDATA; VREF1 is the voltage value of the reference voltage VREF1.

According to the above description, in the light-emitting phase EP, the driving current ID generated by the pixel circuit 100 is independent of the critical voltage VTH8 of the transistor T8, the system high voltage VDD, and the system low voltage VSS. Therefore, the pixel circuit 100 can effectively eliminate the offset of the critical voltage of the transistor T8 caused by process variation, and the driving current ID is less likely to be affected by the line resistance in the path of the system high voltage VDD and the system low voltage VSS and cause errors.

In addition, since a transistor T1 controlled by the light-emitting control signal EM is provided between the light-emitting element LED and the transistor T8 of the pixel circuit 100, the pixel circuit 100 of the present embodiment can effectively perform multi-pulse operation to improve the uniformity of the display screen.

Thus, the pixel circuit 100 of the present embodiment can compensate for the critical voltage of the driving transistor through timing control and effectively reduce the power consumption of the pixel circuit 100, thereby improving the quality of the display image.

FIG4 is a flow chart of a driving method of a pixel circuit according to an embodiment of the present invention. Please refer to FIG1 and FIG4 at the same time. In step S410, the pixel circuit provides a driving circuit to generate a driving current according to a light-emitting control signal. In step S420, the pixel circuit provides a data writing circuit with an input terminal, and the data writing circuit provides a data voltage to the input terminal according to a source driving signal. In step S430, the pixel circuit provides a voltage regulator with a first control terminal and a second control terminal, and the voltage regulator adjusts the voltage level of the first control terminal and the second control terminal according to the light-emitting control signal, the source driving signal and the previous source driving signal.

The implementation details of each step are fully described in the aforementioned embodiments and implementation methods, so I will not elaborate on them here.

In summary, the pixel circuits of the embodiments of the present invention can compensate for the critical voltage of the driving transistor through timing control, and make the current size of the driving current independent of the critical voltage of the driving transistor, the system high voltage, and the system low voltage. In this way, the pixel circuit of the present invention can effectively eliminate the offset of the critical voltage of the driving transistor caused by process variation, and the driving current is less likely to be affected by the line resistance in the path of the system high voltage and the system low voltage and cause errors.

100: Pixel circuit

110:Drive circuit

120: Data writing circuit

130: Voltage regulator

AT: test signal

C1: Capacitor

CT1, CT2: control terminal

EM: luminous control signal

ID: driving current

LED: light-emitting element

PIN: Input terminal

SN: Source drive signal

SN-1: Preamplifier source drive signal

T1~T9: Transistor

VDATA: data voltage

VDD: system high voltage

VSS: System low voltage

VREF1, VREF2: reference voltage

Claims (11)

A pixel circuit includes: a driving circuit generating a driving current according to a light-emitting control signal; a data writing circuit having an input terminal, the data writing circuit coupled to the driving circuit and providing a data voltage to the input terminal according to a source driving signal; and a voltage regulator having a first control terminal and a second control terminal, the voltage regulator coupled to the driving circuit and the data writing circuit and adjusting the voltage levels of the first control terminal and the second control terminal according to the light-emitting control signal, the source driving signal and a previous source driving signal. A pixel circuit as described in claim 1, wherein in a reset phase, the data write circuit provides a system low voltage to the input terminal according to the previous source driving signal being pulled low, and the voltage regulator provides a second reference voltage to the first control terminal and the second control terminal according to the previous source driving signal being pulled low. A pixel circuit as described in claim 1, wherein in a compensation and data writing phase, the data writing circuit provides the data voltage to the input terminal according to the source driving signal being pulled down, and the voltage regulator provides a first reference voltage to the first control terminal and the second control terminal according to the source driving signal being pulled down to pull down the voltage levels of the first control terminal and the second control terminal. A pixel circuit as described in claim 1, wherein in a light-emitting phase, the voltage regulator pulls down the voltage levels of the input terminal, the first control terminal and the second control terminal according to the light-emitting control signal being pulled down, and the driving circuit generates the driving current according to the light-emitting control signal being pulled down. The pixel circuit as described in claim 1, wherein the driving circuit comprises: a light-emitting element, whose anode terminal is coupled to a system high voltage; and a first transistor, whose first terminal is coupled to the cathode terminal of the light-emitting element, whose second terminal is coupled to the second control terminal, and whose control terminal receives the light-emitting control signal. A pixel circuit as described in claim 1, wherein the data writing circuit comprises: a first transistor, whose first end is coupled to a system low voltage, whose second end is coupled to the input end, and whose control end receives the previous source driving signal; a second transistor, whose first end is coupled to the data voltage, whose second end is coupled to the input end, and whose control end receives the source driving signal; and a capacitor, coupled between the input end and the second control end. A pixel circuit as described in claim 1, wherein the voltage regulator comprises: a first transistor, whose first end is coupled to the input end, whose second end is coupled to the first control end, and whose control end receives the light control signal; a second transistor, whose first end is coupled to a second reference voltage, whose second end is coupled to the first control end, and whose control end receives the previous source drive signal; a third transistor, whose first end is coupled to a first reference voltage, whose second end is coupled to the first control end, and whose control end receives the source drive signal; a fourth transistor, whose first end is coupled to a system low voltage, whose second end is coupled to the second control end, and whose control end is coupled to the first control end; and A fifth transistor, whose first end is coupled to the second reference voltage, whose second end is coupled to the second control end, and whose control end receives the previous source driving signal. A method for driving a pixel circuit includes: Providing a driving circuit to generate a driving current according to a light-emitting control signal; Providing a data writing circuit with an input terminal, and making the data writing circuit provide a data voltage to the input terminal according to a source driving signal; and Providing a voltage regulator with a first control terminal and a second control terminal, and making the voltage regulator adjust the voltage level of the first control terminal and the second control terminal according to the light-emitting control signal, the source driving signal and a previous source driving signal. The driving method as described in claim 8 further includes: In a reset phase, the data write circuit provides a system low voltage to the input terminal according to the pulled-down front-stage source driving signal, and the voltage regulator provides a second reference voltage to the first control terminal and the second control terminal according to the pulled-down front-stage source driving signal. The driving method as described in claim 8 further includes: In a compensation and data writing phase, the data writing circuit provides the data voltage to the input terminal according to the source driving signal that is pulled down, and the voltage regulator provides a first reference voltage to the first control terminal and the second control terminal according to the source driving signal that is pulled down, so as to pull down the voltage level of the first control terminal and the second control terminal. The driving method as described in claim 8 further includes: In a light-emitting stage, the voltage regulator pulls down the voltage levels of the input terminal, the first control terminal and the second control terminal according to the light-emitting control signal that is pulled down, and the driving circuit generates the driving current according to the light-emitting control signal that is pulled down.

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