CN117095630A - Pixel circuit and driving method thereof - Google Patents

Pixel circuit and driving method thereof Download PDF

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Publication number
CN117095630A
CN117095630A CN202311171012.6A CN202311171012A CN117095630A CN 117095630 A CN117095630 A CN 117095630A CN 202311171012 A CN202311171012 A CN 202311171012A CN 117095630 A CN117095630 A CN 117095630A
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CN
China
Prior art keywords
control
voltage
coupled
terminal
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311171012.6A
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Chinese (zh)
Inventor
郑圣谚
钟岳宏
徐雅玲
廖烝贤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AU Optronics Corp
Original Assignee
AU Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from TW112111358A external-priority patent/TWI841322B/en
Application filed by AU Optronics Corp filed Critical AU Optronics Corp
Publication of CN117095630A publication Critical patent/CN117095630A/en
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/10—Dealing with defective pixels

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention provides a pixel circuit and a driving method thereof. The pixel circuit includes a driving circuit, a data writing circuit, and a voltage regulator. The driving circuit generates a driving current according to the light-emitting control signal. The data writing circuit provides a data voltage to the input end according to the source electrode driving signal. The voltage regulator regulates the voltage passing through the first control end and the second control end according to the light-emitting control signal, the source electrode driving signal and the front-stage source electrode driving signal.

Description

Pixel circuit and driving method thereof
Technical Field
The present invention relates to a display device, and more particularly, to a pixel circuit and a driving method thereof.
Background
In the display device, when the process is changed, the threshold voltage (Threshold Voltage) of the driving transistor in the pixel circuit tends to drift, so that the current flowing through the light emitting element changes unexpectedly, and the light emitting brightness of the display panel is unstable, thereby affecting the quality of the display screen.
On the other hand, the driving circuit in the pixel circuit is also susceptible to the line resistance of the transfer path, which causes the terminal voltage of each pixel to be different, and thus the current flowing through the light emitting element in each pixel may be error.
In view of this, it is an important issue for those skilled in the art to improve the influence of the process variation of the pixel circuit and effectively reduce the power consumption of the pixel circuit to improve the display quality of the display screen.
Disclosure of Invention
The invention provides a pixel circuit, which can compensate the critical voltage of a driving transistor through time sequence control and effectively reduce the power consumption of the pixel circuit so as to improve the quality of a display picture.
The pixel circuit of the invention comprises a driving circuit, a data writing circuit and a voltage regulator. The driving circuit generates a driving current according to the light-emitting control signal. The data writing circuit is provided with an input end, coupled to the driving circuit, and used for providing data voltage to the input end according to the source electrode driving signal. The voltage regulator is coupled to the driving circuit and the data writing circuit and adjusts the voltage passing through the first control terminal and the second control terminal according to the light emitting control signal, the source driving signal and the pre-stage source driving signal.
The driving method of the pixel circuit of the invention comprises the following steps: providing a driving circuit to generate a driving current according to the light-emitting control signal; providing a data writing circuit with an input end, and enabling the data writing circuit to provide a data voltage to the input end according to a source electrode driving signal; and providing a voltage regulator with a first control end and a second control end, and enabling the voltage regulator to regulate the voltage passing through the first control end and the second control end according to the light-emitting control signal, the source electrode driving signal and the front-stage source electrode driving signal.
Based on the above, the pixel circuit according to the embodiments of the present invention can compensate the threshold voltage of the driving transistor by time sequence control, and make the current magnitude of the driving current independent of the threshold voltage of the driving transistor, the system high voltage and the system low voltage. Therefore, the pixel circuit of the invention can effectively eliminate the offset of the critical voltage of the driving transistor caused by the process variation, and the driving current is less susceptible to error caused by the influence of the line resistance in the paths of the high voltage and the low voltage of the system.
Drawings
Fig. 1 is a schematic diagram of a pixel circuit according to an embodiment of the invention.
Fig. 2 is a timing diagram of the pixel circuit of the embodiment of fig. 1 in accordance with the present invention.
Fig. 3A to 3C are equivalent circuit diagrams of the pixel circuit according to the embodiment of fig. 1 in various stages of operation.
Fig. 4 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention.
Wherein, the reference numerals:
100 pixel circuit
110 drive circuit
120 data write circuit
130 voltage regulator
AT-test Signal
C1 capacitor
CT1, CT2 control end
CDP compensation and data writing phase
EM light emission control signal
EP lighting stage
ID drive current
LED light-emitting element
PIN input terminal
RP reset phase
SN source electrode driving signal
SN-1 front source drive signal
S410-S430 steps
T1-T9 transistor
TFR: pixel period
VDATA data voltage
VDD: system high Voltage
VSS: system Low Voltage
VREF1, VREF2, reference voltage
Detailed Description
The invention will now be described in more detail with reference to the drawings and specific examples, which are not intended to limit the invention thereto.
The term "coupled" as used throughout this specification (including the claims) may refer to any direct or indirect connection. For example, if a first device couples (or connects) to a second device, that connection may be through a direct connection, or through an indirect connection via other devices and connections. In addition, wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts. Elements/components/steps in different embodiments that use the same reference numerals or use the same language may be referred to in relation to each other.
Fig. 1 is a schematic diagram of a pixel circuit according to an embodiment of the invention. Referring to fig. 1, in the present embodiment, a pixel circuit 100 includes a driving circuit 110, a data writing circuit 120, and a voltage regulator 130. The driving circuit 110 includes a light emitting element LED and transistors T1 and T2. The anode terminal of the light emitting element LED is coupled to the system high voltage VDD. The first terminal of the transistor T1 is coupled to the cathode terminal of the light emitting element LED, the second terminal of the transistor T1 is coupled to the control terminal CT2 of the voltage regulator 130, and the control terminal of the transistor T1 receives the light control signal EM. The first terminal of the transistor T2 is coupled to the data voltage VDATA, the second terminal of the transistor T2 is coupled to the cathode terminal of the light emitting element LED, and the control terminal of the transistor T2 receives the test signal AT.
Specifically, in the present embodiment, when the pixel circuit 100 is operated in the test phase (i.e. when the pixel circuit 100 is not provided with the light emitting element LED), the transistor T2 of the driving circuit 110 may receive the enabled (e.g. low voltage passing) test signal AT and be turned on according to the test signal AT. In this case, the pixel circuit 100 can provide the data voltage VDATA to the pixel circuit 100 by controlling the timing states of the light emission control signal EM, the source driving signal SN and the pre-stage source driving signal SN-1 during the test stage, so as to detect the current states of the paths, and thereby test whether the operation of the pixel circuit 100 is normal.
Then, when the pixel circuit 100 is operated in an operation stage subsequent to the test stage (i.e., when the pixel circuit 100 is provided with the light emitting element LED), the transistor T2 of the driving circuit 110 may receive the test signal AT which is disabled (e.g., high voltage passing) and be turned off according to the test signal AT. In the operation phase, the transistor T1 of the driving circuit 110 may provide the driving current ID according to the light emission control signal, and correspondingly light the light emitting element LED. The light emitting element LED of the present embodiment may be, for example, an organic light emitting diode (Organic Light Emitting Diode, OLED), a sub-millimeter light emitting diode (mini LED), or other micro light emitting element, and the present invention is not particularly limited.
The data writing circuit 120 is coupled to the driving circuit 110. The data write circuit 120 has an input PIN. The data write circuit 120 can provide the data voltage VDATA to the input PIN according to the source driving signal SN. In the present embodiment, the data writing circuit 120 includes a capacitor C1 and transistors T3 and T4. The capacitor C1 is coupled between the input PIN and the driving circuit 110. The first terminal of the transistor T3 is coupled to the system low voltage VSS, the second terminal of the transistor T3 is coupled to the input terminal PIN, and the control terminal of the transistor T3 receives the pre-stage source driving signal SN-1. The first terminal of the transistor T4 is coupled to the data voltage VDATA, the second terminal of the transistor T4 is coupled to the input terminal PIN, and the control terminal of the transistor T4 receives the source driving signal SN.
In another aspect, the voltage regulator 130 is coupled to the driving circuit 110 and the data writing circuit 120. The voltage regulator 130 has control terminals CT1 and CT2. The voltage regulator 130 can regulate the voltage passing through the control terminals CT1 and CT2 according to the light emission control signal EM, the source driving signal SN and the pre-stage source driving signal SN-1.
The voltage regulator 130 includes transistors T5 to T9. The first terminal of the transistor T5 is coupled to the input terminal PIN, the second terminal of the transistor T5 is coupled to the control terminal CT1, and the control terminal of the transistor T5 receives and transmits the light control signal EM. The first terminal of the transistor T6 is coupled to the reference voltage VREF2, the second terminal of the transistor T6 is coupled to the control terminal CT1, and the control terminal of the transistor T6 receives the pre-stage source driving signal SN-1. The first terminal of the transistor T7 is coupled to the reference voltage VREF1, the second terminal of the transistor T7 is coupled to the control terminal CT1, and the control terminal of the transistor T7 receives the source driving signal SN.
A first terminal of the transistor T8 (e.g., a driving transistor) is coupled to the system low voltage VSS, a second terminal of the transistor T8 is coupled to the control terminal CT2, and a control terminal of the transistor T8 is coupled to the control terminal CT1. The first terminal of the transistor T9 is coupled to the reference voltage VREF2, the second terminal of the transistor T9 is coupled to the control terminal CT2, and the control terminal of the transistor T9 receives the pre-stage source driving signal SN-1.
In particular, in the design of the transistors T1 to T9, the transistors T1 to T9 of the present embodiment may be P-type transistors, but the embodiment of the invention is not limited thereto. In addition, in the design of the system high voltage VDD, the system low voltage VSS, the reference voltage VREF1 and the reference voltage VREF2, the voltage values of the respective voltages may be sequentially the reference voltage VREF2, the system high voltage VDD, the reference voltage VREF1 and the system low voltage VSS from large to small.
Fig. 2 is a timing diagram of the pixel circuit of the embodiment of fig. 1 in accordance with the present invention. Referring to fig. 2, in the present embodiment, a pixel period TFR of the pixel circuit 100 can be divided into a reset period RP, a compensation and data writing period CDP, and a light emitting period EP. The pixel circuit 100 may sequentially operate in a reset phase RP, a compensation and data writing phase CDP, and a light emitting phase EP. The reset phase RP, the compensation and data writing phase CDP and the light emitting phase EP do not overlap each other.
For details of the implementation of the pixel circuit 100, please refer to fig. 2 and fig. 3A to 3C, and fig. 3A to 3C are equivalent circuit diagrams of the pixel circuit 100 according to the embodiment of fig. 1 in each stage. It should be noted that for convenience of illustration, the transistors that are turned off in fig. 3A to 3C are illustrated with a cross, and the transistors that are turned on are illustrated without a cross.
Referring to fig. 2 and fig. 3A, in the present embodiment, fig. 3A is an equivalent circuit diagram of the pixel circuit 100 operating at the reset stage RP. Specifically, in the reset period RP, the source driving signal SN and the emission control signal EM may be set to a high voltage pass, and the pre-stage source driving signal SN-1 may be set to a low voltage pass.
In detail, in the reset stage RP, the data writing circuit 120 can provide the system low voltage VSS to the input PIN through the conductive path of the transistor T3 according to the pulled-down pre-stage source driving signal SN-1, so that the voltage of the input PIN is correspondingly pulled down to a voltage value equal to the system low voltage VSS.
Then, the voltage regulator 130 can provide the reference voltage VREF2 to the control terminal CT1 through the conducting path of the transistor T6 according to the pulled-down pre-stage source driving signal SN-1. The voltage regulator 130 can provide the reference voltage VREF2 to the control terminal CT2 through the conducting path of the transistor T9 according to the pulled-down source driving signal SN-1. In this case, the voltage regulator 130 may cause the voltages of the control terminal CT1 and the control terminal CT2 to be correspondingly regulated to a voltage value equal to the reference voltage VREF 2.
After completing the reset operation of each node, please refer to fig. 2 and fig. 3B, in this embodiment, fig. 3B is an equivalent circuit diagram of the pixel circuit 100 during the compensation and data writing phase CDP. Specifically, in the compensation and data writing phase CDP, the pre-stage source driving signal SN-1 and the emission control signal EM may be set to a high voltage pass, and the source driving signal SN may be set to a low voltage pass.
In detail, in the compensation and data writing stage CDP, the data writing circuit 120 can provide the data voltage VDATA to the input PIN through the conducting path of the transistor T4 according to the pulled-down source driving signal SN, so that the voltage of the input PIN is pulled up to the voltage value of the data voltage VDATA.
Then, the voltage regulator 130 may provide the reference voltage VREF1 to the control terminal CT1 through the conduction path of the transistor T7 according to the pulled-down source driving signal SN, so that the voltage of the control terminal CT1 is pulled down to the voltage value of the reference voltage VREF 1.
It should be noted that, since the reference voltage VREF1 of the present embodiment is designed to be lower than the reference voltage VREF2 by a voltage value of the threshold voltage (Threshold Voltage) VTH8 of the at least one transistor T8, the transistor T8 of the voltage regulator 130 can be turned on according to the voltage passing through the control terminal CT1, and the voltage passing through the control terminal CT2 is pulled down to a voltage difference (i.e., VREF1-v VTH 8) between the voltage value of the reference voltage VREF1 and the voltage value of the threshold voltage VTH8 of the transistor T8.
Referring to fig. 2 and fig. 3C, in the present embodiment, fig. 3C is an equivalent circuit diagram of the pixel circuit 100 operating in the light emitting stage EP. Specifically, in the light emitting stage EP, the source driving signal SN and the pre-stage source driving signal SN-1 may be set to a high voltage pass, and the light emitting control signal EM may be set to a low voltage pass.
In detail, in the light emitting stage EP, the transistor T8 (e.g. the driving transistor) of the voltage regulator 130 can generate the driving current ID according to the voltage state of the control terminal CT1, and the driving circuit 110 can light the light emitting element LED through the conduction path of the transistor T1 according to the light emitting control signal EM and the driving current ID that are pulled down. In this case, the voltage regulator 130 may make the voltage of the control terminal CT2 pass through the voltage difference (i.e., VDD-VLED) between the voltage value of the system high voltage VDD and the voltage value of the on voltage VLED of the light emitting element LED.
On the other hand, the voltage regulator 130 may connect the input terminal PIN and the control terminal CT1 to each other through the conductive path of the transistor T5 according to the pulled-down light emission control signal EM. Then, based on the coupling effect of the capacitor C1 and the voltage states of the input terminal PIN and the control terminal CT1 during the compensation and data writing phase CDP, the voltage regulator 130 can further lower the voltage of the input terminal PIN and the control terminal CT1 to the voltage value of VDATA+ (VDD-VLED) - (VREF 1-VTH 8).
Therefore, when the pixel circuit 100 operates in the light emitting period TP and the transistor T8 operates in the saturation region, the transistor T8 can generate the driving current ID. At this time, the driving current ID flowing through the light emitting element LED can be expressed as follows:
ID＝K(VDATA-VREF1)^2
wherein, the ID is the current value of the driving current ID; k is a process parameter of the transistor T8; VDATA is a voltage value of the data voltage VDATA; VREF1 is the voltage value of the reference voltage VREF 1.
As can be seen from the above description, in the light emitting stage EP, the driving current ID generated by the pixel circuit 100 can be independent of the voltage values of the threshold voltage VTH8, the system high voltage VDD and the system low voltage VSS of the transistor T8, so that the pixel circuit 100 can effectively eliminate the offset of the threshold voltage of the transistor T8 due to the process variation, and the driving current ID is less susceptible to the line resistance in the paths of the system high voltage VDD and the system low voltage VSS.
In addition, since the transistor T1 controlled by the emission control signal EM is disposed between the light emitting element LED and the transistor T8 of the pixel circuit 100, the pixel circuit 100 of the present embodiment can effectively perform Multi-Pulse (Multi-Pulse) operation, so as to improve uniformity of the display screen.
Therefore, the pixel circuit 100 of the present embodiment can compensate the threshold voltage of the driving transistor by time sequence control, and effectively reduce the power consumption of the pixel circuit 100, thereby improving the quality of the display screen.
Fig. 4 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention. Referring to fig. 1 and fig. 4, in step S410, the pixel circuit provides a driving circuit to generate a driving current according to a light-emitting control signal. In step S420, the pixel circuit provides a data writing circuit having an input terminal, and the data writing circuit provides a data voltage to the input terminal according to the source driving signal. In step S430, the pixel circuit provides a voltage regulator having a first control terminal and a second control terminal, and the voltage regulator adjusts the voltages of the first control terminal and the second control terminal according to the light emitting control signal, the source driving signal and the pre-stage source driving signal.
Details of the implementation of each step are described in the foregoing embodiments and implementations, and are not repeated herein.
In summary, the pixel circuit according to the embodiments of the invention can compensate the threshold voltage of the driving transistor by time sequence control, and make the current magnitude of the driving current independent of the threshold voltage of the driving transistor, the system high voltage and the system low voltage. Therefore, the pixel circuit of the invention can effectively eliminate the offset of the critical voltage of the driving transistor caused by the process variation, and the driving current is less susceptible to error caused by the influence of the line resistance in the paths of the high voltage and the low voltage of the system.
Of course, the present invention is capable of other various embodiments and its several details are capable of modification and variation in light of the present invention, as will be apparent to those skilled in the art, without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (11)

1. A pixel circuit, comprising:
a driving circuit for generating a driving current according to a light emitting control signal;
the data writing circuit is provided with an input end, is coupled to the driving circuit and provides a data voltage to the input end according to a source electrode driving signal; and
the voltage regulator is coupled to the driving circuit and the data writing circuit and adjusts the voltage passing through the first control end and the second control end according to the light-emitting control signal, the source electrode driving signal and a pre-stage source electrode driving signal.
2. The pixel circuit of claim 1 wherein, in a reset phase, the data write circuit provides a system low voltage to the input terminal according to the pulled-down pre-stage source drive signal, and the voltage regulator provides a second reference voltage to the first control terminal and the second control terminal according to the pulled-down pre-stage source drive signal.
3. The pixel circuit of claim 1 wherein, in a compensation and data writing phase, the data writing circuit provides the data voltage to the input terminal according to the source driving signal being pulled down, and the voltage regulator provides a first reference voltage to the first control terminal and the second control terminal according to the source driving signal being pulled down to pull down the voltage passing through the first control terminal and the second control terminal.
4. The pixel circuit of claim 1 wherein, in a light emitting phase, the voltage regulator pulls down the voltages of the input terminal, the first control terminal and the second control terminal according to the pulled down light emission control signal, and the driving circuit generates the driving current according to the pulled down light emission control signal.
5. The pixel circuit of claim 1, wherein the driving circuit comprises:
a light-emitting element, the anode terminal of which is coupled to a system high voltage; and
the first end of the first transistor is coupled to the cathode end of the light-emitting element, the second end of the first transistor is coupled to the second control end, and the control end of the first transistor receives the light-emitting control signal.
6. The pixel circuit of claim 1, wherein the data write circuit comprises:
a first transistor having a first terminal coupled to a system low voltage, a second terminal coupled to the input terminal, and a control terminal receiving the pre-stage source driving signal;
a second transistor having a first terminal coupled to the data voltage, a second terminal coupled to the input terminal, and a control terminal receiving the source driving signal; and
and a capacitor coupled between the input terminal and the second control terminal.
7. The pixel circuit of claim 1, wherein the voltage regulator comprises:
a first transistor having a first end coupled to the input end, a second end coupled to the first control end, and a control end receiving the light emission control signal;
a second transistor having a first end coupled to a second reference voltage, a second end coupled to the first control end, and a control end receiving the pre-stage source driving signal;
a third transistor having a first end coupled to a first reference voltage, a second end coupled to the first control end, and a control end receiving the source driving signal;
a fourth transistor having a first terminal coupled to a system low voltage, a second terminal coupled to the second control terminal, and a control terminal coupled to the first control terminal; and
the first end of the fifth transistor is coupled to the second reference voltage, the second end of the fifth transistor is coupled to the second control end, and the control end of the fifth transistor receives the front-stage source electrode driving signal.
8. A driving method of a pixel circuit, comprising:
providing a driving circuit to generate a driving current according to a luminous control signal;
providing a data writing circuit with an input end, and enabling the data writing circuit to provide a data voltage to the input end according to a source electrode driving signal; and
providing a voltage regulator with a first control end and a second control end, and enabling the voltage regulator to regulate the voltage passing through the first control end and the second control end according to the light-emitting control signal, the source electrode driving signal and a front-stage source electrode driving signal.
9. The driving method as claimed in claim 8, further comprising:
in a reset stage, the data writing circuit provides a system low voltage to the input end according to the pulled-down front-stage source electrode driving signal, and the voltage regulator provides a second reference voltage to the first control end and the second control end according to the pulled-down front-stage source electrode driving signal.
10. The driving method as claimed in claim 8, further comprising:
in a compensation and data writing stage, the data writing circuit provides the data voltage to the input end according to the pulled-down source driving signal, and the voltage regulator provides a first reference voltage to the first control end and the second control end according to the pulled-down source driving signal so as to pull down the voltage passing through the first control end and the second control end.
11. The driving method as claimed in claim 8, further comprising:
in a lighting stage, the voltage regulator pulls down the voltage passing through the input end, the first control end and the second control end according to the pulled down lighting control signal, and the driving circuit generates the driving current according to the pulled down lighting control signal.
CN202311171012.6A 2023-03-25 2023-09-12 Pixel circuit and driving method thereof Pending CN117095630A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW112111358A TWI841322B (en) 2023-03-25 Pixel circuit and driving method thereof
TW112111358 2023-03-25

Publications (1)

Publication Number Publication Date
CN117095630A true CN117095630A (en) 2023-11-21

Family

ID=88775061

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311171012.6A Pending CN117095630A (en) 2023-03-25 2023-09-12 Pixel circuit and driving method thereof

Country Status (1)

Country Link
CN (1) CN117095630A (en)

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