TWI837911B - Circuit substrate having microfluidic channel and manufacturing method thereof - Google Patents

Abstract

A circuit substrate includes a circuit structure and a microfluidic channel layer. The circuit structure includes an embedded electronic device. The microfluidic channel layer is below the circuit structure and includes a microfluidic channel, a metal layer, and a cooling fluid. The microfluidic channel is below the embedded electronic device. The cooling fluid is disposed between the embedded electronic device and the microfluidic channel. The microfluidic channel is filled with the cooling fluid, in which the cooling fluid is used for cooling the embedded electronic device.

Description

Circuit substrate with microfluidic channel and manufacturing method thereof

The present invention relates to a circuit substrate with a microfluidic channel and a method for manufacturing the circuit substrate with a microfluidic channel, and in particular to a microfluidic channel through which a cooling fluid passes.

As fossil fuels become increasingly scarce, the electric vehicles and hybrid electric vehicles (HEVs) developed by the current automotive industry have the potential to become alternatives to traditional internal combustion engine vehicles. The embedded power modules in electric vehicles or hybrid electric vehicles can determine the performance, reliability and production cost of electric vehicles. However, the increase in power switches and power conduction in embedded power modules will generate a large amount of heat energy, resulting in the formation of hot spots in local areas of the circuit substrate in the embedded power module due to the accumulation of a large amount of heat energy, thereby reducing the overall performance of the electric vehicle. Therefore, current technology still finds it difficult to meet the heat dissipation requirements of embedded power modules.

Some embodiments of the present invention provide a circuit substrate with a microfluidic channel and a manufacturing method thereof to prevent the formation of hot spots to achieve effective thermal management. The microfluidic channel of the present invention is integrated into the circuit substrate, so no additional large space is required to set up heat dissipation components and other devices. Therefore, compared with the prior art, the circuit substrate of the present invention is smaller in size, has stable performance, increases service life, and reduces production costs.

At least one embodiment of the present invention provides a circuit substrate with a microfluidic channel, comprising a circuit structure and a channel layer. The circuit structure comprises a first embedded electronic component. The channel layer is located below the circuit structure and comprises a microfluidic channel, a metal layer, and a cooling fluid. The microfluidic channel is located below the first embedded electronic component. The metal layer is disposed between the first embedded electronic component and the microfluidic channel. The cooling fluid is filled in the microfluidic channel, wherein the cooling fluid is used to cool the first embedded electronic component.

In at least one embodiment of the present invention, the microfluidic channel has at least one turning point below the first embedded electronic component.

In at least one embodiment of the present invention, the circuit substrate with the microfluidic channel further includes a second embedded electronic component in the circuit structure. The second embedded electronic component is separated from the first embedded electronic component, and the microfluidic channel is located below the second embedded electronic component and has at least one turning point below the second embedded electronic component.

In at least one embodiment of the present invention, the turning point has a straight edge or an arc edge.

A method for manufacturing a circuit substrate with a microfluidic channel provided by at least one embodiment of the present invention comprises the following steps. A first dielectric layer is provided. A first metal layer is formed on the top surface of the first dielectric layer. An embedded electronic component is formed on the first metal layer. After the embedded electronic component is formed on the first metal layer, the first dielectric layer is patterned to form a groove, wherein the groove exposes the bottom surface of the first metal layer and multiple side walls of the first dielectric layer. A second metal layer is formed to cover the multiple side walls. A second dielectric layer is formed to cover the bottom surface of the first dielectric layer, and the groove forms a microfluidic channel.

In at least one embodiment of the present invention, after forming a first metal layer on a top surface of a first dielectric layer, a third dielectric layer is formed to surround the embedded electronic device and cover the top surface of the first metal layer.

In at least one embodiment of the present invention, before patterning the first dielectric layer to form the grooves, a circuit layer is formed on the embedded electronic device.

In at least one embodiment of the present invention, the second metal layer is formed by electroless plating and electric plating.

In at least one embodiment of the present invention, the step of forming the second dielectric layer includes covering the bottom surface of the first dielectric layer with a polymer layer or an adhesive layer.

In at least one embodiment of the present invention, after the microfluidic channel is formed, a cooling fluid is filled into the microfluidic channel.

In the following text, in order to clearly present the technical features of the present invention, the dimensions (e.g., length, width, thickness, and depth) of the components in the drawings (e.g., embedded electronic components, microfluidic channels, and various circuit layers, etc.) will be enlarged in unequal proportions, and the number of some components will be reduced. Therefore, the description and explanation of the embodiments below are not limited to the number of components in the drawings and the dimensions and shapes presented by the components, but should cover the dimensions, shapes, and deviations therefrom caused by actual processes and/or tolerances. For example, the flat surface shown in the drawings may have rough and/or nonlinear features, and the sharp corners shown in the drawings may be rounded. Therefore, the components presented in the drawings of the present invention are mainly used for illustration, and are not intended to accurately depict the actual shape of the components, nor are they intended to limit the scope of the patent application of the present invention.

Secondly, the words "approximately", "approximately" or "substantially" used in the present case not only cover the numerical values and numerical ranges clearly recorded, but also cover the permissible deviation range that can be understood by a person of ordinary skill in the art to which the invention belongs, wherein the deviation range can be determined by the error generated during measurement, and the error is caused by, for example, the limitation of the measurement system or the process conditions. In addition, "approximately" can mean within one or more standard deviations of the above numerical values, such as ±30%, ±20%, ±10% or ±5%. The words "approximately", "approximately" or "substantially" used in this text may select an acceptable range of deviation or standard deviation according to the optical, etching, mechanical or other properties, and do not apply a single standard deviation to all the above optical, etching, mechanical and other properties.

It will be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of the embodiments.

Please refer to FIG. 1 , which is a top view of a circuit substrate 100 of at least one embodiment of the present invention. The circuit substrate 100 includes a plurality of microfluidic channel connectors 110, a microfluidic channel 120, and a plurality of embedded electronic components, such as a first embedded electronic component (hereinafter referred to as embedded electronic component 130a) and a second embedded electronic component (hereinafter referred to as embedded electronic component 130b). The embedded electronic component 130a is located above the microfluidic channel 120. The microfluidic channel 120 is filled with a cooling fluid, wherein the cooling fluid can flow in the microfluidic channel 120 and can cool the heat energy generated by the embedded electronic component 130a. In addition, FIG. 1 does not indicate the cooling fluid, but FIG. 1 uses a straight arrow to indicate the flow direction of the cooling fluid in the microfluidic channel 120.

The cooling fluid is essentially a dielectric and less reactive material. In other words, the cooling fluid is an insulator with low chemical activity to suppress leakage or short circuit. In some embodiments, the cooling fluid can be, for example, mineral oil, synthetic oil, XSPC EC6, EK-EKOOLANT, ultrapure water or deionized water.

The microfluidic channel connector 110 includes an input microfluidic channel connector 110a and an output microfluidic channel connector 110b. The input microfluidic channel connector 110a is configured to inject cooling fluid into the microfluidic channel 120, while the output microfluidic channel connector 110b is configured to remove cooling fluid from the microfluidic channel 120.

Still referring to FIG. 1 , the input microfluidic channel connector 110a can connect the microfluidic channels 120 of two branches, and each microfluidic channel 120 also has multiple branches (not shown), and each branch is connected to the output microfluidic channel connector 110b after passing through the bent channel. The microfluidic channel 120 is configured to guide the cooling fluid. It should be noted that the number and configuration of the microfluidic channel connector 110, microfluidic channel 120 and embedded electronic component 130a shown in FIG. 1 are not intended to limit the content of the present invention, and other numbers or configurations should be included in the scope of implementation of the present invention. For example, the number of the microfluidic channel connector 110, microfluidic channel 120 and embedded electronic component 130a included in the circuit substrate 100 in other embodiments may be only one.

FIG. 2 is a partial enlarged top view of the region R of FIG. 1 including the embedded electronic component 130a and the microfluidic channel 120. The straight arrows in the following figure indicate the flow direction of the cooling fluid in the microfluidic channel 120. The microfluidic channel 120 includes an input section _120in , a turning section _120t1 , _120t2 , and an output section _120out , which respectively represent the positions of the microfluidic channel 120 at the cooling fluid inflow, the first turning section, the second turning section, and the outflow section. The curved arrow indicates the direction of the heat energy dissipation of the embedded electronic component 130a. It should be noted that the embedded electronic components 130a and 130b may be, for example, surface mount devices (SMD), embedded power modules, or other components that emit heat sources.

As shown in FIG. 2 , the heat source of the embedded electronic component 130a is emitted from all directions, and the cooling fluid in the microfluidic channel 120 is input from the right side. After heat exchange is performed in the two turning points of the microfluidic channel 120 below the embedded electronic component 130a, the cooling fluid leaves from the left side. In this embodiment, the turning sections 120 _t1 and 120 _t2 of the microfluidic channel 120 at the turning point may have straight line edges. The setting of the turning point can slow down the cooling fluid rate and increase the heat exchange time between the cooling fluid and the embedded electronic component 130a, thereby improving the cooling efficiency. The following FIG. 3A and FIG. 3B will explain in detail the flow relationship between heat energy and cooling fluid.

FIG3A is a cross-sectional view taken along line A-A' in FIG2 . FIG3B is a cross-sectional view taken along line B-B' in FIG2 . The circuit substrate 100 in FIG3A and FIG3B both show a channel layer 310 and a circuit structure 320 located above the channel layer 310. The microfluidic channel 120 is located in the channel layer 310, and the embedded electronic component 130a is located in the circuit structure 320. For the sake of clarity, the channel layer 310 and the circuit structure 320 are not shown or labeled in FIG1 , FIG2 , and FIG4 . Please further refer to FIG3A and FIG11C , the circuit structure 320 includes an embedded electronic component 610 and a plurality of wiring layers (e.g., wiring layer 710) located above the embedded electronic component 610. It is worth mentioning that these circuit layers are electrically connected to the embedded electronic components 610 through multiple conductive blind vias (not shown).

As shown in FIG3A and FIG3B , the input section 120 _in , the turning sections 120 _t1 , 120 _t2 and the output section 120 _out of the microfluidic channel are all located below the embedded electronic component 130 a. Specifically, the projection of the embedded electronic component 130 a on the channel layer 310 overlaps the projection of the input section 120 _in , the turning sections 120 _t1 , 120 _t2 and the output section 120 _out on the channel layer 310. More specifically, the projection of the turning sections 120 _t1 , 120 _t2 on the channel layer 310 is within the projection of the embedded electronic component 130 a on the channel layer 310.

Please refer to FIG. 3A and FIG. 3B . Since the cooling fluid flowing in the microfluidic channel 120 has a lower temperature than the embedded electronic component 130a, the cooling fluid flowing through the input section _120in , the turning sections _120t1 , _120t2 and the output section _120out of the microfluidic channel 120 can remove the heat energy of the embedded electronic component 130a by means of heat conduction and heat convection, so that the temperature of the embedded electronic component 130a can be cooled down, and the generation of hot spots in the embedded electronic component 130a can be prevented, thereby avoiding performance degradation.

Please refer to FIG. 1 again. The multiple embedded electronic components (e.g., embedded electronic component 130a and embedded electronic component 130b) in FIG. 1 are separated from each other, and the microfluidic channel 120 under each embedded electronic component has at least one turn (e.g., turn segments 120 _t1 and 120 _t2 in FIG. 2 ). The microfluidic channel 120 passes under these embedded electronic components so that the cooling fluid can take away the heat energy of these embedded electronic components, thereby preventing the embedded electronic components from being degraded due to overheating.

FIG4 is a partial enlarged top view of a microfluidic channel 120A of an alternative embodiment of the present invention. The microfluidic channel 120A includes an input section _120in , turning sections _120t1 , _120t2 , _120t3 , _120t4 , and an output section _120out . In this embodiment, the turning sections _120t1 , _120t2 , _120t3 , _120t4 have arc edges. The microfluidic channel 120A can be applied to larger embedded electronic components 130a and 130b.

It should be understood that the shape and number of the above-mentioned turning points can be set according to actual needs, and the flow rate of the cooling fluid can also be adjusted according to actual needs to achieve the effect of cooling the embedded electronic components 130a and 130b. The size, area and number of turning points of the microfluidic channels 120, 120A can be adjusted according to the size of the embedded electronic components 130a and 130b and the heat energy that needs to be dissipated.

5 to 11C are schematic diagrams of a method for manufacturing circuit substrates 1100A, 1100B, and 1100C of some embodiments of the present invention. Referring to FIG5 , a first dielectric layer (hereinafter referred to as dielectric layer 510) is provided. Metal layers 520 and 530 are disposed on opposite surfaces of the dielectric layer 510. The first metal layer (hereinafter referred to as metal layer 520) in FIG5 has a patterned structure after exposure, development, and etching, and the top surface 510t of the dielectric layer 510 is exposed. After the metal layer 520 is patterned (e.g., exposed, developed, and etched), a conductive layer 540 is formed above the metal layer 520. The conductive layer 540 may be, for example, a silver metal layer or a conductive glue layer. Metal layers 520 and 530 may be, for example, copper metal layers. Metal layer 520 may be formed by electroless plating and electrolytic plating.

Please refer to FIG. 6 , the embedded electronic element 610 is formed on the conductive layer 540 by using the stacking process of the embedded electronic element, and a third dielectric layer (hereinafter referred to as the dielectric layer 620) is provided, so that the dielectric layer 620 surrounds the embedded electronic element 610 and covers the top surface 520t of the metal layer 520 and the top surface 510t of the dielectric layer 510.

Please refer to FIG. 7 . A plurality of circuit layers 710 and dielectric layers 711 are stacked one on top of the embedded electronic element 610 by stacking process, wherein two adjacent circuit layers 710 can be electrically connected to each other by conductive blind vias. The circuit layer 710 can be electrically connected to the embedded electronic element 610 or other electronic elements (not shown). It should be noted that these circuit layers 710 and dielectric layers 711, the embedded electronic element 610, the dielectric layer 620 and the conductive layer 540 can form a circuit structure (e.g., circuit structure 320).

Referring to FIG. 8 , the dielectric layer 510 is patterned to form a plurality of grooves 810 , wherein each groove 810 exposes the bottom surface 520 b of the metal layer 520 and a plurality of sidewalls 510 s of the dielectric layer 510 . In the present embodiment, the grooves 810 may be formed by etching, routing, or laser ablation. In addition, as shown in FIG. 8 , the sidewalls 510 s of the dielectric layer 510 are substantially coplanar with the sidewalls 530 s of the metal layer 530 .

Referring to FIG. 9 , a second metal layer (hereinafter referred to as metal layer 910 ) is formed to cover the sidewall 510s of the dielectric layer 510 . Specifically, the metal layer 910 also covers the sidewall 530s of the metal layer 530 . In this embodiment, the metal layer 910 is formed by electroless plating and electroplating.

FIG. 10A, FIG. 10B and FIG. 10C are three embodiments after FIG. 9, in which the microfluidic channel 1040 is formed by covering the groove 810. In addition, the microfluidic channel connector 110 and the microfluidic channel 120 are independent channels, which have a certain sealing effect without the problem of cooling fluid leakage.

The difference between the embodiments of FIG. 10A, FIG. 10B and FIG. 10C lies in the formation method of the second dielectric layer (hereinafter referred to as dielectric layer 1020) and the metal layer 1030. Referring to FIG. 10A, the dielectric layer 1020 and the metal layer 1030 are stacked (or bonded) under the dielectric layer 510 and the groove 810 (marked in FIG. 9) through the polymer layer 1010, so that the groove 810 originally having an opening forms a microfluidic channel 1040. In detail, the polymer layer 1010 covers the metal layer 530 and covers the bottom surface 510b of the dielectric layer 510, so that the side wall and the top surface of the microfluidic channel 1040 in FIG. 10A are metal material layers, and the bottom surface is a dielectric material layer.

Referring to FIG. 10B , the metal layer 1050, the dielectric layer 1020, and the metal layer 1030 are stacked under the dielectric layer 510 and the groove 810 (shown in FIG. 9 ) through the polymer layer 1010, so that the groove 810 originally having an opening forms the microfluidic channel 1040. Specifically, part of the metal layer 1050 contacts the metal layer 530. All surfaces of the microfluidic channel 1040 (including the side walls and the upper and lower surfaces) are metal material layers. The polymer layer 1010 surrounds the metal layers 530 and 1050 and is disposed between the bottom surface 510b of the dielectric layer 510 and the metal layer 1050, wherein the polymer layer 1010 covers the bottom surface 510b of the dielectric layer 510.

Referring to FIG. 10C , the metal layer 1050, the dielectric layer 1020, and the metal layer 1030 are stacked (or bonded) below the dielectric layer 510 and the groove 810 (shown in FIG. 9 ) through the polymer layer 1010 and the adhesive layer 1060, so that the groove 810 originally having an opening forms the microfluidic channel 1040. Specifically, the adhesive layer 1060 is disposed between the metal layer 530 and a portion of the metal layer 1050. The polymer layer 1010 surrounds the metal layer 530, the metal layer 1050 and the adhesive layer 1060, and is disposed between the bottom surface 510b of the dielectric layer 510 and the metal layer 1050, wherein the polymer layer 1010 covers the bottom surface 510b of the dielectric layer 510. In one embodiment, the adhesive layer 1060 may be, for example, silver glue. In addition, in the embodiments of FIG. 10A, FIG. 10B and FIG. 10C above, the polymer layer 1010 may be, for example, a low flow prepreg or a no flow prepreg.

FIG. 11A, FIG. 11B, and FIG. 11C are three embodiments after FIG. 10A, FIG. 10B, and FIG. 10C, respectively. Specifically, a conductive via 1110 is formed in the structure in FIG. 10A, FIG. 10B, and FIG. 10C, so that the topmost circuit layer 710 is electrically connected to the bottommost metal layer 1030. After forming the circuit substrates 1100A, 1100B, and 1100C in FIG. 11A, FIG. 11B, and FIG. 11C, a cooling fluid is filled in the microfluidic channel 1040.

Still referring to the circuit substrates 1100A, 1100B, 1100C of FIG. 11A, FIG. 11B and FIG. 11C. It should be noted that the layer including the microfluidic channel 1040 in this case is called a channel layer (similar to the aforementioned channel layer 310). The metal layer 520 is disposed between the embedded electronic component 610 and the microfluidic channel 1040. The cooling fluid in the microfluidic channel 1040 can directly take away the heat energy from the heat source (i.e., the embedded electronic component 610) through the metal layer 520, so that the performance of the embedded electronic component 610 can be maintained or improved. The cooling fluid in this case can remove heat energy and reduce the heat energy accumulated in the circuit substrates 1100A, 1100B, and 1100C, thereby reducing the risk of hot spots forming due to long-term operation and improving the overall performance of the circuit substrate.

In some embodiments of the present invention, considering the balance between the microfluidic channel 1040 and the circuit layer 710 on both sides of the circuit substrate 1100A, 1100B, 1100C, the material of the microfluidic channel 1040 (e.g., metal layers 520, 910, 1050) may be the same as the metal material in the circuit layer 710. In other embodiments, when the microfluidic channel 1040 and the circuit layer 710 on both sides of the circuit substrate 1100A, 1100B, 1100C are balanced, the material of the microfluidic channel 1040 may be different from the metal material in the circuit layer 710. When the two sides are balanced, the warping of the circuit substrate 1100A, 1100B, 1100C can be avoided.

The circuit substrate of the present invention has a microfluidic channel integrated therein, so compared to the structure that requires additional space to set up a heat dissipation element, the circuit substrate of this case is smaller in size and has a cooling channel that avoids the formation of hot spots. The cooling fluid of this case can directly take away the heat energy from the heat source to maintain or improve the performance of the embedded electronic components, thereby increasing the life of the circuit substrate. In addition, the metal layer between the embedded electronic components and the microfluidic channel of this case can protect the cooling fluid from contacting other circuit layers that transmit electrical signals.

Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the patent application attached hereto.

100: Circuit board

110: Microfluidic channel connector

110a: Input microfluidic channel connector

110b: Output microfluidic channel connector

120: Microfluidic channel

120A: Microfluidic channel

130a, 130b: Embedded electronic components

120 _in : Input segment

120 _t1 ,120 _t2 ,120 _t3 ,120 _t4 : turning section

120 _out : output section

510: Dielectric layer

510s: Sidewall

510b: bottom surface

510t: Top surface

520:Metal layer

520b: bottom surface

520t: Top surface

530:Metal layer

530s: Sidewall

540: Conductive layer

610:Embedded electronic components

620: Dielectric layer

710: Circuit layer

711: Dielectric layer

810: Groove

910:Metal layer

1010:Polymer layer

1020: Dielectric layer

1030: Metal layer

1040: Microfluidic channel

1050:Metal layer

1060: Adhesive layer

1100A, 1100B, 1100C: Circuit board

1110: Conductive via

R: Region

A-A’: line

B-B’: line

FIG. 1 is a top view of a circuit substrate of at least one embodiment of the present invention. FIG. 2 is a partially enlarged top view of a region of FIG. 1 containing embedded electronic components and microfluidic channels. FIG. 3A is a cross-sectional view along line A-A’ in FIG. 2. FIG. 3B is a cross-sectional view along line B-B’ in FIG. 2. FIG. 4 is a partially enlarged top view of a microfluidic channel of an alternative embodiment of the present invention. FIG. 5 to FIG. 11C are schematic diagrams of a method for manufacturing a circuit substrate of some embodiments of the present invention.

Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

510: Dielectric layer

520:Metal layer

610:Embedded electronic components

710: Circuit layer

711: Dielectric layer

1030: Metal layer

1040: Microfluidic channel

1100A: Circuit board

1110: Conductive via

Claims (10)

A circuit substrate with a microfluidic channel comprises: a circuit structure comprising a first embedded electronic component and a plurality of wiring layers, wherein the wiring layer is located above the first embedded electronic component, wherein the wiring layer is electrically connected to the first embedded electronic component through a plurality of conductive blind vias; and a channel layer located below the circuit structure, wherein the channel layer comprises: a microfluidic channel located below the first embedded electronic component; a metal layer disposed between the first embedded electronic component and the microfluidic channel; and a cooling fluid filled in the microfluidic channel, wherein the cooling fluid is used to cool the first embedded electronic component. A circuit substrate as described in claim 1, wherein the microfluidic channel has at least one turning point below the first embedded electronic component. The circuit substrate as described in claim 1 further comprises: a second embedded electronic element located in the circuit structure, wherein the second embedded electronic element is separated from the first embedded electronic element, the microfluidic channel is located below the second embedded electronic element, and has at least one turning point below the second embedded electronic element. A circuit substrate as described in claim 3, wherein the turning point has a straight edge or an arc edge. A method for manufacturing a circuit substrate having a microfluidic channel comprises: providing a first dielectric layer; forming a first metal layer on a top surface of the first dielectric layer; forming an embedded electronic component on the first metal layer; after forming the embedded electronic component on the first metal layer, patterning the first dielectric layer to form a groove, wherein the groove exposes a bottom surface of the first metal layer and a plurality of side walls of the first dielectric layer; forming a second metal layer covering the plurality of side walls; and forming a second dielectric layer to cover a bottom surface of the first dielectric layer, and forming the groove into a microfluidic channel. A manufacturing method as described in claim 5, wherein after forming the first metal layer on the top surface of the first dielectric layer, a third dielectric layer is formed to surround the embedded electronic component and cover a top surface of the first metal layer. A manufacturing method as described in claim 5, wherein before patterning the first dielectric layer to form the groove, a circuit layer is formed on the embedded electronic component. A manufacturing method as described in claim 5, wherein the second metal layer is formed by using an electroless plating process and an electric plating process. The manufacturing method as described in claim 5, wherein the step of forming the second dielectric layer includes covering the bottom surface of the first dielectric layer with a polymer layer or an adhesive layer. A manufacturing method as described in claim 5, wherein after forming the microfluidic channel, a cooling fluid is filled into the microfluidic channel.

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