TWI835578B - Optoelectronic tweezer device and fabrication method thereof - Google Patents

Abstract

An optoelectronic tweezer device includes a transparent substrate, a semiconductor layer, a first electrode, an insulating structure and a reflective layer. The semiconductor layer is located above the transparent substrate and includes a first doped region, a second doped region and a transition region. The transition region is located between the first doped region and the second doped region. The first electrode is located on and electrically connected to the first doped region. The insulating structure is located on the transition region. The insulating structure has a first opening overlapping the first electrode along the normal direction of the transparent substrate. The reflective layer is located on the insulating structure and has a second opening overlapping the first opening in the normal direction.

Description

Optical tweezers device and manufacturing method thereof

The invention relates to an optical tweezers device and a manufacturing method thereof.

Optoelectronic Tweezer (OET) is a tool for manipulating tiny particles (such as semiconductor particles, metal particles, metal nanowires, biological cells or other particles). In general, the operation of optical tweezers can be performed with a highly focused laser beam. Nano- or micron-sized dielectric particles can be manipulated by the force generated by the laser beam. Optical tweezers operate in a non-mechanical contact manner, and can reduce damage to the particles to be clamped by the optical tweezers by selecting the appropriate wavelength of laser. Therefore, many biotechnology studies rely on optical tweezers to manipulate single cells.

The invention provides an optical tweezers device that can increase the photocurrent generated after being irradiated by light.

The invention provides a manufacturing method of an optical tweezers device, which can save the production cost of the optical tweezers device.

At least one embodiment of the present invention provides an optical tweezers device, which includes a transparent substrate, a semiconductor layer, a first electrode, an insulating structure and a reflective layer. The semiconductor layer is located on the transparent substrate and includes a first doped region, a second doped region and a transition region. The transition region is located between the first doped region and the second doped region. The first electrode is located on the first doping region and is electrically connected to the first doping region. The insulating structure is located on this transition zone. The insulation structure has a first opening overlapping the first electrode in a normal direction of the transparent substrate. The reflective layer is located on the insulating structure and has a second opening overlapping the first opening in a normal direction.

At least one embodiment of the present invention provides a method for manufacturing an optical tweezers device, including the following steps. A semiconductor material layer is formed on the transparent substrate. A doping process is performed on the semiconductor material layer to form a semiconductor layer including a first doped region, a second doped region and a transition region, wherein the transition region is located between the first doped region and the second doped region. An insulating structure is formed on the transition region of the semiconductor layer, wherein the insulating structure has a first opening. A conductive layer is formed on the insulating structure and the semiconductor layer, wherein the conductive layer includes a first electrode located on the first doped region and a reflective layer located on the insulating structure. The first opening of the insulation structure overlaps the first electrode in the normal direction of the transparent substrate, and the reflective layer has a second opening that overlaps the first opening in the normal direction.

10,20,30,40,50: Optical tweezers device

100:Transparent base

110,110A,110B,110C: semiconductor layer

110a: Semiconductor material layer

112,112a,112A,112B,112C: first doped region

114,114B,114C: Transition area

116,116A,116B,116C: second doped region

120,220: Insulation structure

120a: Insulating material layer

130: Dielectric layer

132: First through hole

200:Buffer solution

222a: first insulating material layer

224a: Second insulating material layer

222b: Patterned first insulating material layer

224b: Patterned second insulating material layer

300: Particles/Induced Polarization Particles

400: Counter electrode

D1: first direction

D2: second direction

E1: first electrode

E2: second electrode

E3: Reflective layer

LF: flow direction

LS: beam

ND: normal direction

O1: First opening

O2: Second opening

PR1: First veil pattern

PR2: Second veil pattern

PR3: The third veil pattern

R1: The first area

R2:Second area

R3: The third area

Ta, Tb: thickness

W1,W2,Wa,Wb: Width

1A is a schematic cross-sectional view of an optical tweezers device according to an embodiment of the present invention.

Figure 1B is a schematic top view of the optical tweezers device of Figure 1A.

Figure 2 is a schematic cross-sectional view of an optical tweezers device according to an embodiment of the present invention.

3A to 9A are schematic cross-sectional views of a manufacturing method of an optical tweezers device according to an embodiment of the present invention.

Figures 3B to 9B are schematic top views of the structures of Figures 3A to 9A.

Figure 10 is a schematic cross-sectional view of an optical tweezers device according to an embodiment of the present invention.

Figure 11 is a schematic cross-sectional view of an optical tweezers device according to an embodiment of the present invention.

Figure 12 is a schematic cross-sectional view of an optical tweezers device according to an embodiment of the present invention.

13 to 17 are schematic cross-sectional views of a method for manufacturing an optical tweezers device according to an embodiment of the present invention.

FIG. 1A is a schematic cross-sectional view of an optical tweezers device 10 according to an embodiment of the present invention. Figure 1B is a schematic top view of the optical tweezers device in Figure 1A, where Figure 1A corresponds to the position of line a-a' in Figure 1B. FIG. 1B shows the first electrode E1, the second electrode E2 and the reflective layer E3, and other components are omitted.

Referring to FIGS. 1A and 1B , the optical tweezers device 10 includes a transparent substrate 100 , a semiconductor layer 110 , a first electrode E1 , an insulating structure 120 and a reflective layer E3 . In this embodiment, the optical tweezers device 10 further includes a second electrode E2, a dielectric layer 130, a buffer solution 200, a plurality of particles 300, and a counter electrode 400. In some embodiments, optical tweezers The device 10 is a self-locking optical tweezer (SLOT) device.

The material of the transparent substrate 100 includes, for example, glass, quartz, organic polymer or other applicable materials. Compared with using a silicon wafer as the substrate, selecting the transparent substrate 100 can save the production cost of the optical tweezers device 10 .

The semiconductor layer 110 is located on the transparent substrate 100 . In some embodiments, the material of the semiconductor layer 110 includes, for example, polycrystalline silicon, amorphous silicon, single crystal silicon or other suitable materials. The semiconductor layer 110 includes a first doped region 112, a second doped region 116, and a transition region 114, where the transition region 114 is located between the first doped region 112 and the second doped region 116.

The plurality of first doped regions 112 are separated from each other. In some embodiments, the first doped regions 112 are arrayed on the transparent substrate 100. For example, the vertical projection of the first doped regions 112 on the transparent substrate 100 is a circle, an ellipse, a triangle, or a quadrilateral. , pentagon, hexagon or other geometric shapes, and the plurality of first doped regions 112 are arrayed on the transparent substrate 100 along the first direction D1 and the second direction D2. FIG. 1A shows two first doped regions 112 in the optical tweezers device 10, but the number of the first doped regions 112 can be adjusted according to actual needs. In some embodiments, the width W1 of the first doped region 112 is 2 microns to 100 microns.

The transition regions 114 are separated from each other, and each transition region 114 surrounds a corresponding first doping region 112 . In some embodiments, the transition region 114 and the first doping region 112 are in the shape of concentric circles, but the invention is not limited thereto. In other embodiments, the first doped region 112 may include a shape other than a circle, and the shape of the transition region 114 changes with the shape of the first doped region 112 . In some embodiments, transition region 114 The width W2 is 2 microns to 20 microns.

The second doped region 116 surrounds the plurality of transition regions 114 . In this embodiment, the second doped region 116 is a continuous structure, and the transition region 114 and the first doped region 112 are distributed in the second doped region 116 .

In some embodiments, one of the first doped region 112 and the second doped region 116 is a P-type semiconductor, and the other one of the first doped region 112 and the second doped region 116 is an N-type semiconductor. , and the transition region 114 is an intrinsic semiconductor or a lightly doped semiconductor with a purity close to that of the intrinsic semiconductor. Therefore, the semiconductor layer 110 includes a plurality of PIN diodes composed of the first doped region 112 , the transition region 114 and the second doped region 116 .

A plurality of insulating structures 120 are located on the transition region 114 of the semiconductor layer 110 . Each insulation structure 120 is disposed on a corresponding transition region 114 , and the plurality of insulation structures 120 are separated from each other. In this embodiment, the insulation structure 120 is annular, but the invention is not limited thereto. The shape of the insulating structure 120 depends on the shape of the transition region 114 . In some embodiments, the shape of the insulating structure 120 projected vertically onto the transparent substrate 100 is approximately equal to the shape of the transition region 114 projected vertically onto the transparent substrate 100 .

The insulation structure 120 has a first opening O1 overlapping the first doped region 112 of the semiconductor layer 110 in the normal direction ND of the transparent substrate 100 . In this embodiment, the insulation structure 120 surrounds the first opening O1. In other words, the first opening O1 is laterally closed by the insulation structure 120 . In other embodiments, the insulating structure 120 does not completely surround the first opening O1. The width of the bottom of the first opening O1 is greater than, equal to, or less than the width W1 of the first doped region 112 . When the width of the bottom of the first opening O1 is greater than the width W1 of the first doped region 112 so that part of the transition region 114 is not insulated. When covered with 120, the semiconductor layer 110 will have the risk of leakage. When the width of the bottom of the first opening O1 is smaller than the width W1 of the first doped region 112 so that part of the first doped region 112 is covered by the insulating structure 120 , the polarization effect on the particles 300 will be reduced. Therefore, the width of the bottom of the first opening O1 is preferably equal to the width W1 of the first doped region 112 .

In FIG. 1A , the insulating structure 120 is shown as a single layer, but the present invention is not limited thereto. The insulation structure 120 may be a single-layer or multi-layer structure. In some embodiments, the material of the insulating structure 120 includes, for example, silicon oxide, silicon nitride, silicon oxynitride, or other suitable materials or a combination of the above materials.

In some embodiments, the first electrodes E1 are arrayed on the semiconductor layer 110 along the first direction D1 and the second direction D2, but the invention is not limited thereto. In other embodiments, the first electrodes E1 are arrayed on the semiconductor layer 110 in other arrangements. The first electrode E1 is located on the first doped region 112 and is electrically connected to the first doped region 112 . The insulating structure 120 surrounds the first electrode E1. In this embodiment, the first electrode E1 is directly formed on the first doped region 112 . In this embodiment, the first electrode E1 has an island-shaped structure, and each first electrode E1 overlaps a corresponding first doping region 112 . In some embodiments, the sidewall of the first electrode E1 is substantially aligned with the boundary of the first doped region 112, but the present invention is not limited thereto. In other embodiments, the sidewalls of the first electrode E1 are offset from the boundary of the first doped region 112 .

The second electrode E2 is located on the second doped region 116 and is electrically connected to the second doped region 116 . In this embodiment, the second electrode E2 is directly formed on the second doped region 116 . The second electrode E2 surrounds the insulating structure 120 . In this embodiment, the second electrical The pole E2 is a continuous structure, and the second electrode E2 surrounds the island-shaped first electrode E1. In some embodiments, the sidewall of the second electrode E2 is substantially aligned with the boundary of the second doped region 116, but the present invention is not limited thereto. In other embodiments, the sidewalls of the second electrode E2 are offset from the boundary of the second doped region 116 .

The reflective layer E3 is located on the insulation structure 120 and is separated from the first electrode E1 and the second electrode E2. In some embodiments, the reflective layer E3 is annular, but the invention is not limited thereto. The shape of the reflective layer E3 depends on the shape of the top surface of the insulation structure 120 . In some embodiments, the shape of the reflective layer E3 projected vertically onto the transparent substrate 100 is approximately equal to the shape of the insulating structure 120 projected vertically onto the transparent substrate 100 . The reflective layer E3 has a second opening O2 overlapping the first opening O1 in the normal direction ND. In this embodiment, the reflective layer E3 surrounds the second opening O2. In other words, the second opening O2 is laterally closed by the reflective layer E3. In other embodiments, the reflective layer E3 does not completely surround the second opening O2. In some embodiments, the sidewalls of the reflective layer E3 are substantially aligned with the sidewalls of the insulating structure 120, but the present invention is not limited thereto. In other embodiments, the sidewalls of the reflective layer E3 are offset from the sidewalls of the insulating structure 120 .

The first electrode E1, the second electrode E2 and the reflective layer E3 may have a single-layer or multi-layer structure. The materials of the first electrode E1, the second electrode E2 and the reflective layer E3 include metal or other suitable materials with conductive and reflective properties. In some embodiments, the first electrode E1, the second electrode E2 and the reflective layer E3 belong to the same conductive layer. In other words, the first electrode E1, the second electrode E2 and the reflective layer E3 are formed through the same deposition process. In some embodiments, the first electrode E1, the second electrode E2, and the reflective layer E3 include the same material. In some embodiments, the insulating structure 120 The thickness is greater than the thickness of the first electrode E1, the thickness of the second electrode E2 and the thickness of the reflective layer E3.

The dielectric layer 130 is located on the semiconductor layer 110 . In this embodiment, the dielectric layer 130 is formed on the second electrode E2, the reflective layer E3 and the insulating structure 120. The dielectric layer 130 covers the top surface of the second electrode E2 and the top surface of the reflective layer E3. The dielectric layer 130 has a first through hole 132 overlapping the first opening O1 and the second opening O2 in the normal direction ND. In some embodiments, the dielectric layer 130 is made of silicon oxide, silicon nitride, silicon oxynitride, organic materials, or other suitable materials.

The first through hole 132 exposes at least part of the top surface of the first electrode E1. In this embodiment, the dielectric layer 130 has a plurality of first through holes 132 in an array, and each first through hole 132 overlaps a corresponding first electrode E1. In some embodiments, the width of the first through hole 132 , the width of the first opening O1 and the width of the second opening O2 are the same as each other, but the invention is not limited thereto. In other embodiments, the width of the first through hole 132 is smaller than the width of the first opening O1 and the width of the second opening O2. In addition, although in FIG. 1A , the dielectric layer 130 is not filled in the first opening O1 and the second opening O2, the present invention is not limited thereto. In other embodiments, the dielectric layer 130 is filled in the first opening O1 and the second opening O2. In some embodiments, the width of the first through hole 132 is 2 microns to 100 microns.

The counter electrode 400 overlaps the plurality of first electrodes E1. In some embodiments, the counter electrode 400 includes a light-transmissive material (such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium gallium zinc oxide, organic conductive material, or other suitable materials or stacked layers of the above materials) or opaque materials (such as such as metal).

The buffer solution 200 is located between the counter electrode 400 and the first electrode E1. The buffer solution 200 is located between the counter electrode 400 and the dielectric layer 130 . In some embodiments, the buffer solution 200 is filled into the first through hole 132 of the dielectric layer 130 , and the buffer solution 200 contacts the counter electrode 400 , the first electrode E1 and the dielectric layer 130 . In some embodiments, the buffer solution 200 is, for example, a physiological buffer solution or other buffer solution (eg, isotonic buffer solution). A plurality of particles 300 are located in the buffer solution 200 . The particles 300 may be biological particles, organic particles or inorganic particles. The particle size of the particles 300 ranges from 2 microns to 100 microns.

In some embodiments, an alternating current is applied at a frequency on the counter electrode 400 and the first electrode E1 to generate an electric field between the counter electrode 400 and the first electrode E1. The induced polarization particles 300 will be attracted to the first through hole 132 of the dielectric layer 130 overlapping the first electrode E1 due to dielectrophoretic force.

Referring to FIG. 2 , the required induced polarization particles 300 are selected, and the position of the semiconductor layer 110 below the selected induced polarization particles 300 is irradiated with the light beam LS. The light beam LS enters the optical tweezers device 10 from the side of the transparent substrate 100 facing away from the semiconductor layer 110 .

In some embodiments, the light beam LS illuminates the PIN diode beneath the selected first electrode E1. LS diameters range from 2 microns to 120 microns. For example, the light beam LS irradiates the first doped region 112 and the transition region 114 to cause the PIN diode under the selected induced polarization particles 300 to generate a photocurrent and reverse the dielectric of the selected induced polarization particles 300 The direction of the swimming force causes the selected induced polarization particles 300 to be repelled and leave the first through hole 132 of the dielectric layer 130 . In some embodiments, buffer solution 200 Flow along the flow direction LF, therefore, the induced polarization particles 300 leaving the first through hole 132 will flow downstream along the buffer solution 200 . In some embodiments, the induced polarization particles 300 flowing downstream are collected and analyzed, but the invention is not limited thereto. In other embodiments, the induced polarization particles 300 remaining on the first through hole 132 are collected and analyzed.

In some embodiments, the light beam LS includes laser light, ultraviolet light, visible light or other suitable light.

In some embodiments, the light beam LS passing through the transparent substrate 100, the transition region 114 and the insulating structure 120 can be reflected by the reflective layer E3 and return to the semiconductor layer 110. Therefore, the semiconductor layer 110 can generate a larger photocurrent. In some embodiments, the ratio of photocurrent to dark current generated by semiconductor layer 110 is greater than or equal to two orders of magnitude.

The doping form of the semiconductor layer 110 will affect the direction of the current generated after the PIN diode is illuminated. In this embodiment, the first doped region 112 is an N-type semiconductor, the second doped region 116 is a P-type semiconductor, and the surface of the induced polarization particles 300 is negatively charged. In other embodiments, the first doped region 112 is a P-type semiconductor, the second doped region 116 is an N-type semiconductor, and the surface of the induced polarization particle 300 is positively charged.

3A to 9A are schematic cross-sectional views of a manufacturing method of an optical tweezers device according to an embodiment of the present invention. Figures 3B to 9B are schematic top views of the structures of Figures 3A to 9A. It must be noted here that the embodiments of FIGS. 3A to 9B follow the component numbers and part of the content of the embodiments of FIGS. 1A , 1B and 2 , where the same or similar numbers are used to represent the same or similar elements, and Omitting the same skills Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Referring to FIGS. 3A and 3B , a semiconductor material layer 110 a is formed on the transparent substrate 100 . In this embodiment, since the semiconductor material layer 110a is located on the transparent substrate 100, the semiconductor material layer 110a can be formed through a thin film process, thereby reducing the production cost of the optical tweezers device. In some embodiments, the method of forming the semiconductor material layer 110a includes, for example, a Low Temperature Poly-Silicon process or other suitable processes. In addition, compared with manufacturing optical tweezers devices on wafers, large-area optical tweezers devices can be obtained more easily using thin film processes.

Referring to FIGS. 4A to 5A and 4B to 5B, a doping process is performed on the semiconductor material layer 110a to form the semiconductor layer 110 including the first doped region 112, the second doped region 116 and the transition region 114, wherein The transition region 114 is located between the first doped region 112 and the second doped region 116 .

Please refer to FIG. 4A and FIG. 4B. A first mask pattern PR1 is formed on the first region R1 of the semiconductor material layer 110a, and the first mask pattern PR1 exposes the second region R2 and the third region R2 of the semiconductor material layer 110a. Region R3, wherein the first region R1 surrounds the third region R3, and the first region R1 is located between the second region R2 and the third region R3. In some embodiments, the first mask pattern PR1 is, for example, patterned photoresist.

Using the first mask pattern PR1 as a mask, a first doping process is performed on the second region R2 and the third region R3 of the semiconductor material layer 110a to form the semiconductor material layer 110a. The first doping process is, for example, P-type doping or N-type doping. In this embodiment, the first doping process is a P-type doping process. In this embodiment, the first doping process is performed in The second doped region 116 and the first doped region 112a having the same doping type are formed in the second region R2 and the third region R3.

After performing the first doping process, the first mask pattern PR1 is removed. In some embodiments, the first mask pattern PR1 is removed by etching (eg, ashing).

Referring to FIG. 5A and FIG. 5B, a second mask pattern PR2 is formed on the first region R1 and the second region R2 of the semiconductor material layer 110a, and the second mask pattern PR2 exposes the third region of the semiconductor material layer 110a. R3. In some embodiments, the second mask pattern PR2 is, for example, patterned photoresist.

Using the second mask pattern PR2 as a mask, a second doping process is performed on the third region R3 of the semiconductor material layer 110a. The second doping process is, for example, P-type doping or N-type doping. In this embodiment, the second doping process is different from the first doping process, and the second doping process is an N-type doping process. In this embodiment, the second doping process forms the first doping region 112 in the third region R3.

At this point, the semiconductor layer 110 including the first doped region 112, the second doped region 116 and the transition region 114 is substantially completed, in which the third region R3 of the semiconductor material layer 110a (please refer to FIG. 4A) corresponds to the first doped region 112. The second region R2 of the semiconductor material layer 110a corresponds to the position of the second doping region 116, and the first region R1 of the semiconductor material layer 110a corresponds to the position of the transition region 114.

After performing the second doping process, the second mask pattern PR2 is removed. In some embodiments, the second mask pattern PR2 is removed by etching (eg, ashing).

Referring to FIGS. 6A and 6B , an insulating material layer 120 a is formed on the semiconductor layer 110 . In some embodiments, the insulating material layer 120a includes silicon oxide, silicon nitride, silicon oxynitride or other suitable material.

In some embodiments, the insulating material layer 120a includes hydrogen element, and an annealing process is performed on the semiconductor layer 110 and the insulating material layer 120a, so that the hydrogen element in the insulating material layer 120a diffuses to the semiconductor layer 110, thereby repairing the semiconductor layer. 110 Damage caused during the doping process. In some embodiments, the aforementioned annealing process uses a rapid thermal annealing process to heat the semiconductor layer 110 and the insulating material layer 120a to a temperature of 400 degrees Celsius to 625 degrees Celsius.

Referring to FIGS. 7A and 7B , the insulating material layer 120 a is patterned to form an insulating structure 120 that exposes the first doped region 112 and the second doped region 116 . In this embodiment, a third mask pattern PR3 is formed on the insulating material layer 120a, and one or more etching processes are performed on the insulating material layer 120a using the third mask pattern PR3 as a mask to form a plurality of insulating materials. Structure 120 , wherein the first opening O1 of each insulation structure 120 exposes the corresponding first doped region 112 , and the second doped region 116 is exposed by the gap between the insulation structures 120 . In some embodiments, the third mask pattern PR3 is, for example, patterned photoresist.

In some embodiments, after patterning the insulating material layer 120a, the third mask pattern PR3 is removed. In some embodiments, the third mask pattern PR3 is removed by etching (eg, ashing).

Referring to FIGS. 8A and 8B , a conductive layer is formed on the insulating structure 120 and the semiconductor layer 110 . The conductive layer includes a first electrode E1 located on the first doped region 112 and a second electrode E1 located on the second doped region 116 . The electrode E2 and the reflective layer E3 located on the insulating structure 120 .

In this embodiment, since there is a gap between the top surface of the insulating structure 120 and the top surface of the semiconductor layer 110, when the conductive layer is deposited, the reflective layer E3 located on the top surface of the insulating structure 120 will be separated from the top surface of the semiconductor layer 110. The first electrode E1 and the second electrode E2 on the top surface of the semiconductor layer 110 .

Referring to FIGS. 9A and 9B , a dielectric layer 130 is formed on the semiconductor layer 110 . In this embodiment, the dielectric layer 130 is formed on part of the first electrode E1, the second electrode E2, and the insulation structure 120. The dielectric layer 130 has a first through hole 132 overlapping the first electrode E1, and the dielectric layer 130 covers the top surface of the second electrode E2 and the top surface of the reflective layer E3.

Finally, please return to FIGS. 1A and 1B to provide the counter electrode 400 overlapping the first electrode E1; provide the buffer solution 200 between the counter electrode 400 and the first electrode E1 and between the counter electrode 400 and the dielectric layer 130 between; providing a plurality of particles 300 in the buffer solution 200. At this point, the optical tweezers device 10 is roughly completed.

Figure 10 is a schematic cross-sectional view of an optical tweezers device 20 according to an embodiment of the present invention. It must be noted here that the embodiment of Figure 10 follows the component numbers and part of the content of the embodiment of Figures 1A, 1B and 2, where the same or similar numbers are used to represent the same or similar elements, and the same or similar elements are omitted. Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

The difference between the optical tweezers device 20 of FIG. 10 and the optical tweezers device 10 of FIGS. 1A and 1B is that the positions of the N-type semiconductor and the P-type semiconductor in the semiconductor layer 110 of the optical tweezers device 10 are different from those of the semiconductor layer of the optical tweezers device 20 The location of N-type semiconductor and P-type semiconductor in 110A. The first doped region in the semiconductor layer 110 of the optical tweezers device 10 112 and the second doped region 116 are N-type semiconductor and P-type semiconductor respectively, and the first doped region 112A and the second doped region 116A in the semiconductor layer 110A of the optical tweezer device 20 are P-type semiconductor and N-type semiconductor respectively. Semiconductors.

In the embodiment of FIG. 10 , the first electrode E1 is electrically connected to the P-type semiconductor, and the second electrode E2 is electrically connected to the N-type semiconductor. In this embodiment, the surface of the induced polarization particles 300 is positively charged.

FIG. 11 is a schematic cross-sectional view of an optical tweezers device 30 according to an embodiment of the present invention. It must be noted here that the embodiment of Figure 11 follows the component numbers and part of the content of the embodiment of Figures 1A, 1B and 2, where the same or similar numbers are used to represent the same or similar elements, and the same or similar elements are omitted. Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

The difference between the optical tweezers device 30 of FIG. 11 and the optical tweezers device 10 of FIGS. 1A and 1B is that the semiconductor layer 110 of the optical tweezers device 10 includes a PIN diode, while the semiconductor layer 110B of the optical tweezers device 30 includes a NIN structure.

In the embodiment of FIG. 11 , the first doped region 112B and the second doped region 116B in the semiconductor layer 110B are both semiconductors of the same doping type, such as N-type semiconductors. The transition region 114B is an intrinsic semiconductor or a lightly doped P-type semiconductor. In the embodiment of FIG. 11 , both the first electrode E1 and the second electrode E2 are electrically connected to the N-type semiconductor.

In this embodiment, when a light beam is irradiated to the NIN structure, the NIN structure generates a photocurrent, thereby attracting or repelling the particles 300 .

Figure 12 is a cross-section of an optical tweezers device 40 according to an embodiment of the present invention. Surface diagram. It must be noted here that the embodiment of FIG. 12 follows the component numbers and part of the content of the embodiment of FIG. 1A, FIG. 1B and FIG. 2, where the same or similar numbers are used to represent the same or similar elements, and the same or similar elements are omitted. Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

The difference between the optical tweezers device 40 of FIG. 12 and the optical tweezers device 10 of FIGS. 1A and 1B is that the semiconductor layer 110 of the optical tweezers device 10 includes a PIN diode, while the semiconductor layer 110C of the optical tweezers device 40 includes a PIP structure.

In the embodiment of FIG. 12 , the first doped region 112C and the second doped region 116C in the semiconductor layer 110C are both semiconductors of the same doping type, such as P-type semiconductors. The transition region 114C is an intrinsic semiconductor or a lightly doped N-type semiconductor. In the embodiment of FIG. 12 , both the first electrode E1 and the second electrode E2 are electrically connected to the P-type semiconductor.

In this embodiment, when a light beam is irradiated onto the PIP structure, the PIP structure generates a photocurrent, thereby attracting or repelling the particles 300 .

13 to 17 are schematic cross-sectional views of a manufacturing method of the optical tweezers device 50 according to an embodiment of the present invention. It must be noted here that the embodiments of Figures 13 to 16 follow the component numbers and part of the content of the embodiments of Figures 1A, 1B and 2, where the same or similar numbers are used to represent the same or similar elements, and Explanations of the same technical content are omitted. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Please refer to FIGS. 13 to 15 . In this embodiment, the insulation structure 220 includes a multi-layer structure. For example, a method of forming the insulating structure 220 on the transition region 114 Include the following steps. Referring to FIG. 13 , a first insulating material layer 222a is formed on the semiconductor layer 110 . A second insulating material layer 224a is formed on the first insulating material layer 222a. In some embodiments, the first insulating material layer 222a and the second insulating material layer 224a include different materials. For example, the first insulating material layer 222a includes silicon oxide, and the second insulating material layer 224a includes silicon nitride. A third mask pattern PR3 is formed on the second insulating material layer 224a, wherein the third mask pattern PR3 overlaps the transition region 114 of the semiconductor layer 110 in the normal direction ND. In some embodiments, the width of the third mask pattern PR3 is greater than or equal to the width of the transition region 114 .

Referring to FIGS. 13 and 14 , using the third mask pattern PR3 as a mask, a dry etching process is performed to pattern the first insulating material layer 222 a and the second insulating material layer 224 a. The patterned first insulating material layer 222b and the patterned second insulating material layer 224b expose the first doped region 112 and the second doped region 116. In some embodiments, the dry etching process is an isotropic etching process (such as laser etching or plasma etching). In some embodiments, the patterned first insulating material layer 222b partially covers the first doped region 112 and the second doped region 116 .

Referring to FIGS. 14 and 15 , after the dry etching process, using the third mask pattern PR3 as a mask, a wet etching process is performed to remove at least part of the patterned first insulating material layer 222b. In some embodiments, the patterned second insulating material layer 224b may also be partially removed during a wet etching process. In the wet etching process, the etching rate of the patterned first insulating material layer 222b is greater than the etching rate of the patterned second insulating material layer 224b. In other words, more of the patterned first insulating material layer 222b will be removed during the wet etching process. In some embodiments, the aforementioned wet etching process is Anisotropic etching process. In some embodiments, the wet etching process is performed using hydrofluoric acid with a concentration of 0.45%.

Through a dry etching process and a wet etching process, a plurality of insulating structures 220 can be obtained. Each insulating structure 220 includes a first insulating layer 222 and a second insulating layer 224 . The first insulation layer 222 is located between the second insulation layer 224 and the transition region 114 . In this embodiment, both the first insulating layer 222 and the second insulating layer 224 are annular, and the width Wa of the first insulating layer 222 is smaller than the width Wb of the second insulating layer 224 . In some embodiments, the thickness Ta of the first insulating layer 222 is greater than the thickness Tb of the second insulating layer 224 . Therefore, it is helpful for the insulating structure 220 to have a cross-sectional shape that is narrow at the bottom and wide at the top after the wet etching process.

Referring to FIG. 16 , a conductive layer is formed on the insulating structure 120 and the semiconductor layer 110 . The conductive layer includes a first electrode E1 located on the first doped region 112 and a second electrode E2 located on the second doped region 116 . and a reflective layer E3 located on the insulating structure 220 .

In this embodiment, since there is a gap between the top surface of the insulating structure 220 and the top surface of the semiconductor layer 110, when the conductive layer is deposited, the reflective layer E3 on the top surface of the insulating structure 220 will be separated from the semiconductor layer. The first electrode E1 and the second electrode E2 on the top surface of 110 . Since the width of the first insulating layer 222 is smaller than the width of the second insulating layer 224 , the probability that the reflective layer E3 contacts the first electrode E1 and/or the second electrode E2 can be reduced, thereby reducing the risk of short circuit.

In this embodiment, there is a gap between the side wall of the first electrode E1 and the side wall of the first insulating layer 222 , and the side wall of the second electrode E2 and the side wall of the first insulating layer 222 There are gaps between the walls.

Referring to FIG. 17 , a dielectric layer 130 is formed on the semiconductor layer 110 . In this embodiment, the dielectric layer 130 is formed on the second electrode E2, the insulation structure 120 and the reflective layer E3. The dielectric layer 130 has a first through hole 132 overlapping the first electrode E1, and the dielectric layer 130 covers the top surface of the second electrode E2 and the top surface of the reflective layer E3. In some embodiments, part of the dielectric layer 130 fills the gap between the sidewalls of the first electrode E1 and the sidewalls of the first insulating layer 222 and the gap between the sidewalls of the second electrode E2 and the sidewalls of the first insulating layer 222 . In the normal direction ND, part of the dielectric layer 130 is located between part of the second insulating layer 224 and part of the semiconductor layer 110 . In some embodiments, a portion of the dielectric layer 130 is located between the first insulating layer 222 and the first electrode E1 and between the first insulating layer 222 and the second electrode E2.

Finally, the counter electrode 400 is provided overlapping the first electrode E1; the buffer solution 200 is provided between the counter electrode 400 and the first electrode E1 and between the counter electrode 400 and the dielectric layer 130; and a plurality of particles 300 are provided between Buffer solution 200. At this point, the optical tweezers device 50 is roughly completed.

To sum up, the optical tweezers device of the present invention includes a reflective layer located on an insulating structure. Through the arrangement of the reflective layer, when the back side of the optical tweezers device is irradiated with a light beam, the light beam passing through the transparent substrate, semiconductor layer and insulating structure can be reflected by the reflective layer and return to the semiconductor layer. Therefore, the semiconductor layer can produce a larger photocurrent.

10: Optical tweezers device

100:Transparent base

110: Semiconductor layer

112: First doped region

114:Transition area

116: Second doping region

120:Insulation structure

130: Dielectric layer

132: First through hole

200:Buffer solution

300: Particles/Induced Polarization Particles

400: Counter electrode

E1: first electrode

E2: second electrode

E3: Reflective layer

ND: normal direction

O1: First opening

O2: Second opening

W1, W2: Width

Claims (15)

An optical tweezers device includes: a transparent substrate; a semiconductor layer located on the transparent substrate and including a first doping region, a second doping region and a transition region, wherein the transition region is located on the first between the doped region and the second doped region; a first electrode located on the first doped region and electrically connected to the first doped region; an insulating structure located on the transition region, wherein The insulation structure has a first opening that overlaps the first electrode in a normal direction of the transparent substrate; and a reflective layer is located on the insulation structure and has a first opening that overlaps the first electrode in the normal direction. A second opening of an opening. The optical tweezers device of claim 1, wherein the insulation structure includes a first insulation layer and a second insulation layer, the first insulation layer is located between the second insulation layer and the transition region, wherein the first insulation layer The thickness of the insulating layer is greater than the thickness of the second insulating layer. The optical tweezers device of claim 2, wherein both the first insulating layer and the second insulating layer are annular, and the width of the first insulating layer is smaller than the width of the second insulating layer. The optical tweezers device according to claim 2, further comprising: a dielectric layer located on the semiconductor layer and having a first pass overlapping the first opening and the second opening in the normal direction. hole, where in the direction of the normal Upward, part of the dielectric layer is located between part of the second insulating layer and part of the semiconductor layer. The optical tweezers device according to claim 2, further comprising: a dielectric layer located on the semiconductor layer and having a first pass overlapping the first opening and the second opening in the normal direction. A hole, wherein part of the dielectric layer is located between the first insulating layer and the first electrode. The optical tweezers device according to claim 1, further comprising: a second electrode located on the second doped region and electrically connected to the second doped region, wherein the first electrode has an island structure, And the second electrode surrounds the first electrode. The optical tweezers device of claim 1, wherein one of the first doped region and the second doped region is a P-type semiconductor, and the other of the first doped region and the second doped region One is an N-type semiconductor, and the transition region is an intrinsic semiconductor or a lightly doped semiconductor with a purity close to essential. The optical tweezers device of claim 1, wherein the first doping region and the second doping region are both semiconductors of the same doping type, and the transition region is a semiconductor of another doping type. The optical tweezers device of claim 1, wherein the thickness of the insulating structure is greater than the thickness of the first electrode. The optical tweezers device of claim 1, wherein the insulating structure surrounds the first electrode and the first opening, and the reflective layer surrounds the second opening. A method of manufacturing an optical tweezers device, including: forming a semiconductor material layer on a transparent substrate; performing a doping process on the semiconductor material layer to form a first doped region, a second doped region and a A semiconductor layer in a transition region, wherein the transition region is between the first doped region and the second doped region; forming an insulating structure on the transition region, wherein the insulating structure has a first opening; forming an A conductive layer is on the insulating structure and the semiconductor layer, wherein the conductive layer includes a first electrode located on the first doped region and a reflective layer located on the insulating structure, wherein the first opening of the insulating structure The reflective layer overlaps the first electrode in a normal direction of the transparent substrate, and the reflective layer has a second opening that overlaps the first opening in the normal direction. The method of manufacturing an optical tweezers device according to claim 11, wherein the method of forming the insulating structure on the transition region includes: forming a first insulating material layer on the semiconductor layer; forming a second insulating material layer on the semiconductor layer. on the first insulating material layer; forming a mask pattern on the second insulating material layer, wherein the mask pattern overlaps the transition area of the semiconductor layer in the normal direction; using the mask pattern as a mask Mask, perform a dry etching process to pattern the first insulating material layer and the second insulating material layer; and after the dry etching process, use the mask pattern as a mask, perform a wet etching process to remove at least part of the first layer of insulating material. The method of manufacturing an optical tweezers device according to claim 12, wherein in the wet etching process, the etching rate of the first insulating material layer is greater than the etching rate of the second insulating material layer. The manufacturing method of the optical tweezers device according to claim 11, further comprising: providing a pair of counter electrodes overlapping the first electrode; providing a buffer solution between the counter electrode and the first electrode; and providing a plurality of counter electrodes. particles in the buffer solution. The method of manufacturing an optical tweezers device as claimed in claim 11, wherein the optical tweezers device is configured to enable the semiconductor layer to receive a light beam, and the light beam enters the optical tweezers device from a side of the transparent substrate facing away from the semiconductor layer.

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