TWI835553B - Circuit board and manufacturing method thereof - Google Patents

Abstract

A circuit substrate includes a substrate, a front circuit structure, first side wires, a back circuit structure and a first flexible circuit board. The front circuit structure is disposed on the front side of the substrate and includes first pads. The first side wires are extending from the front side of the substrate to the back side of the substrate. The back circuit structure is disposed on the back side of the substrate, and includes first leads, test pads and first test wires. The first leads are electrically connected to the first pads through the first side wires. The first leads are located between the test pads and the first side wires. The first test wires are located between the first leads and the test pads. The first flexible circuit board is bonded to the first leads.

Description

Circuit substrate and manufacturing method thereof

The invention relates to a circuit substrate and a manufacturing method thereof.

In order to respond to market demand, more and more manufacturers are committed to developing narrow bezel or even bezel-less display panels. Generally speaking, some test pads are provided on the front side of the pixel array substrate for testing whether the pixel array can operate normally. In order to reduce the area of the frame area of the display panel, the test pads provided on the front side of the pixel array substrate will be removed, and the pads of the pixel array substrate used to join the thin film flip-chip packaging structure will be directly used to conduct the pixel array test. However, the pads used to join the thin film flip-chip packaging structure of the pixel array substrate are relatively small, causing the circuit to be easily damaged during the test operation.

The invention provides a circuit substrate that can better utilize circuit layout space.

At least one embodiment of the present invention provides a circuit substrate. The circuit substrate includes a substrate, a front circuit structure, a plurality of first side wires, a back circuit structure and a first flexible circuit board. The front circuit structure is disposed on the front side of the substrate and includes a plurality of first pads. The first side wire extends from the front side of the substrate to the back side of the substrate. The backside circuit structure is disposed on the backside of the substrate and includes a plurality of first pins, a plurality of test pads and a plurality of first test leads. The first pin is electrically connected to the first pad through the first side wire. At least part of the first pin is located between the test pad and the first side conductor. At least part of the first test lead is located between the first pin and the test pad. The first flexible circuit board is bonded to the first pin.

At least one embodiment of the present invention provides a method for manufacturing a circuit substrate, including the following steps. A front circuit structure is formed on the front side of the substrate, and the front circuit structure includes a plurality of first pads. A plurality of first side conductors are formed on the side of the substrate, and the first side conductors extend from the front of the substrate to the back of the substrate. A backside circuit structure is formed on the backside of the substrate. The backside circuit structure includes a plurality of first pins, a plurality of test pads and a plurality of first test leads. The first pin is electrically connected to the first pad through the first side wire. At least part of the first pin is located between the test pad and the first side conductor. At least part of the first test lead is located between the first pin and the test pad. Use at least one test probe to electrically contact the test pad to perform the test step. A portion of the first test lead is removed to separate the first test lead from the first pin. Connect at least one first flexible circuit board to the first pin.

Based on the above, the back circuit structure includes test pads, so there is a larger circuit layout space for setting test pads.

1A to 1F are schematic cross-sectional views of a manufacturing method of a circuit substrate according to an embodiment of the present invention. Referring to FIG. 1A , a front-side circuit structure 200 is formed on the front-side 100 a of the substrate 100 .

The material of the substrate 100 may be glass, quartz, organic polymer, opaque/reflective material (such as conductive material, metal, wafer, ceramic or other applicable materials) or other applicable materials.

The front circuit structure 200 includes multiple insulating layers and multiple conductive layers, where the number of insulating layers and conductive layers can be adjusted according to actual needs. In this embodiment, the front circuit structure 200 includes a first insulating layer 210, a first conductive layer 220, a second insulating layer 230 and a second conductive layer 240 stacked in sequence. The second conductive layer 240 includes a plurality of first pads 244 (only one of which is shown in FIG. 1B ) and a plurality of second pads 242 . In some embodiments, the front circuit structure 200 includes a pixel circuit (not shown), wherein the pixel circuit is electrically connected to the first pad 244 and the second pad 242 .

The first buffer layer 300 is formed on the back surface 100b of the substrate 100. In some embodiments, the material of the first buffer layer 300 is polyimide (PI), polymethyl methacrylate (PMMA), epoxy, photoresist or other non-conductive materials. and easy-to-coat materials. In some embodiments, the thickness of the first buffer layer 300 is less than or equal to 10 microns.

Please refer to Figure 1B and Figure 2A, where Figure 1B corresponds to the position of line A-A’ in Figure 2A. A plurality of first side wires 440 are formed on the side 100c of the substrate 100. The first side wire 440 extends from the front surface 100 a of the substrate 100 to the back surface 100 b of the substrate 100 . In some embodiments, the method of forming the first side conductor 440 includes screen printing, embossing, pad printing, inkjet printing, sputtering or other suitable processes. In some embodiments, the material of the first side wire 440 includes metal, conductive glue (such as silver glue), or other suitable materials.

The backside circuit structure 400 is formed on the backside 100b of the substrate 100. In some embodiments, the method of forming the backside circuit structure 400 includes screen printing, embossing, pad printing, inkjet printing, sputtering or other suitable processes. In some embodiments, the material of the back circuit structure 400 includes metal, conductive glue (such as silver glue), or other suitable materials.

The back circuit structure 400 and the first side wires 440 are formed at the same time, but the invention is not limited thereto. In other embodiments, the back circuit structure 400 and the first side wire 440 are formed in different processes. In other embodiments, part of the back circuit structure 400 and the first side conductors 440 are formed simultaneously, while another part of the back circuit structure 400 and the first side conductors 440 are formed in different processes. The formation sequence of the back circuit structure 400 and the first side wires 440 can be adjusted according to actual needs.

In this embodiment, the first buffer layer 300 is formed first, and then the back circuit structure 400 and the first side conductors 440 are formed, but the invention is not limited to this. In other embodiments, the first side conductors 440 are formed first, then the first buffer layer 300 is formed, and finally the back circuit structure 400 is formed.

The backside circuit structure 400 includes a plurality of first pins 430 , a plurality of test pads 410 and a plurality of first test leads 420 . The width of the first pin 430 , the first test lead 420 and the first side lead 440 is smaller than the width of the test pad 410 . Therefore, the test probe used in subsequent test steps may easily contact the test pad. 410. In this embodiment, the test pads 410 are arranged along the first direction D1 and aligned with each other in the first direction D1, but the invention is not limited thereto. The position, spacing, size and other configurations of the test pads 410 can be adjusted according to actual needs.

In this embodiment, at least part of the first test wires 420 is formed on the first buffer layer 300 , and the first buffer layer 300 is located between the substrate 100 and at least part of the first test wires 420 . The first test wire 420 directly contacts the first buffer layer 300 . In this embodiment, a first buffer layer 300 extends laterally and continuously, but the invention is not limited to this. In other embodiments, the first buffer layer 300 includes a plurality of portions separated from each other, and each portion overlaps a corresponding plurality of first test wires 420 .

The first pin 430 is electrically connected to the first pad 244 through the first side wire 440 . The first pin 430 is located between the test pad 410 and the first side wire 440 . The first test lead 420 is located between the first pin 430 and the test pad 410 . The first test wire 420 electrically connects the first pin 430 to the corresponding test pad 410 . In this embodiment, each test pad 410 is electrically connected to the corresponding one or more first pins 430 through the corresponding one or more first test leads 420 . When one test pad 410 is electrically connected to multiple first pins 430, multiple first pins 430 can be tested at one time through a single test pad 410, thereby reducing the operational difficulty of the test step.

A protective layer 450 is formed on the first side conductor 440 . The protective layer 450 extends from the front surface 100a of the substrate 100 to the back surface 100b of the substrate 100. In some embodiments, the protective layer 450 includes light-absorbing material, but the invention is not limited thereto.

Referring to FIG. 1C , a plurality of light-emitting elements 510 are disposed on the front surface 100 a of the substrate 100 . In this embodiment, the light-emitting elements 510 are bonded to the second pads 242 of the front-side circuit structure 200 , wherein each light-emitting element 510 is bonded to at least two second pads 242 . The light-emitting element 510 is, for example, a mini light-emitting diode, a micro light-emitting diode or other suitable light-emitting element. In some embodiments, photosensitive elements or other electronic components may also be bonded to the second pads 242 of the front circuit structure 200 . An encapsulation layer 520 is formed on the light emitting element 510 .

Referring to FIG. 1D, at least one test probe PB is used to electrically contact the test pad 410 to perform the test step. In this embodiment, since the width of the test pad 410 is larger (please refer to FIG. 2A ), the probability of damage to the circuit or the test probe PB during the test step can be reduced.

Please refer to Figure 1E and Figure 2B, where Figure 1E corresponds to the position of line A-A’ in Figure 2B. A portion of the first test lead 420 is removed to separate the remaining first test lead 420 from the first pin 430 . In this embodiment, the first buffer layer 300 is processed by etching stripping, mechanical stripping (such as tearing off, scraping off, or other similar methods), heating stripping, dissolving stripping, or laser cutting. To remove the first buffer layer 300 and part of the first test wires 420 on the first buffer layer 300 . In this embodiment, after removing the first buffer layer 300 and part of the first test wire 420 , the first cutting line C is formed between the remaining first test wire 420 and the first pin 430 .

In this embodiment, the first scribe line C is formed by removing the first buffer layer 300, but the invention is not limited thereto. In other embodiments, the provision of the first buffer layer 300 may be omitted, and the entire first test wire 420 may be directly formed on the substrate 100 . In this case, a portion of the first test wire 420 may be directly removed through etching, laser or other suitable methods to form the first cutting track C.

Please refer to Figure 1F and Figure 2C, where Figure 1F corresponds to the position of line A-A’ in Figure 2C. The first flexible circuit board 610 is bonded to the first pin 430 . In this embodiment, the film flip-chip packaging structure 600 is bonded to the first pin 430 , where the film flip-chip packaging structure 600 includes a chip (not shown), a first flexible circuit board 610 and a plurality of pins 620 , where The pin 620 is bonded to the first pin 430 through the conductive connection structure 700 . The conductive connection structure 700 is, for example, solder, conductive glue, or other suitable materials.

At this point, the circuit substrate 10 is substantially completed. In this embodiment, during the process of manufacturing the circuit substrate 10, the testing step can be performed through the test pads 410 located on the backside 100b of the substrate 100. By disposing the test pads 410 on the back side 100b of the substrate 100, the circuit layout space on the front side 100a of the substrate 100 can be saved, thereby reducing the frame width of the front side 100a of the substrate 100.

FIG. 3 is a schematic cross-sectional view of a circuit substrate 20 according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 3 follows the component numbers and part of the content of the embodiment of FIGS. 1A to 1F , where the same or similar numbers are used to represent the same or similar elements, and references with the same technical content are omitted. instruction. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Please refer to FIG. 3 . In this embodiment, the first pin 430 and the first side wire 440 in the back circuit structure 400 are formed at the same time, and the test pad 410 and the first test wire 420 are formed at the same time. For example, the first pin 430 and the first side wire 440 are formed first, and then the test pad 410 and the first test wire 420 are formed.

4A to 4C are schematic bottom views of a manufacturing method of the circuit substrate 30 according to an embodiment of the present invention. It must be noted here that the embodiment of FIGS. 4A to 4C follows the component numbers and part of the content of the embodiment of FIGS. 2A to 2C , where the same or similar numbers are used to represent the same or similar elements, and the same or similar elements are omitted. Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Referring to FIG. 4A, a first buffer layer 300 is formed on the back surface 100b of the substrate 100. A plurality of first side wires 440 are formed on the side 100c of the substrate 100. The first side wires 440 extend from the front surface (not shown) of the substrate 100 to the back surface 100b of the substrate 100 .

The backside circuit structure 400 is formed on the backside 100b of the substrate 100. The backside circuit structure 400 includes a plurality of test pads 410 , a plurality of first test leads 420 and a plurality of first pins 430 . In this embodiment, the test pads 410 are staggered in the first direction D1. In this embodiment, the distance between some test pads 410 and the side 100c of the substrate 100 is farther than the distance between another part of the test pads 410 and the side 100c of the substrate 100, thereby utilizing the substrate 100 more effectively. There is 100b of line layout space on the back.

A protective layer 450 is formed on the first side conductor 440 . The protective layer 450 extends from the front surface (not shown) of the substrate 100 to the back surface 100b of the substrate 100 .

At least one test probe is used to electrically contact the test pad 410 to perform the test step. In this embodiment, since the width of the test pad 410 is larger, the probability of the test probe causing damage to the circuit during the test step can be reduced, and the stability of the probe contact can be increased.

Referring to FIG. 4B , a portion of the first test lead 420 is removed to separate the remaining first test lead 420 from the first pin 430 . In this embodiment, the first buffer layer 300 is processed by etching stripping, mechanical stripping, heating stripping, dissolution stripping or laser cutting to remove the first buffer layer 300 and the first buffer layer 300 on the first test lead 420 . In this embodiment, after removing the first buffer layer 300 and part of the first test wire 420 , the first cutting line C is formed between the remaining first test wire 420 and the first pin 430 .

Referring to FIG. 4C , the first flexible circuit board 610 is bonded to the first pin 430 . In this embodiment, the film flip-chip packaging structure 600 is bonded to the first pin 430 , where the film flip-chip packaging structure 600 includes a chip (not shown), a first flexible circuit board 610 and a plurality of pins 620 . At this point, the circuit substrate 30 is substantially completed.

5A to 5C are schematic bottom views of a manufacturing method of the circuit substrate 40 according to an embodiment of the present invention. It must be noted here that the embodiment of FIGS. 5A to 5C follows the component numbers and part of the content of the embodiment of FIGS. 4A to 4C , where the same or similar numbers are used to represent the same or similar elements, and the same or similar elements are omitted. Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Referring to FIG. 5A, a first buffer layer 300 is formed on the back surface 100b of the substrate 100. A plurality of first side wires 440 are formed on the side 100c of the substrate 100. The first side wires 440 extend from the front surface (not shown) of the substrate 100 to the back surface 100b of the substrate 100 .

A backside circuit structure 400 is formed on the backside 100b of the substrate 100. The backside circuit structure 400 includes a plurality of test pads 410, a plurality of connection structures 411, a plurality of connection lines 412, a plurality of first test wires 420, and a first pin 430. In this embodiment, the test pads 410 and the connection structures 411 are arranged alternately along the first direction D1. In this embodiment, the distance between some of the test pads 410 and the side surface 100c of the substrate 100 is greater than the distance between another portion of the test pads 410 and the side surface 100c of the substrate 100. In this embodiment, the distance between a portion of the connection structure 411 and the side surface 100 c of the substrate 100 is greater than the distance between another portion of the connection structure 411 and the side surface 100 c of the substrate 100 .

Each connection structure 411 is electrically connected to a corresponding plurality of first test leads 420 . Each connection line 412 electrically connects a corresponding connection structure 411 to a corresponding test pad 410 . In this embodiment, through the arrangement of the connecting wires 412, the first pins 430 corresponding to different thin film flip-chip packaging structures (please refer to FIG. 5C) can be electrically connected to the same test pad 410.

At least one test probe is used to electrically contact the test pad 410 to perform the test step. In this embodiment, since the width of the test pad 410 is larger, the probability of the test probe causing damage to the circuit during the test step can be reduced. In this embodiment, more first pins 430 are electrically connected to the same test pad 410 through the connection structure 411 and the connection wire 412. Therefore, when the probe is used to contact the test pad 410, the test pad 410 can be tested at one time. More first pins 430 are tested, thereby further reducing the difficulty of the test steps.

Referring to FIG. 5B , a portion of the first test lead 420 is removed to separate the remaining first test lead 420 from the first pin 430 . In this embodiment, the first buffer layer 300 is processed by etching stripping, mechanical stripping, heating stripping, dissolution stripping or laser cutting to remove the first buffer layer 300 and the first buffer layer 300 on the first test lead 420 . In this embodiment, after removing the first buffer layer 300 and part of the first test wire 420 , the first cutting line C is formed between the remaining first test wire 420 and the first pin 430 .

Referring to FIG. 5C , the first flexible circuit board 610 is bonded to the first pin 430 . In this embodiment, the film flip-chip packaging structure 600 is bonded to the first pin 430 , where the film flip-chip packaging structure 600 includes a chip (not shown), a first flexible circuit board 610 and a plurality of pins 620 . At this point, the circuit substrate 40 is substantially completed.

6A to 6C are schematic bottom views of a manufacturing method of a circuit substrate 50 according to an embodiment of the present invention. It must be noted here that the embodiment of FIGS. 6A to 6C follows the component numbers and part of the content of the embodiment of FIGS. 4A to 4C , where the same or similar numbers are used to represent the same or similar elements, and the same or similar elements are omitted. Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Referring to FIG. 6A, a first buffer layer 300 and a second buffer layer 300a are formed on the back surface 100b of the substrate 100. A plurality of first side wires 440 are formed on the side 100c of the substrate 100. The first side wires 440 extend from the front surface (not shown) of the substrate 100 to the back surface 100b of the substrate 100 . A plurality of second side wires 440a are formed on the other side 100d of the substrate. The second side wire 440a extends from the front side of the substrate 100 to the back side 100b of the substrate. The first side wire 440 and the second side wire 440a are respectively located on different side surfaces 100c and 100d of the substrate 100. Protective layers 450 and 450a are respectively formed on the first side conductor 440 and the second side conductor 440a. The protective layers 450, 450a extend from the front surface (not shown) of the substrate 100 to the back surface 100b of the substrate 100.

The backside circuit structure 400 is formed on the backside 100b of the substrate 100. The back circuit structure 400 includes a plurality of test pads 410, a plurality of connection structures 411, a plurality of connection lines 412, a plurality of first test leads 420, a plurality of second test leads 420a, a plurality of first pins 430, and a plurality of first test leads 420a. a second pin 430a. In this embodiment, the test pads 410 are staggered in the first direction D1. The connection structures 411 are arranged in the first direction D1.

The first pin 430 and the second pin 430a are electrically connected to the front circuit structure (not shown) through the first side wire 440 and the second side wire 440a respectively. The first test lead 420 is located between the first pin 430 and the test pad 410, and the second test lead 420a is located between the second pin 430a and the connection structure 411.

Each connection structure 411 is electrically connected to a corresponding plurality of second test leads 420a. Each connection line 412 electrically connects a corresponding connection structure 411 to a corresponding test pad 410 . In this embodiment, through the arrangement of the connecting wire 412, the first pin 430 and the second pin 430a corresponding to different thin film flip-chip packaging structures (please refer to FIG. 6C) can be electrically connected to the same test connection. MAT 410.

At least one test probe is used to electrically contact the test pad 410 to perform the test step. In this embodiment, since the width of the test pad 410 is larger, the probability of the test probe causing damage to the circuit during the test step can be reduced. In this embodiment, multiple second pins 430a are electrically connected to the same test pad 410 through the connection structure 411 and the connection wire 412. Therefore, when contacting the test pad 410 with a probe, in addition to being able to conduct the test at one time In addition to testing multiple first pins 430, multiple second pins 430a can also be tested simultaneously, thereby further reducing the difficulty of the testing steps.

Referring to FIG. 6B , a portion of the first test lead 420 is removed to separate the remaining first test lead 420 from the first pin 430 . A portion of the second test lead 420a is removed to separate the remaining second test lead 420a from the second pin 430a. In this embodiment, the first buffer layer 300 and the second buffer layer 300a are processed by etching stripping, mechanical stripping, heating stripping, dissolution stripping, or laser cutting to remove the first buffer layer 300 , part of the first test wire 420 on the first buffer layer 300, part of the second buffer layer 300a and part of the second test wire 420a on the second buffer layer 300a. In this embodiment, after removing the first buffer layer 300, part of the first test wire 420, the second buffer layer 300a and part of the second test wire 420a, the first cutting line C is formed on the remaining first test wire 420. and the first pin 430, and the second cutting track Ca is formed between the remaining second test lead 420a and the second pin 430a.

Please refer to Figure 7 and Figure 6C, where Figure 7 corresponds to the position of line B-B' in Figure 6C. The first flexible circuit board 610 and the second flexible circuit board 610a are respectively joined to the first pin 430 and the second pin 430a. In this embodiment, the film flip-chip packaging structure 600 is bonded to the first pin 430 , where the film flip-chip packaging structure 600 includes a chip (not shown), a first flexible circuit board 610 and a plurality of pins 620 . The film flip-chip packaging structure 600a is bonded to the second pin 430a, where the film flip-chip packaging structure 600a includes a chip (not shown), a second flexible circuit board 610a and a plurality of pins 620a. At this point, the circuit substrate 50 is substantially completed.

FIG. 8 is a partial bottom view of a circuit substrate 60 according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 8 follows the component numbers and part of the content of the embodiment of FIGS. 2A to 2C , where the same or similar numbers are used to represent the same or similar elements, and references with the same technical content are omitted. instruction. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Please refer to FIG. 8 . In this embodiment, the minimum width W1 of each first test lead 420 is smaller than the minimum width W2 of the first pin 430 . The portion of the first test wire 420 with the minimum width W1 is formed on the first buffer layer 300. Therefore, in the subsequent process of removing the first buffer layer 300, the portion of the first buffer layer 300 can be easily removed. A test lead 420 is removed together with the first buffer layer 300 .

FIG. 9 is a schematic cross-sectional view of a circuit substrate 70 according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 9 follows the component numbers and part of the content of the embodiment of FIGS. 2A to 2C , where the same or similar numbers are used to represent the same or similar elements, and references with the same technical content are omitted. instruction. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Please refer to FIG. 9 . In this embodiment, the first test lead 420 and the first pin 430 are separated through a laser process. The laser process forms a first cutting track C that separates the first test lead 420 and the first pin 430 . The first cutting lane C is located on the first buffer layer 300 . In some embodiments, the aforementioned laser process leaves cuts LS on the first buffer layer 300 .

In some embodiments, before the first test wire 420 is separated from the first pin 430 , the thickness of the part of the first test wire 420 formed on the first buffer layer 300 is smaller than the thickness of another part of the first test wire 420 formed directly on the substrate 100 . A thickness of the test wire 420, therefore, part of the first test wire 420 on the first buffer layer 300 can be more easily removed by laser cutting in the subsequent process.

In summary, in the circuit substrate of the present invention, the backside circuit structure includes test pads. By arranging the test pads on the back side of the substrate, the circuit layout space can be used more effectively. In addition, compared with directly using the test probe to contact the first pin or the second pin to perform the test step, the process of using the test probe to contact the test pad is less likely to cause misalignment of the test probe, and the test The probe will not cause damage to the first pin or the second pin.

10,20,30,40,60,70:Circuit substrate

100: Substrate

100a: Front

100b: back

100c,100d: side

200: Front circuit structure

210: First insulation layer

220: First conductive layer

230: Second insulation layer

240: Second conductive layer

244:First pad

242:Second pad

300: First buffer layer

300a: Second buffer layer

400: Back circuit structure

410: Test pad

411:Connection structure

412:Connecting line

420: First test lead

420a: Second test lead

430: first pin

430a: Second pin

440: First side wire

440a: Second side conductor

450,450a: protective layer

510:Light-emitting component

520: Encapsulation layer

600,600a: Thin film flip-chip packaging structure

610:The first flexible circuit board

610a: Second flexible circuit board

620,620a: pin

700: Conductive connection structure

C: First cutting lane

Ca: second cutting channel

D1: first direction

LS: cut mark

PB: test probe

W1, W2: minimum width

1A to 1F are schematic cross-sectional views of a manufacturing method of a circuit substrate according to an embodiment of the present invention. 2A to 2C are schematic bottom views of a manufacturing method of a circuit substrate according to an embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of a circuit substrate according to another embodiment of the present invention. 4A to 4C are schematic bottom views of a manufacturing method of a circuit substrate according to an embodiment of the present invention. 5A to 5C are schematic bottom views of a manufacturing method of a circuit substrate according to an embodiment of the present invention. 6A to 6C are schematic bottom views of a manufacturing method of a circuit substrate according to an embodiment of the present invention. FIG. 7 is a schematic cross-sectional view of a circuit substrate according to an embodiment of the present invention. FIG. 8 is a partial bottom view of a circuit substrate according to an embodiment of the present invention. Figure 9 is a schematic cross-sectional view of a circuit substrate according to an embodiment of the present invention.

10:Circuit substrate

100:Substrate

100a: Front

100b: back

200: Front circuit structure

210: First insulation layer

220: First conductive layer

230: Second insulation layer

240: Second conductive layer

244:First pad

242:Second pad

400: Back circuit structure

410: Test pad

420: First test lead

430: first pin

440: First side wire

450:Protective layer

510:Light-emitting component

520: Encapsulation layer

600: Thin film flip-chip packaging structure

610:The first flexible circuit board

620: pin

700: Conductive connection structure

C: First cutting lane

Claims (10)

A circuit substrate includes: a substrate; a front circuit structure, which is disposed on the front side of the substrate and includes a plurality of first pads; a plurality of first side wires extending from the front side of the substrate to the front side of the substrate The back side; a back circuit structure is disposed on the back side of the substrate and includes: a plurality of first pins electrically connected to the first pads through the first side wires; a plurality of test contacts pads, wherein at least some of the first pins are located between the test pads and the first side conductors; and a plurality of first test leads, wherein at least some of the first test conductors are located on the first Between the pins and the test pads, the first test leads are separated from the first pins; and at least a first flexible circuit board is connected to the first pins. The circuit substrate of claim 1, wherein the test pads are adapted to be electrically contacted by at least one test probe to perform a test step. The circuit substrate of claim 1, further comprising: a first buffer layer disposed on the back side of the substrate, wherein the first buffer layer is located between the substrate and at least part of the first test leads. The circuit substrate as claimed in claim 3, wherein the first buffer layer has at least one first cutting track that separates the first test leads from the first pins. The circuit substrate as claimed in claim 1, wherein the back circuit structure further includes: a plurality of connection structures, each of which is electrically connected to a corresponding plurality of first test leads; a plurality of connection lines, each of which connects A corresponding connection structure is electrically connected to a corresponding test pad. The circuit substrate according to claim 1, further comprising: a plurality of second side conductors extending from the front side of the substrate to the back side of the substrate, wherein the first side conductors and the second side conductors respectively located on different sides of the substrate; and at least a second flexible circuit board, wherein the back circuit structure further includes: a plurality of second pins electrically connected to the front circuit through the second side wires A structure, wherein the at least one second flexible circuit board is bonded to the second pins; a plurality of second test leads; a plurality of connection structures, each of the connection structures is electrically connected to a corresponding plurality of second test leads; multiple Each connection line electrically connects a corresponding connection structure to a corresponding test pad. The circuit substrate of claim 1, wherein the minimum width of each first test wire is smaller than the minimum width of the first pins. A method of manufacturing a circuit substrate, including: forming a front-side circuit structure on the front side of a substrate, and the front-side circuit structure includes a plurality of first pads; forming a plurality of first side conductors on the side of the substrate, and The first side wires extend from the front side of the substrate to the back side of the substrate; forming a back circuit structure on the back side of the substrate, wherein the back circuit structure includes: a plurality of first pins, through the The first side wires are electrically connected to the first pads; a plurality of test pads, in which at least some of the first pins are located between the test pads and the first side wires; and A plurality of first test leads, at least part of which are located between the first pins and the test pads; using at least one test probe to electrically contact the test pads to perform a test Steps: remove part of the first test leads to separate the remaining first test leads from the first pins; and bond at least one first flexible circuit board to the first pins. The manufacturing method of a circuit substrate as claimed in claim 8, further comprising: forming a first buffer layer on the back side of the substrate, and at least part of the third buffer layer A test lead is formed on the first buffer layer; and the first buffer layer is processed by etching stripping, mechanical stripping, heating stripping, dissolution stripping or laser cutting to remove the first buffer layer. layer and part of the first test wires on the first buffer layer, so that the remaining first test wires are separated from the first pins. The manufacturing method of a circuit substrate according to claim 8, wherein the method of forming the backside circuit structure and the method of forming the first side conductors include screen printing, imprinting, pad printing, inkjet printing or sputtering.