JP2010217469A - Wiring structure of spatial light modulator - Google Patents

Wiring structure of spatial light modulator Download PDF

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JP2010217469A
JP2010217469A JP2009063888A JP2009063888A JP2010217469A JP 2010217469 A JP2010217469 A JP 2010217469A JP 2009063888 A JP2009063888 A JP 2009063888A JP 2009063888 A JP2009063888 A JP 2009063888A JP 2010217469 A JP2010217469 A JP 2010217469A
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light modulation
device chip
modulation elements
support substrate
wiring structure
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Koichiro Fukaya
康一郎 深谷
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V Technology Co Ltd
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V Technology Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To enable the reduction in arrangement pitch of optical modulation elements by facilitating drawing around lines for respective electrodes of the plurality of optical modulation elements. <P>SOLUTION: A wiring structure of a spatial light modulator having a device chip 5 wherein a plurality of optical modulation elements 6 made of an electro-optical crystal material are arranged in parallel with a prescribed pitch includes: a plurality of electrode pads 1 which are extended on one surface of the device chip 5 in a direction approximately orthogonal to the arrangement direction of the plurality of optical modulation elements 6 and each of which has one end electrically connected to a pair of electrodes 7 provided on opposite surfaces of each optical modulation element 6, which are parallel with the arrangement direction; a plurality of junction lines 2 which have formed on one surface of a support substrate 9 supporting the device chip 5 and have one end parts provided oppositely to the plurality of electrode pads 1 of the device chip 5; connection members 3 for electric flip-flop connection between respective electrode pads 1 and one end parts of respective junction lines 2; and a plurality of leader lines 4 which have one end parts electrically connected to the other end parts of the junction lines 2 and are formed on a circuit board 11 in many layers. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、電気光学結晶材料から成る複数の光変調素子を所定の配列ピッチで並べて備えたデバイスチップを有する空間光変調装置の配線構造に関し、詳しくは、複数の光変調素子の各電極に対する配線の引き回しを容易にし、各光変調素子の配列ピッチの狭小化を可能にしようとする空間光変調装置の配線構造に係るものである。   The present invention relates to a wiring structure of a spatial light modulation device having a device chip provided with a plurality of light modulation elements made of an electro-optic crystal material arranged at a predetermined arrangement pitch, and more specifically, wiring to each electrode of the plurality of light modulation elements This relates to a wiring structure of a spatial light modulation device that facilitates the routing of the light modulation elements and makes it possible to reduce the arrangement pitch of the light modulation elements.

従来、この種の空間光変調装置の配線構造は、一方の面に複数個の個別電極が一次元的に配列形成され、他方の面に上記複数個の個別電極の全てに対向する共通電極が形成された電気光学結晶基板からなり、各個別電極が駆動回路に結線されたボンディングパッドにワイヤボンディングにより接続される構造となっていた(例えば、特許文献1参照)。   Conventionally, the wiring structure of this type of spatial light modulator has a plurality of individual electrodes arranged one-dimensionally on one surface and a common electrode facing all of the plurality of individual electrodes on the other surface. The electro-optic crystal substrate is formed, and each individual electrode is connected to a bonding pad connected to a driving circuit by wire bonding (for example, see Patent Document 1).

特開平11−174392号公報JP 11-174392 A

しかし、このような従来の空間光変調装置の配線構造においては、ワイヤボンディングにより接続するものであったため、個別電極の幅が例えば約50μm以下で、且つ各個別電極の間隔が約50μm以下であるような場合に、ワイヤボンディングが困難であると共に、隣接するワイヤが接触して短絡するおそれがあった。したがって、ワイヤボンディングを使用する配線構造には、複数の光変調素子の配列ピッチを約100μm以下に狭小化することに限界があった。   However, since the wiring structure of such a conventional spatial light modulator is connected by wire bonding, the width of the individual electrodes is, for example, about 50 μm or less, and the interval between the individual electrodes is about 50 μm or less. In such a case, wire bonding is difficult, and adjacent wires may come into contact and short circuit. Therefore, the wiring structure using wire bonding has a limit in narrowing the arrangement pitch of the plurality of light modulation elements to about 100 μm or less.

そこで、本発明は、このような問題点に対処し、複数の光変調素子の各電極に対する配線の引き回しを容易にし、各光変調素子の配列ピッチの狭小化を可能にしようとする空間光変調装置の配線構造を提供することを目的とする。   Therefore, the present invention addresses such problems, facilitates the routing of wiring to each electrode of a plurality of light modulation elements, and makes it possible to narrow the arrangement pitch of each light modulation element. An object is to provide a wiring structure of a device.

上記目的を達成するために、本発明による空間光変調装置の配線構造は、電気光学結晶材料から成る複数の光変調素子を所定の配列ピッチで並べて備えたデバイスチップを有し、前記複数の光変調素子を個別に駆動制御して射出光をオン・オフする空間光変調装置の配線構造であって、前記デバイスチップの一面に前記複数の光変調素子の並び方向に略直交する方向に延設され、前記並び方向に平行な前記各光変調素子の対向面に設けられた一対の電極に夫々一端を電気的に接続した複数の電極パッドと、前記デバイスチップを支持する支持基板の一面に形成され、一端部を前記デバイスチップの前記複数の電極パッドに対向させて設けた複数の中継線と、前記各電極パッドと前記各中継線の一端部とを電気的にフリップチップ接続する接続部材と、前記中継線の他端部に一端部を電気的に接続させて、回路基板に多層形成された複数の引出線と、を備えたものである。   To achieve the above object, a wiring structure of a spatial light modulation device according to the present invention includes a device chip having a plurality of light modulation elements made of an electro-optic crystal material arranged at a predetermined arrangement pitch, and the plurality of light A wiring structure of a spatial light modulation device that individually controls the modulation elements to turn on and off the emitted light, and extends on one surface of the device chip in a direction substantially orthogonal to the arrangement direction of the plurality of light modulation elements A plurality of electrode pads each having one end electrically connected to a pair of electrodes provided on opposing surfaces of the respective light modulation elements parallel to the arrangement direction, and formed on one surface of a support substrate that supports the device chip A plurality of relay lines provided with one end portions opposed to the plurality of electrode pads of the device chip, and a connection for electrically flip-chip connecting each electrode pad and one end portion of each relay line And wood, and electrically connected to one end portion to the other end of the trunk line, those having a plurality of lead lines which are multi-layered on the circuit board, the.

このような構成により、デバイスチップの一面に複数の光変調素子の並び方向に略直交する方向に延設され、上記並び方向に平行な各光変調素子の対向面に設けられた一対の電極に夫々一端を電気的に接続した複数の電極パッドと、デバイスチップを支持する支持基板の一面に形成され、一端部をデバイスチップの複数の電極パッドに対向させて設けた複数の中継線とを接続部材で電気的にフリップチップ接続し、回路基板に多層形成された複数の引出線の一端部を中継線の他端部に電気的接続し、複数の光変調素子を個別に駆動制御して射出光をオン・オフする。   With such a configuration, a pair of electrodes provided on one surface of the device chip is provided so as to extend in a direction substantially orthogonal to the arrangement direction of the plurality of light modulation elements, and provided on the opposing surfaces of the light modulation elements parallel to the arrangement direction. Connects a plurality of electrode pads, one end of which is electrically connected to each other, and a plurality of relay lines formed on one surface of the support substrate that supports the device chip, with one end facing the plurality of electrode pads of the device chip. Electrically flip-chip connected with a member, one end of multiple lead wires formed in multiple layers on the circuit board is electrically connected to the other end of the relay wire, and multiple light modulation elements are individually driven and controlled Turn the light on and off.

また、前記デバイスチップは、前記複数の光変調素子が略一直線状に並ぶように、前記支持基板上に所定の配列ピッチで複数配置され、互い違いに複数列配置されたものである。これにより、支持基板上に複数の光変調素子が略一直線状に並ぶように所定の配列ピッチで複数配置され、且つ互い違いに複数列配置されたデバイスチップの各光変調素子をオン・オフ駆動する。   The device chips are arranged in a plurality of rows at a predetermined arrangement pitch on the support substrate so that the plurality of light modulation elements are arranged in a substantially straight line. As a result, a plurality of light modulation elements are arranged at a predetermined arrangement pitch so that the plurality of light modulation elements are arranged in a substantially straight line on the support substrate, and each light modulation element of the device chip arranged in a plurality of rows alternately is turned on / off. .

さらに、前記デバイスチップは、前記複数の光変調素子の並び方向に平行な両端縁部を前記複数の光変調素子の高さよりも高く形成し、該各縁部の上面に前記光変調素子の一対の電極に電気的に接続する電極パッドを形成し、透明で平坦な前記支持基板に支持されたものである。これにより、デバイスチップを複数の光変調素子の並び方向に平行な両端縁部が複数の光変調素子の高さよりも高くなるように形成し、該各縁部の上面に光変調素子の一対の電極に電気的に接続する電極パッドを形成して、透明で平坦な支持基板上に配置しても各光変調素子の端面が支持基板の面から離隔するようにする。   Further, the device chip is formed such that both end edges parallel to the arrangement direction of the plurality of light modulation elements are higher than the height of the plurality of light modulation elements, and a pair of the light modulation elements is formed on the upper surface of each edge. An electrode pad electrically connected to the electrode is formed and supported on the transparent and flat support substrate. Thus, the device chip is formed so that both end edges parallel to the arrangement direction of the plurality of light modulation elements are higher than the height of the plurality of light modulation elements, and a pair of light modulation elements is formed on the upper surface of each edge. An electrode pad that is electrically connected to the electrode is formed so that the end face of each light modulation element is separated from the surface of the support substrate even if it is placed on a transparent and flat support substrate.

さらにまた、前記支持基板は、前記デバイスチップの前記複数の光変調素子に対応した大きさの貫通孔を形成したものである。これにより、支持基板に形成した貫通孔にデバイスチップの複数の光変調素子を挿通可能にする。   Furthermore, the support substrate is formed with through holes having a size corresponding to the plurality of light modulation elements of the device chip. Accordingly, a plurality of light modulation elements of the device chip can be inserted through the through holes formed in the support substrate.

そして、前記接続部材は、半田ボールである。これにより、半田ボールで各電極パッドと各中継線の一端部とを電気的に接続する。   The connecting member is a solder ball. Thereby, each electrode pad and one end part of each relay line are electrically connected by the solder ball.

請求項1に係る発明によれば、一端部を複数の光変調素子に接続したデバイスチップの電極パッドと支持基板の中継線とを接続部材によりフリップチップ接続すると共に、中継線の端部を回路基板に多層形成された引出線に接続しているので、各光変調素子の各電極に対する配線の引き回しを容易にすることができる。したがって、各光変調素子の配列ピッチを例えば100μm以下に狭小化することができる。   According to the first aspect of the present invention, the electrode pad of the device chip having one end connected to the plurality of light modulation elements and the relay line of the support substrate are flip-chip connected by the connecting member, and the end of the relay line is connected to the circuit. Since it is connected to the lead line formed in a multilayer on the substrate, it is possible to easily route the wiring to each electrode of each light modulation element. Therefore, the arrangement pitch of each light modulation element can be reduced to, for example, 100 μm or less.

また、請求項2に係る発明によれば、1列目の複数のデバイスチップのチップ間を他の列のデバイスチップで補間することができる。したがって、このように構成された空間光変調装置を、被露光体を一方向に搬送しながら露光する露光装置に適用するならば、緻密な露光パターンを形成することができる。   In addition, according to the second aspect of the present invention, it is possible to interpolate between a plurality of device chips in the first column with device chips in another column. Therefore, if the spatial light modulator configured in this way is applied to an exposure apparatus that exposes an object to be exposed while transporting it in one direction, a precise exposure pattern can be formed.

さらに、請求項3に係る発明によれば、デバイスチップを透明で平坦な支持基板上に配置することができ、空間光変調装置の製造が容易になる。また、デバイスチップの複数の光変調素子の各端面が平坦な支持基板の面から離隔するので、各光変調素子に外部応力が作用することがない。したがって、S/Nの高いスイッチング特性を得ることができる。   Further, according to the invention of claim 3, the device chip can be disposed on the transparent and flat support substrate, and the manufacture of the spatial light modulation device is facilitated. In addition, since each end face of the plurality of light modulation elements of the device chip is separated from the flat support substrate surface, no external stress acts on each light modulation element. Therefore, switching characteristics with high S / N can be obtained.

さらにまた、請求項4に係る発明によれば、複数の光変調素子のみが突出して形成されたデバイスチップであっても、各光変調素子を貫通孔内に挿入させた状態で支持することができる。この場合、各光変調素子は支持基板の貫通孔内に挿入されるので光変調素子に外部応力が作用せず、S/Nの高いスイッチング特性を得ることができる。また、各光変調素子が支持基板の貫通孔内に埋め込まれた状態となるので、耐衝撃性が増し、外部からの衝撃によりデバイスチップが破損するのを抑制することができる。   Furthermore, according to the invention according to claim 4, even in the case of a device chip formed by projecting only a plurality of light modulation elements, each light modulation element can be supported in a state of being inserted into the through hole. it can. In this case, since each light modulation element is inserted into the through hole of the support substrate, external stress does not act on the light modulation element, and switching characteristics with high S / N can be obtained. In addition, since each light modulation element is embedded in the through hole of the support substrate, impact resistance is increased, and damage to the device chip due to external impact can be suppressed.

そして、請求項5に係る発明によれば、溶融した半田ボールの表面張力作用により、デバイスチップの自己センタリング(セルフアライメント)が行われ、デバイスチップを支持基板の所定位置に適切に配置させることができる。したがって、顕微鏡等によりデバイスチップと支持基板とのアライメントを事前に行う必要がないので、空間光変調装置の製造が容易になる。   According to the fifth aspect of the present invention, the device chip is self-centered (self-aligned) by the surface tension action of the molten solder ball, and the device chip can be appropriately arranged at a predetermined position of the support substrate. it can. Therefore, since it is not necessary to perform alignment between the device chip and the support substrate in advance with a microscope or the like, the spatial light modulator can be easily manufactured.

本発明による空間光変調装置の配線構造の実施形態を示す要部拡大断面図である。It is a principal part expanded sectional view which shows embodiment of the wiring structure of the spatial light modulation apparatus by this invention. 上記空間光変調装置のデバイスチップを示す四面図であり、(a)は平面図、(b)は右側面図、(c)は底面図、(d)は正面図である。It is a four-plane figure which shows the device chip | tip of the said spatial light modulation apparatus, (a) is a top view, (b) is a right view, (c) is a bottom view, (d) is a front view. 上記デバイスチップに形成される電極パッドの種々の形態を示す説明図である。It is explanatory drawing which shows the various forms of the electrode pad formed in the said device chip. 上記空間光変調装置の支持基板を示す平面図である。It is a top view which shows the support substrate of the said spatial light modulation apparatus. 上記空間光変調装置の配線基板を示す平面図である。It is a top view which shows the wiring board of the said spatial light modulator. 図5のA−A線断面図である。It is the sectional view on the AA line of FIG. デバイスチップの他の形態を示す正面図である。It is a front view which shows the other form of a device chip. 図7のデバイスチップを平坦な支持基板上に配置した状態を示す断面図である。It is sectional drawing which shows the state which has arrange | positioned the device chip of FIG. 7 on the flat support substrate. デバイスチップの更に他の形態を示す図であり、平坦な支持基板上に配置した状態を示す断面図である。It is a figure which shows the other form of a device chip | tip, and is sectional drawing which shows the state arrange | positioned on the flat support substrate.

以下、本発明の実施形態を添付図面に基づいて詳細に説明する。図1は本発明による空間光変調装置の配線構造の実施形態を示す要部拡大断面図である。この配線構造は、電気光学結晶材料から成る複数の光変調素子を所定の配列ピッチで並べて備えたデバイスチップを有し、上記複数の光変調素子を個別に駆動制御して射出光をオン・オフする空間光変調装置の配線構造であり、電極パッド1と、中継線2と、接続部材3と、引出線4とからなる。   Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is an enlarged sectional view of an essential part showing an embodiment of a wiring structure of a spatial light modulator according to the present invention. This wiring structure has a device chip having a plurality of light modulation elements made of an electro-optic crystal material arranged at a predetermined arrangement pitch, and individually controls driving of the plurality of light modulation elements to turn on and off the emitted light. The wiring structure of the spatial light modulation device is composed of an electrode pad 1, a relay line 2, a connecting member 3, and a lead wire 4.

上記電極パッド1は、図2に示すように、平面視短冊状の電気光学結晶材料からなるデバイスチップ5の一面を加工して、長軸方向に所定の配列ピッチ、例えば100μm以下のピッチで並べて形成された複数の光変調素子6の並び方向に略直交する方向に延設され、該並び方向に平行な各光変調素子6の対向面に設けられた一対の電極7に夫々一端を電気的に接続するもので、デバイスチップ5の長軸上の所定幅を残してその両側部を所定深さだけ切除した切除部8の底面8aに蒸着、スパッタリング、又はメッキ等の公知の成膜技術を適用して設けられている。   As shown in FIG. 2, the electrode pad 1 is formed by processing one surface of a device chip 5 made of an electro-optic crystal material having a strip shape in plan view, and arranging them at a predetermined arrangement pitch in the major axis direction, for example, a pitch of 100 μm or less. One end is electrically connected to each of the pair of electrodes 7 provided on the opposing surfaces of the light modulation elements 6 extending in a direction substantially orthogonal to the arrangement direction of the plurality of formed light modulation elements 6 and parallel to the arrangement direction. A known film forming technique such as vapor deposition, sputtering, or plating is applied to the bottom surface 8a of the excision part 8 which is excised from the both sides by a predetermined depth while leaving a predetermined width on the major axis of the device chip 5. It is provided by applying.

この電極パッド1は、例えば、図3に示すような種々の形態から少なくとも一つの形態が選択されて適用される。ここで、同図(a)は、後述の半田ボール(接続部材3)を一つ配置可能な大きさのパッド部1aを一つ設けたものである。また、同図(b),(c)は、半田ボールを一つ配置可能な大きさの複数のパッド部1aを設けたものである。さらに、同図(d)は、複数の半田ボールを延設方向に並べて配置可能な大きさのパッド部1bと、該パッド部1bと電気的に分離されたダミーパッド1cとを設けたものである。また、同図(e)は、複数の半田ボールを延設方向に並べて配置可能な大きさの複数のパッド部1bを設けたものである。さらに、同図(f)は、複数の半田ボールを延設方向に並べて配置可能な大きさのパッド部1bと、半田ボールを一つ配置可能な大きさのパッド部1aとを組み合わせて設けたものである。そして、同図(g)は、半田ボールの断面形状と同じ円形状の複数のパッド部1dを設けたものである。   This electrode pad 1 is applied by selecting at least one form from various forms as shown in FIG. 3, for example. Here, (a) of the figure is provided with one pad portion 1a having a size capable of arranging one solder ball (connection member 3) to be described later. Further, FIGS. 7B and 7C are provided with a plurality of pad portions 1a having a size capable of arranging one solder ball. Further, FIG. 4D is provided with a pad portion 1b having a size capable of arranging a plurality of solder balls in the extending direction and a dummy pad 1c electrically separated from the pad portion 1b. is there. FIG. 5E shows a plurality of pad portions 1b having a size capable of arranging a plurality of solder balls in the extending direction. Further, FIG. 5F shows a combination of a pad portion 1b having a size capable of arranging a plurality of solder balls in the extending direction and a pad portion 1a having a size capable of arranging one solder ball. Is. FIG. 6G shows a plurality of pad portions 1d having the same circular shape as the cross-sectional shape of the solder ball.

この場合、図3(b)〜(g)の電極パッド1を適用したときには、電極パッド1の延設方向に複数の半田ボール(接続部材3)を配置することができる。したがって、電極パッド1を後述の支持基板9に形成された中継線2に接続する際に、溶融した半田ボールの表面張力作用により、デバイスチップ5の自己センタリング(セルファライメント)が行われ、デバイスチップ5は支持基板9の所定位置に適切に配置させることになる。なお、上記パッド部1a〜1dは、デバイスチップ5の自己センタリング(セルファライメント)効果が得られるように、適切な数量だけ設けられる。 In this case, when the electrode pad 1 shown in FIGS. 3B to 3G is applied, a plurality of solder balls (connecting members 3) can be arranged in the extending direction of the electrode pad 1. Therefore, when the electrode pad 1 is connected to the relay line 2 formed on the support substrate 9 described later, the device chip 5 is self-centered (cell alignment) by the surface tension action of the molten solder ball, and the device chip. 5 is appropriately arranged at a predetermined position of the support substrate 9. In addition, the said pad parts 1a-1d are provided by appropriate quantity so that the self centering (cell alignment) effect of the device chip 5 may be acquired.

上記デバイスチップ5を支持する支持基板9の一面には、デバイスチップ5の複数の電極パッド1に対向させて複数の中継線2が形成されている。この複数の中継線2は、デバイスチップ5の複数の電極パッド1と後述の多層回路基板11の複数の引出線4との電気的接続を中継するものであり、デバイスチップ5の複数の光変調素子6に対応した大きさで、図4に示すように平面視短冊状の例えば石英等の透明基板からなる支持基板9の長軸方向に互い違いに4列形成された平面視長方形状の複数の貫通孔10の長軸に平行な両縁部から支持基板9の長軸に対して略直交する方向に延びて形成されている。又は左右に扇状に広がって形成されてもよい。そして、複数の中継線2の貫通孔10側の端部は、上記複数の電極パッド1の配列ピッチと同じ配列ピッチで貫通孔10の長軸に沿って形成されている。   On one surface of the support substrate 9 that supports the device chip 5, a plurality of relay lines 2 are formed to face the plurality of electrode pads 1 of the device chip 5. The plurality of relay lines 2 relay the electrical connection between a plurality of electrode pads 1 of the device chip 5 and a plurality of lead lines 4 of a multilayer circuit board 11 to be described later. As shown in FIG. 4, a plurality of rectangular shapes in plan view formed in four rows alternately in the major axis direction of a support substrate 9 made of a transparent substrate such as quartz having a plan view shape as shown in FIG. It is formed extending from both edge portions parallel to the long axis of the through hole 10 in a direction substantially orthogonal to the long axis of the support substrate 9. Alternatively, it may be formed in a fan shape on the left and right. And the edge part by the side of the through-hole 10 of the some relay wire 2 is formed along the major axis of the through-hole 10 with the same arrangement pitch as the arrangement pitch of the said several electrode pad 1. FIG.

この場合、図4において、左側から2列目の貫通孔10は、1列目の隣接する貫通孔10の間を補間するようにその並び方向にずれて形成されており、3列目の貫通孔10は、該貫通孔10に挿入された複数の光変調素子6が1列目の貫通孔10に挿入されたデバイスチップ5の複数の光変調素子6の間を夫々補間するようにその並び方向にずれて形成され、4列目の貫通孔10は、該貫通孔10に挿入された複数の光変調素子6が2列目の貫通孔10に挿入されたデバイスチップ5の複数の光変調素子6の間を夫々補間するようにその並び方向にずれて形成されている。   In this case, in FIG. 4, the through holes 10 in the second row from the left are formed so as to be shifted in the arrangement direction so as to interpolate between the adjacent through holes 10 in the first row. The holes 10 are arranged so that the plurality of light modulation elements 6 inserted into the through holes 10 interpolate between the plurality of light modulation elements 6 of the device chip 5 inserted into the first row of through holes 10. The fourth row of through-holes 10 are formed so as to be shifted in the direction, and the plurality of light modulation elements 6 inserted into the through-holes 10 are inserted into the second row of through-holes 10. They are formed so as to be shifted in the arrangement direction so as to interpolate between the elements 6 respectively.

したがって、上記支持基板9の各列の貫通孔10に夫々デバイスチップ5の複数の光変調素子6を挿入して形成された空間光変調装置を使用して露光装置を構成し、上記貫通孔10の列に対して略直交する方向で、図4において左から右に向かって被露光体を搬送しながら、上記貫通孔10の各列に挿入された複数の光変調素子6を列毎に、所定のタイミングで個別に駆動して被露光体を重ね露光するならば、緻密な露光パターンを形成することができる。   Therefore, an exposure apparatus is configured using a spatial light modulator formed by inserting a plurality of light modulation elements 6 of the device chip 5 into the through holes 10 of each row of the support substrate 9. A plurality of light modulation elements 6 inserted into each row of the through holes 10 are transferred for each column while conveying the object to be exposed from left to right in FIG. If the object to be exposed is overlapped and exposed individually at a predetermined timing, a dense exposure pattern can be formed.

上記デバイスチップ5の複数の電極パッド1上には、接続部材3が設けられている。この接続部材3は、デバイスチップ5の各電極パッド1と支持基板9の各中継線2の一端部とを電気的にフリップチップ接続するものであり、半田バンプ(ボール)や金(Au)バンプ等である。以下の説明においては、接続部材3が半田ボールである場合について述べる。   A connection member 3 is provided on the plurality of electrode pads 1 of the device chip 5. This connection member 3 electrically flip-chip-connects each electrode pad 1 of the device chip 5 and one end of each relay line 2 of the support substrate 9, and includes solder bumps (balls) and gold (Au) bumps. Etc. In the following description, a case where the connecting member 3 is a solder ball will be described.

上記中継線2の他端部に一端部を電気的に接続させて、回路基板11に複数の引出線4が形成されている。この引出線4は、デバイスチップ5の各光変調素子6の電極7と外部の駆動回路とを電気的に接続するためのもので、図5に示すように、支持基板9に形成された複数の貫通孔10に対応してデバイスチップ5の外形寸法よりも若干大きい大きさの複数の貫通孔12を形成した回路基板11に多層形成されており、各引出線4の貫通孔12側の一端部は回路基板11の表面に露出し、他端部は回路基板11の縁部に設けられたコネクタ13の複数のコンタクトピン14に夫々接続されている。図6は、図5のA−A線断面図である。この例においては、基板15上に層間絶縁膜16を介して引出線4が8層で形成されている。なお、同図において、符号17は保護膜である。   A plurality of lead wires 4 are formed on the circuit board 11 by electrically connecting one end portion to the other end portion of the relay line 2. The lead wire 4 is for electrically connecting the electrode 7 of each light modulation element 6 of the device chip 5 and an external drive circuit. As shown in FIG. 5, a plurality of lead wires 4 are formed on the support substrate 9. The circuit board 11 is formed with a plurality of through-holes 12 having a size slightly larger than the outer dimensions of the device chip 5 corresponding to the through-holes 10, and one end of each lead wire 4 on the through-hole 12 side. The part is exposed on the surface of the circuit board 11, and the other end is connected to a plurality of contact pins 14 of the connector 13 provided on the edge of the circuit board 11. 6 is a cross-sectional view taken along line AA in FIG. In this example, the lead lines 4 are formed in eight layers on the substrate 15 via the interlayer insulating film 16. In the figure, reference numeral 17 denotes a protective film.

次に、このような空間光変調装置の配線構造の作製について説明する。
先ず、平面視短冊状の電気光学結晶材料の一面を加工して、長軸方向に例えば100μm以下のピッチで並べて角柱状の複数の光変調素子6を形成したデバイスチップ5を準備する。
Next, the production of the wiring structure of such a spatial light modulator will be described.
First, a device chip 5 is prepared in which one surface of a strip-like electro-optic crystal material in a plan view is processed and arranged in the major axis direction at a pitch of, for example, 100 μm or less to form a plurality of prismatic light modulation elements 6.

このようなデバイスチップ5は、例えば、次のようにして形成することができる。即ち、平面視短冊状の電気光学結晶材料の一面に、その長軸上の所定幅を残してその両側部を所定深さだけ切除し、切除部8を形成する。次に、この切除部8の側面及び底面8aに蒸着、スパッタリング等の公知の成膜技術を適用して金属膜を成膜する。続いて、上記長軸に交差させて所定幅の分離溝18を例えば約100μmピッチで上記切除部8の深さよりも深く形成し、互いに電気的に分離されて長軸方向に約100μmピッチで並んだ複数の光変調素子6を形成する。その後、例えば、上記金属膜上にメッキにより金(Au)を形成する。これにより、複数の光変調素子6の並び方向に平行な対向面に夫々電極7が形成される。さらに、図3に示す電極パッド1の形状のうちからいずれか一つを選択し、切除部8の底面8aに被着した例えば金(Au)を含む下地の金属膜を例えばレーザ加工してパッド部1a〜1dを形成する。この場合、デバイスチップ5は、裏面5aにて各光変調素子6の端面に対応した領域19の外側領域に高反射膜20を被着させ、該領域19内には反射防止膜を被着させるとよい。 Such a device chip 5 can be formed as follows, for example. That is, the cut portion 8 is formed on one surface of the electro-optic crystal material having a strip shape in plan view by cutting away both sides thereof by a predetermined depth while leaving a predetermined width on the long axis. Next, a metal film is formed on the side surface and the bottom surface 8a of the cut portion 8 by applying a known film formation technique such as vapor deposition or sputtering. Subsequently, a separation groove 18 having a predetermined width is formed so as to intersect the major axis at a pitch of about 100 μm, for example, deeper than the depth of the cut portion 8, and is electrically separated from each other and arranged at a pitch of about 100 μm in the major axis direction. A plurality of light modulation elements 6 are formed. Thereafter, for example, gold (Au) is formed on the metal film by plating. As a result, the electrodes 7 are respectively formed on the opposing surfaces parallel to the arrangement direction of the plurality of light modulation elements 6. Further, any one of the shapes of the electrode pad 1 shown in FIG. 3 is selected, and the underlying metal film including, for example, gold (Au) deposited on the bottom surface 8a of the cut portion 8 is subjected to, for example, laser processing to pad. The parts 1a to 1d are formed. In this case, the device chip 5 deposits the high reflection film 20 on the outer side of the area 19 corresponding to the end face of each light modulation element 6 on the back surface 5a, and deposits the antireflection film in the area 19. Good.

また、デバイスチップ5の複数の光変調素子6に対応した大きさの平面視長方形状の複数の貫通孔10を、平面視短冊状の透明基板の長軸方向に互い違いに四列形成すると共に、各貫通孔10の長軸に平行な両縁部から透明基板の長軸に対して略直交する方向に延びて形成され、貫通孔10側の端部が複数の電極パッド1の配列ピッチと同じ配列ピッチで貫通孔10の長軸に沿って形成された複数の中継線2を設けた支持基板9を準備する。   In addition, a plurality of through holes 10 having a rectangular shape in plan view having a size corresponding to the plurality of light modulation elements 6 of the device chip 5 are formed in four rows alternately in the major axis direction of the transparent substrate having a strip shape in plan view, It is formed extending from both edge portions parallel to the long axis of each through hole 10 in a direction substantially orthogonal to the long axis of the transparent substrate, and the end portion on the through hole 10 side is the same as the arrangement pitch of the plurality of electrode pads 1 A support substrate 9 provided with a plurality of relay lines 2 formed along the long axis of the through holes 10 at an arrangement pitch is prepared.

さらに、支持基板9に形成された複数の貫通孔10に対応して、デバイスチップ5の外形寸法よりも若干大きい大きさの複数の貫通孔12を回路用基板に形成し、貫通孔12側の一端部を表面に露出させ、他端部を回路用基板の縁部に設けられたコネクタ13の複数のコンタクトピン14に夫々接続させて多層形成された複数の引出線4を備えた回路基板11を準備する。     Further, corresponding to the plurality of through holes 10 formed in the support substrate 9, a plurality of through holes 12 having a size slightly larger than the outer dimensions of the device chip 5 are formed in the circuit board, and the through holes 12 side are formed. A circuit board 11 having a plurality of lead wires 4 formed in multiple layers with one end exposed on the surface and the other end connected to a plurality of contact pins 14 of a connector 13 provided at an edge of the circuit board. Prepare.

次に、支持基板9の引出線4形成面を上側にして支持台の上に置く。また、複数の電極パッド1のパッド部1a〜1d上に公知の技術により半田ボール3を付着させたデバイスチップ5をその複数の光変調素子6を支持基板9の貫通孔10に挿入させた状態で支持基板9上に配置する。   Next, the lead wire 4 forming surface of the support substrate 9 is placed on the support table with the upper surface facing upward. In addition, the device chip 5 in which the solder balls 3 are attached to the pad portions 1 a to 1 d of the plurality of electrode pads 1 by a known technique is inserted into the through holes 10 of the support substrate 9. And placed on the support substrate 9.

続いて、支持基板9及びデバイスチップ5の双方に、例えば赤外線ランプを使用して赤外線を照射して半田ボール3を溶融させる。これにより、溶融した半田ボール3の表面張力作用により、デバイスチップ5の自己センタリング(セルファライメント)が行われ、各デバイスチップ5は支持基板9の所定位置に適切に配置される。同時に、支持基板9の中継線2とデバイスチップ5の電極パッド1とが半田ボール3を介して電気的に接続される。   Subsequently, both the support substrate 9 and the device chip 5 are irradiated with infrared rays using, for example, an infrared lamp to melt the solder balls 3. As a result, the device chip 5 is self-centered (self-aligned) by the surface tension action of the melted solder ball 3, and each device chip 5 is appropriately arranged at a predetermined position of the support substrate 9. At the same time, the relay line 2 of the support substrate 9 and the electrode pad 1 of the device chip 5 are electrically connected via the solder ball 3.

引き続いて、支持基板9に形成された中継線2の貫通孔10側端部とは反対側の端部上に、例えば異方性導電フィルムや異方性導電ペースト等の異方性導電部材21を被着する。そして、回路基板11の貫通孔12を支持基板9上のデバイスチップ5に位置合わせした後、回路基板11を支持基板9に圧接し、同時に異方性導電部材21の被着部分を加熱して両基板9,11を熱圧着する。これにより、回路基板11の引出線4と支持基板9の中継線2とが異方性導電部材21を介して電気的に接続されると共に、両基板9,11が接合される。   Subsequently, an anisotropic conductive member 21 such as an anisotropic conductive film or anisotropic conductive paste is formed on the end of the relay wire 2 formed on the support substrate 9 on the side opposite to the end of the through hole 10 side. Adhere. And after aligning the through-hole 12 of the circuit board 11 with the device chip 5 on the support substrate 9, the circuit board 11 is press-contacted to the support substrate 9, and the adherend part of the anisotropic conductive member 21 is heated simultaneously. Both substrates 9 and 11 are thermocompression bonded. As a result, the lead wire 4 of the circuit board 11 and the relay line 2 of the support substrate 9 are electrically connected via the anisotropic conductive member 21 and the boards 9 and 11 are joined.

このようにして、回路基板11の引出線4、支持基板9の中継線2、及びデバイスチップ5の電極パッド1が互いに電気的に接続された空間光変調装置の配線構造が出来上がる。その結果、外部の駆動回路から複数の光変調素子6の各電極7に個別に駆動電圧を供給することが可能となる。   In this way, a wiring structure of the spatial light modulator is completed in which the lead wire 4 of the circuit board 11, the relay line 2 of the support substrate 9, and the electrode pad 1 of the device chip 5 are electrically connected to each other. As a result, it is possible to individually supply a drive voltage to each electrode 7 of the plurality of light modulation elements 6 from an external drive circuit.

図7はデバイスチップ5の他の形態を示す正面図である。このデバイスチップ5は、複数の光変調素子6の並び方向に平行な両端縁部を複数の光変調素子6の高さよりも高く形成し、該各縁部の上面に光変調素子6の一対の電極7に電気的に接続する電極パッド1を形成したものである。   FIG. 7 is a front view showing another form of the device chip 5. The device chip 5 has both end edges parallel to the arrangement direction of the plurality of light modulation elements 6 higher than the height of the plurality of light modulation elements 6, and a pair of light modulation elements 6 on the upper surface of each edge. An electrode pad 1 electrically connected to the electrode 7 is formed.

このようなデバイスチップ5は、次のようにして形成することができる。即ち、平面視短冊状の電気光学結晶材料の一面に、その長軸上の所定幅及び長軸に平行な両端縁部の所定幅を残して長軸に平行に所定深さの切除部8を形成する。次に、二つの切除部8に挟まれた少なくとも上記長軸上の凸部22を遮蔽して電気光学結晶材料の上記一面側からSiO等の無機物23をスパッタリング等により被着し、上記両端縁部の凸部24を上記長軸上の凸部22よりも高さを高く形成する。続いて、上記長軸上の凸部22の上面を遮蔽して上記二つの切除部8の側面及び底面並びに両端縁部の凸部24上に蒸着、スパッタリング等の公知の成膜技術を適用して金属膜を成膜する。さらに、上記長軸に交差させて所定幅の分離溝18(図2参照)を所定ピッチで上記切除部8の深さよりも深く形成し、互いに電気的に分離され長軸方向に所定ピッチで並んだ複数の光変調素子6を形成する。その後、例えば、上記金属膜上にメッキにより金(Au)を形成する。これにより、複数の光変調素子6の並び方向に平行な対向面には夫々電極7が形成され、両端縁部の凸部24上には一端部を電極7に電気的に接続して電極パッド1が形成される。 Such a device chip 5 can be formed as follows. That is, the cut portion 8 having a predetermined depth parallel to the long axis is left on one surface of the electro-optic crystal material having a rectangular shape in plan view, leaving a predetermined width on the long axis and a predetermined width at both ends parallel to the long axis. Form. Next, at least the convex portion 22 on the long axis sandwiched between the two cut portions 8 is shielded, and an inorganic material 23 such as SiO 2 is deposited from the one surface side of the electro-optic crystal material by sputtering or the like. The convex portion 24 at the edge is formed to be higher than the convex portion 22 on the long axis. Subsequently, the upper surface of the convex portion 22 on the major axis is shielded, and a known film formation technique such as vapor deposition or sputtering is applied to the side and bottom surfaces of the two cut portions 8 and the convex portions 24 at both end edges. To form a metal film. Further, a separation groove 18 (see FIG. 2) having a predetermined width is formed deeper than the depth of the cut portion 8 at a predetermined pitch so as to intersect the long axis, and is electrically separated from each other and aligned at a predetermined pitch in the long axis direction. A plurality of light modulation elements 6 are formed. Thereafter, for example, gold (Au) is formed on the metal film by plating. As a result, the electrodes 7 are respectively formed on the opposing surfaces parallel to the arrangement direction of the plurality of light modulation elements 6, and one end portion is electrically connected to the electrode 7 on the convex portion 24 at both end edges, and the electrode pad 1 is formed.

このようなデバイスチップ5は、図8に示すように、貫通孔10を形成していない平坦な透明基板からなる支持基板9上に配置することができ、空間光変調装置の製造が容易になる。また、この場合、光変調素子6の端面6aは、支持基板9の面9aから離隔しているので、光変調素子6に対して外部応力が作用せず、複屈折異常が発生することがない。したがって、光変調素子6のオン・オフ駆動における射出光のコントラストが高く、S/Nの良いスイッチング特性を得ることができる。   As shown in FIG. 8, such a device chip 5 can be disposed on a support substrate 9 made of a flat transparent substrate in which the through-hole 10 is not formed, and the manufacture of the spatial light modulator is facilitated. . In this case, since the end face 6a of the light modulation element 6 is separated from the surface 9a of the support substrate 9, external stress does not act on the light modulation element 6 and birefringence abnormality does not occur. . Therefore, the contrast of the emitted light is high when the light modulation element 6 is turned on / off, and switching characteristics with good S / N can be obtained.

図9はデバイスチップ5の更に他の形態を示す図であり、平坦な支持基板9上に配置した状態を示す断面図である。同図に示すように、デバイスチップ5は、光変調素子6を形成した面とは反対側の面(裏面5a)に電極パッド1を光変調素子6の電極7に一端部を電気的に接続させて形成している。これにより、貫通孔10を形成していない平坦な透明基板からなる支持基板9上にデバイスチップ5を配置して、デバイスチップ5の電極パッド1と支持基板9の中継線2とを半田ボール3を介して電気的に接続することができる。   FIG. 9 is a view showing still another form of the device chip 5, and is a cross-sectional view showing a state in which the device chip 5 is arranged on a flat support substrate 9. As shown in the figure, the device chip 5 is electrically connected to the electrode pad 1 on the surface (back surface 5 a) opposite to the surface on which the light modulation element 6 is formed and one end to the electrode 7 of the light modulation element 6. Let it form. Thus, the device chip 5 is arranged on the support substrate 9 made of a flat transparent substrate in which the through hole 10 is not formed, and the electrode pad 1 of the device chip 5 and the relay line 2 of the support substrate 9 are connected to the solder ball 3. Can be electrically connected.

なお、上記実施形態においては、複数のデバイスチップ5が四列に並んでいる場合について説明したが、本発明はこれに限られず、多数の光変調素子6を一直線状に並べて有する細長状の一個のデバイスチップ5であってもよく、又は複数のデバイスチップ5を一直線状に並べたものでもよく、複数のデバイスチップ5を二列に並べたものであってもよい。   In the above-described embodiment, the case where a plurality of device chips 5 are arranged in four rows has been described. However, the present invention is not limited to this, and one elongated chip having a large number of light modulation elements 6 arranged in a straight line. Or a plurality of device chips 5 arranged in a straight line, or a plurality of device chips 5 arranged in two rows.

また、上記実施形態においては、支持基板9が透明基板からなる場合について説明したが、本発明はこれに限られず、デバイスチップ5の各光変調素子6に対応して貫通孔10を形成するならば、支持基板9は透明基板でなくてもよい。   In the above embodiment, the case where the support substrate 9 is made of a transparent substrate has been described. However, the present invention is not limited to this, and if the through hole 10 is formed corresponding to each light modulation element 6 of the device chip 5. For example, the support substrate 9 may not be a transparent substrate.

1…電極パッド
2…中継線
3…半田ボール(接続部材)
4…引出線
5…デバイスチップ
6…光変調素子
7…電極
9…支持基板
10…貫通孔
11…回路基板
DESCRIPTION OF SYMBOLS 1 ... Electrode pad 2 ... Relay wire 3 ... Solder ball (connection member)
DESCRIPTION OF SYMBOLS 4 ... Lead wire 5 ... Device chip 6 ... Light modulation element 7 ... Electrode 9 ... Support substrate 10 ... Through-hole 11 ... Circuit board

Claims (5)

電気光学結晶材料から成る複数の光変調素子を所定の配列ピッチで並べて備えたデバイスチップを有し、前記複数の光変調素子を個別に駆動制御して射出光をオン・オフする空間光変調装置の配線構造であって、
前記デバイスチップの一面に前記複数の光変調素子の並び方向に略直交する方向に延設され、前記並び方向に平行な前記各光変調素子の対向面に設けられた一対の電極に夫々一端を電気的に接続した複数の電極パッドと、
前記デバイスチップを支持する支持基板の一面に形成され、一端部を前記デバイスチップの前記複数の電極パッドに対向させて設けた複数の中継線と、
前記各電極パッドと前記各中継線の一端部とを電気的にフリップチップ接続する接続部材と、
前記中継線の他端部に一端部を電気的に接続させて、回路基板に多層形成された複数の引出線と、
を備えたことを特徴とする空間光変調装置の配線構造。
A spatial light modulation device having a device chip having a plurality of light modulation elements made of an electro-optic crystal material arranged at a predetermined arrangement pitch, and individually driving and controlling the plurality of light modulation elements to turn on and off the emitted light The wiring structure of
One end of each of the pair of electrodes provided on one surface of the device chip extending in a direction substantially orthogonal to the arrangement direction of the plurality of light modulation elements and provided on the opposing surface of each of the light modulation elements parallel to the arrangement direction. A plurality of electrically connected electrode pads;
A plurality of relay lines formed on one surface of the support substrate for supporting the device chip, and having one end portion opposed to the plurality of electrode pads of the device chip;
A connection member for electrically flip-chip connecting each electrode pad and one end of each relay line;
A plurality of leader lines formed in a multilayer on the circuit board by electrically connecting one end to the other end of the relay line;
A wiring structure for a spatial light modulator, comprising:
前記デバイスチップは、前記複数の光変調素子が略一直線状に並ぶように、前記支持基板上に所定の配列ピッチで複数配置され、互い違いに複数列配置されたことを特徴とする請求項1記載の空間光変調装置の配線構造。   2. The device chips are arranged in a plurality of rows at a predetermined arrangement pitch on the support substrate so that the plurality of light modulation elements are arranged in a substantially straight line, and arranged in a plurality of rows alternately. Wiring structure of the spatial light modulation device. 前記デバイスチップは、前記複数の光変調素子の並び方向に平行な両端縁部を前記複数の光変調素子の高さよりも高く形成し、該各縁部の上面に前記光変調素子の一対の電極に電気的に接続する電極パッドを形成し、透明で平坦な前記支持基板に支持されたことを特徴とする請求項1又は2記載の空間光変調装置の配線構造。   In the device chip, both end edges parallel to the arrangement direction of the plurality of light modulation elements are formed higher than the height of the plurality of light modulation elements, and a pair of electrodes of the light modulation elements are formed on the upper surfaces of the edge parts. 3. The wiring structure for a spatial light modulator according to claim 1, wherein an electrode pad electrically connected to the substrate is formed and supported by the transparent and flat support substrate. 前記支持基板は、前記デバイスチップの前記複数の光変調素子に対応した大きさの貫通孔を形成したことを特徴とする請求項1又は2記載の空間光変調装置の配線構造。   3. The wiring structure for a spatial light modulator according to claim 1, wherein the support substrate is formed with a through hole having a size corresponding to the plurality of light modulation elements of the device chip. 前記接続部材は、半田ボールであることを特徴とする請求項1〜4のいずれか1項に記載の空間光変調装置の配線構造。   The wiring structure of the spatial light modulation device according to claim 1, wherein the connection member is a solder ball.
JP2009063888A 2009-03-17 2009-03-17 Wiring structure of spatial light modulator Pending JP2010217469A (en)

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Publication number Priority date Publication date Assignee Title
JP2015055840A (en) * 2013-09-13 2015-03-23 富士通オプティカルコンポーネンツ株式会社 Optical module and optical transmitter
JP2015169798A (en) * 2014-03-07 2015-09-28 富士通オプティカルコンポーネンツ株式会社 Optical module

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JPS63159823A (en) * 1986-12-23 1988-07-02 Minolta Camera Co Ltd Optical shutter array
JPH0466915A (en) * 1990-07-04 1992-03-03 Minolta Camera Co Ltd Optical shutter device
JP2004287215A (en) * 2003-03-24 2004-10-14 Fuji Photo Film Co Ltd Transmission type optical modulation apparatus and method for packaging the same
JP2006084501A (en) * 2004-09-14 2006-03-30 Fujitsu Ltd Optical module

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JPS63159823A (en) * 1986-12-23 1988-07-02 Minolta Camera Co Ltd Optical shutter array
JPH0466915A (en) * 1990-07-04 1992-03-03 Minolta Camera Co Ltd Optical shutter device
JP2004287215A (en) * 2003-03-24 2004-10-14 Fuji Photo Film Co Ltd Transmission type optical modulation apparatus and method for packaging the same
JP2006084501A (en) * 2004-09-14 2006-03-30 Fujitsu Ltd Optical module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015055840A (en) * 2013-09-13 2015-03-23 富士通オプティカルコンポーネンツ株式会社 Optical module and optical transmitter
JP2015169798A (en) * 2014-03-07 2015-09-28 富士通オプティカルコンポーネンツ株式会社 Optical module

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