TWI833642B - Copper foil for flexible printed circuit boards, copper-clad laminates using the same, flexible printed circuit boards and electronic equipment - Google Patents

Abstract

The present invention provides a copper foil for a flexible printed circuit board that has excellent circuit linearity and is suitable for fine circuits, a copper-clad laminate using the copper foil, a flexible printed circuit board, and an electronic device. The present invention is a copper foil for flexible printed circuit boards. It is a rolled copper foil containing more than 99.96% by mass of Cu and the remaining part is composed of unavoidable impurities. It is heat treated at 300°C x 30 minutes to treat the rolled copper foil. The EBSD measurement was performed with a measuring field of view of 150 μm × 150 μm on the rolling surface of the foil. When the orientation difference of 5° or more is regarded as the grain boundary, the standard deviation of the crystal grain size is 3.0 μm or less.

Description

Copper foil for flexible printed circuit boards, copper-clad laminates using the same, flexible printed circuit boards and electronic equipment

The present invention relates to a copper foil suitable for wiring components such as flexible printed circuit boards, copper-clad laminates using the copper foil, flexible wiring boards, and electronic equipment.

As circuit boards of electronic devices, flexible printed circuit boards (flexible wiring boards, hereafter referred to as "FPC") are widely used. FPC is formed by etching a copper clad laminate (hereinafter referred to as CCL) formed by laminating copper foil and resin to form wiring, and covering it with a resin layer called a cover layer. By. Examples of the resin bonded to CCL include polyimide, liquid crystal polymer, and PTFE, but are not limited thereto.

In addition, in this way, the copper-clad laminated body undergoes an etching process in which the circuit is printed by applying a resist and exposure steps in order to form a target circuit, and then removes unnecessary parts of the copper layer. However, there is the following problem: it is formed by etching. circuit, the circuit will not be as wide as the mask pattern preformed on the surface. The reason is that the copper circuit formed by etching will be gradually etched (collapsed) from the surface of the copper layer downward, that is, toward the resin layer. Therefore, technology to reduce this "collapse" is being developed (Patent Document 1). [Prior technical literature] [Patent Document]

[Patent Document 1] Japanese Patent Application Publication No. 2011-216528

[Problem to be solved by the invention]

In addition, as electronic devices become smaller, thinner, and more powerful, high-density packaging of FPC is required. In order to build an FPC with high density, circuit miniaturization is required. However, in order to maintain the integrity of impedance in a micro circuit, it is important that the circuit width is fixed throughout the circuit. The reason is that when the width of the circuit is not fixed for the entire circuit, the circuit will be in close proximity (contact) with the adjacent circuit, and there is a risk of becoming defective. Furthermore, as mentioned above, since there is a tendency for the circuit width to spread on the resin layer side (bottom side), the bottom side is more likely to come into contact with adjacent circuits, and keeping the circuit width (bottom width) on the bottom side fixed throughout the circuit becomes more important. Especially in the case of fine circuits with a bottom width of 35 μm or less, such defects are more likely to occur. However, as described in the above-mentioned Patent Document 1, although a technology for reducing the difference (collapse) between the top width and the bottom width of a circuit is disclosed, no technology focusing on the bottom width has been discovered.

The present invention was completed in order to solve the above problems, and aims to provide a copper foil for a flexible printed circuit board that has excellent circuit linearity and is suitable for micro circuits, a copper-clad laminate using the copper foil, a flexible printed circuit board, and an electronic device. [Technical means to solve the problem]

The present inventors have conducted various studies and found that in order to improve the linearity of the circuit formed by etching copper foil, it is important that the metal structure of the copper foil is close to uniform, in other words, the size of the crystal grains is consistent (the standard deviation of the crystal grain size is small) ). The reason is considered to be that if the standard deviation of the crystal grain size is small, the chemical reaction (etching reaction) during circuit formation by etching occurs uniformly.

That is, the copper foil for flexible printed circuit boards of the present invention is a rolled copper foil that contains 99.96 mass % or more of Cu and the remainder is composed of unavoidable impurities. When heat treatment is performed at 300° C. The measurement field of view of the rolling surface of the copper foil is 150 μm × 150 μm for EBSD measurement. When the orientation difference of 5° or more is regarded as the grain boundary, the standard deviation of the crystal grain size is 3.0 μm or less.

The copper foil for flexible printed circuit boards of the present invention is preferably composed of refined copper specified in JIS-H3100 (C1100) or oxygen-free copper specified in JIS-H3100 (C1020). The copper foil for flexible printed circuit boards of the present invention preferably contains 10 to 50 ppm by mass of P.

The copper-clad laminate system of the present invention is formed by laminating the above copper foil and resin layer for the flexible printed circuit board. The flexible printed circuit board of the present invention is formed by forming a circuit on the copper foil in the copper-clad laminate. The electronic device of the present invention is formed using the above-mentioned flexible printed circuit board. [Effects of the invention]

According to the present invention, it is possible to obtain a copper foil for a flexible printed circuit board that has good circuit linearity and is suitable for micro circuits.

Hereinafter, embodiments of the copper foil of the present invention will be described. In addition, in the present invention, % means mass % unless otherwise specified.

＜Composition＞ The copper foil of the present invention contains more than 99.96% by mass of Cu, and the remainder is composed of unavoidable impurities. It is preferable if it contains 10 to 50 ppm by mass of P as an added element. Here, if Cu is in the range of 99.96 mass % or more, in order to improve the mechanical properties of the copper foil, the copper foil may also contain a trace amount of Ag, Sn, Zr, etc. If P is contained as an additive element, the metal structure (crystal grain size) tends to become uniform, and the bottom width of the circuit after etching tends to become fixed. However, if the P content exceeds 50 mass ppm (0.005 mass %), the electrical conductivity decreases, making it unsuitable for flexible printed circuit boards.

The copper foil of the present invention may also be composed of refined copper specified in JIS-H3100 (C1100) or oxygen-free copper of JIS-H3100 (C1020), or oxygen-free copper containing trace amounts of Ag, Sn, Zr, etc. Refined copper may further contain 10 to 50 ppm by mass of P as an additive element in the composition.

The P concentration is analyzed using the molybdophosphoric acid extraction phosphomolybdate blue absorbance measurement method specified in JIS H 1058 (Quantitative method for phosphorus in copper and copper alloys) (P concentration: applicable to 0.0005% to 0.01% ) to implement.

＜Standard deviation of crystal particle size＞ When the rolled copper foil is heat-treated at 300°C for 30 minutes, EBSD measurement is performed on the rolling surface after heat treatment with a measurement field of view of 150 μm The standard deviation of the diameter is less than 3.0 μm. The standard deviation of the crystal grain size is calculated by crystal orientation analysis in EBSD (Electron Back Scatter Diffraction) measurement. The actual measurement is based on electrolytic polishing of the sample surface and observation using SEM-EBSD (JSM-IT500HR, TSL EDAX SCAN GENERATOR-II, TSL OIM DATA COLECTION7, Japan Electronics Co., Ltd.) under the following conditions. Furthermore, the EBSD measurement only needs to be carried out on a sample plate (150 mm × 150 mm) cut out of the copper foil after autothermal treatment.

・WD: 15.0 mm or 16.0 mm ・Camera elevation angle: 2.7 degrees ・Sample tilt angle: 70.0 degrees ・Camera azimuth angle: 0.0 degrees ・Acceleration voltage: 15.0 kV ・Probe current: 9.5 nA ・SS-CCD camera: 8×8 grid ・Gain: 300～350 (Pattern brightness: 0.90～0.95) ・Exposure time: 4 ms ・Background points count: 20 times ・Observation magnification: 600 times ・Observation field of view: 150 μm×150 μm ・Step size: 0.5 μm ・Scan mode: Hexagonal grid ・Phase list: Copper

In addition, the analysis of the obtained measurement data was performed under the following conditions using OIM Analysis Ver8.0 x64 Advanced package. ・Implement Crean Up using the grain expansion method once (grain tolerance angle: 5, minimum grain size: 2 points, multi-column: 1, iteration score: 0.25) ・The grains at the edge of the EBSD diagram are not calculated ・Calculate the average and standard deviation of the crystal grain size (Diameter) by the Number method (a method in which the total area to be calculated is simply divided by the number of crystal grains) Furthermore, the Number method regards the azimuth difference of 5° or more as the grain boundary to determine the crystal grains, and calculates the crystal grain size by simply dividing the total area to be calculated by the number of crystal grains, which is different from the cutting method. .

It is believed that if the standard deviation of the crystal grain size is 3.0 μm or less, the metal structure of the copper foil is nearly uniform (the size of the crystal grains is consistent), and the chemical reaction (etching reaction) during circuit formation caused by etching occurs uniformly.

<Circuit linearity> After surface treatment of the copper foil, cut out a sample plate (150 mm × 150 mm), apply heat treatment to make a copper-clad laminated board, and then use the following etching conditions to cut out the copper-clad laminated board. A linear circuit is formed on the copper foil side (see Figure 2). When the bottom width w of the circuit is measured multiple times, it is expressed by the standard deviation σ (μm) of the bottom width w (μm) and the average value Aw (μm) of the bottom width w. If σ/Aw does not reach 0.03, it is better. The reason is that if σ/Aw is less than 0.03, it is empirically known that the linearity of the circuit tends to be excellent. Etching conditions: Etching liquid composition: CuCl ₂ -2H ₂ O = 3 mol/L (specific gravity 1.24), HCl = 4 mol/L, liquid temperature = 50°C, etching liquid spray pressure = 0.22 MPa, for shielded circuits Parts of the rolled copper foil are etched to form circuits. σ/Aw is obtained by measuring the actual bottom width w of the circuit formed by etching multiple times (preferably 10 or more places, more preferably 50 places, further preferably 100 places every 30 μm in the long side direction of the circuit) Find σ and Aw, and calculate σ/Aw.

Specifically, as shown in FIG. 1 , circuits 21 and 22 formed by etching copper foil expand from the surface toward the bottom (resin layer 4 side (bottom side)), and the circuit width (bottom width) w on the bottom side is Measured multiple times. Here, the symbol wt is the circuit width (top width) on the surface (top) side. Furthermore, as shown in Figure 2, each circuit 21, 22 can be measured at specific measurement points, such as circuit widths w1, w2, w100, w101, w102, w200, etc., at 50 locations. It can also be measured on a single circuit.

If σ/Aw is less than 0.03, the unevenness of the bottom width w is small, indicating excellent linearity of the circuit. In particular, the linearity of the circuit is excellent even in the range of bottom width w of 10 to 35 μm.

The mask of the circuit portion of the copper foil can be formed by a known method of using a photoresist (dry film resist, etc.) and leaving the resist only on the portion reserved for the circuit through a photomask. As a dry film resist, for example, product name RY-5107 (thickness: 7 μm) manufactured by Hitachi Chemical Co., Ltd. can be used.

Here, FIG. 3 shows the exposure mask used for etching to form a linear circuit when evaluating the linearity of the circuit. There are 10 types of resist/space patterns in the exposure mask. In Figure 3, the space is wider toward the left (numbered side 10) and narrower toward the right. Furthermore, after sequentially exposing, developing, etching, and dry film peeling all the patterns, use SEM to select 1 circuit that is close to the target L/S (L/S=10/40~30/20) from all the patterns. for evaluation.

The thickness of the copper foil is based on the nominal thickness specified in JISC6515, and is preferably 17 μm or less. The thinner the thickness, the smaller the stress applied to the copper foil, which helps to improve the bendability, and also contributes to the miniaturization, thinning, and weight reduction of portable devices.

＜Manufacturing＞ The copper foil of the present invention can be produced in the following manner, for example. First, foil can be produced by adding P to a copper ingot as necessary, melting it, casting it, and then repeating hot rolling, cold rolling, and annealing. Here, intermediate annealing at a predetermined cooling rate can be performed during cold rolling, and the oxide scale generated during the intermediate annealing can be removed and intermediate cold rolling can be performed, followed by final annealing and final cold rolling to obtain the target final thickness. foil. The maximum temperature of intermediate annealing can be set to 350~500℃. The cooling rate of intermediate annealing is preferably from the highest temperature TM (°C) in intermediate annealing to a temperature of 50 to 150°C/h to a temperature of (TM-200)°C.

As mentioned above, if the cooling rate of intermediate annealing is set to 50 to 150°C/h, the cooling rate will be slower than under normal conditions. Moreover, the slower the cooling rate of intermediate annealing, the smaller the temperature gradient within the material (the temperature difference between the first and last cooled parts becomes smaller), thereby making it easier for the metal structure to become uniform (the size of the grains consistent), the standard deviation of the crystal grain size becomes smaller after heat treatment of the final thickness foil. As a result, it is considered that the chemical reaction (etching reaction) during circuit formation by etching occurs uniformly, thereby improving circuit linearity.

Figures 4 and 5 show the mechanism that the more uniform the metal structure is (the size of the grains is consistent), the more the circuit linearity is improved. As shown in Figure 4, the etching liquid penetrates into the copper foil from the resistor-free part (equivalent to the space between linear circuits) and spreads, and the etching spreads from the space toward the left and right sides of the copper foil. At this time, as shown in Figure 1, etching (circuit) spreads from the surface toward the bottom (resin layer side (bottom side)).

Here, as shown in Figure 5 (a), when the metal structure is not uniform (the size of the grains is inconsistent), the unevenness of the bottom width w of the circuits 21 and 22 shown in Figure 1 becomes larger (in Figure 5 In (a), the edges of circuits 21 and 22 are not straight, but curved in an undulating manner). The reason is believed to be as shown in Figure 5(b). For example, within a field of view of 150 μm × 150 μm, if the crystal grains of the copper foil on the circuit 21 side are large and the crystal grains of the copper foil on the circuit 22 side are small, the metal structure will not be the same. Non-uniformity (the size of the grains is inconsistent), the etching speed on the circuit 21 side with large grains becomes larger, the etching amount changes between the parts with smaller grains, and even the unevenness of the bottom width w becomes larger.

Furthermore, in Figure 5(b), since the etching speeds in the grains and grain boundaries are different, if the sizes of the grains are not consistent, the etching speed will locally vary significantly. Furthermore, in the etching solution used in this experiment, the etching speed of grain boundaries is slower than that of crystal grains, but the opposite situation also exists.

＜Copper-clad laminates and flexible printed circuit boards＞ In addition, for the copper foil of the present invention, for example, (1) cast a resin precursor (for example, a polyimide precursor called varnish) and apply heat to polymerize it; and (2) use the same type of thermoplastic as the base film. By laminating the base film on the copper foil of the present invention using an adhesive, a copper-clad laminate (CCL) composed of two layers of copper foil and a resin base material can be obtained. Furthermore, by laminating a base film coated with an adhesive on the copper foil of the present invention, a copper-clad laminate (CCL) composed of three layers: copper foil, a resin base material, and an adhesive layer between them can be obtained. During the manufacture of these CCLs, the copper foil is heat treated and recrystallized. A flexible printed circuit board (flexible wiring board) can be obtained by forming a circuit using photolithography technology, plating the circuit if necessary, and laminating a cover film.

Therefore, the copper-clad laminate system of the present invention is formed by laminating a copper foil and a resin layer. Furthermore, the flexible printed circuit board of the present invention is formed by forming a circuit on the copper foil of the copper-clad laminate. Examples of the resin layer include PET (polyethylene terephthalate), PI (polyimide), LCP (liquid crystal polymer), and PEN (polyethylene 2,6-naphthalate). Limited to this. Moreover, these resin films can also be used as a resin layer. As a method of laminating the resin layer and the copper foil, the material that becomes the resin layer can also be coated on the surface of the copper foil and heated to form a film. In addition, a resin film may be used as the resin layer, and the following adhesive may be used between the resin film and the copper foil. Alternatively, the resin film may be thermocompression-bonded to the copper foil without using an adhesive. However, in terms of not applying unnecessary heat to the resin film, it is preferable to use an adhesive.

When using a film as a resin layer, the film can be laminated on a copper foil via an adhesive layer. In this case, it is better to use an adhesive with the same components as the film. For example, when a polyimide film is used as the resin layer, it is also preferable to use a polyimide-based adhesive for the adhesive layer. Furthermore, the polyimide adhesive here refers to an adhesive containing an imine bond, and also includes polyether imine and the like.

In addition, the present invention is not limited to the above-mentioned embodiment. In addition, as long as the effects of the present invention are exerted, the copper alloy in the above embodiment may contain other components. For example, the surface of the copper foil can also be subjected to surface treatment including roughening treatment, anti-rust treatment, heat-resistant treatment or a combination of these treatments. [Example]

Next, although an Example is given and this invention is demonstrated in more detail, this invention is not limited to these Examples. Ingots are made using electrolytic copper in a non-oxidizing environment. The proportion of copper contained in the ingot is 99.96% by mass or more. After the ingot is homogenized and annealed at 900°C or above, hot rolling and cold rolling are performed. During cold rolling, intermediate annealing at a maximum temperature of 400°C is performed, the cooling rate of the intermediate annealing is set to the value in Table 1, and cooling is performed to a temperature 200°C lower than the maximum temperature. The cooling rate of the Example is calculated based on the actual measured material temperature data when annealing a material different from that of the Example. After removing the oxide scale generated during intermediate annealing and performing intermediate cold rolling, final annealing and final cold rolling are performed to obtain a foil with a target final thickness of 12 μm. Furthermore, regarding the comparative example, the cooling rate of the intermediate annealing to a temperature 200° C. lower than the maximum temperature was obtained by heat transfer simulation, and is listed in Table 1.

The obtained foil was subjected to heat treatment at 300° C. for 30 minutes in an atmospheric environment to obtain a copper foil sample. Specifically, in order to prevent oxidation, the copper foil sample was sandwiched between two C7025 plates with a width of 30 mm × a length of 130 mm × a thickness of 0.15 mm. After packaging with A4-sized annealed C1100, it was opened to 300°C. Open the door of the high-temperature hot air dryer and put it in. After 30 minutes, open the door for recycling and take out the copper foil sample. The heat-treated copper foil simulates the state of heat treatment during lamination of CCL. After the rolled surface of the heat-treated copper foil was electrolytically polished, EBSD measurement was performed on a measurement field of view of 150 μm × 150 μm, and the standard deviation of the crystal grain size when an orientation difference of 5° or more was regarded as a grain boundary was determined. The conditions for EBSD measurement are as described above.

In addition, after surface treatment of the foil obtained by final cold rolling, 25 μm UpilexVT (manufactured by Ube Kosan Co., Ltd.) was laminated, and heat treatment was performed at 300°C × 30 minutes using a heating press to form a copper-clad laminated board. Then, using a dry film resist (product name RY-5107 manufactured by Hitachi Chemical, thickness 7 μm), the circuit part of the copper foil was masked by photoetching, and dry film patterning was performed with an L+S pitch of 50 μm. For resist development, etching and resist stripping, SunTechno System Co., Ltd.'s "Development, Etching, and Stripping Production Line" (device name: DERM) is used. The etching conditions are as described in the above "<Circuit Linearity>".

＜Evaluation of circuit linearity＞ Based on the above etching conditions, it was actually measured to set the conditions by changing the etching time for each example and each comparative example in such a way that it is close to the target L/S (L/S = 10/40 ~ 30/20). The results are at the bottom. The average value Aw of the width w becomes the value shown in Table 1. The average value Aw represents L of L/S. In addition, "50 μm - average value Aw" represents S of L/S. For each Example and each Comparative Example, the bottom width w of each circuit was measured at 50 locations as shown in Figure 2, and the average value Aw was calculated. Furthermore, in each embodiment, the etching time was changed in the range of 36 to 54 seconds for the same copper foil. Similarly, in each comparative example, the etching time was changed in the range of 36 to 54 seconds for the same copper foil.

The results obtained are shown in Table 1. Here, the P concentration in Examples 1 to 7 is in the range of 10 to 50 ppm by mass, and the P concentration in Comparative Examples 1 to 7 is less than 10 ppm. Analysis of P concentration was performed by the above method.

[Table 1] Example 1 Example 2 Example 3 Example 4 Example 5 Example 6 Example 7 Comparative example 1 Comparative example 2 Comparative example 3 Comparative example 4 Comparative example 5 Comparative example 6 Comparative example 7 Cooling rate of intermediate annealing (℃/h) 91 91 91 91 91 91 91 49400 (13.72℃/s) 49400 49400 49400 49400 49400 49400 Average crystal particle size (µm) 2.9 2.9 2.9 2.9 2.9 2.9 2.9 2.9 2.9 2.9 2.9 2.9 2.9 2.9 Standard deviation of crystal particle size (µm) 1.7 1.7 1.7 1.7 1.7 1.7 1.7 3.6 3.6 3.6 3.6 3.6 3.6 3.6 Average value Aw of bottom width w (µm) 12.0 13.6 18.6 22.6 23.2 26.0 27.5 11.6 16.1 16.5 19.2 20.1 25.7 27.1 Standard deviation σ of bottom width w (µm) 0.321 0.299 0.410 0.546 0.526 0.489 0.676 0.518 0.607 0.569 0.588 0.648 0.871 1.060 σ/Aw 0.027 0.022 0.022 0.024 0.023 0.019 0.025 0.045 0.038 0.034 0.031 0.032 0.034 0.039

When a flexible printed circuit board was made from the copper foil of the example with a standard deviation of crystal grain size of 3.0 μm or less, the results showed that σ/Aw did not reach 0.03, and there was almost no contact with adjacent circuits, and the circuit linearity was excellent. On the other hand, when the copper foil of the comparative example with a standard deviation of the crystal grain size exceeding 3.0 μm was used to make a flexible printed circuit board, it was found that σ/Aw was 0.03 or more. Contact with adjacent circuits was everywhere, and the linearity of the circuit was poor. .

4: Resin layer 21,22:Circuit w: Width of the bottom of the circuit w1,w2,w100,w101,w102,w200: circuit width wt: circuit width (top width)

[Fig. 1] is a diagram showing the bottom width w of a circuit formed by etching. [Fig. 2] is a top view showing a method of measuring the bottom width w of a circuit multiple times. [Figure 3] is a diagram showing the exposure mask used to form a linear circuit by etching when evaluating the linearity of the circuit. [Fig. 4] is a schematic diagram showing the progress of etching in a linear circuit. [Figure 5] is a schematic diagram showing the mechanism by which circuit linearity is reduced when the metal structure is not uniform (the size of the grains is inconsistent).

4: Resin layer 21,22:Circuit w: Width of the bottom of the circuit wt: circuit width (top width)

Claims (6)

A copper foil for flexible printed circuit boards, which is a rolled copper foil containing more than 99.96% by mass of Cu, and the remainder is composed of unavoidable impurities. After heat treatment at 300°C for 30 minutes, EBSD measurement was performed on the rolling surface of the rolled copper foil with a measuring field of view of 150 μm x 150 μm. An orientation difference of 5° or more was regarded as the standard for the crystal grain size at the grain boundary. The deviation is 3.0 μm or less. For example, the copper foil for flexible printed circuit boards in claim 1 is composed of refined copper specified in JIS-H3100 (C1100) or oxygen-free copper specified in JIS-H3100 (C1020). For example, the copper foil for flexible printed circuit boards of claim 1 or 2 contains 10 to 50 ppm by mass of P. A copper-clad laminated body formed by laminating the flexible printed circuit board according to claim 1 or 2 with a rolled copper foil and a resin layer. A flexible printed circuit board in which a circuit is formed on the rolled copper foil in the copper-clad laminate according to claim 4. An electronic device using the flexible printed circuit board of claim 5.