TWI832609B - Optical interconnection device and manufacturing method thereof and computing device - Google Patents

Abstract

An optical interconnection device includes: a plurality of digital chips including a first digital chip and a second digital chip; a plurality of analog chips including a first analog chip and a second analog chip; and an optical interconnection component; wherein the first digital chip is communicatively connected to the first analog chip, the second digital chip is communicatively connected to the second analog chip, the first analog chip is communicatively connected to the second analog chip through the optical interconnection component, and an information transmission path from the first digital chip to the second digital chip includes the first digital chip, the first analog chip, a plurality of optical waveguides of the optical interconnection component, the second analog chip, and the second digital chip. A manufacturing method of an optical interconnection device and a computing device are also provided.

Description

Optical interconnection device and manufacturing method thereof, computing device

The present invention relates to the field of wafer technology, and more specifically, to an optical interconnection device, a manufacturing method thereof, and a computing device.

VLSI technology has become the pillar supporting the development and evolution of the information society. Various types of chips widely used in information systems usually rely on the upgrade of electronic chip processes to achieve performance improvement and power consumption optimization.

The development of digital transistors pursues more advanced processes, emphasizing the ratio of computing speed to cost. Analog circuit chips emphasize high signal-to-noise ratio, low distortion, low power consumption, high reliability and stability. The shrinking process may actually lead to a reduction in analog circuit performance. The R&D cycle of analog transistors is generally longer than that of digital transistors. In the same more advanced process, optimizing digital and analog circuits at the same time will limit the product iteration cycle and waste R&D and production costs.

The present invention provides an optical interconnection device, which can not only optimize the respective performances of digital electronic chips and analog electronic chips in different processes, but also solve the problem of slow iteration cycle of analog electronic chip products. Optical interconnection is used instead of electrical interconnection. It has large interconnection bandwidth, low latency, low power consumption, high integration density and strong anti-electromagnetic interference capability.

According to an aspect of the present invention, an optical interconnection device is provided. The optical interconnection device includes: a plurality of digital transistors, including a first digital transistor and a second digital transistor; and a plurality of analog transistors, including A first analog electronic chip and a second analog electronic chip; and an optical interconnect including a photonic integrated circuit including a plurality of optical waveguides; wherein the first digital electronic chip and the third An analog electronic chip is communicatively connected. The second digital electronic chip is communicatively connected with the second analog electronic chip. The first analog electronic chip and the second analog electronic chip are communicated through the optical interconnect. ; Wherein, the information transmission path from the first digital transistor to the second digital transistor includes information passing through the first digital transistor, the first analog transistor, and the optical interconnect. a waveguide, the second analog transistor, and the second digital transistor.

In some embodiments, the optical interconnect device further includes a carrier substrate; the optical interconnect is disposed on the carrier substrate; the plurality of analog transistors is disposed on the optical interconnect, and the A plurality of digital electronic chips are disposed around the optical interconnect.

In some embodiments, the plurality of digital transistors is closer to the carrier substrate than the plurality of analog transistors.

In some embodiments, the electrical connection path from the first digital electronic chip to the first analog electronic chip passes through the conductive wiring structure of the carrier substrate and the conductive wiring structure in the optical interconnection member successively.

In some embodiments, the photonic integrated circuit of the optical interconnect further includes: a first electro-optical conversion unit, which is electrically connected to the first analog transistor chip and is used to convert the analog transistor of the first analog transistor chip to Information carried by the electrical signal is carried into a first optical signal, which is transmitted in the optical waveguide of the optical interconnect; and a first photoelectric conversion unit electrically connected to the second analog electronic chip , for converting the received first optical signal into an analog electrical signal transmitted to the second analog electrical chip.

In some embodiments, the photonic integrated circuit of the optical interconnect further includes: a second electro-optical conversion unit, which is electrically connected to the second analog transistor chip and is used to convert the second analog transistor chip. The information carried by the analog electrical signal is carried into a second optical signal, and the second optical signal is transmitted in the optical waveguide of the optical interconnect; and a second photoelectric conversion unit electrically connected to the first analog electrical chip. Connection for converting the received second optical signal into an analog electrical signal transmitted to the first analog electrical chip.

In some embodiments, each of the first electro-optical conversion unit and the second electro-optical conversion unit includes a plurality of modulators for modulating the information carried by the electrical signal to an optical signal of different wavelengths and using wavelength division multiplexing. The first photoelectric conversion unit and the second photoelectric conversion unit each include a plurality of photodetectors, which perform wave decomposition and multiplexing of the received optical signals and convert them into electrical signals.

In some embodiments, the modulator includes a microring modulator; and/or the detector includes a microring filtered detector.

In some embodiments, the photonic integrated circuit of the optical interconnect further includes: a dielectric layer and a plurality of conductive wiring units; the dielectric layer covers the plurality of optical waveguides, the first electro-optical conversion unit , the first photoelectric conversion unit, the second electro-optic conversion unit, the second photoelectric conversion unit; the plurality of conductive wiring units are configured to connect the first electro-optic conversion unit, the first photoelectric conversion unit The unit, the second electro-optical conversion unit, and the second photoelectric conversion unit are electrically connected to the corresponding analog electronic chip; the plurality of conductive wiring units include a plurality of electrical connection structures, and the plurality of electrical connection structures Each passes through at least part of the dielectric layer.

In some embodiments, one or more of the plurality of digital electronic dies and the plurality of analog electronic dies includes chiplets.

In some embodiments, the first digital transistor and the second digital transistor further include ultra-short-pitch serial parallel interfaces for communicating with the first analog transistor and the second analog transistor respectively.

According to one aspect of the invention, a computing device is provided that includes an optical interconnect device.

According to an aspect of the present invention, a method for manufacturing an optical interconnection device is provided, including: providing a wafer; forming a plurality of photonic integrated circuits on the wafer; wherein each of the plurality of photonic integrated circuits One includes a plurality of optical waveguides, electro-optical conversion units and photoelectric conversion units; mounting at least one required analog electronic chip on each of the plurality of photonic integrated circuits; dividing the wafer to obtain multiple An independent optical interconnection component; and mounting the optical interconnection component on a carrier substrate; and mounting a digital electronic chip on the carrier substrate.

In the embodiment of the present invention, the use of small chip (chiplet) technology can break through the physical bottleneck of the chip area, which is an important way to achieve higher performance chips. As the area of each die becomes smaller, the number of die that can be placed on a single wafer increases, which can improve yield and reduce costs.

In addition, the present invention can flexibly upgrade only some modules when improving system performance, thus speeding up the iteration cycle of system upgrades.

According to an embodiment of the present invention, a series of analog transistor chips are integrated on the optical interconnect, and the analog transistor and a series of digital transistors around the optical interconnect are connected through an ultra-short distance serial-to-parallel conversion interface. The information on different analog transistors is loaded onto the optical signal, and then the optical signal is shuttled through the optical interconnect at high speed to complete the information interconnection between different analog transistors, and then the ultra-short distance on the digital transistor is used. The serial-to-parallel conversion interface converts high-speed analog electrical signals into low-speed parallel signals processed by digital electronic chips, allowing the digital electronic chips to form an organic whole through optical and electrical interconnections. Compared with electrical interconnection, optical interconnection has large bandwidth, low delay, low power consumption, high integration density and strong anti-electromagnetic interference capability. Moreover, on-chip or inter-chip optical interconnection transmission information is not sensitive to distance, allowing more data to be transmitted over longer distances, making the design of computer architecture more flexible.

In some embodiments, the modulator array uses a high-efficiency, small-area micro-ring modulator array, and the detector array uses a micro-ring filter detector with a wave decomposition multiplexing function. By integrating modulator arrays and detector arrays in optical interconnects underneath different analog transistors, a large amount of information can be transmitted between analog transistors without being limited by power consumption and bandwidth density. By arranging the positions of the modulator array, detector array and corresponding analog transistors, multiple independent data transmission channels can be realized. Each channel is exclusively occupied by two digital transistors that communicate with each other. There is no problem of competition and conflict. The cross-sectional bandwidth is large and the signal delay is low, ultimately increasing the information processing throughput.

Using a series of analog chips, digital chips can achieve full point-to-point connections on optical interconnects, allowing a series of digital chips to process information in parallel at the same time, and there is tight information interconnection between chips, which can better Meet the computing power and bandwidth requirements of artificial intelligence algorithms. Compared with existing artificial intelligence products, this optical interconnection device can integrate more computing units and storage units, and the use of optical interconnection can ensure organic information interconnection between them, thereby providing a higher system energy efficiency ratio.

Various aspects, features, advantages, etc. of the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The above aspects, features, advantages, etc. of the present invention will become clearer from the following detailed description in conjunction with the accompanying drawings.

In order to facilitate understanding of various aspects, features and advantages of the technical solution of the present invention, the present invention is described in detail below with reference to the accompanying drawings. It should be understood that the various embodiments described below are only for illustration and are not intended to limit the scope of the present invention.

The word "including" mentioned in this article is an open-ended term and should be interpreted as "including but not limited to". "Approximately" means that within an acceptable error range, a person with ordinary knowledge in the technical field to which this application belongs can solve the technical problem within a certain error range and basically achieve the technical effect.

In addition, the term "connection" here includes any direct and indirect means of connection. Therefore, if a first device is connected to a second device, it means that the first device can be directly connected to the second device, or indirectly connected to the second device through other devices.

Descriptions such as "first" and "second" in this article are used to distinguish different devices, modules, structures, etc., and do not represent the order, nor do they limit "first" and "second" to be different types. . In addition, some of the processes described in the specification, patent scope and above-mentioned drawings of this application contain multiple operations that appear in a specific order. These operations may not be performed in the order in which they appear in this article or may be performed concurrently. . The sequence numbers of operations, such as 101, 102, etc., are only used to distinguish different operations. The sequence numbers themselves do not represent any execution order. Additionally, these processes can include more or fewer operations, and these operations can be performed sequentially or in parallel.

In some embodiments of the present invention, the optical interconnect device includes a plurality of digital electronic chips, a plurality of analog electronic chips and an optical interconnect. Among them, optical interconnects can realize the conversion of electrical signals and optical signals, as well as the information transmission of optical signals. The plurality of digital transistors include a first digital transistor and a second digital transistor. Among the plurality of analog transistors, the one that is communicatively connected to the first digital transistor and the second digital transistor is called the first analog transistor. and the second analog transistor. The terms “first” and “second” in this article are intended to distinguish different objects, rather than to order the objects or limit the number of objects. The optical interconnection member has a plurality of optical waveguides, and may be implemented using an optical interconnection member, for example. The first digital transistor is communicatively connected to the first analog transistor, the second digital transistor is communicatively connected to the second analog transistor, and the first analog transistor is communicatively connected to the second analog transistor. The wafer implements communication connections through the optical interconnect. That is to say, the information transmission path from the first digital transistor to the second digital transistor includes information passing through the first digital transistor, the first analog transistor, and the optical interconnect. the optical waveguide, the second analog transistor, and the second digital transistor. Not limited to the above examples, as needed, any two chips among the plurality of digital transistors can realize information exchange, that is, communication connection, through analog transistors and optical interconnects.

In some embodiments, the optical interconnection device further includes a carrier substrate, and the optical interconnection member is disposed on the carrier substrate. The plurality of analog transistors are disposed on the optical interconnect, and the plurality of digital transistors are disposed around the optical interconnect. Wherein, the electrical connection path from the digital transistor chip to the analog transistor chip includes successively passing through the conductive wiring structure of the digital transistor chip, the conductive wiring structure of the carrying substrate, and the conductive wiring structure in the optical interconnect. (for example, a conductive structure in a hole), and an electrical conduction path of a conductive wiring structure analogous to an electrical chip. In some embodiments, an ultra-short-range serial-parallel interface may be used for communication between digital and analog chips.

In some embodiments, the optical interconnect device further includes a laser module that generates optical signals. In some embodiments, the optical interconnect includes an optical coupling structure that couples an optical signal from an external light source (including an optical fiber) into the optical interconnect device optical interconnect. The light coupling structure includes, for example, a grating coupler or an end face coupler. In some embodiments, the optical interconnect includes an electro-optical conversion unit coupled to the first analog transistor chip for carrying information carried by the analog electrical signal of the first analog transistor chip to the first analog transistor chip. In the optical signal; the optical interconnect also includes a photoelectric conversion unit coupled to the second analog electronic chip for converting the received optical signal into a signal that will be transmitted to the second analog electronic chip. analog electrical signal. In some embodiments, in order to achieve bidirectional communication, both the electro-optical conversion unit and the photoelectric conversion unit are integrated in the area corresponding to the analog electronic chip in the optical interconnect. In some embodiments, the electro-optical conversion unit and the photoelectric conversion unit are integrated below the corresponding analog electronic chip.

According to an embodiment of the present invention, when the first digital transistor sends information to the second digital transistor, the digital electrical signal carrying the information sent by the first digital transistor can be converted into a high-speed serial electrical signal through the ultra-short distance serial-parallel interface. And transmitted to the first analog electronic chip, the information carried by the analog electronic signal of the analog electronic chip is carried into an optical signal through the electro-optical conversion unit, and the optical signal is transmitted to the second analog electronic signal through the optical waveguide of the optical interconnect. The photoelectric conversion unit below the chip converts the optical signal into an analog electrical signal, that is, a high-speed serial electrical signal. The second analog electrical chip sends the high-speed serial electrical signal to a second digital circuit. An ultra-short-range serial-parallel interface on the chip. The ultra-short-range serial-parallel interface converts the high-speed serial electrical signal into a low-speed parallel signal carrying the information, that is, a digital electrical signal, and inputs it into the second digital electronic chip, Thus, the information transmission between the first digital transistor chip and the second digital transistor chip is completed. When the second digital transistor sends information to the first digital transistor, the transmission process is the same as the transmission process of sending information from the first digital transistor to the second digital transistor.

In some embodiments, the electro-optical conversion unit includes a modulator array, which modulates the information carried by the analog electrical signal of the first analog electrical chip to the optical signal of different wavelengths and uses wavelength division multiplexing. The photoelectric conversion unit includes a detector array, which performs wave decomposition and multiplexing on the received optical signal and converts it into an analog electrical signal that is transmitted to the second analog electronic chip. In some embodiments, the modulator array includes a plurality of microring modulators. In some embodiments, the detector array includes a plurality of microring filter detectors.

It should be noted that the present invention does not specifically limit the number of chips used in the optical interconnection device. The communication process between any two digital electronic chips is related to the above-mentioned first digital electronic chip and the second digital electronic chip. The communication process for the chip is the same.

Figure 1 is a schematic structural diagram of an optical interconnection device according to an exemplary embodiment of the present invention. In an exemplary embodiment of the present invention, the optical interconnection device includes a carrier substrate 100, an optical interconnection member 200, digital electronic chips A to D, and analog electronic chips a to d. The optical interconnect 200 is disposed on the carrier substrate 100 , the analog electronic chips a to d are disposed on the optical interconnect 200 , and the digital electronic chips A to D are disposed on the carrier substrate 100 and distributed around the optical interconnect 200 . In this regard, when the digital transistor is updated, it can be replaced easily and independently, while the optical interconnects and analog transistor can be kept unchanged, and there is basically no need to change other electrical wiring structures.

Wherein, as an example, the optical interconnection includes a photonic integrated circuit, and the photonic integrated circuit includes an optical waveguide unit, a plurality of electro-optical conversion units and a plurality of photoelectric conversion units, wherein the optical waveguide unit may include a plurality of optical waveguides. In some embodiments, the electro-optical conversion unit includes one or more optical modulators, and the plurality of modulators may constitute a modulator array. The photoelectric conversion unit includes one or more photoelectric detectors, and the plurality of detectors may constitute a detector array. For example, the modulator can modulate the initial light based on the electrical signal to generate an optical signal carrying information, that is, the information carried by the electrical signal is carried into the optical signal. Optical interconnects have the function of converting electrical signals and optical signals, so that optical interconnect communications can be used instead of electrical signal communications.

Figure 2 is a schematic diagram of the connection of an optical interconnection device according to an exemplary embodiment of the present invention. The figure shows in a perspective manner an electro-optical conversion unit formed in a region of the optical interconnection member corresponding to the analog electronic chip and Photoelectric conversion unit. The connection and communication process between components in the optical interconnection device according to the embodiment of the present invention will be described below with reference to Figure 2 .

The optical interconnect 200 includes a photonic integrated circuit including a plurality of optical waveguides, a plurality of electro-optical conversion units, and a plurality of optoelectronic conversion units. In some embodiments, the electro-optical conversion unit includes one or more optical modulators, and the plurality of modulators may constitute a modulator array. The photoelectric conversion unit includes one or more photoelectric detectors, and the plurality of detectors may constitute a detector array. For example, the modulator can modulate the initial light based on the electrical signal to generate an optical signal carrying information, that is, the information carried by the electrical signal is carried into the optical signal. Optical interconnects have the function of converting electrical signals and optical signals, so that optical interconnect communications can be used instead of electrical signal communications.

The arrangement areas a'~d' of the analog transistors in Figure 2 correspond to the analog transistor chips a~d in Figure 1. The light passing through the optical interconnect 200 between any two of the analog transistors a~d Waveguide communications. In Figure 2, the optical interconnect 200 is provided with a plurality of electro-optical conversion units and a plurality of photoelectric conversion units. Figure 2 shows that in the portion of the optical interconnect 200 corresponding to the arrangement area a', There are 12 electro-optical conversion units and 12 photoelectric conversion units. The setting areas A'~D' of the digital transistors in Figure 2 correspond to the digital transistors A~D in Figure 1. The digital transistors A~D are respectively equipped with ultra-short distance serial-to-parallel conversion interfaces, and the digital The electronic chip A is connected to the analog chip a, the digital chip B is connected to the analog chip b, the digital chip C is connected to the analog chip c, and the digital chip D is connected to the analog chip d. As shown in Figure 3, the electrical connection path from the digital chip A to the analog chip a includes the conductive wiring structure (not shown) of the digital chip A, the conductive wiring structure 301 of the carrier substrate 100, and the optical interconnect. The conductive wiring structure in 200, and the electrical conduction path of the conductive wiring structure (not shown) analogous to the electrical chip a. Exemplarily, the conductive wiring structure in the optical interconnect 200 may include conductive silicon through holes 201, which are arranged in the silicon substrate of the optical interconnect 200 and penetrate the silicon substrate. For example, the optical interconnect 200 may also include other conductive structures in the holes, and the conductive structures in the holes pass through at least a portion of the optical interconnect 200 . The electrical connection path between other digital transistors and the corresponding analog transistor is similar to the electrical connection path from the digital transistor A to the analog transistor a. In some embodiments, the electrical connection path from the digital electronic chip A to the analog electronic chip a may also adopt other suitable connection methods in this field.

In an exemplary embodiment, by utilizing the optical waveguide in the optical interconnect 200, any digital electronic chip can communicate with any other digital electronic chip, forming a point-to-point fully connected topological communication connection structure. The laser module 300 outputs multiple wavelength lasers at the same time, and couples the optical signal into the optical interconnect 200 through the optical coupling structure in the optical interconnect 200, such as a grating coupler or an end face coupler. The beam splitter in the beam splitter evenly distributes the energy of the light to the corresponding electro-optical conversion units of different analog electronic chips in the optical interconnect 200 . For example, the beam splitter may use a wide-band beam splitter. Taking digital transistor A as an example, the information transmission process from digital transistor A to other digital transistors B~D includes: the digital electrical signal of digital transistor A is converted through the ultra-short distance serial-to-parallel conversion interface on the digital transistor A. It is a high-speed serial signal that is transmitted through a conductive wiring structure (such as a metal trace) on the carrier substrate 100 and a conductive wiring structure (such as a conductive silicon via and/or other conductive lines) in the optical interconnect 200 To the analog transistor chip a, after being processed by the analog transistor chip a, the electrical signal output by the analog transistor chip a is transmitted to the optical interconnector 200 and input to the electro-optical conversion unit in the optical interconnector 200. Exemplarily, the electro-optical conversion unit includes a plurality of modulators, which can form a modulator array, through which the modulator array modulates light based on electrical signals, and loads the information carried by the electrical signals output by the analog electronic chip a. Wavelength division multiplexing of optical signals of different wavelengths. The optical waveguide is transmitted through the optical interconnect 200 into the photoelectric conversion unit. For example, the photoelectric conversion unit includes a plurality of photoelectric detectors, which can form a detector array. The detector array performs wavelength decomposition and multiplexing on the modulated optical signal, performs photoelectric conversion, and outputs it as an electrical signal. The optical interconnect 200 outputs electrical signals carrying information to the analog transistor chips b~d, and is processed by the analog transistor chips b~d. The electrical signals output by the analog transistors b~d are transmitted to the corresponding digital transistors B~D. The communication between the analog transistor chips b~d and the corresponding digital transistor chips B~D can be through an ultra-short distance serial-to-parallel conversion interface.

In an exemplary embodiment, the digital electronic chips A to D are closer to the carrier substrate than the analog electronic chips a to d, which shortens the connection distance between the digital electronic chips A to D and the carrier substrate 100 and simplifies the packaging method. The digital electronic chips A to D are disposed around the optical interconnection member 200 without being disposed on the optical interconnection member 200 and do not occupy the area of the optical interconnection member 200 . Analog electronic chips a~d are directly disposed on the optical interconnect 200, thus optimizing the communication distance between them and the optical interconnect 200.

In some implementations, the digital transistor chips A to D and the analog transistor chips a to d are both small chips (Chiplet). The four digital transistors A to D respectively undergo digital-to-analog, electro-optical, optoelectronic and analog-to-digital conversion through the four analog transistor chips a to d and the optical interconnect 200 to form a full point-to-point connection. There are independent data transmission channels between each two digital transistors, so that there is no competition conflict between two digital transistors, the signal delay is low, and the information processing throughput is large. This structure reuses four analog transistor chips a~d and four digital transistor chips A~D, which not only improves the system energy efficiency ratio, but also reduces the size of the transistor chip, thereby reducing chip design and processing costs, and effectively improving improve wafer yield.

In some embodiments, as shown in Figure 4, an electro-optical conversion unit in an embodiment of the present invention includes multiple modulators, wherein the multiple modulators constitute a modulator array. It should be noted that the modulator array is The word "array" only means to arrange according to a certain position. On the basis of meeting the functional requirements, the word "array" does not specifically limit the arrangement form and arrangement rules of each modulator, nor is it limited to a two-dimensional array. The modulator array consists of a series of micro-ring modulators 401. The micro-ring modulators 401 are based on the carrier depletion effect and can support high modulation rates. This type of waveguide structure has different regions in the ridge waveguide. Doping is performed to form a lateral or vertical PN junction structure 402. The PN junction works in reverse bias mode. When a reverse bias voltage is applied, the depletion region in the PN junction increases, the built-in electric field is enhanced, there are no free carriers in the depletion region, and the refractive index of the corresponding ring waveguide 403 changes. , causing its resonance wavelength to shift, and the intensity of a specific wavelength near the resonance peak to change significantly, thereby achieving the purpose of intensity modulation. The microring modulator 401 has small size, low power consumption and high modulation efficiency. When modulating the electrical information data from the electronic chip, the heating electrode 404 on the microring modulator 401 can be adjusted to correspond to the carrier wave of a specific wavelength. The modulated optical signals of different wavelengths propagate independently on the optical waveguide 407 , realizing multi-channel wavelength division multiplexing signal transmission. Among them, multiple microrings can correspond to multiple different wavelengths. Because the microring modulator 401 is sensitive to temperature, during the modulation process, the microring modulation can be adjusted by monitoring the photocurrent generated by the light absorption of the horizontal or vertical PN junction itself and using feedback control on the analog transistor chip. The bias point of the detector 401 is such that the light modulation amplitude is maintained to be maximized.

In some embodiments, as shown in Figure 5, a photoelectric conversion unit includes multiple detectors, wherein the multiple detectors constitute a detector array. It should be noted that the term detector array only means that the detector array is arranged in a certain position. On the basis of meeting functional requirements, the term array does not specifically limit the arrangement form and arrangement rules of each detector, nor is it limited to a two-dimensional array. For example, the detector array is composed of a series of micro-ring filter detectors 501. The micro-ring filter detector 501 includes a heating electrode 502, a ring waveguide 503, and a signal light detector 504. By adjusting the heating electrode 502 on the micro-ring filter detector 501 to adjust the ring waveguide 503, the optical signal of a specific wavelength is filtered out from the optical waveguide 507 and downloaded to the signal light detector 504 coupled with the electronic chip to realize the optical signal to Analog electrical signal conversion. Among them, multiple microrings can correspond to multiple different wavelengths. In addition, the residual light energy at the end of the waveguide is absorbed through the waveguide terminal 505 connected to the optical waveguide 507 and the signal light detector 504, so that it does not affect the signal transmission of other optical waveguides.

By arranging appropriate electro-optical conversion units, photoelectric conversion units, and optical waveguides in the analog optical interconnect 200, a large amount of information can be transmitted between analog transistor chips without being limited by power consumption and bandwidth density. The positions of the modulator array, the detector array and the corresponding analog transistors in the optical interconnect 200 can be arranged as needed, and multiple independent data transmission channels can be realized. Each channel consists of two digital circuits that communicate with each other. The chip is exclusive, there is no problem of competition and conflict, the cross-sectional bandwidth is large, the signal delay is low, and the information processing throughput is ultimately improved.

In some embodiments of the present invention, the digital chip may be one or more of a CPU, a GPU, and a memory chip.

Exemplary embodiments of the present invention provide a method for manufacturing an optical interconnection device, which can be used to manufacture the optical interconnection device in each of the foregoing embodiments. The method includes:

S601. Provide wafers.

S602. Form multiple photonic integrated circuits on the wafer.

Wherein, each of the plurality of photonic integrated circuits may include a plurality of optical waveguides, as well as an electro-optical conversion unit and a photoelectric conversion unit. The plurality of optical waveguides may be used to constitute an optical waveguide unit, that is, the optical waveguide unit includes a plurality of optical waveguides. . Each photonic integrated circuit in the plurality of photonic integrated circuits may further include a plurality of conductive wiring units, and the plurality of conductive wiring units may connect the electro-optical conversion unit and/or the photoelectric conversion unit to the corresponding analog transistor chip, so as to Receive electrical signals to be communicated from the analog transistor chip and/or send electrical signals for communication to the analog transistor chip. Typically, multiple photonic integrated circuits are formed in multiple areas on a wafer. In subsequent steps, the wafer is cut to form independent single photonic integrated circuits. The photonic integrated circuits are used to form optical interconnects. Connectors, ie optical interconnects, include the photonic integrated circuits.

S603. Install at least one required analog chip on each of the plurality of photonic integrated circuits. The number of analog transistor chips may be one or more. For example, a first analog transistor chip and a second analog transistor chip are provided so that the first analog transistor chip is electrically connected to the first conductive wiring unit, and the second analog transistor chip is electrically connected to the first conductive wiring unit. The chip is electrically connected to the second conductive wiring unit, and the first electro-optical conversion unit receives the first electrical signal of the first analog electronic chip through the first conductive wiring unit and encodes it to generate the first optical signal; the first photoelectric converter uses Converting the first optical signal into an electrical signal and transmitting it to the second conductive wiring unit.

S604. Segment the wafer to obtain multiple independent optical interconnects.

S605. Install the optical interconnection component on the carrier substrate.

S606. Install the digital electronic chip on the carrier substrate.

In some embodiments, a single optical interconnection device includes a single photonic integrated circuit and the first analog transistor chip and the second analog transistor chip mounted (disposed) on the photonic integrated circuit. Wherein, the first analog electronic chip and the second analog electronic chip can communicate through the first conductive wiring unit, the first electro-optical conversion unit, at least one of the plurality of optical waveguides, the first photoelectric conversion unit and the second conductive wiring unit. One of said photonic integrated circuits is embodied in an independent single optical interconnection device.

It should be noted that the numbering of steps does not represent the order in which they are performed. For example, the optical interconnection component can be installed before the digital transistor chip is installed. For example, the optical interconnection component can be installed after the digital transistor chip is installed. This is not particularly limited.

In the above S601, the wafer includes a semiconductor layer. In one example, the wafer may be a semiconductor-on-insulator wafer, such as an SOI (Silicon-On-Insulator) wafer. As shown in FIG. 6 , the semiconductor-on-insulator wafer may include an insulating layer 602 , a semiconductor layer 603 formed on the insulating layer 602 , and a backing layer 601 located below the insulating layer 602 .

In the above S602, a photonic integrated circuit can be formed by performing processes such as patterning, deposition, and doping on the semiconductor layer 603.

In the above S603, in one example, the first analog electronic chip can be electrically connected to the first conductive wiring unit, and the second analog electronic chip can be electrically connected to the second conductive wiring unit through electrical connection methods such as bonding or welding. .

In a specific example, "forming multiple photonic integrated circuits on the wafer" in S602 above can be implemented by the following steps:

S21. Form the optical waveguide unit, the first electro-optical conversion unit and the first photoelectric conversion unit on the wafer.

S22. Deposit a dielectric layer on the wafer on which the optical waveguide unit, the first electro-optical conversion unit and the first electro-optical conversion unit are formed to cover the optical waveguide unit and the first electro-optical conversion unit. , the first photoelectric conversion unit and the wafer.

S23. Form a first opening and a second opening in the dielectric layer.

S24. Form a first electrical connection structure in the first opening and a second electrical connection structure in the second opening.

Wherein, the first conductive wiring unit includes the first electrical connection structure; the second conductive wiring unit includes the second electrical connection structure.

In the above S21, as shown in Figures 6 and 7, the semiconductor layer 603 of the wafer can be patterned to obtain areas corresponding to the optical waveguide unit 103, the first electro-optical conversion unit 104 and the first photoelectric conversion unit 105. Specifically, photolithography and etching techniques are used to remove unnecessary material for patterning. In some embodiments, the above-mentioned insulating layer may serve as an etching stop layer. In some embodiments, the electro-optical conversion unit includes one or more modulators, and the plurality of modulators may constitute a modulator array. The photoelectric conversion unit includes one or more photoelectric detectors, and the plurality of detectors may constitute a detector array. For simplicity, only one modulator and one detector are shown in Figure 7 .

In the above S22, as shown in Figure 8, a dielectric layer 106 is deposited on the wafer on which the optical waveguide unit 103, the first electro-optical conversion unit 104 and the first photoelectric conversion unit 105 are formed to cover The optical waveguide unit 103, the first electro-optical conversion unit 104, the first photoelectric conversion unit 105 and the wafer. Specifically, the dielectric layer 106 is formed on the optical waveguide unit 103, the first electro-optical conversion unit 104, the first photoelectric conversion unit 105, and the insulating layer 602 through deposition. The dielectric layer 106 and the insulating layer 602 may be made of the same material.

In the above S23, as shown in FIG. 8, a first opening and a second opening are formed in the dielectric layer 106. The above-mentioned first opening and second opening can be formed using etching technology. According to the connection requirements, the number of the first opening and the second opening can be one or more.

In some embodiments, the dielectric layer 106 is a multi-layer structure formed by multiple sub-dielectric layers. Multiple conductive layers may be formed in the dielectric layer, and the conductive layers are connected through conductive materials in the openings. For example, first deposit to form a first sub-dielectric layer, then form a first conductive layer, then deposit to form a second sub-dielectric layer, then form a second conductive layer, then form a third sub-dielectric layer, and then form a third conductive layer. layer, and then form a fourth sub-dielectric layer. Among the first to third conductive layers, different conductive layers are interconnected through conductive materials in the openings, and each conductive layer can be a patterned metal material layer.

In the above S24, as shown in FIG. 8, the first electrical connection structure 101a of the first conductive wiring unit 101 can be formed in the first opening and the second electrical connection structure 101a can be formed in the second opening by depositing conductive material. The second electrical connection structure 102a of the two conductive wiring units 102. The first electrical connection structure 101a passes through at least part of the dielectric layer 106; the second electrical connection structure 102a passes through at least part of the dielectric layer 106.

After the conductive material is deposited, excess conductive material can be removed along the mounting surface of the dielectric layer 106 through a planarization process of chemical mechanical polishing or mechanical grinding, so that the first electrical connection structure 101 a and the second electrical connection structure 102 a are in contact with the dielectric layer 106 . The mounting surface of electrical layer 106 is flush.

Subsequently, the first analog electronic chip and the second analog electronic chip are installed on each photonic integrated circuit on the wafer. Specifically, the mounting surface of the dielectric layer 106/photonic integrated circuit corresponds to each photonic integrated circuit. The first analog electronic chip and the second analog electronic chip are installed in the area of the integrated circuit, that is, in the area corresponding to each photonic integrated circuit on the mounting surface of the dielectric layer 106/photonic integrated circuit, the first analog electronic chip is installed The wafer and the second analog electronic wafer are electrically connected to the first electrical connection structure 101a and the second electrical connection structure 102a in this area.

Subsequently, a sealant may also be formed on the dielectric layer 106 to bury or cover the first analog electronic chip and the second analog electronic chip. Afterwards, the sealant can be cured and can be planarized.

In some embodiments, a process of thinning the backing layer 601 may be included.

In some embodiments, S604 can be performed after S603, that is, the first analog electronic wafer and the second analog electronic wafer are installed in batches before the photonic integrated circuit wafer is divided. This method can be performed in a wafer-level process. The first analog electronic chip and the second analog electronic chip are packaged in batches. At this time, only photonic integrated circuit wafers are needed to be manufactured, and there is no need to form the photonic integrated circuit into a single chip.

In some embodiments, when manufacturing a photonic integrated circuit, it may also include manufacturing a conductive wiring structure. The conductive wiring structure can be used to connect digital electronic chips and analog electronic chips, so that digital electronic chips and analog electronic chips can be connected. To realize electrical signal communication, at this time, the optical interconnection member includes the above-mentioned conductive wiring structure. For example, the optical interconnection member can serve as an intermediary layer. For example, the conductive wiring structure may include conductive silicon vias or other conductive lines.

In addition, optionally, the wafer dividing process can be performed first to form independent photonic integrated circuits/independent optical interconnects including photonic integrated circuits, and then the first analog electronic wafer and the second analog The installation process of the transistor chip is to install the first analog transistor chip and the second analog transistor chip on the independent photonic integrated circuit.

Optionally, multiple independent photonic integrated circuits can be packaged to a certain extent to form multiple independent photonic integrated circuit wafers (including bare wafers). The photonic integrated circuit wafers serve as optical interconnect wafers, that is, Optical interconnects may use photonic integrated circuit chips. Specifically, this method includes:

S1001. Provide wafers.

S1002. Form multiple photonic integrated circuits on the wafer.

Wherein, each of the plurality of photonic integrated circuits includes a first conductive wiring unit, a second conductive wiring unit, an optical waveguide unit, a first electro-optical conversion unit and a first photoelectric conversion unit; the first electro-optical conversion unit and the first photoelectric conversion unit are respectively coupled to the optical waveguide unit; the first conductive wiring unit is electrically connected to the first electro-optical conversion unit; the second conductive wiring unit is to the first photoelectric conversion unit Electrical connection.

S1003. Segment the wafer to obtain multiple independent photonic integrated circuits.

Wherein, the plurality of photonic integrated circuits are divided into independent photonic integrated circuits, so that each photonic integrated circuit chip includes an independent photonic integrated circuit.

S1004. Install a first analog transistor chip and a second analog transistor chip on each of the plurality of independent photonic integrated circuit wafers, so that the first analog transistor chip is electrically connected to the first conductive wiring unit. connection, the second analog electrical chip is electrically connected to the second conductive wiring unit.

As an example, S1004 may be executed after S1003, but is not limited thereto.

Wherein, the first analog electronic chip and the second analog electronic chip can pass through the first conductive wiring unit, the first electro-optical conversion unit, the optical waveguide unit, the first photoelectric conversion unit and the The second conductive wiring unit communicates.

For the specific implementation of the above S1002, please refer to the corresponding contents in the above embodiments, and will not be described again here.

Those with ordinary knowledge in the technical field to which this application belongs should understand that what is disclosed above is only the implementation mode of the present invention. Of course, it cannot be used to limit the scope of rights of the present invention. Equivalent changes made according to the implementation mode of the present invention still belong to The scope covered by the patent application for this invention.

100: Carrying substrate 101: First conductive wiring unit 101a: First electrical connection structure 102: Second conductive wiring unit 102a: Second electrical connection structure 103: Optical waveguide unit 104: First electro-optical conversion unit 105: First photoelectric conversion unit 106:Dielectric layer 200: Optical interconnects 201: Conductive silicon vias 300:Laser module 301: Conductive wiring structures 401: Microring modulator 402: PN junction structure 403: Ring waveguide 404,502: Heating electrode 407,507: Optical waveguide 501:Micro-ring filter detector 503: Ring waveguide 504:Signal light detector 505:Waveguide terminal 601: Backing bottom layer 602: Insulation layer 603: Semiconductor layer A~D: digital electronic chip A’~D’,a’~d’: setting area a~d: analog transistor

[Fig. 1] A schematic top view showing an optical interconnection device according to an exemplary embodiment of the present invention. [Fig. 2] A schematic diagram showing the arrangement of optical waveguides, electro-optical conversion units, and photoelectric conversion units of optical interconnectors in an optical interconnection device according to an exemplary embodiment of the present invention. [Figure 3] shows a schematic cross-sectional view of the optical interconnection device. [Figure 4] shows a schematic structural diagram of an electro-optical conversion unit including multiple modulators in an embodiment of the present invention. [Figure 5] shows a schematic structural diagram when one photoelectric conversion unit includes multiple detectors in the embodiment of the present invention. [Figure 6] shows a schematic cross-sectional view of the relevant structure when manufacturing a photonic integrated circuit according to an embodiment of the present application. [Figure 7] shows a schematic cross-sectional view of the relevant structure when manufacturing a photonic integrated circuit according to an embodiment of the present application. [Figure 8] shows a schematic cross-sectional view of the relevant structure when manufacturing a photonic integrated circuit according to an embodiment of the present application.

100: Carrying substrate

200: Optical interconnects

300:Laser module

A’~D’,a’~d’: setting area

Claims (13)

An optical interconnection device including: A plurality of digital transistors, including a first digital transistor and a second digital transistor; A plurality of analog transistors including a first analog transistor and a second analog transistor; and An optical interconnect including a photonic integrated circuit including a plurality of optical waveguides; Wherein, the first digital transistor chip is communicatively connected with the first analog transistor chip, the second digital transistor chip is communicatively connected with the second analog transistor chip, and the first analog transistor chip is communicatively connected with the second analog transistor chip. The analog electronic chip realizes communication connection through the optical interconnect; Wherein, the information transmission path from the first digital transistor to the second digital transistor includes information passing through the first digital transistor, the first analog transistor, and the optical waveguide of the optical interconnect. , the second analog transistor chip, and the second digital transistor chip. The optical interconnection device of claim 1, wherein the optical interconnection device further includes a carrier substrate; The optical interconnect is disposed on the carrier substrate; The plurality of analog transistors are disposed on the optical interconnect, and the plurality of digital transistors are disposed around the optical interconnect. The optical interconnection device of claim 2, wherein the plurality of digital transistors is closer to the carrier substrate than the plurality of analog transistors. The optical interconnection device of claim 2, wherein the electrical connection path from the first digital electronic chip to the first analog electronic chip successively passes through the conductive wiring structure of the carrier substrate and the conductive wiring structure in the optical interconnection member. wiring structure. The optical interconnect device according to any one of claims 1 to 4, wherein the photonic integrated circuit of the optical interconnect further includes: A first electro-optical conversion unit is electrically connected to the first analog electronic chip and is used to carry information carried by the analog electrical signal of the first analog electronic chip into a first optical signal. The first optical signal is Transmission in the optical waveguide of the optical interconnect; and A first photoelectric conversion unit is electrically connected to the second analog transistor chip, and is used to convert the received first optical signal into an analog electrical signal that is transmitted to the second analog transistor chip. The optical interconnect device of claim 5, wherein the photonic integrated circuit of the optical interconnect further includes: A second electro-optical conversion unit is electrically connected to the second analog electronic chip and is used to carry the information carried by the analog electrical signal of the second analog electronic chip into a second optical signal. The second optical signal is Transmission in the optical waveguide of the optical interconnect; and A second photoelectric conversion unit is electrically connected to the first analog transistor chip, and is used to convert the received second optical signal into an analog electrical signal that is transmitted to the first analog transistor chip. The optical interconnection device of claim 6, wherein each of the first electro-optical conversion unit and the second electro-optical conversion unit includes a plurality of modulators for modulating information carried by electrical signals into optical signals of different wavelengths. And transmitted by wavelength division multiplexing; Each of the first photoelectric conversion unit and the second photoelectric conversion unit includes a plurality of photodetectors, which perform wavelength decomposition and multiplexing of the received optical signals and convert them into electrical signals. The optical interconnection device of claim 7, wherein the modulator includes a microring modulator; and/or The detector includes a microring filter detector. The optical interconnect device of claim 7, wherein the photonic integrated circuit of the optical interconnect further includes: a dielectric layer and a plurality of conductive wiring units; The dielectric layer covers the plurality of optical waveguides, the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, and the second photoelectric conversion unit; The plurality of conductive wiring units are configured to electrically connect the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, the second photoelectric conversion unit and the corresponding analog transistor chip. connection; The plurality of conductive wiring units include a plurality of electrical connection structures, each of the plurality of electrical connection structures passing through at least part of the dielectric layer. The optical interconnection device of claim 8, wherein one or more of the plurality of digital transistors and the plurality of analog transistors comprise chiplets. The optical interconnection device of claim 9, wherein the first digital electronic chip and the second digital electronic chip further include ultra-short pitch serial parallel interfaces for respectively connecting to the first analog electronic chip and the second analog electronic chip. chip communicates. A computing device including the optical interconnection device according to any one of claims 1 to 11. A method for manufacturing an optical interconnection device according to any one of claims 1 to 11, including: Provide wafers; forming a plurality of photonic integrated circuits on the wafer; Wherein, each of the plurality of photonic integrated circuits includes a plurality of optical waveguides, electro-optical conversion units and photoelectric conversion units; mounting the required at least one analog transistor on each of the plurality of photonic integrated circuits; Segment the wafer to obtain multiple independent optical interconnects; Mounting the optical interconnect on a carrier substrate; and Mount the digital transistor on the carrier substrate.