TWI829474B - Slave device and addressing method for communication system - Google Patents

Abstract

The present application is related to a slave device and an addressing method for a communication system. The slave device is configured with an address receiving end, an address outputting end and a microcontroller. An address setting module is executed by the microcontroller for executing the steps: receiving an address sequence having multiple of address information groups by the address receiving end, obtaining one address information group from the address sequence as a communication address of the slave device, generating a renewed address sequence base on the address sequence and providing the renewed address sequence to the electronic device connected in series to the slave device by the address outputting end. The number of the address information groups of the renewed address sequence is less than the number of the address information groups of the address sequence.

Description

Slave devices of communication systems and their addressing methods

The present application relates to a communication system, and in particular to a slave device of the communication system and its addressing method.

In order to achieve various functions, electronic devices require a variety of different electronic components (chips, sensors, etc.) to work together. However, each electronic component needs to transmit or exchange signals through lines. The more electronic components, the more communication lines are needed. Too many lines will cause the electronic device to be too large. Therefore, an integrated bus circuit (Inter-Integrated Circuit, C) was proposed. Through the architecture and communication protocols of the integrated bus circuit, multiple peripheral devices can exchange signals with the host through only one clock signal line and one data transmission line, effectively reducing the number of communication lines.

In the architecture of the integrated bus circuit, peripheral devices on the bus are assigned an address. Through this address, the host can accurately exchange data with the peripheral devices. However, due to the large number of peripheral devices on the bus, address conflicts are prone to occur.

Therefore, how to provide a slave device and an addressing method that can achieve accurate and fast addressing is one of the problems that the industry is eager to solve.

In order to solve the above technical problems, this application proposes a slave device of a communication system and its addressing method, which enables the slave device to read the corresponding address information from the address sequence including the address information group, and use the corresponding address information as a communication address, and pass the address sequence to the next electronic device. In this way, the addressing of the slave device can be completed accurately and quickly using the address sequence.

An embodiment of the present application provides an addressing method for a communication system. The communication system includes a plurality of slave devices, and the plurality of slave devices are connected in series. Each slave device includes an address receiving end and an address output end. Each slave device performs the following steps: causing the address receiving end to receive an address sequence, which includes a plurality of address information groups; reading an address information group in the address sequence, and using the address information group as a slave device The communication address; using the address sequence to generate an update address sequence, and using the address output terminal to provide the update address sequence to the next electronic device connected in series with the slave device, wherein the address information group in the update address sequence The number is less than the number of complex address information groups of the address sequence.

Another embodiment of the present application provides an addressing method for a communication system. The communication system includes a first slave device and a plurality of slave devices, and the first slave device and the plurality of slave devices are connected in series. The steps of the addressing method include: causing the first slave device to receive a setting address information and an address sequence information from a communication bus, and using the setting address information as the communication address of the first slave device; making the first slave device A slave device generates an initial address sequence using the address sequence information, and provides the initial address sequence as an address sequence to the slave device connected in series with the first slave device. Each of the plurality of slave devices performs the following steps: receives an address sequence, the address sequence includes a plurality of address information groups; reads an address information group in the address sequence, and causes the address information group to be used for communication by the slave device address; generate an update address sequence from the address sequence, and provide the update address sequence to the next slave device connected in series with the slave device using the address output terminal, wherein the plurality of address information groups in the update address sequence The number is less than the number of complex address information groups in the address sequence.

Another embodiment of the present application provides a slave device of a communication system, which includes a memory storing an address setting module, an address receiving end, an address output end, and a microcontroller. The microcontroller is electrically connected to the memory, the address receiving end and the address output end, and is used to execute the address setting module, causing the slave device to perform the following steps: causing the address receiving end to receive an address sequence, and the address sequence includes Complex address information group; read an address information group in the address sequence, use the address information group as the communication address of the slave device; generate an update address sequence with the address sequence, and update the address information with the address output terminal The address sequence is provided to the next electronic device connected in series with the slave device, wherein the number of address information groups in the updated address sequence is less than the number of complex address information groups of the address sequence.

In the embodiment of the present application, the slave device includes a dedicated address receiving end and an address output end, so that the slave device can directly receive the address sequence associated with the address information to quickly set the communication address. In addition, multiple slave devices can be connected in series to each other through the address receiving end and the address output end, receiving the address sequence from the serially connected slave device, and providing the address sequence to the next connected slave device after completing the addressing. The device enables multiple slave devices to accurately extract the corresponding address information group from the address sequence to set their communication addresses. Therefore, this application can achieve the purpose of accurately and quickly completing the addressing of the slave device.

Regarding the communication system embodiment of the present application, please refer to Figure 1. The communication system 1 includes an address control circuit 110 and a plurality of slave devices 200 (200a, 200b...200n), wherein the address control circuit 110 and a plurality of slave devices 200 200 is electrically connected through the clock signal line SCL and the data transmission line SDA of the communication bus, and the plurality of slave devices 200 perform signal exchange with the master control device (not shown) of the communication system based on the integrated bus circuit communication protocol. Further, the address control circuit 110 and a plurality of slave devices 200 are connected in series with each other. As shown in FIG. 1 , the address control circuit 110, the slave device 200a, the slave device 200b and the slave device 200n are connected in series in order to form an address. Sequence transmission loop.

In this embodiment, the address control circuit 110 is used to provide an initial address sequence as an address sequence read by the slave device 200a. The slave device 200a reads one of the address information groups in the address sequence, and uses the read address information group as the communication address of the slave device 200a. The slave device 200a uses the address sequence to generate an updated address sequence, and An updated address sequence is provided to the tandem slave device 200b. The operations of the slave device 200b to the slave device 200n are the same as those of the slave device 200a, and therefore will not be described again.

In this way, the communication system of the present application can enable the slave device to read the corresponding address information from the address sequence including the address information group, use the corresponding address information as the communication address, and pass the address sequence to the next The slave device achieves the purpose of accurately and quickly completing the addressing of the slave device. Furthermore, the address control circuit 110 provides an initial address sequence to implement the above addressing operation. The communication address of the slave device 200 on the communication bus will be flexibly changed by the address sequence, that is, the slave device 200's communication address. The communication address does not need to be limited to a fixed address, but can be changed according to system configuration requirements, which further increases the convenience of communication system construction.

In this embodiment, the plurality of slave devices 200 are, for example, peripheral devices such as chips, temperature sensors, light bars, etc., and the present application is not limited thereto.

In one embodiment, the address control circuit 110 can be implemented by the above-mentioned main control device. The main control device is, for example, a microprocessor or other circuit or device that can generate control instructions, and this application is not limited thereto.

Please refer to FIG. 2 , which is a schematic diagram of a slave device 200 according to an embodiment of the present application. The slave device 200 at least includes a microcontroller 210, an address receiving end 220, an address output end 230, a clock signal receiving end 240, a data exchange end 250 and a memory 260, wherein the microcontroller 210 and The address receiving end 220, the address output end 230, the clock signal receiving end 240, the data exchange end 250 and the memory 260 are electrically connected.

Please refer to FIG. 1 and FIG. 2 at the same time. The address receiving end 220 is electrically connected to the previous electronic device for receiving the address sequence from the previous electronic device. The address output terminal 230 is electrically connected to the next electronic device for transmitting the generated updated address sequence to the next electronic device. That is, the slave device 200 is connected in series with other electronic devices through its address receiving end 220 and address output end 230 .

In one embodiment, the address sequence received by the address receiving end 220 is an initial address sequence provided by the address control circuit 110 or an updated address sequence generated by the previous slave device 200 . For example, the address sequence received by the slave device 200a is an initial address sequence provided by the address control circuit 110, and the address sequence received by the slave device 200b is an updated address sequence provided by the slave device 200a.

In one embodiment, the above-mentioned electronic device is a serially connected slave device 200 or the address control circuit 110 . For example, the previous electronic device connected in series with the slave device 200a is the address control circuit 110, the next electronic device connected in series with the slave device 200a is the slave device 200b, and the previous electronic device connected in series with the slave device 200b is the address control circuit 110. The slave device 200a, and the next electronic device connected in series with the slave device 200b is a slave device (not shown).

Please refer to FIG. 2. The clock signal receiving end 240 is a signal exchange interface for electrically connecting with the clock signal line SCL of the communication bus to receive the clock signal on the clock signal line SCL. The data exchange terminal 250 is a signal exchange interface for electrically connecting with the data transmission line SDA of the communication bus to receive control instructions on the data transmission line SDA.

Referring to FIG. 2 , the memory 260 is used to store firmware or software required for the operation of the slave device 200 . Furthermore, the memory 260 stores an address setting module 261 corresponding to the addressing method of the present application. Therefore, the slave device 200 can implement the addressing method of the present application by executing the address setting module 261 .

In this embodiment, the address setting module 261 can be implemented by firmware or software, and this application is not limited thereto.

In one embodiment, the memory 260 can be a built-in memory of the microcontroller 210, and this application is not limited thereto.

In one embodiment, the memory 260 may be a flash memory, and this application is not limited thereto.

Referring to FIG. 2 , the microcontroller 210 is at least used to read and execute the address setting module 261 stored in the memory 260 so that the slave device 200 executes in the address setting mode. In the address setting mode, the microcontroller 210 causes the address receiving end 220 to receive the address sequence, read one of the address information groups in the address sequence, and use the read address information group as a slave device for communication. address, and generate an updated address sequence using the received address sequence, provide the updated address sequence to the next electronic device connected in series with the address output terminal 230, and update the number of address information groups in the address sequence. Less than the number of address packets in the received address sequence. Further, the microcontroller 210 executes the address setting mode to generate an update address sequence using other address information groups in the address sequence that do not include the read address information group. Further, the microcontroller 210 executes the address setting mode to generate an update address sequence using other address information groups in the address sequence whose timing is later than the read address information group.

Thereby, the slave device 200 of the present application can be connected in series with the electronic device on the communication system through the address receiving end 220 and the address output end 230, and directly receive and output bits through the address receiving end 220 and the address output end 230. Address sequence, and quickly complete the acquisition and setting of the communication address with the received address sequence, so the purpose of quickly completing the addressing of the slave device can be achieved. In addition, the address sequence output by the slave device 200 does not include its communication address. The next slave device 200 connected in series will not read the communication address used by the previous electronic device from the received address sequence, effectively preventing the slave device from reading the communication address used by the previous electronic device. 200 may extract incorrect address information and cause an address conflict. Therefore, this application can further achieve the purpose of accurately completing the addressing of the slave device.

The addressing method of the present application will be described below with reference to Figures 1, 3 and 4. Figure 3 is a schematic diagram of an address sequence embodiment. Please refer to Figure 3 first. Figure 3 includes the address sequence DS, DS1, DS2, and DS3. In this embodiment, the address sequence DS includes a plurality of address information groups such as address A, address B, address C, and address D. The address sequence DS1 includes address B, address C, and address information. The address sequence DS2 includes a plurality of address information groups such as the address C and the address D, and the address sequence DS3 includes an address information group including the address D, where the address The timing of A is earlier than that of address B, the timing of address B is earlier than that of address C, and the timing of address C is earlier than that of address D.

In this embodiment, the number of address information groups of the initial address sequence is equal to or greater than the number of slave devices 200 . For example, the communication system 1 is configured with five slave devices 200 , and therefore the address information groups of the initial address sequence can be configured as five or six groups.

In one embodiment, each address information group includes seven bits of address information, and this application is not limited to this.

In this embodiment, the address sequence DS is the above-mentioned initial address sequence, and the address sequences DS1, DS2, and DS3 are the above-mentioned address sequences and update address sequences. For example, the slave device 200a receives the address sequence DS, generates an updated address sequence of the address sequence DS1 based on the address sequence DS, and provides the address sequence DS1 to the slave device 200b as the address received by the slave device 200b sequence. The slave device 200b receives the address sequence DS1, generates an updated address sequence of the address sequence DS2 based on the address sequence DS1, and provides the address sequence DS2 to the next slave device, which will not be described in detail below.

In this embodiment, the number of address information groups of the update address sequence generated by the slave device 200 is less than the number of address information groups of the address sequence received by the slave device 200 . For example, the slave device 200a uses an address sequence DS including four location information groups (address A, address B, address C, and address D) to generate three location information groups (address B, address D). The address sequence DS1 of address C and address D) is used as the update address sequence.

Next, please refer to Figure 4. Figure 4 is a schematic flow chart of the addressing method according to the present application, which includes steps S110, S130, and S150. In step S110, an address setting operation is performed. In this step, the address control circuit 110 generates an initial address sequence and transmits the initial address sequence to the serially connected slave device 200, such as the slave device 200a. In step S130, a plurality of slave devices sequentially receive and transmit the address sequence. In this step, a plurality of slave devices 200 (200a, 200b...200n) sequentially receive the address sequence from the previous electronic device, generate an update address sequence using the received address sequence, and provide the update address sequence. to the next electronic device in series. In step S150, the address setting operation is ended. After the plurality of slave devices 200 (200a, 200b...200n) complete the communication address setting with the received address sequence, the address setting operation ends. The address control circuit 110 ends the address setting operation according to the end setting signal. In one embodiment, the end setting signal is a signal sequence following the address sequence, for example, a sequence including a plurality of bits, and the value of each of the plurality of bits is 0. In another embodiment, the address control circuit 110 ends the address setting operation after receiving the address sequence provided from the last slave device 200 (for example, the slave device 200n). Since the address control circuit 110 receives the address sequence, it means that the address sequence has been transmitted to the last slave device 200 and the plurality of slave devices 200 connected in series have completed their addressing operations. Therefore, the address control circuit 110 can end the bit sequence accordingly. address setting operation.

Further, please refer to FIG. 1 , FIG. 3 , FIG. 4 and FIG. 5 . Step S130 may further include steps S131 to S139 . The following description takes the slave device 200 a as an example.

In step S131, power on initial state. In this step, the slave device 200a is in an initial state after being powered on and is waiting for an address setting operation.

In step S133, an address sequence is received. In this step, the slave device 200a receives the initial address sequence from the address control circuit 110 and performs an address setting operation.

Step S135: Read the address information and set the communication address. In this step, the slave device 200 reads one of the address information groups in the address sequence, and uses the address information group as the communication address of the slave device 200 . Further, the slave device 200a reads and extracts the first address information group (address A shown in Figure 3) in the initial address sequence, and sets address A as the slave device 200a on the communication bus. correspondence address. That is, the slave device 200 uses the first group of address information groups in the address sequence whose timing is earlier than other groups of address information as its communication address. Since the slave device 200 uses the first address information group in the address sequence as its communication address, the slave device 200 will not extract the address communication groups used by other slave devices 200 (such as address B or address C). ), thereby further improving the accuracy of addressing the slave device 200.

Step S137: Generate and output an updated address sequence in the address sequence. In this step, the slave device 200 generates an update address sequence based on the address sequence, and provides the update address sequence to the next electronic device connected in series with the slave device 200 . Further, the slave device 200 generates an update address sequence using other address information groups that do not include the communication address of the slave device 200 in the address sequence. In this embodiment, the slave device 200a generates an update address sequence (address sequence DS1) using addresses B~D excluding address A, and provides the update address sequence (address sequence DS1) to the slave device. 200a serially connected slave device 200b. Therefore, the number of address information groups in the update address sequence generated by the slave device 200 is less than the number of address information groups in the address sequence received by the slave device 200, and the timing in the address sequence is later than the Another set of address information of one set of address information generates an updated address sequence. Next, step S139 is performed, that is, step S150 is performed.

In this way, the addressing method of the present application enables the slave device 200 to be connected in series with the electronic device on the communication system to transfer the address sequence, and allows the slave device 200 to quickly obtain the corresponding address information based on the address sequence, thereby quickly completing the slave device 200 the purpose of addressing. In addition, the address sequence output by the slave device 200 does not include its own communication address. The next slave device 200 connected in series will not read the communication address used by the previous slave device 200 from the received address sequence, which can effectively This prevents the slave device 200 from extracting erroneous address information and causing an address conflict, and further achieves the goal of accurately completing the addressing of the slave device 200 .

Regarding another embodiment of the communication system of the present application, please refer to FIG. 6 . The difference between the embodiment of FIG. 6 and FIG. 1 is that the communication system 2 further includes a first slave device 300 and a master control device 100 . The first slave device 300, the master device 100 and the plurality of slave devices 200 are electrically connected through the clock signal line SCL and the data transmission line SDA of the communication bus, and the first slave device 300 and the plurality of slave devices 200 are based on the integrated bus The circuit communication protocol is arranged with the main control device 100 to exchange signals.

Further, the first slave device 300 and the plurality of slave devices 200 are connected in series with each other. As shown in Figure 6, the first slave device 300, the slave device 200a, the slave device 200b and the slave device 200n are connected in series in order to form an address. Sequence transmission path. Further, the first slave device 300 is used to receive a first control signal CS1 to perform a corresponding address setting operation in response to the first control signal CS1, and the plurality of slave devices 200 is used to receive a second control signal CS2 to respond to the first control signal CS1. In response to the second control signal CS2, a corresponding address setting operation is performed. In one embodiment, when the first slave device 300 and the plurality of slave devices 200 are powered on, the first control signal CS1 is provided to the first slave device 300 and the second control signal CS2 is provided to the plurality of slave devices 200. Moreover, the first control signal CS1 has a voltage value with a low voltage level, and the second control signal CS2 has a voltage value with a high voltage level, and this application is not limited thereto.

The first slave device 300 responds to the first control signal CS1, receives the set address information and address sequence information from the master device 100 via the communication bus, and uses the set address information as the first slave device 300 in the communication bus. The communication address in the queue is used to generate the above-mentioned initial address sequence (address sequence DS in Figure 3) using the address sequence information, and the initial address sequence is provided to the slave device connected in series with the first slave device 300 200 (such as slave device 200a shown in Figure 6).

The plurality of slave devices 200 respond to the second control signal CS2 and perform the address setting operation of FIG. 4 or FIG. 5 , so the details will not be described again.

In this embodiment, the first slave device 300 and the plurality of slave devices 200 can be implemented by the embodiment of FIG. 2 . Further, the address receiving end of the first slave device 300 (the address receiving end 220 shown in FIG. 2) is used to receive the first control signal CS1, and the address receiving ends (shown in FIG. 2) of a plurality of slave devices 200 The address receiving end 220 shown in the figure is used to receive the second control signal CS2. It should be noted that in this embodiment, the last slave device 200 will not perform the operation of generating the update address sequence, nor will it be electrically connected to other electronic devices through its address output terminal 230, as shown in the slave device 200n. .

Thereby, the communication system 2 of the present application can enable the first slave device 300 that receives the first control signal CS1 to generate an address sequence, so that other slave devices 200 can accurately and quickly read the corresponding address information from the address sequence to set the address. Its communication address is passed to the next slave device 200, that is, the communication system of the present application can be implemented only by the slave device 200, and can achieve the purpose of accurately and quickly completing the addressing of the slave device. Furthermore, with the master device 100 providing address sequence information to implement the above addressing operation, the communication address of the slave device 200 on the communication bus will be flexibly changed by the address sequence, that is, the communication address of the slave device 200 The address does not need to be limited to a fixed address, but can be changed according to system configuration requirements, which further increases the convenience of communication system construction.

Further, please refer to FIG. 7 , which is a schematic diagram of an embodiment of the addressing method of the communication system of the present application. In step S210, the slave device is initialized. In this step, the first slave device 300 and the plurality of slave devices 200 are powered on, the first control signal CS1 is provided to the first slave device 300 , and the second control signal CS2 is provided to the plurality of slave devices 200 .

In step S220, an address setting operation is performed. In this step, the master control device 100 provides a start command through the communication bus, so that the first slave device 300 and the plurality of slave devices 200 execute in the address setting mode based on the start command, and the master control device 100 executes the address setting mode based on the first control device. The signal CS1 generates and provides setting address information and address sequence information to the first slave device 300 that receives the first control signal CS1. In other words, the master device 100 provides the set address information and the address sequence information to the slave device that receives the first control signal CS1. In this embodiment, the starting instruction is a plurality of consecutive read instructions. In one embodiment, the plurality of read instructions may be a plurality of pre-specified read instructions, and the present application is not limited thereto.

In step S230, an initial address sequence is generated. In this step, the first slave device 300 responds to the received set address information and sets its communication address based on the set address information. For example, set the address information in the set address information as its communication address. In this step, the first slave device 300 responds to the address sequence information, generates an initial address sequence, and provides the initial address sequence to the serially connected slave device 200a.

In step S240, a plurality of slave devices sequentially receive and transmit the address sequence. In this step, a plurality of slave devices 200 perform operations as shown in FIG. 5 , so the details will not be described again.

In step S250, the address setting operation ends. In this step, after the plurality of slave devices 200 complete the setting of communication addresses, the address setting operation ends. In one embodiment, the plurality of slave devices 200 complete the setting of communication addresses using the received address sequence, and after receiving the end-of-setting signal, the address setting operation is completed. In one embodiment, the end setting signal is provided by the first slave device 300. The end setting signal is, for example, a sequence including a plurality of bits, and the value of each of the plurality of bits is 0. At this point, the addressing method of the communication system of this application ends.

In this embodiment, the addressing method of the communication system 2 of the present application causes the first slave device 300 that receives the first control signal CS1 to generate an address sequence, and other slave devices 200 read the corresponding address information group from the address sequence. To set its communication address and pass the address sequence to the next slave device 200, that is, the communication system of this application can be implemented only through the slave device, and can achieve accurate and fast completion of the slave device through a dedicated address transmission path. The purpose of device addressing. Furthermore, with the master device 100 providing address sequence information to implement the above addressing operation, the communication address of the slave device 200 on the communication bus will be flexibly changed by the address sequence, that is, the communication address of the slave device 200 The address does not need to be limited to a fixed address, but can be changed according to system configuration requirements, which further increases the convenience of communication system construction.

In summary, since the slave device of this application includes a dedicated address receiving end and an address output end, the slave device can directly receive the address sequence associated with the address information to quickly set the communication address. . In addition, multiple slave devices can be connected in series to each other through the address receiving end and the address output end, receiving the address sequence from the serially connected slave device, and providing the address sequence to the next connected slave device after completing the addressing. The device enables multiple slave devices to accurately extract the corresponding address information group from the address sequence to set their communication addresses. Therefore, this application can achieve the purpose of accurately and quickly completing the addressing of the slave device. Furthermore, by using an address sequence to implement the above addressing operation, the communication address of the slave device on the communication bus will be flexibly changed by the address sequence, that is, the communication address of the slave device does not need to be limited to a fixed position. The address can be changed according to system configuration requirements, which further increases the convenience of communication system construction.

1, 2: Communication system

100:Master control device

110:Address control circuit

200, 200a, 200b, 200n: slave device

210:Microcontroller

220: Address receiving end

230: Address output terminal

240: Clock signal receiving end

250: Data exchange terminal

260:Memory

261:Address setting module

300: First slave device

CS1: first control signal

CS2: second control signal

DS, DS1, DS2, DS3: address sequence

SCL: clock signal line

SDA: data transmission line

S110, S130, S131, S133, S135, S137, S139, S150, S210, S220, S230, S240, S250: Steps

Figure 1 is a schematic diagram of a communication system according to an embodiment of the present application; Figure 2 is a schematic diagram of an embodiment of a slave device according to the present application; Figure 3 is a schematic diagram of an address sequence embodiment according to the present application; Figure 4 is a schematic diagram of an embodiment of the addressing method according to the present application; Figure 5 is a schematic diagram of the second embodiment of the addressing method according to the present application; Figure 6 is a schematic diagram of a communication system according to Embodiment 2 of the present application; and Figure 7 is a schematic diagram of Embodiment 2 of the addressing method according to the present application.

200:Slave device

210:Microcontroller

220: Address receiving end

230: Address output terminal

240: Clock signal receiving end

250: Data exchange terminal

260:Memory

261:Address setting module

Claims (7)

An addressing method for a communication system. The communication system includes a plurality of slave devices. The plurality of slave devices are connected in series. Each slave device includes an address receiving end and an address output end. Each slave device performs the following Step: Make the address receiving end receive an address sequence, the address sequence includes a plurality of address information groups arranged in time sequence; read an address information group in the address sequence, and set the address information group is the communication address of the slave device, wherein the timing of the address information group is earlier than other address information groups in the plural address information group; and an update address sequence is generated from the address sequence, using the address information group. In the plurality of address information groups, the other address information groups whose timing is later than the timing of the address information group generate the updated address sequence, and provide the updated address sequence to the slave through the address output terminal. The next electronic device connected in the device series, wherein the number of address information groups in the updated address sequence is less than the number of the complex address information groups of the address sequence. The addressing method of the communication system as described in claim 1, wherein the address sequence is an initial address sequence or the updated address sequence generated by a previous slave device connected in series. The addressing method of the communication system as described in claim 2, wherein the number of the plurality of address information groups of the initial address sequence is equal to or greater than the number of the plurality of slave devices. The addressing method of the communication system as described in claim 1, wherein the electronic device is one of a plurality of slave devices or a master control device. An addressing method of a communication system. The communication system includes a first slave device and a plurality of slave devices. The first slave device and the plurality of slave devices are connected in series. The steps of the addressing method include: making the first slave device The device receives a setting address information and an address sequence information from a communication bus, and uses the setting address information as the communication address of the first slave device; and causes the first slave device to use the address sequence The information generates an initial address sequence, and the initial address sequence is provided as an address sequence to a slave device connected in series with the first slave device, wherein each of the plurality of slave devices performs the following steps: receiving the Address sequence, the address sequence includes a plurality of address information groups arranged in time sequence; read an address information group in the address sequence, and set the address information group to the communication address of the slave device, where , the timing of the address information group is earlier than other address information groups in the complex address information group; and an update address sequence is generated based on the address sequence, and the timing in the complex address information group is later The other address information group at the timing of the address information group generates the updated address sequence, and provides the updated address sequence to the next slave device connected in series with the slave device through an address output terminal, wherein , the number of the complex address information groups in the updated address sequence is less than the number of the complex address information groups in the address sequence. The addressing method of the communication system as described in claim 5, wherein the step of generating an updated address sequence using the address sequence includes: generating an updated address sequence using other address information groups that do not include the address information group in the address sequence. The updated address sequence. A slave device of a communication system, which includes: a memory storing an address setting module; an address receiving end; an address output end; and a microcontroller, together with the memory and the address receiving end And the address output terminal is electrically connected, wherein the microcontroller is used to execute the address setting module, causing the slave device to perform the following steps: causing the address receiving end to receive an address sequence, the address sequence includes A plurality of address information groups arranged in time sequence; read an address information group in the address sequence, and set the address information group to the communication address of the slave device, where the time sequence of the address information group is earlier than other address information groups in the complex address information group; and generate an updated address sequence from the address sequence, with the timing in the complex address information group later than the timing in the address information group. The other address information group generates the updated address sequence, and uses the address output terminal to provide the updated address sequence to the next electronic device connected in series with the slave device, wherein the address in the updated address sequence The number of information groups is less than the number of plural address information groups for this address sequence.

Images