TWI823644B - Optoelectronic semiconductor device - Google Patents

Abstract

An optoelectronic semiconductor device includes a substrate, a semiconductor stack, a semiconductor layer, an insulation layer and a first conductive layer. The semiconductor stack is on the substrate and includes an active structure. The semiconductor layer is between the substrate and the semiconductor stack. The insulation layer is between the substrate and the semiconductor layer. The first conductive layer is between the insulation layer and the semiconductor layer and directly contact the semiconductor layer.

Description

Optoelectronic semiconductor device

The present invention relates to a semiconductor device, and in particular to an optoelectronic semiconductor device.

The semiconductor device includes a compound semiconductor composed of III-V group elements, such as gallium phosphide (GaP), gallium arsenide (GaAs) or gallium nitride (GaN). The semiconductor device may be an optoelectronic semiconductor device such as a light-emitting diode (LED). ), laser diodes, light detectors, solar cells or power devices. The light-emitting diode includes a p-type semiconductor layer, an n-type semiconductor layer and an active structure located between the p-type semiconductor layer and the n-type semiconductor layer, so that under the action of an external electric field, the n-type semiconductor layer and the p-type semiconductor layer The electrons and holes respectively provided by the layers are recombined in the active structure to convert electrical energy into light energy. How to improve the photoelectric conversion efficiency of optoelectronic semiconductor devices is actually one of the focuses of R&D personnel.

The present invention relates to an optoelectronic semiconductor device.

According to an embodiment, an optoelectronic semiconductor device includes: a substrate, a semiconductor stack, a semiconductor layer, an insulating layer and a first conductive layer. Semiconductor A body stack is located on the substrate and contains an active structure. A semiconductor layer is located between the substrate and the semiconductor stack. An insulating layer is located between the substrate and the semiconductor layer. The first conductive layer is located between the insulating layer and the semiconductor layer and is in direct contact with the semiconductor layer.

In order to have a better understanding of the above and other aspects of the present invention, examples are given below and are described in detail with reference to the accompanying drawings:

100,100’: Optoelectronic semiconductor devices

1: Semiconductor stack

11: First surface

111: First semiconductor layer

112: Second semiconductor layer

113:Active structure

2: First electrode structure

30:Substrate

31: Conductive adhesive layer

32: Reflective structure

320: Electrical contact layer

322:Barrier layer

324: Reflective adhesive layer

326: Reflective layer

33:Conductive structure

331: First conductive layer

332: Second conductive layer

34:First window layer

34a: Second surface

35:Insulation layer

351:pore

35a: Upper surface

36: Second electrode structure

X, Z: direction

25:Joining wire

26:Contact structure

200:Package structure

21:Package substrate

22:Through hole

23: Carrier

23a:Part 1

23b:Part 2

26a, 26b: Contact pad

28:Packaging materials

FIG. 1 is a schematic cross-sectional view of an optoelectronic semiconductor device according to an embodiment.

FIG. 2 shows a schematic top view of an optoelectronic semiconductor device according to an embodiment.

FIG. 3 is a schematic cross-sectional view of an optoelectronic semiconductor device according to an embodiment.

Figures 4A-4D are examples of the luminescence spectrum of the optoelectronic semiconductor device having two peak positions.

Figure 5 shows the luminescence spectrum of an optoelectronic semiconductor device under different currents according to an embodiment.

Figure 6 shows the luminescence spectrum of an optoelectronic semiconductor device under different currents according to an embodiment.

Figure 7 shows the luminescence spectrum of an optoelectronic semiconductor device under different currents according to an embodiment.

Figure 8 shows the luminescence spectrum of an optoelectronic semiconductor device under different current application times according to an embodiment.

Figure 9 shows the luminescence spectrum of an optoelectronic semiconductor device according to an embodiment.

Figure 10 shows the luminescence spectrum of an optoelectronic semiconductor device according to an embodiment.

Figure 11 is a schematic diagram of the packaging structure of an optoelectronic semiconductor device according to an embodiment.

In order to make the above objects, features, and advantages of the present disclosure more obvious and understandable, preferred embodiments are cited below and described in detail with the accompanying drawings: Figure 1 illustrates an optoelectronic device according to the concept of an embodiment. Schematic cross-sectional view of semiconductor device 100 . Figure 2 is a top view of the semiconductor optoelectronic semiconductor device 100 of the present disclosure according to an embodiment. Figure 1 corresponds to the cross-sectional schematic diagram of line AA' in Figure 2. The optoelectronic semiconductor device 100 has a semiconductor stack 1 and a substrate 30 . In this embodiment, a conductive adhesive layer 31 , a reflective structure 32 , a conductive structure 33 , an insulating layer 35 , a first window layer 34 , and a semiconductor stack 1 can be disposed in sequence on the substrate 30 . The first electrode structure 2 and the second electrode structure 36 are arranged on opposite sides of the semiconductor stack 1 .

The semiconductor stack 1 includes a first semiconductor layer 111, a second semiconductor layer 112 and an active structure 113 located between the first semiconductor layer 111 and the second semiconductor layer 112. In other words, the active structure 113 and the second semiconductor layer 113 are located between the first semiconductor layer 111 and the second semiconductor layer 112. The layers 112 are sequentially located on the first semiconductor layer 111 in a stacking direction (ie, the Z direction in the figure, which may be substantially perpendicular to the X direction). In one embodiment, the optoelectronic semiconductor device 100 is a light-emitting device, the semiconductor stack 1 is a light-emitting stack, and the first semiconductor layer 111 and the second semiconductor layer 112 are, for example, cladding layers and/or confinement layers. layer), and has an energy gap larger than that of the active structure, thereby increasing the probability that electrons and holes are combined in the active structure 113 to emit light. The active structure 113 can emit emitted light, and the emitted light has a peak wavelength (peak wavelength) of about 200 nm to 1800 nm; in one embodiment, the emitted light of the semiconductor stack 1 is infrared light, and the peak wavelength of the emitted light About 750nm~1700nm.

The semiconductor stack 1 has a first surface 11, and the first electrode structure 2 is located on the first surface 11. In this embodiment, the first surface 11 is a rough surface to increase the light extraction efficiency of the optoelectronic semiconductor device 100. The first window layer 34 is disposed on the first semiconductor layer 111 and has a second surface 34a away from the first surface 11 of the semiconductor stack 1 .

The first semiconductor layer 111 and the second semiconductor layer 112 respectively have a different first conductivity and a second conductivity to respectively provide electrons and holes, or provide holes and electrons respectively. The active structure 113 may include a single heterostructure, a double heterostructure, or multiple quantum wells. The materials of the first semiconductor layer 111, the second semiconductor layer 112 and the active structure 113 are Group III and V compound semiconductors, for example, they can be: GaAs, InGaAs, AlGaAs, AlInGaAs, GaP, InGaP, AlInP, AlGaInP, GaN, InGaN, AlGaN, AlInGaN, AlAsSb, InGaAsP, InGaAsN, AlGaAsP, etc. In the embodiments of the present invention, unless otherwise specified, the above chemical expressions include "compounds that meet chemical dosages" and "compounds that do not meet chemical dosages", where "compounds that meet chemical dosages" are, for example, the sum of three group elements. The element dose is the same as the total element dose of Group 5 elements. On the contrary, "compounds that do not meet the chemical dose", for example, the total element dose of Group 3 elements is different from the total element dose of Group 5 elements. For example, the chemical expression AlGaAs means that it contains the three group elements aluminum (Al) and gallium (Ga), and the five group elements arsenic (As). The total element dose of the three group elements (aluminum and gallium) can be calculated as The total elemental doses of Group 5 elements (arsenic) are the same or different. In addition, if the above-mentioned compounds represented by chemical expressions are compounds that meet the chemical dosage, AlGaAs represents Al _x1 Ga _1-x1 As, where the aluminum content x can comply with 0<x1<1; AlInP represents Al _x2 In _{1 -x2 P , where the aluminum content} N, where the aluminum content x4 can comply with 0<x4<1; AlAsSb represents AlAs _x5 Sb _1-x5 , where 0<x5<1; InGaP represents In _x5 Ga _1-x5 P, where 0<x5<1; InGaAsP represents In _x6 Ga _1-x6 As _(1-y2) P _y2 , where 0<x6<1,0<y2<1; InGaAsN represents In _x7 Ga _1-x7 As _1-y3 N _y3 , where 0<x7<1,0<y3<1; AlGaAsP represents Al _x8 Ga _1-x8 As _1-y4 P _y4 , where the aluminum content x can comply with 0<x8<1, 0<y4<1; InGaAs represents In _x9 Ga _{1 -x9} As, where 0<x9<1.

In one embodiment, the compositions of the first semiconductor layer 111 and the second semiconductor layer 112 both include aluminum and have the same aluminum content. In this embodiment, the optoelectronic semiconductor device 100 further includes a second window layer (not shown) located on the second semiconductor layer 112, and the thickness of the second window layer is greater than the second semiconductor layer 112, thereby increasing the light extraction efficiency. . The aluminum content of the second window layer is less than that of the second semiconductor layer and the material is Al _0.2 Ga _0.8 As. The thickness of the second window layer is 9 μm.

In one embodiment, the active structure 113 has a multi-layer quantum wells structure, including a plurality of quantum well layers and a plurality of resistors stacked alternately in the stacking direction (such as the Z direction in Figure 1). Barrier layer (barrier layer), and the energy barrier of the barrier layer is larger than the quantum well layer, thereby limiting the carrier distribution. In addition, the plurality of quantum well layers may have the same or different material compositions and energy barriers, and there are no restrictions here. In one embodiment, one of the plurality of barrier layers has an aluminum element, and its aluminum content is different from the aluminum content of the first semiconductor layer 111. Specifically, one of the plurality of barrier layers has an aluminum content less than that of the first semiconductor layer 111. Aluminum content of semiconductor layer 111 . In one embodiment, the first semiconductor layer 111 includes aluminum element, and one of the barrier layers includes aluminum element. In one embodiment, the difference between the aluminum content of the first semiconductor layer 111 and the aluminum content of one of the barrier layers is at least 8%, preferably 10~25%, and more preferably 12~20%. Alternatively, each layer of the plurality of barrier layers contains aluminum elements, and the aluminum content in each layer is less than the aluminum content of the first semiconductor layer 111 . In one embodiment, the difference between the aluminum content in each barrier layer and the aluminum content in the first semiconductor layer 111 is at least 8%, preferably 10~25%, and more preferably 12~20%.

The refractive index of the first semiconductor layer 111, the second semiconductor layer 112 and the active structure 113 can be changed according to the elemental composition of their materials. In this embodiment, the material of the first semiconductor layer 111, the second semiconductor layer 112 and the active structure 113 is AlGaAs, and when the aluminum content is higher, the refractive index is lower, and there is a roughly linear relationship between the two, for example: the refractive index The relationship between n and aluminum content x is n=3.3-0.53x+0.09x ² . In one embodiment, the first semiconductor layer 111 has a first refractive index, and one of the barrier layers of the active structure 113 has a second refractive index. The difference between the first refractive index and the second refractive index is at least 0.04.

The present disclosure is not limited to the structure of a single semiconductor stack 1 as shown in FIG. 1 . In other embodiments, the optoelectronic semiconductor device 100 may have a plurality of semiconductor stacks disposed between the first electrode structure 2 and the second electrode structure 36 , for example, between the first electrode structure 2 and the first window layer 34 . The plurality of semiconductor stacks may have the same or different structures and/or properties. In one embodiment, the semiconductor device has a structure of two semiconductor stacks. For example, another semiconductor stack can be disposed above or below the semiconductor stack 1 shown in Figure 1. One of the advantages of this design is that it can increase the number of semiconductor devices. luminous efficiency. The other semiconductor stack may be similar to the semiconductor stack 1, for example, having a third semiconductor layer located on the second semiconductor layer 112 of the semiconductor stack 1, a fourth semiconductor layer located on the third semiconductor layer, and a third semiconductor layer located on the second semiconductor layer 112 of the semiconductor stack 1. An active structure between the third semiconductor layer and the fourth semiconductor layer. The active structure 113 (first active structure) of the semiconductor stack 1 and the active structure (second active structure) of the other semiconductor stack may have the same or different energy gaps to emit light of the same or different wavelengths. In one embodiment, a tunnel structure may be configured between two semiconductor stacks. The tunneling structure can be a single layer or multiple layers, and the doping concentration of each layer is greater than 5×10 ¹⁸ /cm ³ , which allows electrons to pass through the tunneling effect. The material of the tunneling structure can be a III-V semiconductor, such as Compounds of gallium (Ga), aluminum (Al), indium (In), phosphorus (P), nitrogen (N), zinc (Zn), cadmium (Cd) or selenium (Se). In another embodiment, the tunnel structure can be replaced by a bonding structure for joining the semiconductor stacks above and below it. The bonding structure can be a single layer or multiple layers, and the material includes conductive materials such as metal oxide materials or III-V semiconductor materials. Metal oxide materials include indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), zinc oxide (ZnO), magnesium oxide (MgO), Aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), indium tungsten oxide (IWO), indium zinc oxide (IZO) or tantalum oxide (Ta ₂ O ₅ ); Group III and V semiconductor materials such as It is aluminum gallium arsenide (AlGaAs), gallium nitride (GaN) or gallium phosphide (GaP). In another embodiment, the bonding structure includes insulating materials, such as Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin (Epoxy), acrylic resin (Acrylic Resin), cyclic olefin Polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polyimide (PI), polycarbonate (PC), polyetherimide (Polyetherimide) ), Fluorocarbon Polymer, Glass, Aluminum Oxide (Al ₂ O ₃ ), Silicon Oxide (SiO ₂ ), Titanium Oxide (TiO ₂ ), Silicon Nitride (SiNx), Spin-on Glass ( SOG) or tetraethoxysilane (TEOS).

The first electrode structure 2 may be located above the semiconductor stack 1 . The second electrode structure 36 may be located under the substrate 30, but the present disclosure is not limited thereto.

The substrate 30 may be used to support the semiconductor stack 1 and other layers or structures located thereon. The semiconductor stack 1 can be grown on the substrate 30 or another growth substrate through an epitaxial method such as metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or hydride vapor phase epitaxy (HVPE). , if the semiconductor stack 1 is grown on a growth substrate, the semiconductor stack 1 can be bonded to the substrate 30 through substrate transfer technology and the growth substrate can be selectively removed. In one embodiment, the semiconductor stack 1 is grown on the growth substrate and then bonded to the substrate 30 through the conductive adhesive layer 31 through substrate transfer technology. Specifically, the substrate 30 may be transparent, translucent or opaque to the light emitted by the active structure 113, or may be conductive, semiconductor or insulating. In this embodiment, the optoelectronic semiconductor device 100 is of a vertical type. Therefore, the substrate 30 is a conductive material and includes metal materials, metal alloy materials, metal oxide materials, semiconductor materials or carbon-containing materials. Metal materials include copper (Cu), aluminum (Al), chromium (Cr), tin (Sn), gold (Au), nickel (Ni), titanium (Ti), platinum (Pt), lead (Pb), zinc ( Zn), cadmium (Cd), antimony (Sb), molybdenum (Mo), tungsten (W) or cobalt (Co); the metal alloy material is an alloy containing the above metal materials; the metal oxide material may include but is not limited to indium oxide Tin (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO) ), indium tungsten oxide (IWO), zinc oxide (ZnO), indium zinc oxide (IZO), gallium oxide (Ga ₂ O ₃ ), lithium gallate (LiGaO ₂ ), lithium aluminate (LiAlO ₂ ) or magnesium aluminate (MgAl ₂ O ₄ ); semiconductor materials may include but are not limited to Group IV semiconductors or Group III-V semiconductors, such as: silicon (Si), germanium (Ge), silicon carbide (SiC), gallium nitride (GaN), nitrogen Aluminum (AlN), gallium phosphide (GaP), gallium arsenide (GaAs), gallium arsenide phosphorus (AsGaP), zinc selenide (ZnSe), zinc selenide (ZnSe) or indium phosphide (InP), etc.; The carbonaceous material may include, but is not limited to, diamond-like carbon (DLC) films or graphene.

In another embodiment, when the optoelectronic semiconductor device 100 is of a non-vertical type, such as a horizontal type in which the first electrode structure 2 and the second electrode structure 36 are located on the same side of the semiconductor stack 1 , the substrate 30 can be Contains insulating materials, such as sapphire, glass, quartz, acrylic, epoxy, insulating nitrides (such as SiN) or insulating oxides (such as SiO ₂ )wait. In this embodiment, the optoelectronic semiconductor device is a near-field infrared light-emitting element, and the material of the substrate 30 includes indium phosphide (InP) or gallium arsenide (GaAs). For example, the material of the substrate 30 is InP or GaAs or is substantially made of InP. Or composed of GaAs.

The material of the conductive adhesive layer 31 may include conductive materials, such as metal oxide materials, semiconductor materials, metal materials, metal alloy materials or carbon-containing materials. For example, metal oxide materials may include, but are not limited to, indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide ( AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), zinc oxide (ZnO), indium cerium oxide (ICO), indium tungsten oxide (IWO), indium titanium oxide (ITiO), indium zinc oxide (IZO), indium gallium oxide (IGO) , gallium and aluminum codoped zinc oxide (GAZO). The semiconductor material may include, but is not limited to, gallium phosphide (GaP). Metal materials may include, but are not limited to, copper (Cu), aluminum (Al), tin (Sn), gold (Au), silver (Ag), lead (Pb), titanium (Ti), nickel (Ni), indium (In ), platinum (Pt) or tungsten (W). The metal alloy material is an alloy including the above metal materials. Carbonaceous materials may include, but are not limited to, graphene. The conductive adhesive layer 31 can connect the connection substrate 30 to the reflective structure 32 and can have a plurality of slave layers (not shown).

In one embodiment, the reflective structure 32 can be used to reflect the emitted light from the semiconductor stack 1 to increase the light extraction efficiency of the optoelectronic semiconductor device 100 . The material of the reflective structure 32 may include but is not limited to metal materials or metal alloy materials, such as: copper (Cu), aluminum (Al), tin (Sn), gold (Au), silver (Ag), lead (Pb), titanium (Ti), nickel (Ni), platinum (Pt), tungsten (W); metal alloy materials are alloys containing the above materials. As shown in Figure 1, in this embodiment, the reflective structure 32 includes a reflective layer 326, a reflective adhesive layer 324 located under the reflective layer 326, a barrier layer 322 located under the reflective adhesive layer 324, and an electrical contact. Layer 320 is located below barrier layer 322. The reflective layer 326 can reflect the emitted light from the semiconductor stack 1 . The reflective adhesive layer 324 can be used to connect the reflective layer 326 and the barrier layer 322 . The barrier layer 322 can be used to prevent the material of the conductive adhesive layer 31 from being Diffusion to the reflective layer 326 destroys the structure of the reflective layer 326, thereby maintaining the reflectivity of the reflective layer 326, and the electrical contact layer 320 can form a low-resistance contact with the underlying conductive adhesive layer 31.

The conductive structure 33 is located under the first semiconductor layer 111 and can be transparent to the emitted light from the semiconductor stack 1 to increase current conduction and diffusion between the first window layer 34 and the reflective structure 32. In some embodiments , the conductive structure 33 and the reflective structure 32 may jointly form an Omni-Directional Reflector (ODR). The material of the conductive structure 33 may include metal oxide materials, metal materials, metal alloy materials, carbon-containing materials, or combinations of the above materials. Metal oxide materials such as indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO) , Gallium zinc oxide (GZO), indium tungsten oxide (IWO), zinc oxide (ZnO), gallium phosphide (GaP), indium cerium oxide (ICO), indium tungsten oxide (IWO), indium titanium oxide (ITiO), oxide Indium zinc oxide (IZO), indium gallium oxide (IGO), gallium aluminum zinc oxide (GAZO). Metal materials such as gold (Au), germanium (Ge), and beryllium (Be). Metal alloy materials are alloys containing the above metal materials. Carbonaceous materials may include, but are not limited to, graphene.

As shown in FIG. 1 , in one embodiment, the conductive structure 33 has a first conductive layer 331 located above the reflective structure 32 , and a second conductive layer 332 located between the semiconductor stack 1 and the first conductive layer 331 . The materials of the first conductive layer 331 and the second conductive layer 332 may be different. For example, the material of the first conductive layer 331 is indium zinc oxide (IZO), and the material of the second conductive layer 332 is oxygen. Indium tin (ITO), but not limited to this.

The second conductive layer 332 may be in direct contact with the insulating layer 35 and/or the first window layer 34 and cover at least one surface of the insulating layer 35 . In one embodiment, the second surface 34 a of the first window layer 34 faces the insulating layer 35 and toward the direction of the substrate 30 , and the insulating layer 35 has an upper surface 35 a facing the first window layer 34 . In one embodiment, when viewed from the top of the optoelectronic semiconductor device 100, the percentage of the surface area of the upper surface 35a relative to the surface area of the second surface 34a is 1.5%~50%, preferably 2%~30%, so that The optoelectronic semiconductor device 100 has better luminous efficiency. In another embodiment, the upper surface 35a of the insulating layer 35 can be a rough surface to scatter the light emitted by the semiconductor stack 1 to improve the light extraction efficiency of the optoelectronic semiconductor device 100.

As shown in FIG. 1 , in one embodiment, the insulating layer 35 may have a patterned distribution. For example, the distribution of the insulating layer 35 may appear regular or irregular when viewed from above. The insulating layer 35 can be disposed corresponding to the underside of the first electrode structure 2 to reduce current flow through the semiconductor stack 1 under the first electrode structure 2 and prevent the light emitted by the semiconductor stack 1 under the first electrode structure 2 from being transmitted by the second electrode structure 2 . One electrode structure 2 absorbs. In addition, the provision of the insulating layer 35 can promote current diffusion to positions other than the semiconductor stack 1 under the first electrode structure 2 . The material of the insulating layer 35 can be selected to have a transmittance of greater than 90% for the emitted light emitted by the semiconductor stack 1. The material of the insulating layer 35 can be selected to include an oxide insulating material or a non-oxide insulating material. The oxide insulating material is, for example, It is silicon oxide _{( SiO} Magnesium (MgF ₂ ) or silicon nitride (SiNx).

In one embodiment, the refractive index of the insulating layer 35 is smaller than the refractive index of the first window layer 34 , and the critical angle of the interface between the first window layer 34 and the insulating layer 35 is smaller than the critical angle of the interface between the first window layer 34 and the conductive structure 33 The critical angle increases the probability of total reflection at the interface between the first window layer 34 and the insulating layer 35 after the emitted light from the semiconductor stack 1 is directed toward the insulating layer 35 . In addition, since the insulating layer 35 has a low refractive index, the light that passes through the interface between the first window layer 34 and the conductive structure 33 and enters the conductive structure 33 may also generate a full range of light at the interface between the conductive structure 33 and the insulating layer 35 . Reflection, thereby improving the light extraction efficiency of the optoelectronic semiconductor device 100. For example, the refractive index of the insulating layer 35 can be selected to be less than 1.7, preferably 1.3~1.6. In one embodiment, the thickness of the insulating layer 35 is less than half the thickness of the conductive structure 33 . In another embodiment, the thickness of the insulating layer 35 is less than 1/5 of the thickness of the conductive structure 33 . This can avoid or reduce the damage to the structure of the insulating layer 35 during the surface planarization process after the conductive structure 33 is formed. In one embodiment, at least one surface of the insulating layer 35 is covered by the conductive structure 33, which can increase the joint area of the conductive structure 33, strengthen the joint between the insulating layer 35 and the first window layer 34, and improve the mechanical strength of the structure. In one embodiment, a plurality of pores 351 are formed in the insulating layer 35 , and the conductive structure 33 is filled in the plurality of pores 351 and directly contacts the first window layer 34 to form an electrical connection.

The conductivity of the first window layer 34 can be the same as that of the first semiconductor layer 111 The conductivity of the first window layer 34 is the same, for example, n-type or p-type. The first window layer 34 is transparent to the emitted light from the semiconductor stack 1, and its material may include a metal oxide material or a semiconductor material. The metal oxide material such as oxide Indium tin (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide ( GZO), indium tungsten oxide (IWO), zinc oxide (ZnO), magnesium oxide (MgO), or indium zinc oxide (IZO); semiconductor materials such as gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), nitrogen Gallium (GaN), gallium phosphide (GaP).

The first electrode structure 2 and the second electrode structure 36 are located on opposite sides of the semiconductor stack 1 to form a vertical optoelectronic semiconductor device 100 . The structure of the optoelectronic semiconductor device 100 shown in the figure is only for illustration and is not intended to be limiting. For example, in some embodiments of the present disclosure, the first electrode structure 2 and the second electrode structure 36 may also be located on the semiconductor stack 1 on the same side to form a horizontal semiconductor device. Both the first electrode structure 2 and the second electrode structure 36 can be used to connect an external power source and provide current to cause the semiconductor stack 1 to emit light. In one embodiment, the second electrode structure 36 is formed on the back side of the substrate 30. The material of the second electrode structure 36 may be the same as or different from the material of the first electrode structure 2. The materials of the first electrode structure 2 and the second electrode structure 36 are Materials may include metallic materials, alloy materials, metal oxide materials, or carbonaceous materials. For example, metal materials may include, but are not limited to, aluminum (Al), chromium (Cr), copper (Cu), tin (Sn), gold (Au), nickel (Ni), titanium (Ti), platinum (Pt) , lead (Pb), zinc (Zn), cadmium (Cd), antimony (Sb) or cobalt (Co), alloy materials include the above An alloy of the above metal combinations, and the metal oxide material may include but is not limited to indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), oxide Aluminum zinc (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), indium tungsten oxide (IWO), zinc oxide (ZnO), or indium zinc oxide (IZO). The carbonaceous material may include, but is not limited to, diamond-like carbon films (DLC) or graphene.

As shown in Figure 3, the optoelectronic semiconductor device 100' has a similar structure to the optoelectronic semiconductor device 100. For related descriptions, please refer to the previous paragraphs and will not be described again. The second conductive layer 332 is located between the first window layer 34 and the insulating layer 35 . The second conductive layer 332 directly contacts the first window layer 34 , and the insulating layer 35 directly contacts the second conductive layer 332 without directly contacting the first window layer 34 . The first conductive layer 331 is filled in the pore 351 and is electrically connected to the first window layer 34 through the second conductive layer 332 . The insulating layer 35 is patterned and distributed under the second conductive layer 332. The surface area of the upper surface 35a is 1.5%~50% of the surface area of the second surface 34a, preferably 2%~30%. This allows the optoelectronic semiconductor device 100 to have Better luminous efficiency.

In one embodiment, when a current is provided to the optoelectronic semiconductor device 100 and the current is greater than 3.5 A or the current density of the semiconductor stack 1 is greater than 3.5 A/mm ² , the luminescence spectrum of the emitted light emitted by the semiconductor stack 1 has The two peak positions (peak wavelengths), namely the first peak position w1 and the second peak position w2, in one embodiment, the first peak position w1 and the second peak position w2 are both greater than 900 nm or greater than 930 nm. The second wave peak position w2 is greater than the first wave peak position w1 (ie: w2>w1), and the first wave peak position w1 and the second wave peak position w2 are separated from each other by a distance and have a separation rate of 0.5%~10%, preferably It is 1%~6%. The separation rate is consistent with the following formula (1):

Alternatively, the optoelectronic semiconductor device 100 can, through the aforementioned difference in aluminum content and refractive index, emit light having two peak positions in the luminescence spectrum after being energized, namely the first peak position w1 and the second peak position w2. The separation rate of the two peak positions is between 0.5% and 10%, preferably between 1% and 6%.

Figures 4A-4D are examples of the luminescence spectrum of the optoelectronic semiconductor device having two peak positions.

As shown in Figure 4A, the luminescence spectrum includes a first peak P1 and a second peak P2. The first wave peak P1 has a first wave peak position w1 and the second wave peak P2 has a second wave peak position w2. The first wave peak P1 further has a first luminescence intensity I1, and the first luminescence intensity I1 is the relative maximum intensity of the first wave peak position w1 within a range (for example: the first wave peak position w1±3nm). Similarly, the second wave peak P2 further has a second luminescence intensity I2, and the second luminescence intensity I2 is the relative maximum intensity of the second wave peak position w2 within a range (for example: the second wave peak position w2±3nm). The second wave peak position w2 is greater than the first wave peak position w1. The first luminous intensity I1 and the second luminous intensity I2 may be the same or different. In an embodiment, the first luminous intensity I1 is greater than the second luminous intensity I2. In this embodiment, the second luminous intensity I2 is greater than the first luminous intensity I1, and the second luminous intensity A preferred ratio of the intensity to the first luminous intensity is 0.2~2, and the ratio is more preferably 1.1~1.5. The first wave peak position w1 and the second wave peak position w2 are both greater than 900nm. Specifically, the first wave peak position w1 is 946nm, the second wave peak position w2 is 956nm, and the separation rate is about 1.06%.

In the luminescence spectrum shown in Figure 4B, the first peak position w1 is 948nm, the second peak position w2 is 974nm, and the separation rate is approximately 2.74%.

In the luminescence spectrum shown in Figure 4C, the first peak position w1 is 908nm, the second peak position w2 is 959nm, and the separation rate is approximately 5.62%.

In the luminescence spectrum shown in Figure 4D, the first peak position w1 is 919nm, the second peak position w2 is 949nm, and the separation rate is 3.26%.

The definitions of the above-mentioned first wave peak position w1 and second wave peak position w2 will be explained later.

Figure 5 shows the luminescence spectrum of an optoelectronic semiconductor device under different currents according to an embodiment. The structure of the optoelectronic semiconductor device can be referred to Figure 1. The barrier layer materials of the first semiconductor layer 111, the second semiconductor layer 112 and the active structure 113 are all AlGaAs. The main materials of the first semiconductor layer 111 and the second semiconductor layer 112 are the same, and the first semiconductor layer 111 and the second semiconductor layer 112 have different dopants so that they have different conductivities. The aluminum content of the first semiconductor layer 111 and the second semiconductor layer 112 is 36% (x1=0.36). The number of barrier layers is three, and the aluminum content of each barrier layer is 20% (x1=0.2). In this embodiment, the difference between the aluminum content of the first semiconductor layer 111 and the aluminum content of the barrier layer is 16%, the difference between the aluminum content of the second semiconductor layer 112 and the aluminum content of the barrier layer is also 16%, and the optoelectronic The semiconductor stack 1 of the semiconductor device 100 has an area of approximately 1.138 mm ² (ie, 42 mil ² ).

Figure 5 shows the luminescence spectra obtained by applying currents of 1A, 2A, 3A, 3.5A, 4A, 4.5A, 4.75A, and 5A to the above-mentioned optoelectronic semiconductor device 100. Under the above currents, the current densities in the semiconductor stack are approximately 0.9A/mm ² , 1.8A/mm ² , 2.6A/mm ² , 3.0A/mm ² , 3.5A/mm ² , and 4.0A/mm ² respectively. , 4.2A/mm ² , 4.4A/mm ² , and the time of applying current is consistently 666μs. When the applied current is 1~4A, the luminescence spectrum of the optoelectronic semiconductor device 100 has only one peak. However, when the current is continued to be applied to greater than 4A (that is, when the current density in the semiconductor stack is greater than 3.5A/mm ² ), for example, the current When reaching 4.5A, the emission spectrum of the optoelectronic semiconductor device 100 has two peaks, namely the first peak at 946nm and the second peak at 956nm. The first peak and the second peak are The separation rate is 1.06%. When the applied current is 4.75A, the wave peak separation is more obvious. The first wave peak position is at 946nm and the second wave peak position is at 960nm. The separation rate is 1.48%, and the first luminescence intensity is smaller than the second luminescence intensity. When the applied current is 5A, the first wave peak position is 947nm, the second wave peak position is 960nm, the separation rate is 1.37%, and the second luminescence intensity I2 is greater than the first luminescence intensity I1. The first wave peak position and the second wave peak position will change with different currents.

Referring to the results described in Figure 5, it can be seen that when the current density provided to the semiconductor stack 1 is greater than 3.5A/ ^mm2 , the luminescence spectrum of the semiconductor stack 1 may have two peak positions.

Table 1 shows that the first semiconductor layer 112 of the semiconductor device according to an embodiment has different aluminum contents (AD), aluminum content differences, refractive index differences and related spectral properties (peak number and peak position). The spectral properties are measured after applying a current of 4.5 A to the semiconductor stack 1. The current density of the semiconductor stack 1 is approximately 4.0 A/mm ² . The semiconductor device has a structure as shown in Figure 1. The main material of the barrier layer and the first semiconductor layer is AlGaAs, and the aluminum content of the barrier layer is 20% (that is, x1=0.2). It can be seen from Table 1 that the aluminum content of the first semiconductor layer 112 is 36% and 32% (A, B), and the emitted light of the semiconductor stack can have two peak positions; the aluminum content of the first semiconductor layer 112 is 28% and 24 % (C, D), the luminescence spectrum of the semiconductor stack has only one peak position. It can be seen from this that when the difference in aluminum content between the first semiconductor layer and the barrier layer is greater than 8%, and/or when the difference in refractive index between the first semiconductor layer and the barrier layer is greater than 0.04, the semiconductor stack There can be two peak positions in the luminescence spectrum, and the separation rate of the two peak positions is 0.5%~10%.

Figure 6 shows the luminescence spectrum of an optoelectronic semiconductor device under different currents according to an embodiment. The structure of the optoelectronic semiconductor device can be referred to Figure 1, but the thickness of the second window layer is 7 μm.

Figure 7 shows the luminescence spectrum of another embodiment of the optoelectronic semiconductor device under different currents. The structure of the optoelectronic semiconductor device can be referred to Figure 1. However, the optoelectronic semiconductor device includes two semiconductor stacks and includes a tunnel structure located between the two semiconductor stacks.

From the results in Figures 6 and 7, it can be found that compared with a single semiconductor stack structure, when the same current is supplied, the luminescence spectrum of an optoelectronic semiconductor device with two semiconductor stacks is more likely to have two peak positions. For example: when the applied current reaches 5A (that is, the current density is 4.4A/mm ² ), an optoelectronic semiconductor device with one semiconductor stack has two peak positions. However, an optoelectronic semiconductor device with two semiconductor stacks has When a current of 4A is applied (that is, the current density is 3.5A/mm ² ), there are two obvious peak positions. When the applied current reaches 5A (that is, the current density is 4.4A/mm ² ), the phenomenon that the luminescence spectrum of the optoelectronic semiconductor device having two semiconductor stacks has two peaks becomes more obvious.

Figure 8 shows the luminescence spectrum of an optoelectronic semiconductor device under different current application times according to an embodiment. The structure of the optoelectronic semiconductor device can be referred to Figure 1, and the applied current is 5A, and the time of applying the current is: 5μs, 10μs, 25μs, 50μs, 100μs, 500μs, 1ms, 2ms. From the trend shown in Figure 8, it can be seen that when the current is applied for a longer time, the luminescence spectrum of the semiconductor stack is more likely to have two peak positions. As shown in Figure 8, when the current is applied for At 500μs, the luminescence spectrum of the semiconductor stack appears at two peak positions. When the time of applying current is increased to 1ms and 2ms, the luminescence spectrum has two peaks more obviously.

Figure 9 shows the luminescence spectrum of an optoelectronic semiconductor device according to another embodiment. The structure of the optoelectronic semiconductor device can be referred to Figure 1. However, the optoelectronic semiconductor device does not have an insulating layer, that is, the percentage of the surface area of the upper surface of the insulating layer relative to the surface area of the second surface of the first window layer is 0%, so the conductive structure Complete contact with the first window layer.

Figure 10 shows the luminescence spectrum of the optoelectronic semiconductor device in Figure 1A. The optoelectronic semiconductor device has a patterned insulating layer.

Figures 9 and 10 both show the luminescence spectra obtained when applying a current of 5A (that is, the current density is 4.4A/mm ² ) and the current application time is 100 μs to the optoelectronic semiconductor device. It can be seen from the results shown in Figures 9 and 10 that when the percentage of the surface area of the upper surface of the insulating layer relative to the surface area of the second surface of the first window layer is larger, the luminescence spectrum of the semiconductor stack is more likely to have two peak positions. .

The above-mentioned first wave peak position w1 and second wave peak position w2 can be obtained by direct numerical interpretation or analysis by data processing software. As shown in Figure 4A or 4B, when the luminescence spectrum has two obvious peak positions with relatively high intensity, the first peak position w1 and the second peak position w2 can be directly interpreted numerically, that is, the intensity value with relatively high intensity is determined by the numerical value. The corresponding wavelengths are defined as the first wave peak position w1 and the second wave peak position w2. When the first wave peak position w1 and the second wave peak position w2 cannot be determined by direct numerical interpretation, data processing software (for example: originLab) can be used to obtain the first wave peak position w1 and the second wave peak position w2, such as 4C or Shown in 4D diagram. Briefly, import the luminescence spectrum values into originLab and obtain a regression curve through the curve fitting function. This regression curve has a coefficient of determination (R ² ) relative to the value of the luminescence spectrum. When the coefficient of determination is greater than or equal to 0.95, the first peak position w1 and the second peak position w2 can be defined.

Specifically, first, when the luminescence spectrum of the optoelectronic semiconductor device is analyzed with the OriginLab 2017 version, the wavelength position corresponding to the highest intensity in the luminescence spectrum is defined as the preset value (Wx). Next, select the following options in order: analysis→fitting→nonlinear curve fitting. In the function selection of the setting tag, select Gauss from the Function drop-down, and select 1 from the Number of Replicas drop-down in Advanced to simulate two Gaussian distribution curves. The two Gaussian distribution curves respectively have two preset peak positions (xc and xc_2, and xc>xc_2).

Next, if the wavelength position corresponding to the aforementioned highest intensity is closer to xc, go to the Parameters tab and enter Wx into the field of xc. If the wavelength position corresponding to the aforementioned highest intensity is closer to xc_2, enter Wx into the field of xc_2, check the Fixed box in this field, and then press the button representing "Fit until converged" to perform the calculation. Then, uncheck the Fixed field and click the button representing "Fit until converged" to perform the calculation. If the coefficient of determination of the operation result is greater than or equal to 0.95, the operation is completed. At this time, The value in the xc field represents the first wave peak position (w1), and the wavelength in xc_2 represents the second wave peak position (w2). If the coefficient of determination of the operation result is less than 0.95, adjust the parameters in "Param" (for example: y0, xc, w, A, xc_2, w_2, A_2) until the coefficient of determination is not less than 0.95 and the operation is completed. In the process of adjusting parameters, you can actually select one parameter at a time, enter the value into the corresponding field, check the Fixed box in the field, and then press the button representing "Fit until converged" to perform the calculation. Then, uncheck the Fixed field and click the button representing "Fit until converged" to perform the calculation.

FIG. 11 is a schematic diagram of the packaging structure of an optoelectronic semiconductor device according to an embodiment of the present disclosure. Referring to FIG. 11 , the packaging structure 200 includes the optoelectronic semiconductor device 100 , a packaging substrate 21 , a carrier 23 , bonding wires 25 , contact structures 26 and packaging materials 28 . The packaging substrate 21 may include ceramic or glass materials. The package substrate 21 has a plurality of through holes 22 therein. The through hole 22 may be filled with conductive material such as metal to facilitate conduction and/or heat dissipation. The carrier 23 is located on the surface of one side of the packaging substrate 21 and also includes conductive material, such as metal. Contact structure 26 is located on the surface of the other side of package substrate 21 . In this embodiment, the contact structure 26 includes a contact pad 26 a and a contact pad 26 b, and the contact pad 26 a and the contact pad 26 b can be electrically connected to the carrier 23 through the through hole 22 . In one embodiment, the contact structure 26 may further include a thermal pad (not shown), for example, located between the contact pad 26a and the contact pad 26b. The optoelectronic semiconductor device 100 is located on the carrier 23, and It may be the optoelectronic semiconductor device described in any embodiment of the present disclosure. In this embodiment, the carrier 23 includes a first part 23 a and a second part 23 b, and the optoelectronic semiconductor device 100 is electrically connected to the second part 23 b of the carrier 23 through the bonding wire 25 . The material of the bonding wire 25 may include metal, such as gold, silver, copper, aluminum or an alloy containing at least any of the above elements. The packaging material 28 covers the optoelectronic semiconductor device 100 and has the effect of protecting the optoelectronic semiconductor device 100 . Specifically, the encapsulating material 28 may include resin materials such as epoxy, silicone, etc. The encapsulation material 28 may further include a plurality of wavelength conversion particles (not shown) to convert the first light emitted by the optoelectronic semiconductor device 100 into a second light. The wavelength of the second light is greater than the wavelength of the first light. In other embodiments, the optoelectronic semiconductor device 100 in the above package structure 200 may be an optoelectronic semiconductor device 100', or, in some embodiments, the package structure 200 includes a plurality of optoelectronic semiconductor devices 100 and/or 100', and the The plurality of optoelectronic semiconductor devices 100 and/or 100' may be connected in series, in parallel, or in series and parallel.

In summary, although the present invention has been disclosed above through embodiments, they are not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs can make various modifications and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the appended patent application scope.

100’: Optoelectronic semiconductor device

1: Semiconductor stack

111: First semiconductor layer

112: Second semiconductor layer

113:Active structure

2: First electrode structure

30:Substrate

31: Conductive adhesive layer

32: Reflective structure

320: Electrical contact layer

322:Barrier layer

324: Reflective adhesive layer

326: Reflective layer

33:Conductive structure

331: First conductive layer

332: Second conductive layer

34:First window layer

35:Insulation layer

351:pore

35a: Upper surface

36: Second electrode structure

X, Z: direction

11: First surface

34a: Second surface

Claims (10)

An optoelectronic semiconductor device includes: a substrate; a semiconductor stack located on the substrate and including an active structure; a semiconductor layer located between the substrate and the semiconductor stack; an insulating layer located between the substrate and the semiconductor and a plurality of pores between the layers; a first conductive layer located between the insulating layer and the semiconductor layer and in direct contact with the semiconductor layer; and a second conductive layer located between the first conductive layer and the substrate and fill the pores to contact the first conductive layer. In the optoelectronic semiconductor device described in claim 1 of the patent application, the first conductive layer directly contacts the insulating layer. In the optoelectronic semiconductor device described in claim 1 of the patent application, the semiconductor stack has a first surface, and the first surface is a rough surface. The optoelectronic semiconductor device as claimed in claim 1, wherein the first conductive layer and the second conductive layer are made of different materials. The optoelectronic semiconductor device as claimed in claim 4, wherein the first conductive layer includes metal oxide, and the second conductive layer includes metal. In the optoelectronic semiconductor device described in claim 1, the semiconductor stack has a first side and a second side, and the second conductive layer extends outward beyond the first side and the second side. The optoelectronic semiconductor device as claimed in claim 1, wherein the thickness of the second conductive layer is greater than the thickness of the first conductive layer. In the optoelectronic semiconductor device described in claim 1, the insulating layer has an upper surface facing the semiconductor stack, and the upper surface is a rough surface. In the optoelectronic semiconductor device described in claim 1, the semiconductor stack has a first side and a second side, and the insulating layer extends outward beyond the first side and the second side. The optoelectronic semiconductor device as described in claim 1 of the patent application further includes a first electrode structure and a second electrode structure, and the first electrode structure and the second electrode structure are arranged on opposite sides of the semiconductor stack.

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