TWI806005B - Semiconductor device and method for manufacturing semiconductor device - Google Patents

Abstract

The semiconductor device of the present invention includes: a low-concentration first conductivity type semiconductor layer made of the first conductivity type. The second conductivity type semiconductor layer is arranged on the low concentration first conductivity type semiconductor layer and is composed of the second conductivity type. and a passivation film disposed on a portion of the second conductivity type semiconductor layer. Wherein, the doping concentration at a distance within 30 μm from one surface of the second conductivity type semiconductor layer may be less than or equal to 1×10 ¹⁹ cm ^-3 and greater than or equal to 1×10 ¹⁷ cm ^-3 . The second conductive type semiconductor layer and the interface between the low concentration first conductive type semiconductor layer and the second conductive type semiconductor layer may contain heavy metals.

Description

Semiconductor device and method for manufacturing semiconductor device

The present invention relates to a semiconductor device having a passivation layer and a method for manufacturing the semiconductor device.

Conventionally, attempts have been made to provide semiconductor devices having high durability against lightning surges and the like. For example, in Japanese Patent Laid-Open No. 2012-165013, a semiconductor device is disclosed, which includes: a first conductivity type semiconductor layer; Conductive type semiconductor region, and located at a depth greater than or equal to 12.6 μm, and less than or equal to 30 μm; and the low lifetime region, by making the entire first conductive type semiconductor layer and the diffusion region The junction interface between the PN-type semiconductor layers, that is, the deepest position of the PN junction, contains a life-time killer (Life-time killer) formed by He ion irradiation at a position shallower than the deepest position of the PN junction. Runners have a shorter lifetime than other regions.

In Japanese Patent Laid-Open No. 2012-165013, although the purpose is to reduce the forward voltage VF while reducing the durability of the lightning surge, it is impossible to reduce the forward voltage VF in addition to the special process of He ion irradiation. The voltage is suppressed low enough.

In view of the above circumstances, the present invention provides a semiconductor device capable of alleviating current concentration and obtaining high lightning surge durability.

Concept 1

A semiconductor device according to the present invention is characterized in that it comprises: a low-concentration semiconductor layer of the first conductivity type, which is composed of the first conductivity type; a second conductivity-type semiconductor layer, which is arranged on the low-concentration semiconductor layer of the first conductivity type , and is composed of the second conductivity type; and a passivation layer, disposed on a part of the second conductivity type semiconductor layer, wherein the doping concentration at a distance within 30 μm from the surface of one side of the second conductivity type semiconductor layer less than or equal to 1×10 ¹⁹ cm ^-3 , and greater than or equal to 1×10 ¹⁷ cm ^-3 , the second conductivity type semiconductor layer, the low concentration first conductivity type semiconductor layer and the second conductivity type semiconductor layer The interface between contains heavy metals.

Concept 2

In the semiconductor device described in Concept 1 above, the thickness of the second conductivity type semiconductor layer is greater than or equal to 50 μm.

concept 3

In the semiconductor device described in concept 1 or concept 2 above, the doping concentration at a distance within 20 μm from one side surface of the second conductivity type semiconductor layer is equal to or greater than 1×10 ¹⁸ cm ⁻³ .

concept 4

In the semiconductor device described in Concept 1 or Concept 2 above, on the other side of the low-concentration first-conductivity-type semiconductor layer, a doping concentration of the first-conductivity type is provided that is higher than that of the low-concentration first-conductivity-type semiconductor layer. The high-concentration semiconductor layer of the first conductivity type starts from the end face of the semiconductor layer of the first conductivity type until the doping concentration of the first conductivity type of the semiconductor layer of the high concentration first conductivity type reaches the low The distance D1 in the thickness direction up to 1000 times the doping concentration of the first conductivity type semiconductor layer with a concentration of the first conductivity type starts from the end surface of the low concentration first conductivity type semiconductor layer and ends at the second The relationship between the distance D2 in the thickness direction until the doping concentration of the second conductivity type of the semiconductor layer of the low concentration first conductivity type reaches 1000 times the doping concentration of the first conductivity type of the low-concentration first conductivity type semiconductor layer satisfies the following Said (Formula 1):

Concept 5

In the semiconductor device described in concept 4 above, starting from the end surface of the low-concentration first conductivity type semiconductor layer, until the doping concentration of the second conductivity type of the second conductivity type semiconductor layer reaches the low concentration The distance D2 in the thickness direction of the first conductivity type semiconductor layer up to 1000 times the doping concentration of the first conductivity type is 20 μm to 40 μm.

Concept 6

In the semiconductor device according to Concept 1 or Concept 2, the heavy metal is platinum.

Concept 7

In the semiconductor device described in Concept 1 or Concept 2 above, the passivation layer is a glass layer.

concept 8

A method of manufacturing a semiconductor device according to the present invention is characterized in that it includes: a process of preparing a semiconductor substrate, the semiconductor substrate has: a low-concentration first conductivity type semiconductor layer composed of a first conductivity type; A second conductivity type semiconductor layer formed of the second conductivity type is on the low concentration first conductivity type semiconductor layer.

A process of disposing a passivation layer on a part of the second conductivity type semiconductor layer.

a process of infiltrating the heavy metal into the semiconductor layer of the second conductivity type; and a process of heating the semiconductor substrate and the passivation layer.

Wherein, the doping concentration at a distance within 30 μm from one side of the second conductivity type semiconductor layer is less than or equal to 1×10 ¹⁹ cm ^-3 and greater than or equal to 1×10 ¹⁷ cm ^-3 .

The second conductive type semiconductor layer and the interface between the low concentration first conductive type semiconductor layer and the second conductive type semiconductor layer contain heavy metal.

In the present invention, when the doping concentration at a distance within 30 μm from one side surface of the second conductivity type semiconductor layer is less than or equal to 1×10 ¹⁹ cm ^-3 and greater than or equal to 1×10 ¹⁷ cm ^-3 , and When the second conductivity type semiconductor layer and the interface between the low concentration first conductivity type semiconductor layer and the second conductivity type semiconductor layer contain heavy metal, current concentration can be alleviated and high lightning surge durability can be obtained.

11: High concentration first conductivity type semiconductor layer

12: Low concentration first conductivity type semiconductor layer

13: Second conductivity type semiconductor layer

16, 18: doped surface layer

17: Resist film

19: oxide film

20: The first electrode

30: Second electrode

50: glass film

61, 62: insulating film

65:Mesa groove

66: Concave

70: Opening

FIG. 1 is a cross-sectional view of a semiconductor device usable in a first embodiment of the present invention.

2A-2C are cross-sectional views of a manufacturing process of a semiconductor device usable in the first embodiment of the present invention.

3A and 3B are process cross-sectional views of the manufacturing process of the semiconductor device immediately after the process in FIG. 2C.

4A and 4B are process cross-sectional views of the manufacturing process of the semiconductor device immediately after the process in FIG. 3B.

5A and 5B are process cross-sectional views of the manufacturing process of the semiconductor device immediately after the process in FIG. 4B.

FIG. 6 is a graph showing the doping concentration in the depth direction in one example (Example) of the first embodiment of the present invention.

FIG. 7 is a graph showing the doping concentration in the depth direction in Comparative Example 1. Referring to FIG.

FIG. 8 is a graph showing the doping concentration in the depth direction in Comparative Example 2. Referring to FIG.

9 is a graph showing ratios of lightning surge applied voltages that can damage semiconductor devices in Comparative Example 1, Comparative Example 2, and Examples.

10 is a graph showing the relationship between the forward voltage VF and the forward current IF when platinum is injected and when platinum is not injected in the semiconductor device according to the embodiment.

11 is a cross-sectional view of a semiconductor device usable in a second embodiment of the present invention.

first embodiment

The semiconductor device of this embodiment is a device having a PN junction such as a diode or a thyristor. For example, a semiconductor device as shown in FIG. 1 may include: a high-concentration first conductivity type semiconductor layer 11; A low-concentration first conductivity type semiconductor layer 12 composed of a low first conductivity type in the semiconductor layer 11; a second conductivity type semiconductor layer 13 formed on the low concentration first conductivity type semiconductor layer 12 and composed of a second conductivity type; And a passivation film (such as a glass film 50 to be described later) provided on a part of the second conductivity type semiconductor layer 13 . The first conductivity type is, for example, n-type, and the second conductivity type is, for example, p-type. However, it is not limited thereto, and the first conductivity type may also be p-type, and the second conductivity type may also be n-type. The rated voltage of the semiconductor device of this embodiment may be equal to or greater than 600V. The second conductive type semiconductor layer 13 may be provided on the entire surface of one side of the low-concentration first conductive type semiconductor layer 12 . In this way, on the side of the low-concentration first conductivity type semiconductor layer 12 If the second conductive type semiconductor layer 13 is provided on the entire surface, it can reliably withstand the lightning surge with high di/dt described later.

The doping concentration at a distance within 30 μm from one side surface of the second conductivity type semiconductor layer 13 may be less than or equal to 1×10 ¹⁹ cm ⁻³ and greater than or equal to 1×10 ¹⁷ cm ⁻³ . The second conductive type semiconductor layer 13 and the interface between the low concentration first conductive type semiconductor layer 12 and the second conductive type semiconductor layer 13 may contain heavy metals. Examples of heavy metals include gold, platinum, and the like, and platinum is used in a preferred embodiment. Heavy metals can be contained not only at the interface between the low-concentration first conductivity type semiconductor layer 12 and the second conductivity type semiconductor layer 13, but also in the interior of the low-concentration first conductivity type semiconductor layer 12, or throughout the entire low-concentration semiconductor layer 12. The first conductive type semiconductor layer 12 . In addition, in this embodiment, the upper side in FIG. 1 is referred to as one side, and the lower side in FIG. 1 is referred to as the other side. The doping concentration of the low-concentration first conductivity type semiconductor layer 12 is, for example, less than or equal to 1×10 ¹⁵ cm ^-3 and greater than or equal to 1×10 ¹³ cm ^-3 , with a typical value of 1×10 ¹⁴ cm ^-3 .

The thickness of the second conductivity type semiconductor layer 13 may be greater than or equal to 50 μm, or greater than or equal to 60 μm.

The doping concentration at a distance within 20 μm from one side surface of the second conductivity type semiconductor layer 13 may be greater than or equal to 1×10 ¹⁸ cm ⁻³ .

Starting from the end surface (face on the other side) of the first conductivity type semiconductor layer 12, until the doping concentration of the first conductivity type of the high concentration first conductivity type semiconductor layer 11 reaches that of the low concentration first conductivity type semiconductor layer 12 The distance D1 in the thickness direction (distance at the other side) up to 1000 times the doping concentration of the first conductivity type, and the end surface (side surface) starting from the low-concentration first conductivity type semiconductor layer 12, The distance D2 in the thickness direction until the doping concentration of the second conductivity type of the second conductivity type semiconductor layer 13 reaches 1000 times the doping concentration of the first conductivity type of the low-concentration first conductivity type semiconductor layer 12 (one side The relationship between the distance at) satisfies the following (formula 1) (refer to FIG. 6):

D1 and D2 are approximately equal and can satisfy the following (Formula 2):

D1 and D2 are substantially equal and can satisfy the following (Formula 3):

Starting from the end face (side surface) of the low-concentration first conductivity type semiconductor layer 12, until the doping concentration of the second conductivity type of the second conductivity type semiconductor layer 13 reaches the second conductivity type of the low concentration first conductivity type semiconductor layer 12. The distance D2 in the thickness direction (distance on one side) up to 1000 times the doping concentration of one conductivity type may be 20 μm to 40 μm. The value of D1 may be adjusted according to the value of D2 to satisfy any one of (Formula 1), (Formula 2) and (Formula 3) above. As typical values, D1 and D2 may each be 30 μm (30 μm after rounding). It is also possible (refer to FIG. 6). In addition, the value of D2 may also be adjusted according to the value of D1.

A silicon substrate, a silicon carbide substrate, a gallium nitride substrate, etc. can be used as the high-concentration first conductivity type semiconductor layer 11 . The second conductive type semiconductor layer 13 can be formed by implanting, for example, p-type doping (eg, boron) into the low-concentration first conductive type semiconductor layer 12 .

As shown in FIG. 1 , a first electrode 20 may be provided on the front surface of the second conductivity type semiconductor layer 13 , and a second electrode 30 may be provided on the back surface of the high-concentration first conductivity type semiconductor layer 11 . The first electrode 20 may be, for example, an anode electrode, and the second electrode 30 may be, for example, a cathode electrode. The first electrode 20 can be made of aluminum silicide or nickel silicide, for example. The second electrode 30 may also be a nickel film containing a silicide film.

A glass film 50 as a passivation film may also be provided around the first electrode 20 .

The content of the glass material used in the glass film 50, such as SiO _{2 ,} is in the range of 49.5 mol% to 64.3 mol%, the content of Al ₂ O ₃ is in the range of 3.7 mol% to 14.8 mol%, and the content of B ₂ O ₃ is in the range of In the range of 8.4mol%~17.9mol%, the content of ZnO is in the range of 3.9mol%~14.2mol%, and the content of the oxide of alkaline earth metal is in the range of 7.4mol%~12.9mol%.

The above-mentioned semiconductor device can be manufactured by the following method.

A low concentration first conductivity type semiconductor layer 12 is prepared (FIG. 2A). A single wafer can be used for the low-concentration first conductivity type semiconductor layer 12 . In the case of using a single wafer, manufacturing costs can be suppressed. However, it is not limited thereto, and epitaxial wafers or diffused wafers may also be used.

On one side and the other side of the low-concentration first conductivity type semiconductor layer 12, a doped surface layer 16 of the second conductivity type is provided, for example, by deposits ( FIG. 2B ). The doping of the second conductivity type doped surface layer 16 may be, for example, B (boron).

After covering the doped surface layer 16 of the second conductivity type with the resist film 17, the surface on the other side of the low-concentration first conductivity type semiconductor layer 12 is etched (FIG. 2C).

Next, after forming an oxide film 19 made of, for example, SiO ₂ on one side of the low-concentration first conductivity type semiconductor layer 12, a first Conductive type doped surface layer 18 (FIG. 3A). As the doping of the first conductivity type doped surface layer 18, P (phosphorus) can be mentioned, for example.

Next, heating is performed at, for example, 1100° C. to 1300° C. for 20 hours. By heating in this way, the doped regions expand respectively on one side and the other side of the low-concentration first conductivity type semiconductor layer 12 (FIG. 3B). Finally, the second conductive type semiconductor layer 13 is formed on one side of the low-concentration first conductive type semiconductor layer 12, and the doping concentration is lower than that of the low-concentration first conductive type semiconductor layer 12 on the other side. High-concentration first-conductivity-type semiconductor layer 11 with high-concentration first-conductivity-type semiconductor layer 12 . The thickness of each doped surface layer may be greater than or equal to 50 μm, or greater than or equal to 60 μm.

Next, an insulating film 61 made of _SiO2 or the like is formed on the second conductivity type semiconductor layer 13 (FIG. 4A). And an insulating film 62 made of SiO ₂ or the like is formed on the back surface of the first conductivity type semiconductor substrate 11 (FIG. 4A).

Next, using the formed insulating film 61 as a mask, one surface is etched to form a mesa groove 65 ( FIG. 4B ). As the etching in this embodiment, dry etching or wet etching can be used.

Next, a protective film (passivation film) made of the glass film 50 is formed so as to cover the formed mesa groove 65 and insulating film 61 ( FIG. 5A ).

Next, openings 70 are formed by selectively etching the formed insulating film 61 and glass film 50 ( FIG. 5B ).

Next, a heavy metal is provided on the second conductivity type semiconductor layer 13 and the glass film 50 (FIG. 5B). Platinum can be used as heavy metal. At this time, in order to provide the heavy metal on the second conductivity type semiconductor layer 13 and the glass film 50, deposition may be performed by coating, vapor deposition, sputtering, or the like. The heavy metal can be coated on the entire surface of one side, so that the heavy metal will penetrate into the second conductive type semiconductor layer 13, the interface between the low concentration first conductive type semiconductor layer 12 and the second conductive type semiconductor layer 13, and the low concentration second conductive type semiconductor layer. Inside a conductive type semiconductor layer 12 . Heavy metals may also be distributed throughout the low-concentration first conductivity type semiconductor layer 12 .

Next, the semiconductor substrate and the glass film 50 are heated at, for example, 700°C to 900°C for 10 to 60 minutes. By heating in this way, the heavy metal is diffused in the semiconductor layer.

In the semiconductor device manufactured as described above, the doping concentration at a distance within 30 μm from one side surface of the second conductivity type semiconductor layer 13 is 1×10 ¹⁹ cm ⁻³ or less and 1×10 ^{17 or} more cm ^-3 .

Then, the first electrode 20 is formed in the opening 70 on the front side, and the second electrode 30 is formed on the back side (see FIG. 1 ).

"Effect"

Next, effects of this embodiment will be described. The present invention can take any form described in "Effects".

In this embodiment, the doping concentration at a distance within 30 μm from one surface of the second conductivity type semiconductor layer 13 is less than or equal to 1×10 ¹⁹ cm ⁻³ and greater than or equal to 1×10 ¹⁷ cm ⁻³ , and When the second conductivity type semiconductor layer 13 and the interface between the low-concentration first conductivity type semiconductor layer 12 and the second conductivity type semiconductor layer 13 contain heavy metals, the concentration of current can be eased, and can withstand high di Lightning surge composed of /dt (high lightning surge tolerance can be obtained). From the fact that such a high lightning surge durability can be obtained, the semiconductor device can be a diode for a converter.

If the doping concentration on one side (upper end surface) exceeds 1×10 ¹⁹ cm ^-3 , heavy metals such as platinum are difficult to enter, and the reverse recovery time (trr) described later cannot be accelerated.

On the other hand, if the doping concentration of one side surface (upper section surface) is less than 1×10 ¹⁸ cm ⁻³ , it is difficult to form ohmic contact with the first electrode 20 . Therefore, it is beneficial to set the doping concentration on one surface to 1×10 ¹⁸ cm ⁻³ or more. It is particularly beneficial when the interface between the first electrode 20 and the second conductivity type semiconductor layer 13 is made of Ni or the like.

In the case where the second conductivity type semiconductor layer 13 has a thickness of 50 μm or more, it is possible to maintain a region with a high doping concentration in a sufficient thickness, and thus to alleviate current concentration in particular.

In the case where the doping concentration at a distance of 1×10 ¹⁸ cm ⁻³ or more within 20 μm from one surface of the second conductivity type semiconductor layer 13 is adopted, the doping concentration in the shallower region can be increased. The impurity concentration, the masking can especially improve the durability against lightning surges.

D1

0.9×D2的情況下，就能夠在一側和另一側上均設置摻雜濃度高的區域。這樣一來，就能夠提高對雷電突波的耐久性(參照圖6以及圖9中的“實施例”)。 When starting from the end surface of the first conductivity type semiconductor layer 12, until the doping concentration of the first conductivity type of the high concentration first conductivity type semiconductor layer 11 reaches the doping concentration of the first conductivity type of the low concentration first conductivity type semiconductor layer 12 The distance D1 in the thickness direction up to 1000 times of the impurity concentration, and the end face of the low-concentration first conductivity type semiconductor layer 12 until the doping concentration of the second conductivity type of the second conductivity type semiconductor layer 13 reaches the low concentration The relationship between the distance D2 in the thickness direction up to 1000 times the doping concentration of the first conductivity type of the first conductivity type semiconductor layer 12 satisfies the formula: 1.1×D2

D1

In the case of 0.9×D2, it is possible to provide regions with a high doping concentration on both one side and the other side. In this way, the durability against lightning surges can be improved (see "Example" in FIGS. 6 and 9 ).

When starting from the end face of the low-concentration first conductivity type semiconductor layer 12, until the doping concentration of the second conductivity type of the second conductivity type semiconductor layer 13 reaches that of the first conductivity type of the low concentration first conductivity type semiconductor layer 12 The distance D2 in the thickness direction up to 1000 times the doping concentration is 20μm~40μm In the case of the form, the thickness of the region with a high doping concentration can be increased, so that the durability against lightning surges can be improved, and the current concentration can be alleviated (see " Example").

The embodiment in FIG. 9 shows the ratio of the lightning surge capacity of the form shown in FIG. 6 relative to Comparative Example 1 described later. In the form of Comparative Example 1 shown in FIG. 7 , in the semiconductor layer 13 of the second conductivity type, there is no portion where the doping concentration of the second conductivity type is 1000 times that of the first conductivity type. Concentration of the first conductivity type semiconductor layer 11, starting from the end surface of the low concentration first conductivity type semiconductor layer 12, until reaching 1000 times the first conductivity type doping concentration of the low concentration first conductivity type semiconductor layer 12 in the thickness direction The distance D1 is 4 μm. Although the lightning surge durability in this case is shown by comparative example 1 in FIG. 9 , the value is only about 1/12 of the value shown as the example. In the form of Comparative Example 2 shown in FIG. 8 , the doping concentration at a distance within 30 μm from one surface (upper end surface) of the second conductivity type semiconductor layer 13 does not reach 1×10 ¹⁷ cm ^{−3 or} more. , in the second conductivity type semiconductor layer 13, the distance D2 in the thickness direction from the end surface of the first conductivity type semiconductor layer at the position where the second conductivity type doping concentration reaches 1000 times the first conductivity type doping concentration is 10 μm. Although the ratio of the lightning surge durability in this case to that of Comparative Example 1 is shown as Comparative Example 2 in FIG. 9 , the value is only about 2/3 of the value shown as the Example.

By disposing heavy metals on the second conductivity type semiconductor layer 13 and the interface between the low concentration first conductivity type semiconductor layer 12 and the second conductivity type semiconductor layer 13 , the built-in potential can be reduced. In this way, the reverse recovery time trr can be accelerated to the degree of several μ s. In addition, using platinum as a heavy metal is also particularly beneficial to speed up trr. As shown in FIG. 10 , when platinum is used as the heavy metal, the effect of reducing VF (forward voltage) on the low current side can also be obtained. For example, the current used in air conditioners uses 1A~2A. For semiconductor devices used in air conditioners, etc., it is very beneficial to reduce the VF (forward voltage) on the low current side.

second embodiment

Next, a second embodiment of the present invention will be described.

In the first embodiment, the mesa groove 65 is provided, but in the present embodiment, the concave portion 66 is provided instead of the mesa groove 65 (see FIG. 11 ). Other than that, all the structures employed in the first embodiment can also be employed in the second embodiment as in the first embodiment.

The semiconductor device of this embodiment, as shown in FIG. 11, includes: a high-concentration first-conductivity-type semiconductor layer 11; A low-concentration first-conductivity-type semiconductor layer 12 composed of a low-first-conductivity-type semiconductor layer 11; a second-conductivity-type second-conductivity-type composition arranged on the low-concentration first-conductivity-type semiconductor layer 12 the semiconductor layer 13 ; and the glass film 50 provided on a part of the second conductivity type semiconductor layer 13 .

The doping concentration at a distance within 30 μm from one side surface of the second conductivity type semiconductor layer 13 may be equal to or less than 1×10 ¹⁹ cm ⁻³ and equal to or greater than 1×10 ¹⁷ cm ⁻³ . The second conductive type semiconductor layer 13 and the interface between the low concentration first conductive type semiconductor layer 12 and the second conductive type semiconductor layer 13 may contain heavy metals.

Also in this embodiment, the same effects as those of the first embodiment can be obtained, that is, current concentration can be alleviated and high lightning surge durability can be obtained.

The descriptions in the above-mentioned embodiments and modifications, and the drawings disclosed in the drawings are only examples for explaining the invention described in the claims, and therefore the inventions described in the claims are not limited by the above-mentioned embodiments or drawings. limited by content. The descriptions in the first claims of this application are merely examples, and the descriptions in the claims can be appropriately changed based on the descriptions in the specification, drawings, and the like.

11: High concentration first conductivity type semiconductor layer

12: Low concentration first conductivity type semiconductor layer

13: Second conductivity type semiconductor layer

20: The first electrode

30: Second electrode

50: glass film

61, 62: insulating film

65:Mesa groove

Claims (7)

A semiconductor device, comprising: a low-concentration first conductivity type semiconductor layer, whose conductivity type is the first conductivity type; a second conductivity type semiconductor layer, disposed on the low concentration first conductivity type semiconductor layer, whose conductivity type is The second conductivity type; and a passivation layer disposed on a part of the second conductivity type semiconductor layer; wherein, the doping concentration at a distance within 30 μm from one side of the second conductivity type semiconductor layer is less than or equal to 1×10 ¹⁹ cm ^-3 , and greater than or equal to 1×10 ¹⁷ cm ^-3 ; the second conductivity type semiconductor layer and the interface between the low concentration first conductivity type semiconductor layer and the second conductivity type semiconductor layer contain platinum. The semiconductor device according to claim 1, wherein the thickness of the second conductivity type semiconductor layer is greater than or equal to 50 μm. The semiconductor device according to claim 1 or 2, wherein the doping concentration at a distance within 20 μm from one side surface of the second conductivity type semiconductor layer is greater than or equal to 1×10 ¹⁸ cm ⁻³ . A semiconductor device, further comprising: a low-concentration first conductivity type semiconductor layer composed of the first conductivity type; a second conductivity type semiconductor layer disposed on the low-concentration first conductivity type semiconductor layer and composed of the second conductivity type and a passivation layer disposed on a part of the second conductivity type semiconductor layer, wherein the impurity concentration at a distance within 30 μm from one side surface of the second conductivity type semiconductor layer

1×1019cm-3

1×1017cm-3, the second conductivity type semiconductor layer, and the interface between the low concentration first conductivity type semiconductor layer and the second conductivity type semiconductor layer contains platinum, and the high concentration first conductivity type semiconductor layer is arranged on The other side of the low-concentration first conductivity type semiconductor layer, and the first conductivity type doping concentration of the high concentration first conductivity type semiconductor layer is greater than the first conductivity type doping concentration of the low concentration first conductivity type semiconductor layer impurity concentration; wherein, starting from the end surface of the first conductivity type semiconductor layer, until the doping concentration of the first conductivity type of the high concentration first conductivity type semiconductor layer reaches the first concentration of the low concentration first conductivity type semiconductor layer The distance D1 in the thickness direction up to 1000 times the doping concentration of the conductivity type, and the doping of the second conductivity type starting from the end surface of the low-concentration first conductivity type semiconductor layer to the second conductivity type semiconductor layer The relationship between the distance D2 in the thickness direction until the concentration reaches 1000 times the doping concentration of the first conductivity type of the low-concentration first conductivity type semiconductor layer satisfies the formula: 1.1×D2

D1

0.9×D2. The semiconductor device according to claim 4, wherein, starting from the end surface of the low-concentration first conductivity type semiconductor layer, until the doping concentration of the second conductivity type of the second conductivity type semiconductor layer reaches the low-concentration first The distance D2 in the thickness direction up to 1000 times the doping concentration of the first conductivity type of the conductivity type semiconductor layer is 20 μm to 40 μm. The semiconductor device as claimed in claim 1, 2, 4 or 5, wherein the passivation layer is a glass layer. A method of manufacturing a semiconductor device, comprising: a process of preparing a semiconductor substrate, the semiconductor substrate having: a low-concentration first conductivity type semiconductor layer composed of a first conductivity type; and being disposed on the low-concentration first conductivity type semiconductor layer, And the second conductivity type semiconductor layer composed of the second conductivity type; the process of providing a passivation layer on a part of the second conductivity type semiconductor layer; the process of making platinum penetrate into the second conductivity type semiconductor layer; and the semiconductor A process for heating the substrate and the passivation layer, wherein the doping concentration at a distance within 30 μm from one side of the second conductivity type semiconductor layer is less than or equal to 1×10 ¹⁹ cm ^-3 and greater than or equal to 1×10 ¹⁷ cm ⁻³ , the second conductivity type semiconductor layer, and the interface between the low concentration first conductivity type semiconductor layer and the second conductivity type semiconductor layer contains platinum.

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