TWI802896B - Methods of forming capacitor - Google Patents

Abstract

The present disclosure provides a method of forming a capacitor including forming a stack on a substrate. The stack includes a support layer, a first material layer on the support layer, and a second material layer above the first material layer, which at least the first material includes ashable material. The method further includes patterning the stack to form a first opening in the stack, forming a first electrode including a second opening in the first opening, removing the second material layer to expose an upper portion of an outer surface of the first electrode, ashing the first material layer to expose a lower portion of the outer surface of the first electrode, and forming a dielectric layer and a second electrode in the second opening and on the outer surface of the first electrode.

Description

Method of Forming a Capacitor

The present disclosure relates to methods of forming capacitors, and more particularly to methods of forming capacitors that include a support frame.

DRAM (Dynamic Random Access Memory, DRAM) includes a plurality of memory cells, and each memory cell includes a transistor for controlling a switch and a capacitor as a storage, wherein the transistor and the capacitor are coupled to each other to realize information access Function. When the capacitor of the memory cell has a higher height, there is a larger overlapping area between the electrodes of the capacitor, so that the capacitor can provide a larger voltage signal. In order to maintain the structural stability of the high capacitor, a supporting frame is formed in the capacitor to fix the positions of the electrodes, preventing electrodes of a plurality of capacitors from wobbling and contacting each other.

According to an embodiment of the present disclosure, there is provided a method of forming a capacitor, including forming a stack on a substrate, which includes a first support layer, a first material layer on the first support layer, and a second material layer above the first material layer , wherein at least the first layer of material includes an ashable material. The method also includes patterning the stack to form a first opening in the stack, forming a first electrode including a second opening in the first opening, removing the second material layer to expose an upper portion of an outer side surface of the first electrode, ashing the first electrode. A material layer is provided to expose a lower portion of the outer surface of the first electrode, and a dielectric layer and a second electrode are formed in the second opening of the first electrode and on the outer surface of the first electrode.

In an embodiment of the present disclosure, forming the stack on the substrate includes forming a first material layer having a first thickness between 50% and 60% of the thickness of the stack.

In an embodiment of the present disclosure, forming the stack on the substrate includes forming a first material layer and a second material layer having an ashed material, and removing the second material layer includes ashing the second material layer.

In an embodiment of the present disclosure, forming the first electrode in the first opening includes forming the first electrode with an aspect ratio between 35:1 and 45:1.

In an embodiment of the present disclosure, forming the stack on the substrate further includes forming a second support layer between the first material layer and the second material layer, and forming a third support layer on the second material layer.

In an embodiment of the present disclosure, removing the second material layer includes selectively etching the second material layer using a wet etching process to retain the first electrode and the second supporting layer.

In an embodiment of the present disclosure, removing the second material layer further includes forming a third opening adjacent to the first electrode in the third supporting layer to expose the second material layer, and removing the second material through the third opening. layer.

In an embodiment of the present disclosure, ashing the first material layer further includes forming a fourth opening adjacent to the first electrode in the second supporting layer to expose the first material layer, and ashing the first material layer through the fourth opening. layer.

In an embodiment of the present disclosure, ashing the first material layer further includes removing the first material layer using an ashing process, cleaning the stack using a wet chemical cleaning process, and treating the first electrode with ammonia gas.

In an embodiment of the present disclosure, patterning the stack to form the first opening further includes forming the opening in the second material layer, forming a liner layer on sidewalls of the opening, and etching through the bottom of the liner layer and the first material. layer to form the first opening.

The following disclosure presents many different embodiments or examples in order to achieve the different features of the mentioned subject matter. Specific examples of components, configurations, etc. are described below to simplify the present disclosure. Of course, these are examples only, not limiting. For example, in the following description, forming a first feature on or over a second feature may include embodiments where the first feature and the second feature are formed in direct contact, and may also include embodiments where the first feature and the second feature are formed in direct contact. An embodiment in which an additional feature is formed between such that the first feature and the second feature may not be in direct contact. Additionally, the present disclosure may repeat reference numbers and/or letters in various examples. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and/or configurations discussed.

In addition, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to facilitate describing an element or feature as shown in the drawings. A relationship to another component or feature. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

The present disclosure provides a method of forming a capacitor, comprising forming a stack in which at least a lower material layer is an ashable material, and removing the ashable material by ashing after forming electrodes in the stack layer. Since the ashing process reduces damage to the stack structure, the electrodes in the stack can be arranged neatly and form a capacitor with high reliability.

FIG. 1 shows a flowchart of a method 1000 of forming a capacitor according to some embodiments of the present disclosure. 2A-2D and 2G-2J illustrate cross-sectional views of the device 20 at various intermediate stages in the method 1000 according to an embodiment of the present disclosure. The method 1000 of forming the device 20 provided by the present disclosure is best described when combined with reference to FIGS. 1 , 2A-2D, and 2G-2J. It should be understood that additional steps may be included before, during, or after the steps of method 1000 and that implementations of such variations are within the scope of the present disclosure.

Please refer to Figure 1 and Figure 2A. FIG. 2A shows a cross-sectional view of the device 20 at step 1002 in FIG. 1 . As shown in FIG. 2A, a stack 205 of alternately arranged support layers and material layers is formed on a substrate 200, and at least the lower material layer includes an ashable material. Specifically, the first support layer 210 is formed on the substrate 200, and the first material layer 220, the second support layer 212, the second material layer 230 and the third support layer 214 are sequentially formed on the first support layer 210, Wherein the first material layer 220 includes an ashable material. The first material layer 220 is the material layer closest to the substrate 200 in the stack 205 and thus may also be referred to as a lower material layer. In contrast, the second material layer 230 is located above the first material layer 220 , which can also be referred to as an upper material layer. Although FIG. 2A only shows a stack 205 formed of three support layers and two material layers, the device 20 may include other numbers of support layers and a stack 205 formed by interleaving material layers, such as four support layers and three material layers. layer.

In some embodiments, the ashable materials included in the first material layer 220 may be patterned or removed during the plasma ashing process, such as carbon-based compounds, resins, polymer materials, and other suitable ashable materials. or a combination thereof. In some embodiments, the second material layer 230 may include a dielectric material that can be removed during a wet etching process, such as silicon oxide, silicate glass, doped borophosphosilicate glass, and other oxide dielectric materials. or a combination thereof. In some embodiments, the thickness of the first material layer 220 may be between 50% and 60% of the thickness of the stack 205, and the thickness of the second material layer 230 may be between 40% and 50% of the thickness of the stack 205. . For example, the first material layer 220 may be resin with a thickness between 500 nm and 600 nm, and the second material layer 230 may be silicon oxide with a thickness between 400 nm and 500 nm.

In some embodiments, the material forming the first supporting layer 210, the second supporting layer 212, and the third supporting layer 214 may include a dielectric material having an etching selectivity between the second material layer 230 and the wet etching process. sex. For example, the second material layer 230 can be silicon oxide, and the first support layer 210 , the second support layer 212 or the third support layer 214 can be silicon nitride. In some embodiments, the materials forming the first support layer 210 , the second support layer 212 and the third support layer 214 may be the same material, for example, all three may be silicon nitride.

Please refer to Figure 1 and Figure 2B. FIG. 2B shows a cross-sectional view of the device 20 at step 1004 in FIG. 1 . As shown in FIG. 2B , the stack 205 formed by the support layer and the material layer is patterned such that a first opening 245 is formed in the stack 205 . Specifically, a patterned mask 240 is formed on the stack 205 with a plurality of holes aligned with the first opening 245 to be formed. An anisotropic etching process (such as a dry etching process) is performed on the stack 205 using the mask 240 , and the etching process is stopped on the upper surface of the substrate 200 , thereby forming a first opening 245 in the stack 205 . After the first opening 245 is formed, the mask 240 may be removed from the stack 205 .

In some embodiments, forming the first opening 245 may include a multi-step etching process. For example, after forming the opening through the third support layer 214 and extending into the second material layer 230 during the etch process using the mask 240, the etch process may be paused to form a liner layer conformal to the opening (not shown). shown) in the opening extending into the second material layer 230 . Then the etching process is continued, so that the etchant penetrates the bottom of the liner layer and etches onto the upper surface of the substrate 200 to form the first support layer 210 and the second support layer 212 . Through the multi-step etching process, the first opening 245 with flat sidewalls can be formed in the stack 205 , so that the devices subsequently formed in the first opening 245 are reliable.

Please refer to Figure 1 and Figure 2C. FIG. 2C shows a cross-sectional view of the device 20 at step 1006 in FIG. 1 . As shown in FIG. 2C , the first electrode 250 including the second opening 255 is formed in the first opening 245 . Specifically, a blanket electrode layer is formed over the stack 205 and within the first opening 245 (shown in FIG. 2B ), and portions of the stack 205 are removed using, for example, a chemical mechanical polishing (CMP) process. A portion blankets the electrode layer such that the first electrode 250 is conformally formed in the first opening 245 . Since the first electrode 250 conforms to the first opening 245 , the first electrode 250 includes the second opening 255 , thereby increasing the exposed surface area of the first electrode 250 . Therefore, the first electrode 250 has a relatively large surface area to be in contact with other elements subsequently formed therein.

In some embodiments, the material forming the first electrode 250 may include metals, metal compounds, alloy compounds, other conductive materials or combinations thereof, such as titanium nitride or silicon-doped titanium nitride. For example, the above-mentioned conductive material may be deposited using processes such as chemical vapor deposition (chemical vapor deposition, CVD), atomic layer deposition (atomic layer deposition, ALD), etc. to form the first electrode 250 . In some embodiments, the first electrode 250 has a high aspect ratio, so that a capacitor including the first electrode 250 can provide a larger voltage signal, for example, the aspect ratio of the first electrode 250 can be between 35:1 and 45. : 1 room.

Please refer to Figure 1 and Figure 2D. FIG. 2D shows a cross-sectional view of the device 20 at step 1008 in FIG. 1 . As shown in FIG. 2D , a third opening 262 is formed in the top support layer of the stack 205 . Specifically, a patterned mask 260 is formed on the stack 205 , and the mask 260 has holes between adjacent first electrodes 250 thereunder. An anisotropic etching process (such as a dry etching process) is performed on the exposed third support layer 214 by using the mask 260 , so as to form a third opening 262 in the third support layer 214 . Since the third support layer 214 is the uppermost layer in the stack 205 , the third support layer 214 may also be referred to as a top support layer. In contrast, the first support layer 210 on the substrate 200 may be referred to as a bottom support layer, and the second support layer 212 located between the first support layer 210 and the third support layer 214 may be referred to as a middle support layer. After the third opening 262 is formed, the mask 260 may be removed from the stack 205 .

In some embodiments, the etching process for forming the third opening 262 stops on the upper surface of the second material layer 230 to form the third opening 262 exposing the second material layer 230 in the 2D view. In some other embodiments, the third opening 262 may extend into the second material layer 230 such that the bottom of the third opening 262 is lower than the upper surface of the second material layer 230 .

According to the material of the second material layer 230 or the parameters of the subsequent etching process, different numbers and positions of the third openings 262 can be designed. In some embodiments, the third opening 262 may be disposed between the adjacent first electrodes 250 such that the second material layer 230 between the adjacent first electrodes 250 is exposed. In some embodiments, the third openings 262 may be spaced between adjacent first electrodes 250 , as shown in FIG. 2D . 2E and 2F illustrate top views of the device 20 at step 1008 in FIG. 1 , according to some embodiments of the present disclosure. As shown in FIG. 2E , the third opening 262 may be located in the middle of three adjacent first electrodes 250 . Alternatively, as shown in FIG. 2F , the third opening 262 may be located in the middle of four adjacent first electrodes 250 , and the present disclosure is not limited to these embodiments.

Please refer to Figure 1 and Figure 2G. FIG. 2G shows a cross-sectional view of the device 20 at step 1010 in FIG. 1 . As shown in FIG. 2G, the second material layer 230 of the stack 205 is removed. Specifically, a selective etching process (such as wet etching) is performed on the second material layer 230 between the second support layer 212 and the third support layer 214 through the third opening 262 . Due to the selectivity of the etching process, the second material layer 230 can be removed and the second support layer 212 , the third support layer 214 and the first electrode 250 remain. For example, hydrofluoric acid can be used as an etchant to remove the second material layer 230 including silicon oxide. In some embodiments, the etchant for etching the second material layer 230 may include a surfactant to increase the contact ability of the etchant to the second material layer 230 . After the second material layer 230 is removed, the upper outer surface of the first electrode 250 is exposed. In more detail, the outer surface of the first electrode 250 between the second support layer 212 and the third support layer 214 is exposed, so as to increase the contact surface area of the first electrode 250 and other elements formed subsequently.

Please refer to Figure 1 and Figure 2H. FIG. 2H shows a cross-sectional view of the device 20 at step 1012 in FIG. 1 . As shown in FIG. 2H , a fourth opening 264 is formed in the middle support layer of the stack 205 . Specifically, the second support layer 212 is punched by using a knife or a mold, so as to form the fourth opening 264 in the second support layer 212 . In some embodiments, the trimming process stops on the upper surface of the first material layer 220 to form the fourth opening 264 located below the third opening 262 in FIG. 2H. In some other embodiments, the fourth opening 264 may extend into the first material layer 220 .

Please refer to Figure 1 and Figure 2I. FIG. 2I shows a cross-sectional view of the device 20 at step 1014 in FIG. 1 . As shown in FIG. 21 , the lower layer of material in stack 205 comprising ashable material is removed. Specifically, an ashing process is performed on the first material layer 220 between the first support layer 210 and the second support layer 212 through the third opening 262 and the fourth opening 264, so as to remove the first material layer 220 and retain the first material layer 220. A support layer 210 , a second support layer 212 and a first electrode 250 . Removing the first material layer 220 can expose the lower outer surface of the first electrode 250, that is, the outer surface of the first electrode 250 between the first support layer 210 and the second support layer 212 will be exposed, increasing the first electrode 250 and The surface area that is contacted by other subsequently formed components.

In some embodiments, the ashing process includes removing the first material layer 220 using a plasma, such as an oxygen-based plasma, a forming gas (nitrogen/hydrogen mixture)-based plasma, or other suitable plasma. Gas plasma. After the ashing process, a wet chemical cleaning process (wet clean) may be used to remove the residues of the ashing process in the stack 205 and prevent the ions generated by the ashing process from corroding the first electrode 250 . For example, an oxidizing and dehydrating acid cleaning device 20 may be used to remove carbonaceous residues from the first material layer 220 . In an embodiment using an oxygen-based plasma ashing process, NH ₃ treatment may be further included on the stack 205 to improve defects that may occur when the first electrode 250 undergoes an ashing process.

After removing the first material layer 220 and the second material layer 230, the first support layer 210, the second support layer 212 and the third support layer 214 are used as a support frame to support a plurality of first electrodes 250, so that the first The electrodes 250 are not in contact with each other. Since the ashing process is used to remove the first material layer 220 between the first supporting layer 210 and the second supporting layer 212, the lower part of the stack 205 can be prevented from being subjected to chemical turbulence/fluctuation by an etching process (such as wet etching). Therefore, the first electrodes 250 in the stack 205 can be less wobbled and arranged neatly, so as to increase the reliability of the device 20 .

Please refer to Figure 1 and Figure 2J. FIG. 2J shows a cross-sectional view of the device 20 at step 1016 in FIG. 1 . As shown in FIG. 2J , a dielectric layer 270 and a second electrode 275 are formed in the stack 205 to form a capacitor 280 . Specifically, a blanket interlayer is formed between the first supporting layer 210 and the third supporting layer 214, on the third supporting layer 214, and in the second opening 255 of the first electrode 250 (as shown in FIG. 2I). electrical layer and blanket electrode layer, and remove part of the blanket dielectric layer and blanket electrode layer on the third supporting layer 214 using, for example, a chemical mechanical polishing process, so that the dielectric layer 270 and the second electrode 275 are formed on the first support layer 214. Between the first supporting layer 210 and the third supporting layer 214 and in the second opening 255 .

The first electrode 250 , the dielectric layer 270 and the second electrode 275 together form a capacitor 280 to serve as other components in the storage connection device 20 . The contact part of the first electrode 250 and the dielectric layer 270 includes the inner surface and the outer surface of the first electrode 250, which increases the flow area of the current between the first electrode 250 and the second electrode 275, so the capacitor 280 is also called a double-sided capacitor. (double sided container). Since the first electrodes 250 are neatly arranged between the first support layer 210 and the third support layer 214, the dielectric layer 270 and the second electrode 275 can be formed flatly in the second opening 255 to form a capacitor 280 with high reliability. .

3A-3H illustrate cross-sectional views of the device 30 at various intermediate stages in the method 1000 according to another embodiment of the present disclosure. The method 1000 of forming the device 30 provided by the present disclosure is best described when referring to Figure 1 and Figures 3A-3H in conjunction. The steps for forming device 30 include operational steps similar to those for forming device 20, so the details of method 1000 above and the description below can be used to effectuate the formation of device 30.

Please refer to Figure 1 and Figure 3A. FIG. 3A shows a cross-sectional view of the device 30 at step 1002 in FIG. 1 . As shown in FIG. 3A , a stack 305 of alternately arranged support layers and material layers is formed on a substrate 300 . Specifically, the first support layer 310 is formed on the substrate 300, and the first material layer 320, the second support layer 312, the second material layer 330 and the third support layer 314 are sequentially formed on the first support layer 310, Wherein the first material layer 320 and the second material layer 330 include ashable materials. In some embodiments, the first material layer 320 and the second material layer 330 may include the same ashable material. In some other embodiments, the first material layer 320 and the second material layer 330 may include different ashable materials, for example, the first material layer 320 may be a carbon-based compound, and the second material layer 330 may be a resin.

Please refer to Figure 1 and Figure 3B to Figure 3C. FIG. 3B shows a cross-sectional view of the device 30 at step 1004 in FIG. 1 , and FIG. 3C shows a cross-sectional view of the device 30 at step 1006 in FIG. 1 . The stack 305 formed by the support layer and the material layer is patterned using the mask 340 so that the first opening 345 is formed on the substrate 300 . The first electrode 350 is formed in the first opening 345 such that the first electrode 350 is conformal to the first opening 345 with the second opening 355 . Therefore, the first electrode 350 has a relatively large surface area to be in contact with other elements subsequently formed therein.

Please refer to Figure 1 and Figure 3D. FIG. 3D shows a cross-sectional view of the device 30 at step 1008 in FIG. 1 . As shown in FIG. 3D , a third opening 362 is formed in the top support layer of the stack 305 . Specifically, a patterned mask 360 is formed on the stack 305 to expose the third supporting layer 314 between the adjacent first electrodes 350 below it. An anisotropic etching process (such as a dry etching process) is performed on the third support layer 314 and the second material layer 330 by using the mask 360 , so as to form a third opening 362 on the upper surface of the second support layer 312 . After the third opening 362 is formed, the mask 360 may be removed from the stack 305 .

Please refer to Figure 1 and Figure 3E. FIG. 3E shows a cross-sectional view of the device 30 at step 1010 in FIG. 1 . As shown in Figure 3E, the second material layer 330 of the stack 305 is removed. Specifically, an ashing process is performed on the second material layer 330 between the second support layer 312 and the third support layer 314 through the third opening 362, so as to remove the second material layer 330 and retain the second support layer 312, The third support layer 314 and the first electrode 350 . Since the second material layer 330 includes an ashable material, the second material layer 330 may be removed using an oxygen or forming gas based plasma.

Please refer to Figure 1 and Figures 3F to 3H. FIG. 3F shows a cross-sectional view of the device 30 at step 1012 in FIG. 1 , FIG. 3G shows a cross-sectional view of the device 30 at step 1014 in FIG. 1 , and FIG. 3H shows a step at step 1014 in FIG. 1 . Cross-sectional view of device 30 at 1016 . A fourth opening 364 is formed in the second supporting layer 312 of the stack 305 by a die-cutting process, and the first material layer 320 of the stack 305 is removed by an ashing process through the third opening 362 and the fourth opening 364 . After the ashing process, wet chemical cleaning and ammonia treatment may be further included to remove residues of the ashing process and reduce defects of the first electrode 350 . Using an ashing process to remove the first material layer 320 and the second material layer 330 can prevent the stack 305 from being damaged by the chemical perturbation of the etching process (eg, wet etching), thereby reducing the swing of the first electrode 350 in the stack 305 , so that the first electrodes 350 are not in contact with each other. Since the first electrode 350 is neatly arranged between the first supporting layer 310 and the third supporting layer 314, the dielectric layer 370 and the second electrode 375 can be formed flatly in the second opening 355 to form a capacitor 380 with high reliability. .

According to the above-described embodiments, the present disclosure provides a method of forming a capacitor comprising forming a support layer and a stack of material layers and electrodes in the stack, wherein at least the lower material layer includes an ashable material such that the lower material of the stack can be removed using an ashing process layer and expose the lower outer surface of the electrode. Because the ashing process is used to remove the lower material layer, the damage to the stack structure is reduced, so that the exposed electrodes can avoid swinging in the supporting layer. Therefore, the method provided by the present disclosure can form neatly arranged electrodes, thereby forming a capacitor with high reliability.

The foregoing outlines features of some embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions and alterations without departing from the spirit and scope of the present disclosure.

20,30: device 200: Substrate 205: stack 210: The first support layer 212: Second support layer 214: The third support layer 220: the first material layer 230: second material layer 240: mask 245: first opening 250: first electrode 255: second opening 260: mask 262: The third opening 264: The fourth opening 270: dielectric layer 275: second electrode 280: Capacitor 300: Substrate 305:Stack 310: the first support layer 312: Second support layer 314: The third support layer 320: the first material layer 330: second material layer 340: mask 345: first opening 350: first electrode 355: second opening 360: Mask 362: The third opening 364: The fourth opening 370: dielectric layer 375: second electrode 380: Capacitor 1000: method 1002, 1004, 1006, 1008, 1010, 1012, 1014, 1016: steps

Aspects of the disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, according to the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion. FIG. 1 is a flowchart illustrating a method of forming a capacitor according to some embodiments of the present disclosure. 2A-2D and 2G-2J illustrate device cross-sectional views at various intermediate stages of forming a capacitor according to an embodiment of the present disclosure. Figures 2E and 2F illustrate top views of devices in intermediate stages of forming capacitors, according to some embodiments of the present disclosure. 3A-3H illustrate cross-sectional views of devices at various intermediate stages of forming capacitors according to another embodiment of the present disclosure.

Domestic deposit information (please note in order of depositor, date, and number) none Overseas storage information (please note in order of storage country, institution, date, and number) none

1000: method

1002, 1004, 1006, 1008, 1010, 1012, 1014, 1016: steps

Claims (10)

A method of forming a capacitor, comprising: forming a stack on a substrate, the stack including a first support layer, a first material layer on the first support layer, and a second material layer above the first material layer material layer, wherein at least the first material layer comprises an ashable material; patterning the stack to form a first opening in the stack; forming a first electrode in the first opening, the first electrode comprising a second opening; removing the second material layer to expose an upper portion of an outer surface of the first electrode; performing an ashing process using plasma to remove the first material layer to expose the first electrode the lower portion of the outer surface; perform a wet chemical cleaning process to remove the residue of the ashing process; and form a dielectric layer and a second electrode in the second opening of the first electrode and the first electrode on the outer surface of the electrode. The method of claim 1, wherein forming the stack on the substrate comprises forming the first material layer with a first thickness between 50% and 60% of the thickness of the stack. The method of claim 1, wherein forming the stack on the substrate comprises forming the first material layer with the ashable material and the A second material layer, and removing the second material layer includes ashing the second material layer. The method of claim 1, wherein forming the first electrode in the first opening comprises forming the first electrode with an aspect ratio between 35:1 and 45:1. The method according to claim 1, forming the stack on the substrate further includes: forming a second support layer between the first material layer and the second material layer; and forming a third support layer on the first material layer on the second material layer. According to the method of claim 5, removing the second material layer includes selectively etching the second material layer using a wet etching process to retain the first electrode and the second supporting layer. The method according to claim 5, removing the second material layer further comprises: forming a third opening in the third support layer to expose the second material layer, the third opening being adjacent to the first electrode and removing the second material layer through the third opening. According to the method described in claim item 5, performing the ashing process shift removing the first material layer further includes: forming a fourth opening in the second supporting layer to expose the first material layer, the fourth opening being adjacent to the first electrode; and ashing the fourth opening through the fourth opening first layer of material. The method according to claim 1, further comprising: after performing the wet chemical cleaning process, treating the first electrode with ammonia gas. The method of claim 1, patterning the stack to form the first opening further comprises: forming an opening in the second material layer; forming a liner layer on sidewalls of the opening; and etching through the The bottom of the liner layer and the first material layer form the first opening.

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