TWI786182B - Thermal-dissipating substrate structure - Google Patents
Thermal-dissipating substrate structure Download PDFInfo
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- TWI786182B TWI786182B TW107132047A TW107132047A TWI786182B TW I786182 B TWI786182 B TW I786182B TW 107132047 A TW107132047 A TW 107132047A TW 107132047 A TW107132047 A TW 107132047A TW I786182 B TWI786182 B TW I786182B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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Abstract
Description
本發明係有關於一種基板結構。更具體地來說,本發明係有關於一種具有鄰近積體電路晶片之散熱結構的基板結構。 The invention relates to a substrate structure. More particularly, the present invention relates to a substrate structure having a heat dissipation structure adjacent to an integrated circuit die.
隨著科技的發展,現今電子產品的使用愈來愈普遍,尤其手機更是逐漸成為現代人生活的重心。近年來,快速充電技術成為各大手機製造商研究開發的目標,目前此技術已導入手機應用中。然而,受限於手機內部基板的尺寸,在不影響手機功能的情況下,電池容量一直無法提升。 With the development of science and technology, the use of electronic products is becoming more and more common nowadays, especially mobile phones have gradually become the focus of modern people's life. In recent years, fast charging technology has become the research and development target of major mobile phone manufacturers. At present, this technology has been introduced into mobile phone applications. However, limited by the size of the internal substrate of the mobile phone, the battery capacity has not been able to be increased without affecting the functions of the mobile phone.
此外,在使用時,手機的快速充電模組或電源管理模組相較於其他部分會通過較大的電流,且在流經大電流的情況下,不論積體電路(integrated circuit;IC)晶片本身及周圍的被動元件皆是發熱源,因此手機在進行充電或耗能的操作時,往往會產生發熱的問題。 In addition, when in use, the fast charging module or power management module of the mobile phone will pass a larger current than other parts, and in the case of flowing a large current, regardless of the integrated circuit (integrated circuit; IC) chip Both itself and the surrounding passive components are heat sources, so mobile phones often generate heat when charging or energy-consuming operations.
為了解決上述習知之問題點,本發明提供一種基板結構,包含一基板、一積體電路晶片、一電路結構以及一散熱結構。積體電路晶片設置於基板中。電路結構電性連接至積體電路晶片。散熱結構設置於基板中,鄰近積體電路晶片,且此散熱結 構與電路結構電性獨立。 In order to solve the above known problems, the present invention provides a substrate structure, which includes a substrate, an integrated circuit chip, a circuit structure and a heat dissipation structure. The integrated circuit chip is disposed in the substrate. The circuit structure is electrically connected to the integrated circuit chip. The heat dissipation structure is disposed in the substrate, adjacent to the integrated circuit chip, and the heat dissipation structure is electrically independent from the circuit structure.
在一實施例中,積體電路晶片更具有一第一表面、一第二表面及至少一接點,其中第二表面係相反於第一表面,接點位於第一表面上,且電路結構與前述接點連接,第二表面面朝散熱結構。由垂直於第一表面的方向觀察,積體電路晶片與散熱結構至少部分重疊。基板結構更包含一第一絕緣層及一第二絕緣層,其中基板位於第一絕緣層及第二絕緣層之間,第二表面面朝第二絕緣層,且散熱結構貫穿第二絕緣層。散熱結構更包含複數個導熱構件。前述接點包含一功率接點與一訊號接點,且散熱結構鄰近功率接點的密集程度大於散熱結構鄰近訊號接點的密集程度。 In one embodiment, the integrated circuit chip further has a first surface, a second surface, and at least one contact, wherein the second surface is opposite to the first surface, the contact is located on the first surface, and the circuit structure and The aforementioned contacts are connected, and the second surface faces the heat dissipation structure. Viewed from a direction perpendicular to the first surface, the integrated circuit chip and the heat dissipation structure at least partially overlap. The substrate structure further includes a first insulating layer and a second insulating layer, wherein the substrate is located between the first insulating layer and the second insulating layer, the second surface faces the second insulating layer, and the heat dissipation structure penetrates the second insulating layer. The heat dissipation structure further includes a plurality of heat conducting components. The aforementioned contacts include a power contact and a signal contact, and the density of the heat dissipation structure adjacent to the power contact is greater than that of the heat dissipation structure adjacent to the signal contact.
在一實施例中,散熱結構更包含一導熱構件以及一散熱件,且散熱件於表面具有複數個凸出部。基板結構更包含一另一散熱結構,其中第一表面面朝前述另一散熱結構。基板結構更包含一金屬導熱板,金屬導熱板設置在基板中,且位於第二表面及散熱結構之間。 In one embodiment, the heat dissipation structure further includes a heat conduction member and a heat dissipation element, and the heat dissipation element has a plurality of protrusions on the surface. The substrate structure further includes another heat dissipation structure, wherein the first surface faces the other heat dissipation structure. The substrate structure further includes a metal heat conduction plate, and the metal heat conduction plate is disposed in the substrate and located between the second surface and the heat dissipation structure.
在一實施例中,基板結構更包含一第三絕緣層及一金屬導熱板,其中第三絕緣層位於第二絕緣層與金屬導熱板之間,且金屬導熱板同時接觸第三絕緣層及散熱結構。基板結構更包含一被動元件及一絕緣材料層,其中被動元件設置於第一絕緣層上,且絕緣材料層包覆被動元件。第二絕緣層及基板中形成有一溝槽,且散熱結構設置於溝槽中。 In one embodiment, the substrate structure further includes a third insulating layer and a metal heat conducting plate, wherein the third insulating layer is located between the second insulating layer and the metal heat conducting plate, and the metal heat conducting plate simultaneously contacts the third insulating layer and dissipates heat. structure. The substrate structure further includes a passive element and an insulating material layer, wherein the passive element is disposed on the first insulating layer, and the insulating material layer covers the passive element. A groove is formed in the second insulating layer and the substrate, and the heat dissipation structure is arranged in the groove.
在一實施例中,基板結構更包含一金屬導熱板,設置於基板上,其中金屬導熱板同時接觸基板及散熱結構。基板結 構更包含一散熱件,其中金屬導熱板位於散熱結構及散熱件之間。散熱結構具有一第一截面及一第二截面,第一截面位於積體電路晶片與第二截面之間,且第一截面之面積小於第二截面之面積。散熱結構與積體電路晶片之間夾有部分基板。 In one embodiment, the substrate structure further includes a metal heat conduction plate disposed on the substrate, wherein the metal heat conduction plate simultaneously contacts the substrate and the heat dissipation structure. The substrate structure further includes a heat dissipation element, wherein the metal heat conducting plate is located between the heat dissipation structure and the heat dissipation element. The heat dissipation structure has a first section and a second section, the first section is located between the integrated circuit chip and the second section, and the area of the first section is smaller than the area of the second section. Part of the substrate is sandwiched between the heat dissipation structure and the integrated circuit chip.
1A、1B、1C、1D、1E、1F、1G、1H、1I、1J‧‧‧基板結構 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H, 1I, 1J‧‧‧substrate structure
10‧‧‧基板 10‧‧‧substrate
11‧‧‧上部 11‧‧‧upper part
12‧‧‧下部 12‧‧‧lower part
20‧‧‧積體電路晶片 20‧‧‧Integrated Circuit Chips
201‧‧‧第一表面 201‧‧‧First surface
202‧‧‧第二表面 202‧‧‧Second surface
203‧‧‧接點 203‧‧‧Contact
203P‧‧‧功率接點 203P‧‧‧power contact
203S‧‧‧訊號接點 203S‧‧‧signal contact
30‧‧‧電路結構 30‧‧‧circuit structure
40‧‧‧第一絕緣層 40‧‧‧First insulating layer
50‧‧‧第二絕緣層 50‧‧‧Second insulating layer
52‧‧‧第三絕緣層 52‧‧‧The third insulating layer
60A、60B、60C、60D、60E、60F、60G、60H、60I、60J‧‧‧散熱結構 60A, 60B, 60C, 60D, 60E, 60F, 60G, 60H, 60I, 60J‧‧‧heat dissipation structure
61、61’、61”、64‧‧‧導熱構件 61, 61’, 61”, 64‧‧‧heat conducting member
611‧‧‧第一截面 611‧‧‧first section
612‧‧‧第二截面 612‧‧‧Second section
62‧‧‧導熱材料層 62‧‧‧thermally conductive material layer
63、63’‧‧‧散熱件 63, 63’‧‧‧radiating parts
631、631’‧‧‧凸出部 631, 631’‧‧‧bulge
70A、70B‧‧‧被動元件 70A, 70B‧‧‧passive components
80‧‧‧絕緣材料層 80‧‧‧Insulation layer
90、90’、90”‧‧‧金屬導熱板 90, 90’, 90”‧‧‧Metal heat conduction plate
G‧‧‧間隙 G‧‧‧Gap
Wi‧‧‧第三絕緣層的厚度 Wi‧‧‧thickness of the third insulating layer
Wm‧‧‧金屬導熱板的厚度 Wm‧‧‧thickness of metal heat conduction plate
第1圖顯示根據本發明一實施例之基板結構的剖視示意圖。 FIG. 1 shows a schematic cross-sectional view of a substrate structure according to an embodiment of the present invention.
第2圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 2 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第3圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 3 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第4圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 4 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第5圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 5 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第6圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 6 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第7圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 7 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第8圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 8 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第9圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 9 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
第10圖顯示根據本發明另一實施例之基板結構的剖視示意圖。 FIG. 10 shows a schematic cross-sectional view of a substrate structure according to another embodiment of the present invention.
以下說明本發明實施例之基板結構。然而,可輕易了解本發明實施例提供許多合適的創作概念而可實施於廣泛的各種特定背景。所揭示的特定實施例僅僅用於說明以特定方法使用本發明,並非用以侷限本發明的範圍。 The substrate structure of the embodiment of the present invention is described below. It should be readily appreciated, however, that embodiments of the present invention provide many suitable creative concepts that can be implemented in a wide variety of specific contexts. The specific embodiments disclosed are merely illustrative of specific ways to use the invention and do not limit the scope of the invention.
除非另外定義,在此使用的全部用語(包括技術及 科學用語)具有與此篇揭露所屬之一般技藝者所通常理解的相同涵義。能理解的是這些用語,例如在通常使用的字典中定義的用語,應被解讀成具有一與相關技術及本揭露的背景或上下文一致的意思,而不應以一理想化或過度正式的方式解讀,除非在此特別定義。 Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the related art and the present disclosure, and not in an idealized or overly formal manner Interpretation, unless specifically defined herein.
請先參照第1圖,第1圖顯示根據本發明一實施例之基板結構1A的剖視示意圖。在本實施例中,基板結構1A主要包含一基板10、一積體電路晶片20、一電路結構30、一第一絕緣層40、一第二絕緣層50、以及一散熱結構60A。積體電路晶片20係設置於基板10中,其中基板10包含上部11及下部12。舉例而言,積體電路晶片20係設置於下部12上,再於積體電路晶片20上設置上部11,最後以壓合加熱的方式結合上部11及下部12,藉此將積體電路晶片20設置於基板10中。在以下的實施例中,將上部11及下部12共同繪示為基板10。積體電路晶片20具有一第一表面201、一第二表面202及至少一接點203,其中第二表面202係相反於第一表面201(亦即第一表面201、第二表面202分別位於積體電路晶片20的相對兩側),且接點203位於第一表面201。電路結構30電性連接至積體電路晶片20的接點203。在基板10的上下兩側上分別設置第一絕緣層40及第二絕緣層50,亦即基板10位於第一絕緣層40及第二絕緣層50之間,其中第一表面201面朝第一絕緣層40,且第二表面202面朝第二絕緣層50。應了解的是,基板10的材料可以是硬度較低的材料,藉此可保護設置於基板10中的積體電路晶片20。舉例而言,基板10材料的硬度可低於第一絕緣層40及/或第二絕緣層50材料的硬度。 Please refer to FIG. 1 first. FIG. 1 shows a schematic cross-sectional view of a
雖然在本發明的實施例中僅繪示單一個積體電路晶片20,然而在其他一些實施例中,可將多個積體電路晶片20設置於基板10中,且前述多個積體電路晶片20可沿垂直方向(Y軸方向)或水平方向(X軸方向)排列。此外,在另外一些實施例中,多個積體電路晶片20亦可以不規則的方式設置於基板10中。 Although only a single
散熱結構60A設置於基板10中,並貫穿第二絕緣層50,其中積體電路晶片20的第二表面202面朝散熱結構60A。在本實施例中,散熱結構60A包含複數個導熱構件61,鄰近積體電路晶片20。舉例而言,如第1圖所示,首先朝第二表面202的方向在基板10上進行雷射鑽孔後,填入金屬材料(例如銅等熱傳導係數高的材料),再於第二絕緣層50上進行雷射鑽孔,並填入金屬材料以形成導熱構件61。藉由雷射鑽孔的方式形成的孔洞之孔徑會向外逐漸增加,換言之,散熱結構60A的導熱構件61於其頂部具有平行於X軸方向的一第一截面611(即導熱構件61的頂面),且於基板10與第二絕緣層50的交界處具有平行於X軸方向的一第二截面612(如第1圖的虛線所示),其中第一截面611位於積體電路晶片20及第二截面612之間(亦即第一截面611相較於第二截面612更接近積體電路晶片20),且第一截面611的面積小於第二截面612的面積。 The
在進行上述雷射鑽孔的製程時,如果孔洞太接近積體電路晶片20、或甚至顯露出積體電路晶片20,則可能對積體電路晶片20造成損害。因此,在一些實施例中,填入上述孔洞的散熱結構60A與積體電路晶片20之間通常會留有部分基板10(亦即散熱結構60A與積體電路晶片20之間具有一間隙G),以避免使積 體電路晶片20受損。當然,在其他一些實施例中,散熱結構60A亦可直接接觸積體電路晶片20,如此有助於提升散熱結構60A的散熱效果。散熱結構60A與電路結構30基本上彼此電性獨立(除了接地之外,散熱結構60A與電路結構30並不會電性連接)。此外,由垂直於第一表面201的方向(Y軸方向)觀察,積體電路晶片20與散熱結構60A至少部分重疊。 During the above-mentioned laser drilling process, if the hole is too close to the
另外,散熱結構60A可選擇性地包含導熱材料層62,其中導熱材料層62係設置於導熱構件61顯露出的表面上。換言之,導熱構件61係位於導熱材料層62與積體電路晶片20之間。此外,可依照設計需求,對導熱材料層62的表面進行各種不同的處理(例如:表面粗糙化、設置凸台、設置凹陷、或設置金屬基板等),以增加散熱結構60A與外界的接觸面積,進而提升散熱效率。 In addition, the
此外,可根據實際需求,在基板結構1A中選擇性地設置被動元件70A、70B(例如:電阻器、電容器、電感器等)以及絕緣材料層80,其中被動元件70A、70B係設置於第一絕緣層40上,並經由電路結構30電性連接至積體電路晶片20,且絕緣材料層80以模內成型的方式形成於第一絕緣層40上,且包覆被動元件70A、70B。絕緣材料層80例如為樹脂(epoxy)等熱導率高於空氣的材料,且絕緣材料層80的熱導率可高於其他絕緣層(例如上述第一絕緣層40、第二絕緣層50),藉此可進一步提升基板結構1A的散熱效率。 In addition,
應了解的是,相較於目前市面上將積體電路晶片設置於基板表面上的半導體封裝結構,上述實施例所述將積體電路晶片20設置於基板10中的基板結構可使整體封裝結構的尺寸縮小 40%以上,且於基板結構表面上省下的空間可用於設置其他電子元件。同時,由於積體電路晶片20設置於基板10中,連接至積體電路晶片20的電路亦包覆於基板10中,故電路較不易損壞,藉此可避免故障的情形發生,另外,因為包覆積體電路晶片20的基板10之熱導率大於空氣之熱導率,因此上述基板結構也具有加強散熱的效果。 It should be understood that, compared with the semiconductor packaging structure in which the integrated circuit chip is arranged on the surface of the substrate currently on the market, the substrate structure in which the
接著,請參照第2圖,第2圖顯示根據本發明另一實施例之基板結構1B的剖視示意圖。應注意的是,基板結構1B可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1B與基板結構1A的主要不同之處在於:如第2圖所示,基板結構1B之散熱結構60B具有不同形狀的導熱構件61’、61”,其中導熱構件61’於基板20與第二絕緣層50交界處的表面係設計為相對於水平方向(X軸方向)傾斜(亦即導熱構件61’的上述表面與水平方向之間夾有一角度),藉以增加導熱構件61’的表面積,提升散熱效率。另外,導熱構件61”係形成於對基板10及第二絕緣層50進行單一雷射鑽孔製程所形成的孔洞中,藉此可簡化相關製程並節省成本。應了解的是,雖然第2圖繪示不同形狀的導熱構件,基板結構1B可僅具有單一種導熱構件(例如導熱構件61’、61”的其中之一)、或前述導熱構件的組合。 Next, please refer to FIG. 2 , which shows a schematic cross-sectional view of a
應說明的是,雖然在第2圖的散熱結構60B中未繪示導熱材料層62,但可根據實際需求,將導熱材料層62設置於導熱構件61’、61”顯露出的表面上。換言之,導熱構件61’、61”係位於導熱材料層62與積體電路晶片20之間,藉此可更進一步提升散 熱效果。 It should be noted that although the thermally
第3圖顯示根據本發明另一實施例之基板結構1C的剖視示意圖。應注意的是,基板結構1C可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1C與基板結構1A的主要不同之處在於:基板結構1C的散熱結構60C更包含散熱件63,其中散熱件63位於前述導熱構件61下方(亦即位於導熱構件61顯露出的表面上)。換言之,導熱構件61位於基板10與散熱件63之間。舉例而言,散熱件63可以是銀(Ag)、奈米碳管(carbon nanotube;CNT)、石墨烯(graphene)等具高熱導率的材料(即熱導率大於空氣的材料)、或前述材料的組合。此外,散熱件63於其下方的表面(即相反於面朝導熱構件61的表面)具有複數個凸出部631。凸出部631的設置有助於增加散熱件63顯露於外界的表面積,可更進一步地提升散熱效果。 FIG. 3 shows a schematic cross-sectional view of a
應了解的是,上述導熱材料層62與散熱件63皆是設置於導熱構件61、61’或61”之顯露出的表面上,且兩者都具有提升散熱效果的作用。一般而言,導熱材料層62所佔的空間較小,適用於有空間上之需求的設計;而散熱件63的設置較為簡便,可簡化製程並提供較大的散熱表面積。在製造本發明所述之各種基板結構的過程中,可根據實際需求,選擇設置導熱材料層62或散熱件63。換言之,雖然在本發明的所有實施例中可能僅繪示導熱材料層62或散熱件63、或者並未繪示前述兩者,但應將上述實施例理解為包含導熱材料層62或散熱件63的其中之一。有關於導熱材料層62與散熱件63的選擇或替換,以下將不再贅述。 It should be understood that the above-mentioned thermally
第4圖顯示根據本發明另一實施例之基板結構1D的剖視示意圖。應注意的是,基板結構1D可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1D與基板結構1A的主要不同之處在於:散熱結構60D更包含至少一導熱構件61A,設置於積體電路晶片20的第一表面201上。換言之,第一表面201面朝前述導熱構件61A。由於在積體電路晶片20的第一表面201及第二表面202上皆設有導熱構件61、61A,藉此可更進一步加強散熱。在一些實施例中,除了設置於積體電路晶片20的上下兩側,導熱構件61、61A亦可設置於積體電路晶片20的周圍。 FIG. 4 shows a schematic cross-sectional view of a
第5圖顯示根據本發明另一實施例之基板結構1E的剖視示意圖。應注意的是,基板結構1E可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1E與基板結構1A的主要不同之處在於:積體電路晶片20的接點203包含一功率接點203P及一訊號接點203S。在本實施例中,基板結構1E更具有一重佈線層(圖未示),用以將供應電源的線路集中連接至積體電路晶片20的功率接點203P,而訊號接點203S則用來傳輸訊號。由於功率接點203P係電性連接至電源,相較於訊號接點203S,功率接點203P會通過較大的電流。因此,功率接點203P的周圍會較容易產生熱源。為了加強功率接點203P周圍區域的散熱,如第5圖所示,提高鄰近功率接點203P之導熱構件61的密集程度。換言之,導熱構件61鄰近功率接點203P的密集程度大於導熱構件61鄰近訊號接點203S的密集程度。藉由將導熱構件61集中於特定區域的設計,可局部提 升前述區域的散熱效率。 FIG. 5 shows a schematic cross-sectional view of a
第6圖顯示根據本發明另一實施例之基板結構1F的剖視示意圖。應注意的是,基板結構1F可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1F與基板結構1A的主要不同之處在於:在第二絕緣層50及基板10中形成有一溝槽51,且散熱結構60F包含導熱構件64。將導熱構件64設置於溝槽51中,其中導熱構件64係以電鍍的方式形成於溝槽51中。相較於前述具有多個導熱構件61、61’或61”的散熱結構,一體化的散熱結構60F可更進一步提高導熱效率。 FIG. 6 shows a schematic cross-sectional view of a
第7圖顯示根據本發明另一實施例之基板結構1G的剖視示意圖。應注意的是,基板結構1G可包含與基板結構1F相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1G與基板結構1F的主要不同之處在於:在溝槽51中設置散熱件63’,且可在散熱件63’於下方的表面(相反於面朝導熱構件61的表面)形成複數個凸出部631’,如此可增加散熱件63’面向外界的表面積,藉以更進一步地提升散熱效果。 FIG. 7 shows a schematic cross-sectional view of a
第8圖顯示根據本發明另一實施例之基板結構1H的剖視示意圖。應注意的是,基板結構1H可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1H與基板結構1A的主要不同之處在於:基板結構1H的散熱結構60H更包含一金屬導熱板90,設置於基板10中,金屬導熱板90具有面朝第二表面202之平面,且金屬導 熱板90位於第二表面202與導熱構件61之間。在一些實施例中,導熱構件61可直接接觸金屬導熱板90。金屬導熱板90可吸收積體電路晶片20所發出的熱量,再藉由導熱構件61將前述熱量傳導至外部。因此,金屬導熱板90的設置有助於更平均且快速地散熱。 FIG. 8 shows a schematic cross-sectional view of a
第9圖顯示根據本發明另一實施例之基板結構1I的剖視示意圖。應注意的是,基板結構1I可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1I與基板結構1A的主要不同之處在於:基板結構1I的散熱結構60I更包含金屬導熱板90’,設置於基板10上,其中金屬導熱板90’同時接觸基板10及散熱結構60I。在本實施例中,以金屬導熱板90’取代前述第二絕緣層50,金屬導熱板90’除了具有散熱的作用以外,同時也可增強基板結構1I的強度。此外,亦可在金屬導熱板90’下選擇性地設置散熱件63。換言之,金屬導熱板90’位於散熱結構60I與散熱件63之間。 FIG. 9 shows a schematic cross-sectional view of a substrate structure 1I according to another embodiment of the present invention. It should be noted that the substrate structure 1I may include the same or similar components as the
應注意的是,基板結構1I更包含一絕緣層54,用以將電路結構30與金屬導熱板90’電性絕緣,來避免電路結構30與散熱結構60I電性連接。絕緣層54可以包含空氣或是任何適合的絕緣介電質。 It should be noted that the substrate structure 1I further includes an insulating
雖然第2至9圖中未繪示被動元件70A、70B及絕緣材料層80,但應理解的是,根據實際需求可選擇性地於前述基板結構上設置被動元件70A、70B及/或絕緣材料層80。此外,即使前述基板結構上(例如於第一絕緣層40上)未設置被動元件,仍可於第一絕緣層40上以任何適合的方式(例如模內成型等)設置絕緣材料層80,由於絕緣材料層80的熱導率遠大於空氣,因此設置 絕緣材料層80可有助於提升散熱效果。 Although the
第10圖顯示根據本發明另一實施例之基板結構1J的剖視示意圖。應注意的是,基板結構1J可包含與基板結構1A相同或相似的元件,以下相同或相似的元件將以相同或相似的標號表示,並不再詳述。基板結構1J與基板結構1A的主要不同之處在於:基板結構1J更包含第三絕緣層52及金屬導熱板90”,皆設置於第二絕緣層50下,其中第三絕緣層52位於第二絕緣層50與金屬導熱板90”之間,且金屬導熱板90”同時接觸第三絕緣層52與散熱結構60J。此外,被動元件70A、70B亦可設置於金屬導熱板90”上,藉此有助於被動元件70A、70B的散熱效果。應注意的是,電路結構30與被動元件70A、70B必須與金屬導熱板90”電性絕緣。 FIG. 10 shows a schematic cross-sectional view of a
在本實施例中,第三絕緣層52於垂直於第一表面201的方向(Y軸方向)具有一厚度Wi,而金屬導熱板90”則於相同方向具有另一厚度Wm,且金屬導熱板90”的厚度Wm大於第三絕緣層52的厚度Wi。如此可提升基板結構1J的機械強度及平面度。 In this embodiment, the third insulating
綜上所述,本發明提供一種具有鄰近積體電路晶片之散熱結構的基板結構,藉由前述散熱結構的設置,可有助於提升基板結構內的積體電路晶片等電子元件的散熱效果。應了解的是,本發明所述各種不同的散熱結構可根據實際需求進行替換、調整或組合,而不限於單一實施例所述的結構。 To sum up, the present invention provides a substrate structure with a heat dissipation structure adjacent to an integrated circuit chip. The arrangement of the heat dissipation structure can help to improve the heat dissipation effect of electronic components such as integrated circuit chips in the substrate structure. It should be understood that the various heat dissipation structures described in the present invention can be replaced, adjusted or combined according to actual needs, and are not limited to the structures described in a single embodiment.
雖然本發明的實施例及其優點已揭露如上,但應該瞭解的是,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作更動、替代與潤飾。此外,本發明之保護範圍並未侷限於說明書內所述特定實施例中的製程、機器、 製造、物質組成、裝置、方法及步驟,任何所屬技術領域中具有通常知識者可從本發明揭示內容中理解現行或未來所發展出的製程、機器、製造、物質組成、裝置、方法及步驟,只要可以在此處所述實施例中實施大抵相同功能或獲得大抵相同結果皆可根據本發明使用。因此,本發明之保護範圍包括上述製程、機器、製造、物質組成、裝置、方法及步驟。另外,每一申請專利範圍構成個別的實施例,且本發明之保護範圍也包括各個申請專利範圍及實施例的組合。 Although the embodiments of the present invention and their advantages have been disclosed above, it should be understood that those skilled in the art can make changes, substitutions and modifications without departing from the spirit and scope of the present invention. In addition, the protection scope of the present invention is not limited to the process, machine, manufacture, material composition, device, method and steps in the specific embodiments described in the description, and anyone with ordinary knowledge in the technical field can learn from the disclosure of the present invention It is understood that the current or future developed processes, machines, manufactures, material compositions, devices, methods and steps can be used in accordance with the present invention as long as they can perform substantially the same functions or obtain substantially the same results in the embodiments described herein. Therefore, the protection scope of the present invention includes the above-mentioned process, machine, manufacture, composition of matter, device, method and steps. In addition, each patent application scope constitutes an individual embodiment, and the protection scope of the present invention also includes the combination of each patent application scope and the embodiments.
雖然本發明以前述數個較佳實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可做些許之更動與潤飾。因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。此外,每個申請專利範圍建構成一獨立的實施例,且各種申請專利範圍及實施例之組合皆介於本發明之範圍內。 Although the present invention is disclosed above with the aforementioned several preferred embodiments, they are not intended to limit the present invention. Those with ordinary knowledge in the technical field of the present invention can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the scope of the appended patent application. In addition, each claimed claim constitutes an independent embodiment, and combinations of various claimed claims and embodiments fall within the scope of the present invention.
1A‧‧‧基板結構 1A‧‧‧substrate structure
10‧‧‧基板 10‧‧‧substrate
11‧‧‧上部 11‧‧‧upper part
12‧‧‧下部 12‧‧‧lower part
20‧‧‧積體電路晶片 20‧‧‧Integrated Circuit Chips
201‧‧‧第一表面 201‧‧‧First surface
202‧‧‧第二表面 202‧‧‧Second surface
203‧‧‧接點 203‧‧‧Contact
30‧‧‧電路結構 30‧‧‧circuit structure
40‧‧‧第一絕緣層 40‧‧‧First insulating layer
50‧‧‧第二絕緣層 50‧‧‧Second insulating layer
60A‧‧‧散熱結構 60A‧‧‧Heat Dissipation Structure
61‧‧‧導熱構件 61‧‧‧Heat-conducting components
611‧‧‧第一截面 611‧‧‧first section
612‧‧‧第二截面 612‧‧‧Second section
62‧‧‧導熱材料層 62‧‧‧thermally conductive material layer
70A、70B‧‧‧被動元件 70A, 70B‧‧‧passive components
80‧‧‧絕緣材料層 80‧‧‧Insulation layer
G‧‧‧間隙 G‧‧‧Gap
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TW201448137A (en) * | 2013-03-14 | 2014-12-16 | Gen Electric | Power overlay structure and method of making same |
TW201642714A (en) * | 2015-05-22 | 2016-12-01 | 欣興電子股份有限公司 | Package structure and method for manufacturing the same |
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TW201226209A (en) * | 2010-12-28 | 2012-07-01 | Ultrapack Energy Co Ltd | Heat dissipation substrate and manufacturing method thereof |
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TW595808U (en) * | 1999-03-19 | 2004-06-21 | Phoenix Prec Technology Corp | BGA substrate structure |
JP2006253168A (en) * | 2005-03-08 | 2006-09-21 | Tdk Corp | Substrate having built-in semiconductor ic |
TW201117332A (en) * | 2009-11-11 | 2011-05-16 | Bridge Semoconductor Corp | Semiconductor chip assembly with post/base heat spreaderand substrate |
TW201448137A (en) * | 2013-03-14 | 2014-12-16 | Gen Electric | Power overlay structure and method of making same |
TW201642714A (en) * | 2015-05-22 | 2016-12-01 | 欣興電子股份有限公司 | Package structure and method for manufacturing the same |
WO2017047544A1 (en) * | 2015-09-17 | 2017-03-23 | 富士電機株式会社 | Method for manufacturing semiconductor device |
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TWI791648B (en) | 2023-02-11 |
CN209169125U (en) | 2019-07-26 |
CN208938956U (en) | 2019-06-04 |
TW201919162A (en) | 2019-05-16 |
CN209592015U (en) | 2019-11-05 |
TW201919465A (en) | 2019-05-16 |
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