TWI781584B - Cascade driver system of preventing wires from being staggered - Google Patents

Abstract

A cascade driver system of preventing wires from being staggered is provided. The cascade driver circuit includes a plurality of first driving modules and a plurality of second driving modules. A first input pin of each of the second driving modules is connected to a first input pin of a first driver module of a previous stage thereof. A second input pin of each of the second driving modules is connected to an output pin of the first driving module of the previous stage thereof. Except for a first stage one of the first driving modules, a first input pin of each of the first driving modules is connected to output pins of the second driving module of a previous stage thereof. A second input pin of each of the first driving modules is connected to the second input pin of the second driving module of a previous stage thereof.

Description

Cascaded drive system that prevents trace crossing

The invention relates to a cascaded driving system, in particular to a cascaded driving system capable of preventing wire crossing.

The signal transmission method that the traditional driver module cascaded after the faulty module can still operate normally is to use a driver module with dual input terminals and one output terminal, where the first input terminal (in1) of each stage is connected to the upper The output terminal (out) of the first stage, and the second input terminal (in2) of each stage is connected to the first input terminal of the previous stage, so when the drive module of a certain stage fails, it will not cause the subsequent drive modules to also fail. Followed by exception.

However, the connection between the traditional drive modules will cause serious signal interference problems due to the staggered wiring, which will lead to unstable signal transmission, and the staggered wiring will require additional board layers and increase costs, such as multi-layer printed circuit boards. Wire.

The technical problem to be solved by the present invention is to provide a cascaded drive system that can prevent interlacing of wires, including multiple drive modules. The driving modules include a plurality of first driving modules and a plurality of second driving modules. One of the first driving modules is defined as a first-level driving module. One of the second driving modules is defined as a second-level driving module. A plurality of first driving modules and a plurality of second driving modules are arranged in a staggered arrangement and are sequentially divided into different levels, wherein the first level driving modules belong to the first level, and the second level driving modules are the first level driving modules It belongs to the second level. The first input end of the first-level driving module is connected to the first input end of the second-level driving module. The output end of the first-level driving module is connected to the second input end of the second-level driving module. The first input end of each second driving module is connected to the first input end of the first driving module of the preceding stage. The second input end of each second driving module is connected to the output end of the first driving module of the preceding stage. Except for the first-level drive module, the first input terminals of each first drive module are connected to the output terminal of the second drive module of the previous stage, and the second input terminals of each first drive module are connected to the first drive module of the previous stage. The second input end of the second driving module.

In one embodiment, the setting pins of each first driving module are connected to the ground. The setting pins of each second driving module are coupled to the reference potential. Each of the first driving modules determines that it is classified as the first type of driving module when it confirms that its setting pins are empty connections. When each second driving module confirms that its setting pin is coupled to the reference potential, it is determined that it is classified as the second type of driving module.

In one embodiment, the setting pins of each first driving module are connected to the first input terminal of the same first driving module. The setting pins of each second driving module are connected to the second input terminal of the same second driving module. Each first driving module determines that it is classified as the first type of driving module when it confirms that its setting pin is connected to its first input terminal. When each second driving module confirms that its setting pin is connected to its second input terminal, it determines that it is classified as the second type of driving module.

In one embodiment, each driver module decides whether to use the first input pin or the second input pin received by the first input pin or the second input pin according to the priority order and availability status of the first input pin and the second input pin. signal to output the next signal to the next-level drive module.

In one embodiment, the signal received by each driving module has a header and a plurality of driving data, and when each driver module confirms that the received signal has a header and the header matches a preset header, the signal from the received The signal fetches one of the driving data, and outputs a light-emitting driving signal to a light-emitting circuit according to the fetched driving data, so as to drive the light-emitting circuit to emit light.

In one embodiment, the signal received by each driving module has a plurality of type identification codes. Each first drive module and each second drive module extracts the corresponding category identification code when extracting the drive data from the received signal, and when the extracted category identification code is a first default identification code, it is determined that it is classified as The driver module of the first type is determined to be classified as the driver module of the second type when the extracted category identification code is a second default identification code.

In one embodiment, before the driving modules of each level output the signal to the next-level driving module, the waveform of the signal is inverted to form an inverted output signal, and then the inverted output signal is output to the next-level driving module.

In one embodiment, the driving modules of each level receive the inverted output signal, and then take the driving data from the inverted output signal.

In one embodiment, each drive data has multiple bit values. Each bit has a value of 0 or 1. Multiple pulse waves in the signal received by each driving module respectively represent multiple bit values. A pulse representing a bit value of 0 has a different width than a pulse representing a bit value of 1. Each first driving module and each second driving module decodes the driving data to be fetched according to the pulse width.

In one embodiment, there is a pulse representing a dummy bit between two pulses of every two driving data of the signal received by each driving module.

In one embodiment, the setting pins of each first driving module are coupled to the first reference potential, the setting pins of each second driving module are coupled to the second reference potential, and each first driving module confirms its own setting When the pin is coupled to the first reference voltage, it is determined that it is classified as the first type of drive module, and when each second drive module confirms that its set pin is coupled to the second reference potential, it is determined that it is classified as the second type Driver module.

As mentioned above, the present invention provides a cascaded drive system that can prevent interleaving of wires, and a plurality of drive modules are divided into two types, A and B, wherein both types of A and B drive modules have at least two inputs. In addition to the first class A module, the first input port of each class A module is connected to the output port of the previous class B module, and the second input port of each class A module The terminal is connected to the second input terminal of the previous class B module; the first input terminal of each class B module is connected to the first input terminal of the previous class A module, and the second input terminal of each class B module The terminal is connected to the output terminal of the previous class A module, so as to solve the problem of interleaved wiring between the driving modules, avoid signal interference and improve system stability, and reduce wiring board layers to reduce costs.

In order to further understand the features and technical content of the present invention, please refer to the following detailed description and drawings related to the present invention. However, the provided drawings are only for reference and description, and are not intended to limit the present invention.

The implementation of the present invention is described below through specific specific examples, and those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only for simple illustration, and are not drawn according to the actual size, which is stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the protection scope of the present invention. In addition, the term "or" used herein may include any one or a combination of more of the associated listed items depending on the actual situation.

Please refer to FIG. 1 , which is a circuit block diagram of a cascaded driving system capable of preventing wire interleaving according to a first embodiment of the present invention.

The cascaded drive system of the present invention includes multiple drive modules. In this embodiment, the cascaded driving system is divided into two types of groups, the first type (or called A type group) has a plurality of first drive modules A11, A13, A15, and the second type (or called B type) group) has a plurality of second driving modules B12, B14, B16, which is only an example here, and the present invention is not limited thereto. In practice, more or fewer drive modules can be added, and multiple drive modules can be divided into more categories. Driver modules of different categories are interleaved with each other.

Each first driving module A11, A13, A15 has a first driving circuit inside. Each second driving module B12, B14, B16 has a second driving circuit inside. In this embodiment, the second driving circuit is the same as the first driving circuit, but the invention is not limited thereto. In practice, the first driving modules A11 , A13 , A15 and the second driving modules B12 , B14 , B16 may also have different driving circuits.

The plurality of first driving modules A11 , A13 , A15 and the plurality of second driving modules B12 , B14 , B16 are alternately arranged. The first driving modules A11 , A13 , A15 and the second driving modules B12 , B14 , B16 are divided into different levels according to the arrangement order.

For the convenience of description, the first driving module A11 is defined as a first-level driving module and belongs to the first level. The second driving module B12 is defined as a second-level driving module, which is the next level of the first-level driving module. The first driving module A13 is a third-level driving module, which is the next level of the second driving module B12. The other first driving modules A11 , A13 , A15 and the second driving modules B12 , B14 , B16 are graded sequentially in the same manner.

The first input terminal in1 of the second driving module B12 is connected to the first input terminal in1 of the first driving module A11 of the previous stage. The second input terminal in2 of the second driving module B12 is connected to the output terminal out of the first driving module A11 of the previous stage.

The first input terminal in1 of the first driving module A13 is connected to the output terminal out of the second driving module B12 of the previous stage. The second input terminal in2 of the first driving module A13 is connected to the second input terminal in2 of the second driving module B12 of the previous stage.

The first input terminal in1 of the second driving module B14 is connected to the first input terminal in1 of the first driving module A13 of the previous stage. The second input terminal in2 of the second driving module B14 is connected to the output terminal out of the first driving module A13 of the previous stage.

The first input terminal in1 of the first driving module A15 is connected to the output terminal out of the second driving module B14 of the previous stage. The second input terminal in2 of the first driving module A15 is connected to the second input terminal in2 of the second driving module B14 of the previous stage.

The first input terminal in1 of the second driving module B16 is connected to the first input terminal in1 of the first driving module A15 of the previous stage. The second input terminal in2 of the second driving module B16 is connected to the output terminal out of the first driving module A15 of the previous stage.

Please refer to FIG. 2 , which is a circuit block diagram of a cascaded driving system capable of preventing wire crossing according to a second embodiment of the present invention.

The set pins of each of the first driving modules A11, A13, A15 are floating. The setting pins set of the second driving modules B12 , B14 , B16 are coupled to a reference potential such as but not limited to the power supply potential VDD, which can be zero potential or ground in practice. In this case, each first driver module A11 , A13 , A15 can determine that it is classified as the first type of driver module when it confirms that its setting pin set is open. Each second driving module B12 , B14 , B16 determines that it is classified as the second type of driving module when it confirms that its setting pin set is coupled to the reference potential.

In practice, contrary to the above example, the setting pin set of each first driving module can be replaced by coupling to a reference potential such as power supply potential VDD, zero potential or ground, and each second driving module can be replaced by an open connection. In this case, each first driving module A11 , A13 , A15 determines that it is classified as the first type of driving module when it confirms that its setting pin set is coupled to the reference potential. When each second driving module B12, B14, B16 confirms that its setting pin set is open, it can determine that it is classified as the second type of driving module.

Or, in practice, the setting pin set of each first driving module A11, A13, A15 can be coupled to the first reference potential, and the setting pin set of each second driving module B12, B14, B16 can be coupled to the first reference potential. Two reference potentials. In this case, each first driving module A11 , A13 , A15 determines that it is classified as the first type of driving module when it confirms that its setting pin set is coupled to the first reference voltage. When each second driving module B12, B14, B16 confirms that its setting pin set is coupled to the second reference potential, it determines that it is classified as the second type of driving module.

Please refer to FIG. 3 , which is a circuit block diagram of a cascaded driving system capable of preventing wire crossing according to a third embodiment of the present invention.

The setting pin set of each first driving module A11 , A13 , A15 is connected to the first input terminal in1 of the same first driving module A11 , A13 , A15 . The setting pin set of each second driving module B12, B14, B16 is connected to the second input terminal in2 of the same second driving module B12, B14, B16.

In this case, each first driver module A11 , A13 , A15 determines that it is classified as a first-type driver module when it confirms that its setting pin set is connected to its first input terminal in1 . Each second driving module B12 , B14 , B16 determines that it is classified as the second type of driving module when it confirms that its setting pin set is connected to its second input terminal in2 .

In practice, contrary to the above example, the setting pin set of each first driving module A11, A13, A15 is connected to the second input terminal in2 of the same first driving module A11, A13, A15. The setting pin set of each second driving module B12, B14, B16 is connected to the first input terminal in1 of the same second driving module B12, B14, B16.

In this case, each first driving module A11 , A13 , A15 determines that it is classified as the first type of driving module when it confirms that its setting pin set is connected to its second input terminal in2 . Each second driving module B12 , B14 , B16 determines that it is classified as the second type of driving module when it confirms that its setting pin set is connected to its first input terminal in1 .

Please refer to FIG. 4 , which is a schematic diagram of driving data of a cascaded driving system capable of preventing wire crossing according to a fourth embodiment of the present invention.

The aforementioned transmission methods of the driving data of the first driving modules A11 , A13 , A15 and the plurality of second driving modules B12 , B14 , B16 are illustrated as follows.

Firstly, the first input terminal in1 of the first driving module A11 (ie, the first level driving module) can be connected to an external signal generating circuit. The first input terminal in1 of the first driving module A11 can receive an initial input signal SIN from an external signal generating circuit.

The initial input signal SIN may have a header HD and a plurality of driving data D1˜D6. When the first driving module A11 confirms that the initial input signal SIN does not have header HD or the header HD does not conform to the default header, it determines that the initial input signal SIN is invalid, and does not extract data from the initial input signal SIN at this time.

On the contrary, when the first driving module A11 confirms that the initial input signal SIN has a header HD and the header matches the preset header, it determines that the initial input signal SIN is valid. The other first driving modules A13, A15 and the second driving modules B12, B14, B16 will also confirm that the received signal is valid before performing follow-up operations according to the valid signal.

The first driving module A11 fetches the first driving data D1 from the plurality of driving data D1˜D6 of the effective initial input signal SIN. The first driving module A11 can generate a first light-emitting driving signal according to the fetched first driving data D1. A control output pin of the first driving module A11 can output the first light-emitting driving signal to the first light-emitting circuit to drive the first light-emitting circuit to emit light.

For example, the first driving module A11 may have three control output pins, respectively connected to a plurality of light emitting elements of the first light emitting circuit. These light emitting elements can emit the same or different colors of light, such as but not limited to red light, green light, and blue light respectively. Each light-emitting element may include one or more sub-light-emitting elements such as light-emitting diodes.

The first drive module A11 can output the first light-emitting drive signals with the same or different indications to the multiple light-emitting elements respectively according to the bit value of the first drive data D1 taken away, so as to control the multiple light-emitting elements to operate at the same or different levels. At the time point, emit light with the same frequency, gray scale/brightness, and light emitting method.

Further, the output terminal of the first driving module A11 can output the first output signal SOT1 according to the initial input signal SIN from which the first driving data D1 has been taken away.

The first input terminal in1 of the second driving module B12 (ie, the second-stage driving module) receives the initial input signal SIN from the first input terminal in1 of the first driving module A11 of the previous stage. The second input terminal in2 of the second-stage driving module B12 receives the first output signal SOT1 from the output terminal out of the previous-stage first driving module A11.

The second drive module B12 takes the initial input signal SIN or the first output signal SOT1 from the initial input signal SIN or the first output signal SOT1 based on the usable status (that is, normal or damaged status) and the priority order of the first input terminal in1 and the second input terminal in2. The second driving data D2.

The second driving module B12 can be connected to the second light emitting circuit, and output a corresponding second light emitting driving signal to the second light emitting circuit according to the bit value of the second driving data D2, so as to drive the second light emitting circuit to emit light. The second lighting circuit may have the same circuit configuration as the aforementioned first lighting circuit. The second driving module B12 can output the second output signal SOT2 that has taken the first driving data D1 and the second driving data D2 according to the selected initial input signal SIN or the first output signal SOT1 .

Assume that the priority order of the second input terminal in2 of the second driving module B12, B14, B16 is higher than that of the first input terminal in1 of the same second driving module B12, B14, B16 . In this case, when the second drive module B12 confirms that both the first input terminal in1 and the second input terminal in2 are not damaged or in a normal state, the second drive module B12 uses the second input terminal with a higher priority The first output signal SOT1 of the terminal in2 is used to output the second output signal SOT2.

However, when the second driving module B12 confirms that one of the first input terminal in1 and the second input terminal in2 is damaged but the other is not damaged, the initial input of the undamaged first input terminal in1 is obtained. The signal SIN or the first output signal SOT1 of the undamaged second input terminal in2 is used to output the second output signal SOT2.

The first input terminal in1 of the first driving module A13 (ie, the third-level driving module) receives the second output signal SOT2 from the output terminal out of the second driving module B12 of the upper level. The second input terminal in2 of the first driving module A13 receives the first output signal SOT1 from the second input terminal in2 of the second driving module B12.

The first drive module A13 can take the third drive data D3 from the first output signal SOT1 or the second output signal SOT2 based on the available status and priority order of the first input terminal in1 and the second input terminal in2. . The first driving module A13 can output a third light-emitting driving signal according to the bit value of the third driving data D3 for driving the third light-emitting circuit.

The first driving module A13 can output the third output signal SOT3 that has taken the first driving data D1, the second driving data D2 and the third driving data D3 according to the selected first output signal SOT1 or the second output signal SOT2 .

The other second driving module B14 , the first driving module A15 and the second driving module B16 can be deduced in the same manner as above.

In addition to the classification methods of different clusters exemplified in the second and third embodiments, other methods may also be used. For example, the initial input data SIN may have multiple category identification codes. When each of the first driving modules A11, A13, A15 and each of the second driving modules B12, B14, B16 obtains the driving data from the received signal, it extracts the type identification code contained in or corresponding to the driving data.

When each of the first driver modules A11, A13, A15 confirms that the extracted type identification code is the first preset identification code, it determines that it is classified as the first type of driver module. When each of the second drive modules B12, B14, and B16 confirms that the extracted category identification code is the second preset identification code, they determine and confirm that they are classified as the second type of drive module. For example, one of the first default identification code and the second default identification code is 1, and the other is 0. This is only an example and the present invention is not limited thereto.

Please refer to FIG. 5 and FIG. 6 together, wherein FIG. 6 is a signal waveform diagram of the second driving data of the cascaded driving system capable of preventing wire crossing according to the fifth embodiment of the present invention.

In this embodiment, for example, the above-mentioned initial input data SIN may have an initial driving signal WD, and the initial driving signal WD may have a plurality of pulses representing a plurality of bit values of a plurality of driving data respectively.

For example, the header HD of the initial driving signal WD is at a high (voltage) level, but it can actually be at a low level. The initial driving signal WD has a plurality of driving data, and each driving data can be a bit string composed of a plurality of bit values, and each bit value is 0 or 1. Whether the bit value is 0 or 1, it is represented by the pulse wave of the high level of the initial driving signal WD. Therefore, the first type of driving module (group A) and the second type of driving module (group B) can decode the fetched driving data according to the pulse width.

In this embodiment, the plurality of pulse waves representing a bit value of 0 respectively have a first pulse width w0. The plurality of pulses representing a bit value of 1 respectively have a second pulse width w1. For example, the first driving data D1 of the initial driving signal WD has a bit value of “0110”, and the second driving data D2 of the initial driving signal WD has a bit value of “1000”.

In this embodiment, the second pulse width w1 is greater than the first pulse width w0 , but in practice, the first pulse width w0 may be greater than the second pulse width w1 . The time of each of the first pulse width w0 and the second pulse width w1 is less than a cycle time T.

After the bit value of the first driving data D1 of the initial driving signal WD shown in FIG. 5 is fetched by the aforementioned first driving module A11 , the first output signal SOT1 shown in FIG. 6 is formed. After the driving data such as the first driving data D1 is taken away, the (voltage) level of the first driving data D1 is originally stored in a cycle time T of the pulse wave is 0, and the (voltage) level of the header remains at 1 .

Please refer to FIG. 7 , which is a signal waveform diagram of adding dummy bits between the driving data of the cascaded driving system capable of preventing wire interleaving according to the sixth embodiment of the present invention.

In order to allow the driver module to identify different pieces of driving data when extracting a specific piece of driving data, a table dummy bit (dummy bit) can be set between every two driving data, for example, as shown in FIG. 7 in the initial input signal SIN There is a dummy bit DU between the first driving data D1 and the second driving data D2. The dummy bit DU has a third pulse width w2, which may be different from the first pulse width w0 and the second pulse width w1.

Please refer to FIG. 8 , which is a schematic diagram of the inverted signal waveform of the driving data of the cascaded driving system capable of preventing wire crossing according to the seventh embodiment of the present invention.

Before the aforementioned first-level driving module A11 outputs the first output signal SOT1 to the second-level driving module B12, the waveform of the first output signal SOT1 can be inverted to form the first inverted output signal SOT1R. By performing this inversion operation, the problem of signal distortion can be corrected.

The second input terminal of the aforementioned second-level driving module B12 can receive the first inverted output signal SOT1R from the first-level driving module A11. The second-level driving module B12 can obtain the second driving data D2 from the first inverted output signal SOT1R.

To sum up, the present invention provides a cascaded drive system that can prevent interleaving of wires. It separates a plurality of drive modules into two types, A and B, wherein both types of A and B drive modules have at least two inputs. In addition to the first class A module, the first input port of each class A module is connected to the output port of the previous class B module, and the second input port of each class A module The terminal is connected to the second input terminal of the previous class B module; the first input terminal of each class B module is connected to the first input terminal of the previous class A module, and the second input terminal of each class B module The terminal is connected to the output terminal of the previous class A module, so as to solve the problem of interleaved wiring between the driving modules, avoid signal interference and improve system stability, and reduce wiring board layers to reduce costs.

The content disclosed above is only a preferred feasible embodiment of the present invention, and does not therefore limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made by using the description and drawings of the present invention are included in the application of the present invention. within the scope of the patent.

A11, A13, A15: the first drive module B12, B14, B16: Second drive module in1: first input terminal in2: the second input terminal out: output terminal set: setting terminal VDD: power supply potential SIN: initial input signal HD: header D1: First drive data D2: Second drive data D3: The third driving data D4: The fourth driving data D5: Fifth drive data D6: Sixth drive data SOT1: the first output signal SOT2: Second output signal SOT3: The third output signal SOT4: The fourth output signal SOT5: Fifth output signal SOT6: The sixth output signal 0, 1: bit value WD, WD1, WDU: initial drive signal T, TU: one cycle time w0: first pulse width w1: second pulse width w2: third pulse width DU: Dummy bit SOT1R: the first inverted output signal

FIG. 1 is a circuit block diagram of a cascaded drive system capable of preventing wire crossing according to a first embodiment of the present invention.

FIG. 2 is a circuit block diagram of a cascaded driving system capable of preventing wire crossing according to a second embodiment of the present invention.

FIG. 3 is a circuit block diagram of a cascaded driving system capable of preventing wire crossing according to a third embodiment of the present invention.

FIG. 4 is a schematic diagram of driving data of a cascaded driving system capable of preventing wire interleaving according to a fourth embodiment of the present invention.

FIG. 5 is a signal waveform diagram of the first and second driving data of the cascaded driving system capable of preventing wire crossing according to the fifth embodiment of the present invention.

FIG. 6 is a signal waveform diagram of the second driving data of the cascaded driving system capable of preventing wire crossing according to the fifth embodiment of the present invention.

FIG. 7 is a signal waveform diagram of a dummy bit added between driving data of a cascaded driving system capable of preventing wire interleaving according to a sixth embodiment of the present invention.

FIG. 8 is a schematic diagram of an inverted signal waveform of driving data of a cascaded driving system capable of preventing interleaved wires according to a seventh embodiment of the present invention.

A11, A13, A15: the first drive module B12, B14, B16: Second drive module in1: first input terminal in2: the second input terminal out: output terminal

Claims (11)

A cascaded driving system capable of preventing wire interleaving, comprising: a plurality of driving modules, including: a plurality of first driving modules, wherein one of the first driving modules is defined as a first-level driving module; and a plurality of A second driving module, wherein one of the second driving modules is defined as a second-level driving module; wherein, the plurality of first driving modules and the plurality of second driving modules are arranged alternately and sequentially Divided into different levels, wherein the first-level drive module belongs to the first level, and the second-level drive module is the next level of the first-level drive module and belongs to the second level; wherein, the first-level drive module The first input end of the second-level drive module is connected to the first input end of the second-level drive module, and the output end of the first-level drive module is connected to the second input end of the second-level drive module; The first input end of the module is connected to the first input end of the first driving module of the previous stage, and the second input end of each second driving module is connected to the output end of the first driving module of the previous stage; wherein , except for the first-level drive module, the first input terminals of each of the first drive modules are connected to the output terminals of the second drive module of the previous stage, and the second input terminals of each of the first drive modules Connect to the second input end of the second drive module of the previous stage. The cascaded drive system capable of preventing wire interleaving as described in claim 1, wherein the setting pins of each first driving module are connected to the ground, and the setting pins of each second driving module are coupled to a reference potential, When each of the first driving modules confirms that its own setting pin is open, it determines that it is classified as the first type of driving module; when each of the second driving modules confirms that its own setting pin is coupled to the reference potential, The determination itself is classified as a second type of driver module. The cascaded driving system capable of preventing wire crossing as described in claim 1, wherein the setting pins of each first driving module are connected to the first input terminal of the same first driving module, and each of the second driving modules The setting pin of the module is connected to the second input terminal of the same second driving module, and when each first driving module confirms that its setting pin is connected to its first input terminal, it is determined that it is classified as the first A type of driving module, when each second driving module confirms that its setting pin is connected to its second input terminal, it is determined that it is classified as the second type of driving module. The cascaded drive system capable of preventing wire interleaving as described in request item 1, wherein each drive module determines the basis of The signal received by the first input pin or the second pin is used to output the next signal to the driving module of the next stage. In the cascaded driving system capable of preventing wire crossing as described in claim 4, each of the signals received by the driving modules has a header and a plurality of driving data, and each of the driving modules confirms that the received signals have the Header and when the header matches a preset header, take one of the driving data from the received signal, and output a light-emitting driving signal to a light-emitting circuit according to the taken-out driving data to drive the light-emitting The circuit glows. The cascaded driving system capable of preventing wire crossing as described in claim 5, wherein the signals received by each of the driving modules have a plurality of category identification codes, each of the first driving modules and each of the second driving modules When extracting the driving data from the received signal, extracting the corresponding category identification code, when the extracted category identification code is a first preset identification code, it is determined that the driver module itself is classified as the first type of driving module, and the extracted When the type identification code is a second default identification code, it is determined that the self is classified as the second type of drive module. The cascaded drive system capable of preventing wire crossing as described in request item 4, wherein the drive module at each level outputs the signal to the drive module at the next level before outputting the signal The waveform of the signal is inverted to form an inverted output signal, and then the inverted output signal is output to the driving module of the next stage. The cascaded drive system capable of preventing wire crossing as described in claim 7, wherein the drive modules at each level receive the inverted output signal, and take one of the drive data from the inverted output signal. Driver data. The cascaded driving system capable of preventing wire crossing as described in claim 5, wherein each of the driving data has a plurality of bit values, and each of the bit values is 0 or 1, and each of the signals received by the driving modules The plurality of pulse waves respectively represent the plurality of bit values, the width of the pulse wave representing the bit value 0 is different from the width of the pulse wave representing the bit value 1, each of the first driving module and each of the first driving modules The second driving module decodes the driving data to be fetched according to the width of the pulse wave. The cascaded drive system capable of preventing wire interleaving as described in claim 1, wherein each of the multiple drive data of the signal received by each drive module is between two pulses of each two drive data. There is a pulse representing a dummy bit. The cascaded drive system capable of preventing wire crossing as described in claim 1, wherein the setting pins of each of the first driving modules are coupled to a first reference potential, and the setting pins of each of the second driving modules are coupled to Connected to a second reference potential, each of the first driving modules confirms that when its setting pin is coupled to the first reference voltage, it is determined that it is classified as the first type of driving module, and each of the second driving modules confirms itself When the set pin is coupled to the second reference potential, it is determined that it is classified as the second type of driving module.

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