TWI777604B - Pixel array and formation method thereof, metal mask and formation method thereof - Google Patents
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
- H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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- H10K71/164—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using vacuum deposition
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- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
- H10K71/166—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask
Abstract
Description
本發明是有關於一種畫素陣列及其製作方法且有關於一種金屬光罩及其製作方法。The present invention relates to a pixel array and a manufacturing method thereof, and relates to a metal mask and a manufacturing method thereof.
主動矩陣有機發光二極體(active matrix organic light-emitting diode;AMOLED)是顯示器技術發展的重點項目之一,目前製作方法中,可利用蒸鍍的方式將有機發光材料鍍覆在陣列基板上,並透過金屬光罩讓有機發光材料蒸鍍在正確的位置。Active matrix organic light-emitting diode (AMOLED) is one of the key projects in the development of display technology. In the current production method, the organic light-emitting material can be deposited on the array substrate by vapor deposition. And through the metal mask, the organic light-emitting material is evaporated in the correct position.
金屬光罩的製作需要使用蝕刻的方式,例如會利用到二次蝕刻來製作開口。為了因應高解析度的產品,開口的密度需要提升。然而,開口間距離越來越短,容易在蝕刻時導致相鄰的開口連通,降低了金屬光罩的良率。因此,如何提高其良率並兼顧高解析度需求,將是本領域相關技術人員重要的課題。The fabrication of the metal mask requires etching, for example, secondary etching is used to create openings. In order to cope with high-resolution products, the density of the openings needs to be increased. However, the distance between the openings is getting shorter and shorter, which is easy to cause the adjacent openings to be connected during etching, which reduces the yield of the metal mask. Therefore, how to improve the yield and take into account the high-resolution requirement will be an important issue for those skilled in the art.
本發明提供一種畫素陣列及其製作方法且提供一種金屬光罩及其製作方法,可製作高解析度產品。The present invention provides a pixel array and a manufacturing method thereof, as well as a metal mask and a manufacturing method thereof, which can manufacture high-resolution products.
本發明一實施例的畫素陣列,包括基板、多個第一發光材料、多個第二發光材料、多個第三發光材料及多個第四發光材料。第一發光材料位於基板上。第二發光材料位於基板上。第二發光材料的顏色和第一發光材料的顏色相同,第一發光材料和第二發光材料在一方向上交替地以第一間距及第二間距排列,第一間距不等於第二間距。第三發光材料位於基板上,第三發光材料的顏色不同於第一及第二發光材料的顏色。第四發光材料位於基板上,第四發光材料的顏色不同於第一、第二、第三發光材料的顏色。A pixel array according to an embodiment of the present invention includes a substrate, a plurality of first light-emitting materials, a plurality of second light-emitting materials, a plurality of third light-emitting materials, and a plurality of fourth light-emitting materials. The first luminescent material is on the substrate. The second luminescent material is on the substrate. The color of the second luminescent material is the same as the color of the first luminescent material, the first luminescent material and the second luminescent material are alternately arranged in a direction with a first pitch and a second pitch, and the first pitch is not equal to the second pitch. The third luminescent material is located on the substrate, and the color of the third luminescent material is different from the colors of the first and second luminescent materials. The fourth luminescent material is located on the substrate, and the color of the fourth luminescent material is different from the colors of the first, second and third luminescent materials.
本發明一實施例的畫素陣列的製作方法,包括以下步驟。提供基板,基板包括多個底電極。利用第一金屬光罩,於底電極的第一區上形成多個第一發光材料。形成第一發光材料後,於底電極的第二區上形成多個第二發光材料,第二發光材料的其中之一位於第一發光材料之間,第二發光材料的顏色和第一發光材料的顏色相同。形成多個頂電極於第一發光材料及第二發光材料上。A method for fabricating a pixel array according to an embodiment of the present invention includes the following steps. A substrate is provided that includes a plurality of bottom electrodes. Using the first metal mask, a plurality of first light emitting materials are formed on the first region of the bottom electrode. After the first light-emitting material is formed, a plurality of second light-emitting materials are formed on the second region of the bottom electrode, one of the second light-emitting materials is located between the first light-emitting materials, and the color of the second light-emitting material is the same as that of the first light-emitting material. of the same color. A plurality of top electrodes are formed on the first light-emitting material and the second light-emitting material.
本發明一實施例的金屬光罩的製作方法,包括以下步驟。以第一光阻圖案為罩幕,蝕刻金屬基板,以於金屬基板的第一表面形成多個第一凹槽。在第一凹槽內填入有機材料。以第二光阻圖案為罩幕,蝕刻金屬基板,以於金屬基板的第二表面形成多個第二凹槽,第一表面與第二表面相對。移除有機材料,使各第一凹槽分別與各第二凹槽相連通以形成多個開口,開口互相錯位。A method for fabricating a metal mask according to an embodiment of the present invention includes the following steps. Using the first photoresist pattern as a mask, the metal substrate is etched to form a plurality of first grooves on the first surface of the metal substrate. An organic material is filled in the first groove. Using the second photoresist pattern as a mask, the metal substrate is etched to form a plurality of second grooves on the second surface of the metal substrate, and the first surface is opposite to the second surface. The organic material is removed, and each of the first grooves is communicated with each of the second grooves to form a plurality of openings, and the openings are displaced from each other.
本發明一實施例的金屬光罩,包括第一表面及第二表面。第一表面具有多個第一凹槽。第二表面與第一表面相對且具有多個第二凹槽,各第一凹槽與各第二凹槽相連通以形成多個開口,各第二凹槽的寬度不等於各第一凹槽的寬度,開口互相錯位。A metal mask according to an embodiment of the present invention includes a first surface and a second surface. The first surface has a plurality of first grooves. The second surface is opposite to the first surface and has a plurality of second grooves, each of the first grooves communicates with each of the second grooves to form a plurality of openings, and the width of each second groove is not equal to that of each first groove width, the openings are misaligned with each other.
基於上述,在本發明一實施例的畫素陣列及其製作方法中,形成第一發光材料後,於底電極的第二區上形成多個第二發光材料,第二發光材料的其中之一位於第一發光材料之間,第二發光材料的顏色和第一發光材料的顏色相同,可製作高解析度的畫素陣列。Based on the above, in the pixel array and the manufacturing method thereof according to an embodiment of the present invention, after the first luminescent material is formed, a plurality of second luminescent materials are formed on the second region of the bottom electrode, and one of the second luminescent materials is formed. Located between the first light-emitting materials, the color of the second light-emitting material is the same as that of the first light-emitting material, and a high-resolution pixel array can be fabricated.
基於上述,在本發明一實施例的金屬光罩及其製作方法中,由於金屬光罩的第一開口錯位排列,使金屬光罩具有提升的良率。Based on the above, in the metal mask and the manufacturing method thereof according to an embodiment of the present invention, due to the dislocation arrangement of the first openings of the metal mask, the metal mask has an improved yield.
第1圖是依照本發明一實施例的畫素陣列10的製作方法的流程的上視示意圖,第2圖是沿著第1圖的剖線A-A’的剖面示意圖,第3圖是沿著第1圖的剖線B-B’的剖面示意圖,第4圖是依照本發明一實施例的畫素陣列10的製作方法的流程的剖面示意圖。請參照第1圖、第2圖、第3圖及第4圖,首先,提供基板100,基板100包括多個底電極102。舉例而言,基板100還包括基底SB及主動元件T。主動元件T位於基底SB上且包括通道層CH、閘極G、源極S與汲極D。閘極G重疊於通道層CH,且閘極G與通道層CH之間夾有閘絕緣層GI。源極S與汲極D位於通道層CH上,且電性連接至通道層CH。FIG. 1 is a schematic top view of a process flow of a method for fabricating a
在本實施例中,主動元件T是以底部閘極型的薄膜電晶體為例,但本發明不以此為限。於其他實施例中,主動元件T也可以是頂部閘極型薄膜電晶體。In this embodiment, the active element T is a bottom gate type thin film transistor as an example, but the invention is not limited to this. In other embodiments, the active element T may also be a top gate type thin film transistor.
絕緣層104位於主動元件T上,換言之,絕緣層104位於閘絕緣層GI、源極S與汲極D上。底電極102位於絕緣層104上。畫素定義層PDL位於絕緣層104上,且具有開口OP,開口OP重疊於底電極102。底電極102貫穿絕緣層104以電性連接主動元件T的汲極D。The
為了方便說明,第1圖中繪示了第一方向d1及第二方向d2,第一方向d1和第二方向d2相交。舉例而言,第一方向d1為橫向方向,第二方向d2為縱向方向,且第一方向d1和第二方向d2互相垂直。然而,本發明不限於此。For the convenience of description, FIG. 1 shows the first direction d1 and the second direction d2, and the first direction d1 and the second direction d2 intersect. For example, the first direction d1 is a transverse direction, the second direction d2 is a longitudinal direction, and the first direction d1 and the second direction d2 are perpendicular to each other. However, the present invention is not limited to this.
第5圖是第一金屬光罩106的上視示意圖,請一併參照第3圖、第4圖及第5圖,利用第一金屬光罩106,於底電極102的第一區102A上形成多個第一發光材料E1。為了方便說明,第4圖中省略繪示底電極102。第一金屬光罩106具有多個第一開口106a,第一開口106a互相錯位。於本實施例中,進行第一次蒸鍍步驟1000,以形成第一發光材料E1。換言之,蒸鍍源108沿著路徑P1移動,可利用蒸鍍源108於第一開口106a的位置進行第一發光材料E1的蒸鍍。FIG. 5 is a schematic top view of the
請回到第1圖及第2圖,於一實施例中,於底電極102上形成多個第三發光材料E3及多個第四發光材料E4,第三及第四發光材料E3、E4的顏色不同。第三發光材料E3與第四發光材料E4交錯配置。然而,本發明不限於此。Please go back to FIG. 1 and FIG. 2, in one embodiment, a plurality of third light-emitting materials E3 and a plurality of fourth light-emitting materials E4 are formed on the
第6圖是依照本發明一實施例的畫素陣列10的製作方法的流程的上視示意圖,第7圖是沿著第6圖的剖線C-C’的剖面示意圖,第8圖是依照本發明一實施例的畫素陣列10的製作方法的流程的剖面示意圖,為了方便說明,第4圖中省略繪示底電極102。接著,請參照第6圖、第7圖及第8圖,形成第一發光材料E1後,於底電極102的第二區102B上形成多個第二發光材料E2,換言之,進行第二次蒸鍍步驟1002,以形成第二發光材料E2。於本實施例中,第二發光材料E2是利用第一金屬光罩106所形成。舉例而言,可移動第一金屬光罩106,使第一開口106a重疊於底電極102的第二區102B。接著,使蒸鍍源108沿著路徑P2移動,利用蒸鍍源108於第一開口106a的位置進行第二發光材料E2的蒸鍍。第二發光材料E2的其中之一位於第一發光材料E1之間,第二發光材料E2的顏色和第一發光材料E1的顏色相同。於本實施例中,進行第一次蒸鍍步驟1000,以形成第一發光材料E1。並且,進行第二次蒸鍍步驟1002,以形成第二發光材料E2。藉由相異的蒸鍍步驟來分別形成第一發光材料E1及第二發光材料E2,可製作高解析度的畫素陣列10。FIG. 6 is a schematic top view of a process flow of a manufacturing method of a
請回到第5圖,由於第一金屬光罩106的第一開口106a錯位排列,可增加第一開口106a的間距S1。換言之,第一開口106a之間的最小距離增加。藉此,第一金屬光罩106具有提升的良率。Returning to FIG. 5 , since the
第9圖是依照本發明一實施例的畫素陣列10的製作方法的流程的剖面示意圖,請參照第9圖,形成多個頂電極110於第一發光材料E1及第二發光材料E2上,使底電極102、第一發光材料E1及頂電極110共同構成發光單元112,並且使底電極102、第二發光材料E2及頂電極110共同構成發光單元114。如前所述,第二發光材料E2的顏色和第一發光材料E1的顏色相同,因此,發光單元112、114發出相同顏色的光。於一實施例中,頂電極110還形成於第三發光材料E3及第四發光材料E4上(未示)。FIG. 9 is a schematic cross-sectional view of a process flow of a method for fabricating a
於其他實施例中,第二發光材料E2和第一發光材料E1是透過相異的金屬光罩所形成,舉例而言,第10圖是依照本發明一實施例的第二金屬光罩116的上視示意圖,第11圖是依照本發明另一實施例的畫素陣列10a的製作方法的剖面示意圖。請一併參照第10圖及第11圖,第二發光材料E2是利用第二金屬光罩116所形成,第二金屬光罩116具有多個第二開口116a,第二開口116a互相錯位,第二開口116a的排列方式和第一開口106a的排列方式不同。於本實施例中,利用第一金屬光罩106進行第一次蒸鍍步驟1000(見第4圖),以形成第一發光材料E1。接著,利用第二金屬光罩116進行第二次蒸鍍步驟1002a,以形成第二發光材料E2。藉由相異的蒸鍍步驟來分別形成第一發光材料E1及第二發光材料E2,可製作高解析度的畫素陣列10a。
In other embodiments, the second luminescent material E2 and the first luminescent material E1 are formed through different metal masks. For example, FIG. 10 shows the
請回到第6圖,畫素陣列10包括基板100、多個第一發光材料E1、多個第二發光材料E2、多個第三發光材料E3及多個第四發光材料E4。第一發光材料E1、第二發光材料E2、第三發光材料E3及第四發光材料E4位於基板100上。第二發光材料E2的顏色和第一發光材料E1的顏色相同,第一發光材料E1和第二發光材料E2在一方向上交替地以第一間距a1及第二間距a2排列。舉例而言,第一發光材料E1和第二發光材料E2在第一方向d1上交替地以第一間距a1及第二間距a2排列。換言之,第二發光材料E2在第一方向d1上與兩個第一發光材料E1相鄰,第二發光材料E2和與其相鄰之第一發光材料E1的其中之一在第一方向d1上具有第一間距a1,並和與其相鄰之第一發光材料E1的其中另一在第一方向d1上具有第二間距a2。
Returning to FIG. 6 , the
進一步參考圖6,其中的第三發光材料E3與第四發光材料E4在第二方向d2上,交替排成多個行,且每一 行中的第三發光材料E3與第四發光材料E4彼此相連。除此之外,每一個第一發光材料E1位在相鄰兩行的第三發光材料E3與第四發光材料E4之間,且每一個第二發光材料E2位在相鄰兩行的第三發光材料E3與第四發光材料E4之間。 Referring further to FIG. 6, the third luminescent material E3 and the fourth luminescent material E4 are alternately arranged in a plurality of rows in the second direction d2, and each The third luminescent material E3 and the fourth luminescent material E4 in the row are connected to each other. In addition, each first light-emitting material E1 is located between the third light-emitting material E3 and the fourth light-emitting material E4 in two adjacent rows, and each second light-emitting material E2 is located in the third light-emitting material E2 in two adjacent rows. between the luminescent material E3 and the fourth luminescent material E4.
由於是藉由相異的蒸鍍步驟來分別形成第一發光材料E1及第二發光材料E2,因此,第一間距a1不等於第二間距a2。如前所述,藉由相異的蒸鍍步驟來分別形成第一發光材料E1及第二發光材料E2,可製作高解析度的畫素陣列10,於本實施例中,第一間距a1大於第二間距a2。
Since the first luminescent material E1 and the second luminescent material E2 are respectively formed by different evaporation steps, the first spacing a1 is not equal to the second spacing a2. As mentioned above, the first luminescent material E1 and the second luminescent material E2 are respectively formed by different evaporation steps, so that a high-
於本實施例中,第一、第二、第三及第四發光材料E1、E2、E3、E4的顏色選自藍色、紅色及綠色之集合,以使畫素陣列10可顯示全彩畫面,但不以此為限。
In this embodiment, the colors of the first, second, third and fourth light-emitting materials E1, E2, E3, and E4 are selected from a set of blue, red and green, so that the
第12圖至第16圖是依照本發明一實施例的金屬光罩200的製作方法的流程的剖面示意圖。請先參照第12圖,形成第一光阻圖案204及第二光阻圖案206於金屬基板202上。接著,請參照第13圖,以第一光阻圖案204為罩幕,蝕刻金屬基板202,以於金屬基板202的第一表面202a形成多個第一凹槽R1。第一凹槽R1可用於定位接下來要形成的第二凹槽R2(見第15圖)。
FIGS. 12 to 16 are schematic cross-sectional views illustrating the flow of a method for fabricating a
請參照第14圖,在第一凹槽R1內填入有機材料208。接著,請參照第15圖,以第二光阻圖案206為罩幕,蝕刻金屬基板202,以於金屬基板202的第二表面
202b形成多個第二凹槽R2,第一表面202a與第二表面202b相對。換言之,第二表面202b具有多個第二凹槽R2。接著,請參照第16圖,移除有機材料208,使各第一凹槽R1分別與各第二凹槽R2相連通以形成多個開口210,開口210互相錯位。由於開口210互相錯位,可增加開口210的間距S2。藉此,在蝕刻金屬基板202時,可避免開口210過近造成開口210之間的第二表面202b消失,而使相鄰的開口210連通。如此一來,金屬光罩200具有提升的良率。
Referring to FIG. 14, the
於本實施例,各第二凹槽R2的寬度W2不等於各第一凹槽R1的寬度W1。舉例而言,第二凹槽R2的寬度W2大於第一凹槽R1的寬度W1。 In this embodiment, the width W2 of each of the second grooves R2 is not equal to the width W1 of each of the first grooves R1. For example, the width W2 of the second groove R2 is greater than the width W1 of the first groove R1.
綜上所述,在本發明一實施例的畫素陣列及其製作方法中,形成第一發光材料後,於底電極的第二區上形成多個第二發光材料,第二發光材料的其中之一位於第一發光材料之間,第二發光材料的顏色和第一發光材料的顏色相同,由於是藉由相異的蒸鍍步驟來分別形成第一發光材料及第二發光材料,因此,第一間距不等於第二間距。藉由相異的蒸鍍步驟來分別形成第一發光材料及第二發光材料,可製作高解析度的畫素陣列。在本發明一實施例的金屬光罩及其製作方法中,由於金屬光罩的第一開口錯位排列,可增加第一開口的間距。換言之,第一開口之間的最小距離增加。藉此,金屬光罩具有提升的良率。 To sum up, in the pixel array and the fabrication method thereof according to an embodiment of the present invention, after the first luminescent material is formed, a plurality of second luminescent materials are formed on the second region of the bottom electrode, wherein the second luminescent material is One is located between the first light-emitting materials, and the color of the second light-emitting material is the same as the color of the first light-emitting material. Since the first light-emitting material and the second light-emitting material are respectively formed by different evaporation steps, therefore, The first pitch is not equal to the second pitch. The first light-emitting material and the second light-emitting material are respectively formed by different evaporation steps, so that a high-resolution pixel array can be fabricated. In the metal mask and the manufacturing method thereof according to an embodiment of the present invention, since the first openings of the metal mask are staggered, the spacing of the first openings can be increased. In other words, the minimum distance between the first openings increases. Thereby, the metal mask has an improved yield.
10,10a:畫素陣列 10,10a: pixel array
100:基板 100: Substrate
102:底電極 102: Bottom electrode
102A:第一區 102A: District 1
102B:第二區 102B: District 2
104:絕緣層 104: Insulation layer
106:第一金屬光罩 106: First metal mask
106a:第一開口 106a: First opening
108:蒸鍍源 108: Evaporation source
110:頂電極 110: Top electrode
112,114:發光單元 112, 114: Lighting unit
116:第二金屬光罩 116: Second metal mask
116a:第二開口 116a: Second opening
200:金屬光罩 200: Metal mask
202:金屬基板 202: Metal substrate
202a:第一表面 202a: First surface
202b:第二表面 202b: Second Surface
204:第一光阻圖案 204: First photoresist pattern
206:第二光阻圖案 206: Second photoresist pattern
208:有機材料 208: Organic Materials
210:開口 210: Opening
1000:第一次蒸鍍步驟 1000: The first evaporation step
1002,1002a:第二次蒸鍍步驟 1002, 1002a: Second evaporation step
A-A’,B-B’,C-C’:剖線 A-A', B-B', C-C': section line
a1:第一間距 a1: the first spacing
a2:第二間距 a2: second spacing
CH:通道層 CH: channel layer
D:汲極 D: drain
d1:第一方向 d1: first direction
d2:第二方向 d2: the second direction
E1:第一發光材料 E1: First luminescent material
E2:第二發光材料 E2: Second luminescent material
E3:第三發光材料 E3: Third luminescent material
E4:第四發光材料 E4: Fourth luminescent material
G:閘極 G: gate
GI:閘絕緣層 GI: Gate insulating layer
OP:開口 OP: opening
P1,P2:路徑 P1,P2: Path
PDL:畫素定義層 PDL: Pixel Definition Layer
R1:第一凹槽 R1: The first groove
R2:第二凹槽 R2: Second groove
S:源極 S: source
SB:基底 SB: base
S1,S2:間距 S1, S2: Spacing
T:主動元件 T: Active element
W1,W2:寬度 W1,W2: width
閱讀以下詳細敘述並搭配對應之圖式,可了解本揭露之多個樣態。需留意的是,圖式中的多個特徵並未依照該業界領域之標準作法繪製實際比例。事實上,所述之特徵的尺寸可以任意的增加或減少以利於討論的清晰性。
第1圖是依照本發明一實施例的畫素陣列的製作方法的流程的上視示意圖。
第2圖是沿著第1圖的剖線A-A’的剖面示意圖。
第3圖是沿著第1圖的剖線B-B’的剖面示意圖。
第4圖是依照本發明一實施例的畫素陣列的製作方法的流程的剖面示意圖。
第5圖是第一金屬光罩的上視示意圖。
第6圖是依照本發明一實施例的畫素陣列的製作方法的流程的上視示意圖。
第7圖是沿著第6圖的剖線C-C’的剖面示意圖。
第8圖是依照本發明一實施例的畫素陣列的製作方法的流程的剖面示意圖。
第9圖是依照本發明一實施例的畫素陣列的製作方法的流程的剖面示意圖。
第10圖是依照本發明一實施例的第二金屬光罩的上視示意圖。
第11圖是依照本發明另一實施例的畫素陣列10a的製作方法的剖面示意圖。
第12圖至第16圖是依照本發明一實施例的金屬光罩的製作方法的流程的剖面示意圖。
Various aspects of the present disclosure can be understood by reading the following detailed description and corresponding drawings. It should be noted that various features in the drawings are not drawn to scale according to standard practice in the industry. In fact, the dimensions of the described features may be arbitrarily increased or decreased to facilitate clarity of discussion.
FIG. 1 is a schematic top view of the flow of a method for fabricating a pixel array according to an embodiment of the present invention.
Fig. 2 is a schematic cross-sectional view taken along line A-A' in Fig. 1 .
Fig. 3 is a schematic cross-sectional view taken along line B-B' in Fig. 1 .
FIG. 4 is a schematic cross-sectional view of a flow of a method for fabricating a pixel array according to an embodiment of the present invention.
FIG. 5 is a schematic top view of the first metal mask.
FIG. 6 is a schematic top view of the flow of a method for fabricating a pixel array according to an embodiment of the present invention.
Fig. 7 is a schematic cross-sectional view taken along the line C-C' in Fig. 6 .
FIG. 8 is a schematic cross-sectional view of a flow of a method for fabricating a pixel array according to an embodiment of the present invention.
FIG. 9 is a schematic cross-sectional view of a flow of a method for fabricating a pixel array according to an embodiment of the present invention.
FIG. 10 is a schematic top view of a second metal mask according to an embodiment of the present invention.
FIG. 11 is a schematic cross-sectional view of a method for fabricating a
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic storage information (please note in the order of storage institution, date and number) none Foreign deposit information (please note in the order of deposit country, institution, date and number) none
10:畫素陣列 10: Pixel array
100:基板 100: Substrate
C-C’:剖線 C-C': section line
a1:第一間距 a1: the first spacing
a2:第二間距 a2: second spacing
d1:第一方向 d1: first direction
d2:第二方向 d2: the second direction
E1:第一發光材料 E1: First luminescent material
E2:第二發光材料 E2: Second luminescent material
E3:第三發光材料 E3: Third luminescent material
E4:第四發光材料 E4: Fourth luminescent material
Claims (10)
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WO2019153950A1 (en) * | 2018-02-09 | 2019-08-15 | 京东方科技集团股份有限公司 | Pixel arrangement structure, display substrate, display device and mask plate group |
TW202121714A (en) * | 2019-07-31 | 2021-06-01 | 中國商京東方科技集團股份有限公司 | Display substrate and display device |
TW202139158A (en) * | 2020-09-02 | 2021-10-16 | 大陸商昆山國顯光電有限公司 | Display panel and display device |
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WO2019153950A1 (en) * | 2018-02-09 | 2019-08-15 | 京东方科技集团股份有限公司 | Pixel arrangement structure, display substrate, display device and mask plate group |
TW202121714A (en) * | 2019-07-31 | 2021-06-01 | 中國商京東方科技集團股份有限公司 | Display substrate and display device |
TW202139158A (en) * | 2020-09-02 | 2021-10-16 | 大陸商昆山國顯光電有限公司 | Display panel and display device |
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