TWI769962B - Driving apparatus and detection system for memory module failure detection, and memory device using the driving apparatus - Google Patents

Driving apparatus and detection system for memory module failure detection, and memory device using the driving apparatus Download PDF

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TWI769962B
TWI769962B TW110145228A TW110145228A TWI769962B TW I769962 B TWI769962 B TW I769962B TW 110145228 A TW110145228 A TW 110145228A TW 110145228 A TW110145228 A TW 110145228A TW I769962 B TWI769962 B TW I769962B
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word line
bit line
memory module
bit
word
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TW202324431A (en
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李暐智
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新唐科技股份有限公司
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56008Error analysis, representation of errors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Various embodiments of the present disclosure provide a detection system and a driving apparatus for memory module failure detection, and a memory device using the driving apparatus. The above solution allows the memory cell to maintain a steady state after being tumed on, so it can be used for failure analysis, such as predictive failure analysis. Furthermore, through the above solutions, users who use memory modules can know the physical location of defects without knowing the addressing method, architecture, and design of the memory module, and request the manufacturer of the memory module to carry out relevant assist procedures.

Description

用於記憶體模塊故障檢測的檢測系統、驅動裝置及使用所述 驅動裝置的記憶體裝置 Detection system for memory module failure detection, driving device and use thereof drive device memory device

本發明涉及一種記憶體模塊故障檢測的技術,且特別是一種用於記憶體模塊故障檢測的檢測系統、驅動裝置及使用上述驅動裝置的記憶體裝置。 The present invention relates to a technology for fault detection of a memory module, and in particular to a detection system for fault detection of a memory module, a driving device, and a memory device using the above-mentioned driving device.

目前許多電子產品都會使用嵌入式記憶體模塊,例如但不限定是嵌入式的唯讀記憶體模塊(ROM)、動態隨機存取記憶體模塊(DRAM)、靜態隨機存取記憶體模塊(SRAM)、同步動態隨機存取記憶體(SDRAM)、快閃記憶體模塊(flash)或相變化記憶體(PRAM)。但是這些嵌入式記憶體模塊是取用不同廠商的半導體矽智財(Intellectual Property,簡稱為IP),而對於電子產品的設計者(即,拿IP進行應用的用戶)來說,僅是將廠商的IP拿來應用組合,以設計出電子產品。 Many electronic products currently use embedded memory modules, such as but not limited to embedded read-only memory modules (ROM), dynamic random access memory modules (DRAM), and static random access memory modules (SRAM). , Synchronous Dynamic Random Access Memory (SDRAM), Flash Memory Module (flash) or Phase Change Memory (PRAM). However, these embedded memory modules use semiconductor intellectual property (IP) of different manufacturers, and for electronic product designers (ie, users who use IP for application), they only use the manufacturer's intellectual property (IP). The IP is used in the application portfolio to design electronic products.

請參照圖1,圖1是具有故障之記憶體模塊的示意圖。於圖1中,記憶體模塊23具有多個記憶體單元,且多個記憶體單元以陣列方式排列而形成記憶體陣列。以圖1為例,若進行故障分析,則可以找出單一個記憶體單元的故障11(此類故障通常是記憶體單元缺陷所造成)與連續多個記憶體單元的故障12(此類故障通常是字元線缺陷所造成)。需要說明的是,記憶體陣列可能還有其他類型的故障,但目前圖1未繪示其他類型的故障。 Please refer to FIG. 1 , which is a schematic diagram of a memory module having a fault. In FIG. 1 , the memory module 23 has a plurality of memory cells, and the plurality of memory cells are arranged in an array to form a memory array. Taking FIG. 1 as an example, if a fault analysis is performed, a fault 11 of a single memory cell (such faults are usually caused by a fault of a memory cell) and a fault 12 of a plurality of consecutive memory cells (such faults can be found). Usually caused by word line defects). It should be noted that the memory array may have other types of failures, but currently other types of failures are not shown in FIG. 1 .

雖然目前有些檢測模塊可以驗證記憶體功能是否正常,但此類檢測模組是讓記憶體進行功能模式,所以記憶體單元仍會處於暫態而非穩態,故這些檢測模塊不適合用於故障分析。再者,上述檢測模塊需要外掛相關的印刷電路板才能組成完整的驗證系統,故仍有成本高與體積大的技術問題。 Although some detection modules can verify whether the memory function is normal, such detection modules allow the memory to enter the functional mode, so the memory cells are still in a transient state rather than a steady state, so these detection modules are not suitable for failure analysis. . Furthermore, the above-mentioned detection module needs to be attached with a related printed circuit board to form a complete verification system, so there are still technical problems of high cost and large volume.

另外,當上述嵌入式記憶體模塊發生問題而需要進行故障分析(Failure Analysis,簡稱為FA)時,便需要設計嵌入式記憶體模塊之IP的廠商協助定址分析,故導致電子產品的設計者需要提供相當多的資料給廠商。通常來說,上述資料必須包括錯誤位址或錯誤位元的資訊,廠商才能夠進行協助。即使提供了上述資料或其他相關資料給廠商,廠商也不一定能協助此定址分析的工程。再者,雖然廠商能夠藉由位址或位元定義出記憶體單元(memory cell)的位置,但如果故障的字元線或位元線,則仍無法得知正確位置。由上可知,定址分析的工程包括了許多的不確定因素。 In addition, when the above-mentioned embedded memory module has a problem and needs to perform a failure analysis (FA), it is necessary for the manufacturer of the IP that designs the embedded memory module to assist in the addressing analysis, so that the designer of the electronic product needs to Provide considerable information to manufacturers. Typically, the above data must include information about the wrong address or the wrong bit in order for the manufacturer to be able to assist. Even if the above information or other relevant information is provided to the manufacturer, the manufacturer may not be able to assist the engineering of this location analysis. Furthermore, although the manufacturer can define the location of the memory cell by address or bit, it is still impossible to know the correct location if the word line or bit line is faulty. It can be seen from the above that the engineering of location analysis includes many uncertain factors.

若為字元線或位元線缺陷問題,即使廠商能夠提供故障的記憶體單元的位置,但是因問題點是字元線或位元線缺陷,而非記憶體單元,故可能無法找出確切的問題點。簡言之,目前仍欠缺一種可以讓電子產品的設計者輕易知悉故障狀況並簡單回報故障狀況便能夠使廠商協助處理的技術方案。 If it is a word line or bit line defect problem, even if the manufacturer can provide the location of the faulty memory cell, it may not be possible to find the exact problem because the problem is the word line or bit line defect, not the memory cell. problem point. In short, there is still a lack of a technical solution that enables the designer of electronic products to easily know the fault condition and simply report the fault condition, so that the manufacturer can assist in the processing.

根據本發明之目的,本發明提供一種用於記憶體模塊故障檢測的驅動裝置,其用於選擇記憶體模塊的相鄰兩條字元線與相鄰兩條位元線,以透過照射檢測裝置獲取記憶體模塊的亮點影像來進行記憶體模塊的預測性故障分析,且驅動裝置包括字元線選擇器與位元線選擇器。字元線選擇器具有N個字元線連接端分別電性連接記憶體模塊的N條字元線,並根據第一控制信號選擇第2i-1個字元線連接端與第2i個字元線連接端,以將第一字元線電壓信號與第二字 元線電壓信號傳送給第2i-1個字元線與第2i個字元線,其中第2i-1個字元線與第2i個字元線為彼此相鄰的兩個字元線,N為偶數,i為1至N/2的其中一個整數。位元線選擇器具有M個位元線連接端分別電性連接記憶體模塊的M條位元線,並根據第二控制信號選擇第2j-1個位元線連接端與第2j個位元線連接端,以將第一位元線電壓信號與第二位元線電壓信號傳送給第2j-1個位元線與第2j個位元線,其中第2j-1個位元線與第2j個位元線為彼此相鄰的兩個位元線,M為偶數,j為1至M/2的其中一個整數。 According to the purpose of the present invention, the present invention provides a driving device for fault detection of a memory module, which is used for selecting two adjacent word lines and two adjacent bit lines of a memory module to transmit through the illumination detection device A bright spot image of the memory module is acquired for predictive failure analysis of the memory module, and the driving device includes a word line selector and a bit line selector. The word line selector has N word line connection terminals respectively electrically connected to the N word lines of the memory module, and selects the 2i-1 word line connection terminal and the 2i word element according to the first control signal line connections to connect the first word line voltage signal with the second word The element line voltage signal is transmitted to the 2i-1 th word line and the 2i th word line, wherein the 2i-1 th word line and the 2i th word line are two adjacent word lines, N is an even number, i is an integer from 1 to N/2. The bit line selector has M bit line connection terminals respectively electrically connected to the M bit lines of the memory module, and selects the 2j-1 bit line connection terminal and the 2j th bit line according to the second control signal line connection terminal for transmitting the first bit line voltage signal and the second bit line voltage signal to the 2j-1th bit line and the 2jth bit line, wherein the 2j-1th bit line and the th The 2j bit lines are two adjacent bit lines, M is an even number, and j is an integer from 1 to M/2.

根據本發明之目的,本發明還提供一種用於記憶體模塊故障檢測的驅動裝置,其用於選擇記憶體模塊的任一條字元線與任一條位元線,以透過照射檢測裝置獲取記憶體模塊的亮點影像來進行記憶體模塊的預測性故障分析,且驅動裝置包括字元線選擇器與位元線選擇器。字元線選擇器具有N個字元線連接端分別電性連接記憶體模塊的N條字元線,並根據第一控制信號選擇第x個字元線連接端,以將字元線電壓信號傳送給第x個字元線,其中N為整數,x為1至N的其中一個整數。位元線選擇器具有M個位元線連接端分別電性連接記憶體模塊的M條位元線,並根據第二控制信號選擇第y個位元線連接端,以將位元線電壓信號第y個位元線,其中M為整數,y為1至M的其中一個整數。 According to the purpose of the present invention, the present invention also provides a drive device for fault detection of a memory module, which is used to select any word line and any bit line of the memory module to obtain the memory through the illumination detection device The highlight image of the module is used for predictive failure analysis of the memory module, and the driving device includes a word line selector and a bit line selector. The word line selector has N word line connection terminals respectively electrically connected to the N word lines of the memory module, and selects the xth word line connection terminal according to the first control signal, so as to connect the word line voltage signal Sent to the xth word line, where N is an integer and x is an integer from 1 to N. The bitline selector has M bitline connection terminals respectively electrically connected to the M bitlines of the memory module, and selects the yth bitline connection terminal according to the second control signal, so as to connect the bitline voltage signal The yth bit line, where M is an integer, and y is an integer from 1 to M.

根據本發明之目的,本發明還提供一種用於記憶體模塊故障檢測的檢測系統,其中檢測系統包括上述驅動裝置與上述照射檢測裝置 According to the purpose of the present invention, the present invention further provides a detection system for detecting faults in a memory module, wherein the detection system includes the above-mentioned driving device and the above-mentioned irradiation detection device

根據本發明之目的,本發明還提供一種記憶體裝置,其中記憶體裝置包括上述驅動裝置與上述記憶體模塊。 According to the object of the present invention, the present invention further provides a memory device, wherein the memory device includes the above-mentioned driving device and the above-mentioned memory module.

綜合以上所述,本發明提供的用於記憶體模塊故障檢測的解決方案可以讓應用記憶體模塊的用戶在無須知道記憶體模塊的定址方式、架構與設計的情況下,便能夠知道缺陷的實體位置及可能類型,並請求記憶體模塊的廠商進行相關的協助。 To sum up the above, the solution for memory module fault detection provided by the present invention allows users of the application memory module to know the entity of the defect without knowing the addressing method, architecture and design of the memory module. location and possible type, and ask the manufacturer of the memory module for assistance.

為了進一步理解本發明的技術、手段和效果,可以參考以下詳細描述和附圖,從而可以徹底和具體地理解本發明的目的、特徵和概念。然而,以下詳細描述和附圖僅用於參考和說明本發明的實現方式,其並非用於限制本發明。 For a further understanding of the techniques, means and effects of the present invention, reference may be made to the following detailed description and accompanying drawings, so that the objects, features and concepts of the present invention can be thoroughly and specifically understood. However, the following detailed description and accompanying drawings are only used to refer to and illustrate the implementation of the present invention, and are not intended to limit the present invention.

11:單一個記憶體單元的故障 11: Failure of a single memory cell

12:連續多個記憶體單元的故障 12: Failure of multiple memory cells in a row

21:驅動裝置 21: Drive device

211:字元線選擇器 211: character line selector

2111、2112、2121、2122:開關裝置 2111, 2112, 2121, 2122: Switchgear

2113、2114:字元信號腳位 2113, 2114: Character signal pins

2115、2125:控制信號腳位 2115, 2125: control signal pins

212:位元線選擇器 212: bit line selector

2123、2124:位元信號腳位 2123, 2124: Bit signal pins

22:照射檢測裝置 22: Irradiation detection device

23:記憶體模塊 23: Memory Module

231:列解碼器 231: Column Decoder

232:行解碼器 232: line decoder

S1~S6:步驟 S1~S6: Steps

VDD:電源電壓 VDD: Power supply voltage

GND:接地電壓 GND: ground voltage

提供的附圖用以使本發明所屬技術領域具有通常知識者可以進一步理解本發明,並且被併入與構成本發明之說明書的一部分。附圖示出了本發明的示範實施例,並且用以與本發明之說明書一起用於解釋本發明的原理。 The accompanying drawings are provided to enable those of ordinary skill in the art to which the invention pertains to further understand the present invention, and are incorporated in and constitute a part of the specification of the present invention. The drawings illustrate exemplary embodiments of the invention, and together with the description of the invention serve to explain the principles of the invention.

圖1是具有故障之記憶體模塊的示意圖。 FIG. 1 is a schematic diagram of a memory module with a fault.

圖2是本發明實施例的用於記憶體模塊故障檢測的檢測系統的方塊圖。 FIG. 2 is a block diagram of a detection system for memory module fault detection according to an embodiment of the present invention.

圖3是本發明實施例的用於記憶體模塊故障檢測的驅動裝置的方塊圖。 FIG. 3 is a block diagram of a drive device for detecting a fault in a memory module according to an embodiment of the present invention.

圖4是本發明實施例的用於記憶體模塊故障檢測的檢測方法的流程圖。 FIG. 4 is a flowchart of a detection method for fault detection of a memory module according to an embodiment of the present invention.

現在將詳細參考本發明的示範實施例,其示範實施例會在附圖中被繪示出。在可能的情況下,在附圖和說明書中使用相同的元件符號來指代相同或相似的部件。另外,示範實施例的做法僅是本發明之設計概念的實現方式之一,下述的該等示範皆非用於限定本發明。 Reference will now be made in detail to exemplary embodiments of the present invention, exemplary embodiments of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and the description to refer to the same or like parts. In addition, the practice of the exemplary embodiment is only one way of realizing the design concept of the present invention, and the following examples are not intended to limit the present invention.

本發明的多個實施例提供了用於記憶體模塊故障檢測的檢測系統、驅動裝置及使用所述驅動裝置的記憶體裝置。上述解決方案可以讓記憶體 單元在開啟後維持穩態,故可以用於故障分析,例如預測性故障分析。進一步地,透過上述解決方案,應用記憶體模塊的用戶可在無須知道記憶體模塊的定址方式、架構與設計的情況下,便能夠知道缺陷的實體位置,並請求記憶體模塊的廠商進行相關的協助。 Various embodiments of the present invention provide a detection system for memory module failure detection, a drive device, and a memory device using the drive device. The above solution allows the memory The unit remains in steady state after it is turned on, so it can be used for failure analysis, such as predictive failure analysis. Further, through the above solution, the user of the application memory module can know the physical location of the defect without knowing the addressing method, architecture and design of the memory module, and request the manufacturer of the memory module to make relevant assist.

針對記憶體模塊是封裝層級(package level),上述解決方案不需要額外地外掛其他印刷電路板,只要一個插槽(socket)將所需要的訊號傳送到驅動裝置,即可以記憶體單元處於穩態,甚至此插槽可以直接是驅動裝置的一部分。另外,針對晶圓層級(wafter level),上述解決方案不需要使用額外的工具,僅需要手動地使用探針將所需要的訊號傳送到驅動裝置即可,便能夠在晶圓層級進行異常亮點的判讀偵測。 For the memory module is at the package level, the above solution does not require additional external printed circuit boards, as long as a socket transmits the required signal to the drive device, the memory unit can be in a steady state , even this slot can be directly part of the drive unit. In addition, for the wafer level (wafter level), the above solution does not require the use of additional tools, and only needs to manually use the probe to transmit the required signal to the driving device, so that the abnormal bright spot can be detected at the wafer level. Interpretation detection.

進一步地,本發明是將記憶體模塊連接驅動裝置,且在檢測過程中不透過記憶體模塊的行解碼器與列解碼器來選擇對應的位元線與字元線,而是驅動裝置進行選擇,並直接將驅動裝置的字元線電壓信號與位元線電壓信號直接施加在驅動裝置所選擇的位元線與字元線。接著,電流會流入記憶體模塊中對應於被選擇的位元線與字元線的記憶體單元中,並透過照射檢測裝置發射光束照射記憶體模塊的表面,以獲取亮點影像,其中亮點影像可用來判斷記憶體模塊的故障類型,並據此找出記憶體模塊中之缺陷的實體位置。用戶僅需要將亮點影像提供給廠商,廠商即可以進行對應的協助處理。需要說明的是,本發明的驅動裝置會將記憶體模塊的每一個位元線與字元線選擇一次,以獲取多個亮點影像,來進行故障分析。 Further, in the present invention, the memory module is connected to the driving device, and the corresponding bit line and word line are not selected by the row decoder and column decoder of the memory module during the detection process, but the driving device selects , and directly apply the word line voltage signal and the bit line voltage signal of the driving device to the bit line and the word line selected by the driving device. Then, the current will flow into the memory cells corresponding to the selected bit lines and word lines in the memory module, and the illumination detection device emits a light beam to illuminate the surface of the memory module to obtain a bright spot image, wherein the bright spot image is available To judge the fault type of the memory module, and find out the physical location of the defect in the memory module accordingly. The user only needs to provide the highlight image to the manufacturer, and the manufacturer can perform corresponding assistance processing. It should be noted that, the driving device of the present invention selects each bit line and word line of the memory module once to obtain a plurality of bright spot images for fault analysis.

首先,請參照圖2,圖2是本發明實施例的用於記憶體模塊故障檢測的檢測系統的方塊圖。檢測系統可以由驅動裝置21與照射檢測裝置22來實現,其中驅動裝置21電性連接記憶體模塊23,記憶體模塊23的一端電性連接電源電壓VDD與記憶體模塊23的另一端電性連接接地電壓GND。在這個實施例 中,記憶體模塊23具有M*N個記憶體單元,且以N列M行之陣列方式排列。驅動裝置21包括字元線選擇器211與位元線選擇器212,字元線選擇器211具有N個字元線連接端分別電性連接記憶體模塊23的N條字元線,以及位元線選擇器212具有M個位元線連接端分別電性連接記憶體模塊23的M條位元線。 First, please refer to FIG. 2 , which is a block diagram of a detection system for memory module failure detection according to an embodiment of the present invention. The detection system can be implemented by the driving device 21 and the irradiation detection device 22 , wherein the driving device 21 is electrically connected to the memory module 23 , one end of the memory module 23 is electrically connected to the power supply voltage VDD and the other end of the memory module 23 is electrically connected Ground voltage GND. In this example Among them, the memory module 23 has M*N memory cells, which are arranged in an array of N columns and M rows. The driving device 21 includes a word line selector 211 and a bit line selector 212. The word line selector 211 has N word line connection terminals respectively electrically connected to the N word lines of the memory module 23 and the bit line The line selector 212 has M bit line connection terminals respectively electrically connected to the M bit lines of the memory module 23 .

在一種實現方式中,驅動裝置21用於選擇記憶體模塊23的任一條字元線與任一條位元線,以透過照射檢測裝置22獲取記憶體模塊23的亮點影像來進行記憶體模塊23的預測性故障分析。在這種實現方式中,字元線選擇器211根據第一控制信號選擇第x個字元線連接端,以將字元線電壓信號傳送給第x個字元線,其中N為整數,x為1至N的其中一個整數;位元線選擇器212根據第二控制信號選擇第y個位元線連接端,以將位元線電壓信號傳送給第y個位元線,其中M為整數,y為1至M的其中一個整數。 In an implementation manner, the driving device 21 is used to select any word line and any bit line of the memory module 23 , so as to obtain a bright spot image of the memory module 23 through the illumination detection device 22 to perform the operation of the memory module 23 . Predictive failure analysis. In this implementation, the wordline selector 211 selects the xth wordline connection terminal according to the first control signal to transmit the wordline voltage signal to the xth wordline, where N is an integer and x is an integer from 1 to N; the bit line selector 212 selects the yth bit line connection terminal according to the second control signal to transmit the bit line voltage signal to the yth bit line, where M is an integer , y is an integer from 1 to M.

在上述的實現方式中,單一個記憶體單元的故障11可以被檢測出來,但是上述的實現方式無法提供相鄰兩字元線與相鄰兩位元線的迴路,故對於相鄰兩字元線因缺陷而短路連接所導致的連續多個記憶體單元的故障12,則無法順利地被檢測出來,同樣地,對於相鄰兩位元線因缺陷而短路連接所導致的連續多個記憶體單元的故障(圖2未繪示),也同樣無法順利地被檢測出來。 In the above-mentioned implementation manner, the fault 11 of a single memory cell can be detected, but the above-mentioned implementation manner cannot provide a loop between adjacent two-byte lines and adjacent two-byte lines, so for adjacent two-word lines The fault 12 of consecutive multiple memory cells caused by the short-circuit connection of the line due to the defect cannot be detected smoothly. The failure of the unit (not shown in FIG. 2 ) also cannot be detected smoothly.

為了改良上述技術問題,在另一種實現方式中,驅動裝置21會一次選擇記憶體模塊23的相鄰兩條字元線與相鄰兩條位元線,以透過照射檢測裝置22獲取記憶體模塊23的亮點影像來進行記憶體模塊23的預測性故障分析。字元線選擇器211根據第一控制信號選擇第2i-1個字元線連接端與第2i個字元線連接端,以將第一字元線電壓信號與第二字元線電壓信號傳送給第2i-1個字元線與第2i個字元線,其中第2i-1個字元線與第2i個字元線為彼此相鄰的兩個字元線,N為偶數,i為1至N/2的其中一個整數。位元線選擇器具有M個位元線連接端分別電性連接記憶體模塊的M條位元線,並根據第二控制信號選擇第2j-1個位元線連 接端與第2j個位元線連接端,以將第一位元線電壓信號與第二位元線電壓信號傳送給第2j-1個位元線與第2j個位元線,其中第2j-1個位元線與第2j個位元線為彼此相鄰的兩個位元線,M為偶數,j為1至M/2的其中一個整數。 In order to improve the above technical problem, in another implementation manner, the driving device 21 selects two adjacent word lines and two adjacent bit lines of the memory module 23 at a time, so as to obtain the memory module through the illumination detection device 22 23 for predictive failure analysis of the memory module 23. The word line selector 211 selects the 2i-1th word line connection terminal and the 2i th word line connection terminal according to the first control signal, so as to transmit the first word line voltage signal and the second word line voltage signal For the 2i-1th word line and the 2ith word line, where the 2i-1th word line and the 2ith word line are two adjacent word lines, N is an even number, and i is One of the integers from 1 to N/2. The bit line selector has M bit line connection terminals respectively electrically connected to the M bit lines of the memory module, and selects the 2j-1 bit line connection according to the second control signal The terminal is connected to the 2jth bit line to transmit the first bit line voltage signal and the second bit line voltage signal to the 2j-1th bit line and the 2jth bit line, wherein the 2jth The -1 bit line and the 2jth bit line are two adjacent bit lines, M is an even number, and j is an integer from 1 to M/2.

另外,在其他實現方式中,也可以是驅動裝置21一次會選擇相鄰兩條字元線但選擇任一條位元線,或者,也可以是驅動裝置21一次會選擇相鄰兩條位元線但選擇任一條字元線。總而言之,本發明不以驅動裝置21一次會選擇相鄰兩條字元線與相鄰兩條位元線為限制。 In addition, in other implementation manners, the driving device 21 may select two adjacent word lines at a time but select any one bit line, or the driving device 21 may select two adjacent bit lines at a time But choose any character line. To sum up, the present invention is not limited by the fact that the driving device 21 selects two adjacent word lines and two adjacent bit lines at a time.

進一步地,第一字元線電壓信號的位準與第二字元線電壓信號的位準彼此不相同,例如,第一字元線電壓信號的位準與第二字元線電壓信號的位準分別為電源電壓VDD與接地電壓GND,或者,第一字元線電壓信號的位準與第二字元線電壓信號的位準分別為接地電壓GND與電源電壓VDD,如此,便能夠構成迴路,從而偵測到相鄰兩字元線因缺陷而短路連接所導致的連續多個記憶體單元的故障12。另外,第一位元線電壓信號的位準與第二位元線電壓信號的位準彼此不相同,例如,第一位元線電壓信號的位準與第二位元線電壓信號的位準分別為電源電壓VDD與接地電壓GND,或者,第一位元線電壓信號的位準與第二位元線電壓信號的位準分別為接地電壓GND與電源電壓VDD,如此,便能夠構成迴路,從而偵測到相鄰兩位元線因缺陷而短路連接所導致的連續多個記憶體單元的故障(圖2未繪示)。 Further, the level of the first word line voltage signal and the level of the second word line voltage signal are different from each other, for example, the level of the first word line voltage signal and the level of the second word line voltage signal The levels are the power supply voltage VDD and the ground voltage GND, respectively, or the level of the first word line voltage signal and the level of the second word line voltage signal are the ground voltage GND and the power supply voltage VDD, respectively. In this way, a loop can be formed. , so as to detect the fault 12 of a plurality of consecutive memory cells caused by the short-circuit connection of two adjacent word lines due to defects. In addition, the level of the first bit line voltage signal and the level of the second bit line voltage signal are different from each other, for example, the level of the first bit line voltage signal and the level of the second bit line voltage signal are the power supply voltage VDD and the ground voltage GND respectively, or the level of the first bit line voltage signal and the level of the second bit line voltage signal are the ground voltage GND and the power supply voltage VDD, respectively, so that a loop can be formed, Thus, the faults of a plurality of consecutive memory cells (not shown in FIG. 2 ) caused by the short-circuit connection of adjacent two-element lines due to defects are detected.

照射檢測裝置22可以是為雷射光束電阻異常偵測(OBIRCH)裝置或微光顯微鏡(EMMI)裝置,且本發明不以此為限制。照射檢測裝置22用於發射光束至記憶體模塊23的表面,且用於獲取記憶體模塊23的亮點影像。照射檢測裝置22所發射的光束可以依據實際情況而為特定波長範圍的光束,且要說明的是,特定波長範圍的光束包括了特定頻率的電磁波(註:電磁波本身就是光),而不限是常見的可見光、紅外線或紫外線等。 The irradiation detection device 22 may be a laser beam resistance abnormality detection (OBIRCH) device or a low-light microscope (EMMI) device, and the present invention is not limited thereto. The illumination detection device 22 is used for emitting a light beam to the surface of the memory module 23 and for acquiring a bright spot image of the memory module 23 . The light beam emitted by the irradiation detection device 22 can be a light beam of a specific wavelength range according to the actual situation, and it should be noted that the light beam of a specific wavelength range includes electromagnetic waves of a specific frequency (note: the electromagnetic wave itself is light), not limited to Common visible light, infrared or ultraviolet, etc.

請接著參照圖3,圖3是本發明實施例的用於記憶體模塊故障檢測的驅動裝置的方塊圖。在本發明實施例中,記憶體模塊23在檢測過程中,不透過記憶體模塊23的列解碼器231與行解碼器232來選擇對應的位元線與字元線,而是驅動裝置21進行字元線與位元線的選擇,並直接將驅動裝置21的字元線電壓信號(第一字元線電壓信號與第二字元線電壓信號)與位元線電壓信號(第一位元線電壓信號與第二位元線電壓信號)直接施加在驅動裝置21所選擇的位元線與字元線。 Please refer to FIG. 3 . FIG. 3 is a block diagram of a drive device for detecting faults in a memory module according to an embodiment of the present invention. In the embodiment of the present invention, the memory module 23 does not select the corresponding bit line and word line through the column decoder 231 and the row decoder 232 of the memory module 23 during the detection process, but the driving device 21 performs word line and bit line selection, and directly connect the word line voltage signal (the first word line voltage signal and the second word line voltage signal) of the driving device 21 with the bit line voltage signal (the first element The line voltage signal and the second bit line voltage signal) are directly applied to the bit line and word line selected by the driving device 21 .

於此實施例中,字元線選擇器211包括開關裝置2111、2112、字元信號腳位2113、2114與控制信號腳位2115。開關裝置2111具有第1、3、...、N-1個字元線連接端,受控於第一控制信號以選擇第2i-1個字元線連接端,以用於將接收到的第一字元線電壓信號透過選擇的第2i-1個字元線連接端傳送至第2i-1個字元線。開關裝置2112具有第2、4、...、N個字元線連接端,受控於第一控制信號以選擇第2i個字元線連接端,以用於將接收到的第二字元線電壓信號透過選擇的第2i個字元線連接端傳送至第2i個字元線。字元信號腳位2113、2114分別電性連開關裝置2111、2112,以及控制信號腳位2115電性連接開關裝置2111、2112,且字元信號腳位2113、2114與控制信號腳位2115分別接收第一字元線電壓信號、第二字元線電壓信號與第一控制信號。 In this embodiment, the word line selector 211 includes switch devices 2111 and 2112 , word signal pins 2113 and 2114 and a control signal pin 2115 . The switch device 2111 has the 1st, 3rd, . The first word line voltage signal is transmitted to the 2i-1 th word line through the selected 2i-1 th word line connection terminal. The switch device 2112 has the 2nd, 4th, . The line voltage signal is transmitted to the 2i th word line through the selected 2i th word line connection terminal. The character signal pins 2113 and 2114 are electrically connected to the switch devices 2111 and 2112 respectively, and the control signal pin 2115 is electrically connected to the switch devices 2111 and 2112, and the character signal pins 2113 and 2114 and the control signal pin 2115 are respectively received The first word line voltage signal, the second word line voltage signal and the first control signal.

位元線選擇器212包括開關裝置2121、2122、位元信號腳位2123、2124與控制信號腳位2125。開關裝置2121具有第1、3、...、M-1個位元線連接端,受控於第二控制信號以選擇第2j-1個位元線連接端,以用於將接收到的第一位元線電壓信號透過選擇的第2j-1個位元線連接端傳送至第2j-1個位元線。開關裝置2122具有第2、4、...、M個位元線連接端,受控於第二控制信號以選擇第2j個字元線連接端,以用於將接收到的第二位元線電壓信號透過選擇的第2j個字元線連接端傳送至第2j個位元線。位元信號腳位2123、2124分別電性連接開關裝置 2121、2122,以及控制信號腳位2125電性連接開關裝置2121、2122,且位元信號腳位2123、2124與控制信號腳位2125分別接收第一位元線電壓信號、第二位元線電壓信號與第二控制信號。 The bit line selector 212 includes switch devices 2121 and 2122 , bit signal pins 2123 and 2124 and a control signal pin 2125 . The switching device 2121 has the 1st, 3rd, . The first bit line voltage signal is transmitted to the 2j-1 th bit line through the selected 2j-1 th bit line connection terminal. The switching device 2122 has 2nd, 4th, . The line voltage signal is transmitted to the 2jth bit line through the selected 2jth word line connection. The bit signal pins 2123 and 2124 are respectively electrically connected to the switch device 2121, 2122, and the control signal pin 2125 are electrically connected to the switching devices 2121, 2122, and the bit signal pins 2123, 2124 and the control signal pin 2125 respectively receive the first bit line voltage signal and the second bit line voltage signal and a second control signal.

進一步地,上述記憶體模塊23、字元線選擇器211與位元線選擇器212可以由提供IP的廠商直接整合成記憶體裝置,並賣給需要應用記憶體模塊23的用戶。記憶體裝置更包括有插槽(socket),且插槽電性連接字元信號腳位2113、2114、控制信號腳位2115、位元信號腳位2123、2124與控制信號腳位2125,以用戶可以直接使用對應於插槽的信號插頭插入插槽,並將第一字元線電壓信號、第二字元線電壓信號、第一控制信號、第一位元線電壓信號、第二位元線電壓信號與第二控制信號提供字元線選擇器211與位元線選擇器212。 Further, the above-mentioned memory module 23 , word line selector 211 and bit line selector 212 can be directly integrated into a memory device by a manufacturer that provides IP, and sold to users who need to use the memory module 23 . The memory device further includes a socket, and the socket is electrically connected to the character signal pins 2113, 2114, the control signal pin 2115, the bit signal pins 2123, 2124 and the control signal pin 2125, so that the user can The signal plug corresponding to the slot can be directly inserted into the slot, and the first word line voltage signal, the second word line voltage signal, the first control signal, the first word line voltage signal, the second word line voltage signal, the second word line The voltage signal and the second control signal are provided to the word line selector 211 and the bit line selector 212 .

再者,在其中一個實施例中,記憶體裝置可以是嵌入式記憶體裝置,記憶體模塊23是嵌入式記憶體模塊,且記憶體模塊23可以是唯讀記憶體模塊(ROM)、動態隨機存取記憶體模塊(DRAM)、靜態隨機存取記憶體模塊(SRAM)、同步動態隨機存取記憶體(SDRAM)、快閃記憶體模塊(flash)或相變化記憶體(PRAM),且本發明不以記憶體裝置與記憶體模塊23的類型以及是否為嵌入式架構為限制。 Furthermore, in one embodiment, the memory device may be an embedded memory device, the memory module 23 may be an embedded memory module, and the memory module 23 may be a read only memory module (ROM), a dynamic random Access memory module (DRAM), static random access memory module (SRAM), synchronous dynamic random access memory (SDRAM), flash memory module (flash) or phase change memory (PRAM), and this The invention is not limited by the type of the memory device and the memory module 23 and whether it is an embedded architecture.

請接著參照圖4,圖4是本發明實施例的用於記憶體模塊故障檢測的檢測方法的流程圖。首先,在步驟S1,將記憶體模塊連接電源上電,即將記憶體模塊的兩端(電源端與接地端)連接電源電壓與接地電壓。然後,在步驟S2中,選擇相鄰的兩條字元線,並且將兩個位準不同的字元線電壓信號傳送給所選擇的相鄰兩條字元線。之後,在步驟S3中,選擇相鄰的兩條位元線,並且將兩個位準不同的位元線電壓信號傳送給所選擇的相鄰兩條位元線。接著,在步驟S4中,使用照射檢測裝置照射記憶體模塊的表面,以及在步驟S5中,使用照射檢測裝置獲取亮點影像。步驟S1至S5會重複執行,直到每一條位元線與字元 線都被選擇,最後,在步驟S6中,便能夠針對多個亮點影像來判斷記憶體模塊的故障有那些類型,且缺陷的實體位置也可以被知悉。 Please refer to FIG. 4 . FIG. 4 is a flowchart of a detection method for memory module failure detection according to an embodiment of the present invention. First, in step S1, the memory module is connected to the power supply and powered on, that is, the two ends (power terminal and ground terminal) of the memory module are connected to the power supply voltage and the ground voltage. Then, in step S2, two adjacent word lines are selected, and two word line voltage signals with different levels are transmitted to the selected two adjacent word lines. Then, in step S3, two adjacent bit lines are selected, and two bit line voltage signals with different levels are transmitted to the selected two adjacent bit lines. Next, in step S4, the surface of the memory module is irradiated with the irradiation detection device, and in step S5, the bright spot image is acquired using the irradiation detection device. Steps S1 to S5 are repeated until each bit line and character The lines are all selected, and finally, in step S6, the types of faults of the memory module can be determined according to the multiple bright spot images, and the physical location of the fault can also be known.

綜合以上所述,上述檢測系統無須複雜的系統架構、訊號以及模塊,並用最簡單且靈活的方式讓記憶體模塊進入穩態模式,便夠能找出各類型故障(包括字元線或位元線缺陷造成之故障),且上述檢測系統可以應用在不同類型的記憶體模塊進行檢測。換句話說,記憶體模塊可以視為一個未知的黑盒子,透過本發明的解決方案,用戶僅需輸入一些簡單的訊號搭配分析儀器(照射檢測裝置),即可找出異常亮點位置,從而判斷故障類型。 Based on the above, the above detection system does not require complicated system architecture, signals and modules, and uses the simplest and most flexible way to make the memory module enter the steady-state mode, so that various types of faults (including word lines or bits) can be found. faults caused by line defects), and the above-mentioned inspection system can be applied to different types of memory modules for inspection. In other words, the memory module can be regarded as an unknown black box. Through the solution of the present invention, the user only needs to input some simple signals and use the analysis instrument (irradiation detection device) to find the position of the abnormal bright spot, so as to determine the position of the abnormal bright spot. Fault type.

應當理解,本文描述的示例和實施例僅用於說明目的,並且鑑於其的各種修改或改變將被建議給本領域技術人員,並且將被包括在本申請的精神和範圍以及所附權利要求的範圍之內。 It is to be understood that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes in view thereof will be suggested to those skilled in the art and are to be included within the spirit and scope of the present application and the scope of the appended claims. within the range.

11:單一個記憶體單元的故障 11: Failure of a single memory cell

12:連續多個記憶體單元的故障 12: Failure of multiple memory cells in a row

21:驅動裝置 21: Drive device

211:字元線選擇器 211: character line selector

212:位元線選擇器 212: bit line selector

22:照射檢測裝置 22: Irradiation detection device

23:記憶體模塊 23: Memory Module

Claims (10)

一種用於記憶體模塊故障檢測的驅動裝置,其用於選擇記憶體模塊的相鄰兩條字元線與相鄰兩條位元線,以透過照射檢測裝置獲取所述記憶體模塊的亮點影像來進行所述記憶體模塊的預測性故障分析,且所述驅動裝置包括:字元線選擇器,具有N個字元線連接端分別電性連接所述記憶體模塊的N個字元線,根據第一控制信號選擇第2i-1個字元線連接端與第2i個字元線連接端,以將第一字元線電壓信號與第二字元線電壓信號傳送給第2i-1個字元線與第2i個字元線,其中所述第2i-1個字元線與所述第2i個字元線為彼此相鄰的所述兩個字元線,N為偶數,i為1至N/2的其中一個整數;以及位元線選擇器,具有M個位元線連接端分別電性連接所述記憶體模塊的M個位元線,根據第二控制信號選擇第2j-1個位元線連接端與第2j個位元線連接端,以將第一位元線電壓信號與第二位元線電壓信號傳送給第2j-1個位元線與第2j個位元線,其中所述第2j-1個位元線與所述第2j個位元線為彼此相鄰的所述兩個位元線,M為偶數,j為1至M/2的其中一個整數。 A drive device for fault detection of a memory module, which is used for selecting two adjacent word lines and two adjacent bit lines of a memory module to obtain a bright spot image of the memory module through an illumination detection device to perform predictive failure analysis of the memory module, and the driving device includes: a word line selector, having N word line connection terminals respectively electrically connected to the N word lines of the memory module, The 2i-1th word line connection terminal and the 2i th word line connection terminal are selected according to the first control signal, so as to transmit the first word line voltage signal and the second word line voltage signal to the 2i-1th word line voltage signal A word line and a 2i-th word line, wherein the 2i-1-th word line and the 2i-th word line are the two adjacent word lines, N is an even number, and i is an integer from 1 to N/2; and a bit line selector, having M bit line connection ends respectively electrically connected to the M bit lines of the memory module, and selecting the 2j- 1 bit line connection terminal and 2jth bit line connection terminal to transmit the first bit line voltage signal and the second bit line voltage signal to the 2j-1th bit line and the 2jth bit line line, wherein the 2j-1th bit line and the 2jth bit line are the two adjacent bit lines, M is an even number, and j is an integer from 1 to M/2 . 如請求項1所述的驅動裝置,其中所述字元線選擇器包括:第一開關裝置,具有所述第1、3、...、N-1個字元線連接端,受控於所述第一控制信號以選擇所述第2i-1個字元線連接端,以用於將接收到的所述第一字元線電壓信號透過選擇的所述第2i-1個字元線連接端傳送至所述第2i-1個字元線;以及 第二開關裝置,具有所述第2、4、...、N個字元線連接端,受控於所述第一控制信號以選擇所述第2i個字元線連接端,以用於將接收到的所述第二字元線電壓信號透過選擇的所述第2i個字元線連接端傳送至所述第2i個字元線。 The driving device of claim 1, wherein the word line selector comprises: a first switching device having the first, third, ..., N-1 word line connection terminals, controlled by The first control signal is used to select the 2i-1 th word line connection terminal for passing the received first word line voltage signal through the selected 2i-1 th word line connecting end to the 2i-1 word line; and The second switch device has the 2nd, 4th, . The received second word line voltage signal is transmitted to the 2i th word line through the selected 2i th word line connection terminal. 如請求項2所述的驅動裝置,其中所述位元線選擇器包括:第三開關裝置,具有所述第1、3、...、M-1個位元線連接端,受控於所述第一控制信號以選擇所述第2j-1個位元線連接端,以用於將接收到的所述第一位元線電壓信號透過選擇的所述第2j-1個位元線連接端傳送至所述第2j-1個位元線;以及第四開關裝置,具有所述第2、4、...、M個位元線連接端,受控於所述第二控制信號以選擇所述第2j個位元線連接端,以用於將接收到的所述第二位元線電壓信號透過選擇的所述第2j個位元線連接端傳送至所述第2j個位元線。 The driving device according to claim 2, wherein the bit line selector comprises: a third switching device having the 1st, 3rd, ..., M-1 bit line connection terminals, controlled by The first control signal is used to select the 2j-1 th bit line connection terminal for passing the received first bit line voltage signal through the selected 2j-1 th bit line The connection terminal is transmitted to the 2j-1 bit line; and a fourth switch device has the 2, 4, . . . , M bit line connection terminals, controlled by the second control signal to select the 2jth bit line connection terminal for transmitting the received second bit line voltage signal to the 2jth bit through the selected 2jth bit line connection terminal meta line. 如請求項3所述的驅動裝置,其中所述字元線選擇器更包括第一字元信號腳位、第二字元信號腳位與第一控制信號腳位,所述第一字元信號腳位與所述第二字元信號腳位分別電性連接所述第一開關裝置與所述第二開關裝置,以及所述第一控制信號腳位電性連接所述第一開關裝置與所述第二開關裝置,且所述第一字元信號腳位、所述第二字元信號腳位與所述第一控制信號腳位分別接收所述第一字元線電壓信號、所述第二字元線電壓信號與所述第一控制信號;所述位元線選擇器更包括第一位元信號腳位、第二位元信號腳位與第二控制信號腳位,所述第一位元信號腳位與所述第二位元信號腳位分別電性連接所述第三開關裝置與所述第四開關裝置,以及所述第二控制信號腳位電性連接所述第三開關裝置與所述第四開關裝置,且所述第一位元信號腳位、所述第二位元信號腳與所述第二控制信號腳位分別接收所述第一位元線電壓信號、 所述第二位元線電壓信號與所述第二控制信號。 The driving device of claim 3, wherein the word line selector further comprises a first word signal pin, a second word signal pin and a first control signal pin, the first word signal The pin and the second character signal pin are electrically connected to the first switch device and the second switch device, respectively, and the first control signal pin is electrically connected to the first switch device and the second switch device. the second switch device, and the first word signal pin, the second word signal pin and the first control signal pin respectively receive the first word line voltage signal, the first Two word line voltage signals and the first control signal; the bit line selector further includes a first bit signal pin, a second bit signal pin and a second control signal pin, the first The bit signal pin and the second bit signal pin are respectively electrically connected to the third switch device and the fourth switch device, and the second control signal pin is electrically connected to the third switch device and the fourth switch device, and the first element signal pin, the second element signal pin and the second control signal pin respectively receive the first element line voltage signal, the second bit line voltage signal and the second control signal. 如請求項1所述的驅動裝置,其中所述第一字元線電壓信號的位準高於所述第二字元線電壓信號的位準,或者所述第一字元線電壓信號的位準低於所述第二字元線電壓信號的位準;所述第一位元線電壓信號的位準高於所述第二位元線電壓信號的位準,或者所述第一位元線電壓信號的位準低於所述第二位元線電壓信號的位準。 The driving device of claim 1, wherein the level of the first word line voltage signal is higher than the level of the second word line voltage signal, or the level of the first word line voltage signal is lower than the level of the second word line voltage signal; the level of the first word line voltage signal is higher than the level of the second bit line voltage signal, or the first word The level of the line voltage signal is lower than the level of the second bit line voltage signal. 一種用於記憶體模塊故障檢測的驅動裝置,其用於選擇記憶體模塊的任一條字元線與任一條位元線,以透過照射檢測裝置獲取所述記憶體模塊的亮點影像來進行所述記憶體模塊的預測性故障分析,且所述驅動裝置包括:字元線選擇器,具有N個字元線連接端分別電性連接所述記憶體模塊的N個字元線,根據第一控制信號選擇第x個字元線連接端,以將字元線電壓信號傳送給所述第x個字元線,其中N為整數,x為1至N的其中一個整數;以及位元線選擇器,具有M個位元線連接端分別電性連接所述記憶體模塊的M個位元線,根據第二控制信號選擇第y個位元線連接端,以將位元線電壓信號傳送給所述第y個位元線,其中M為整數,y為1至M的其中一個整數。 A drive device for fault detection of a memory module, which is used to select any word line and any bit line of a memory module, so as to obtain a bright spot image of the memory module through an illumination detection device to perform the described Predictive failure analysis of the memory module, and the driving device includes: a word line selector, having N word line connection ends respectively electrically connected to the N word lines of the memory module, according to the first control a signal select xth word line connection terminal to transmit a word line voltage signal to the xth word line, where N is an integer and x is an integer from 1 to N; and a bit line selector , having M bit line connection terminals respectively electrically connected to the M bit lines of the memory module, and selecting the yth bit line connection terminal according to the second control signal to transmit the bit line voltage signal to all The yth bit line, where M is an integer, and y is an integer from 1 to M. 一種用於記憶體模塊故障檢測的檢測系統,包括:如請求項1至6其中一項所述的驅動裝置;以及所述照射檢測裝置。 A detection system for fault detection of a memory module, comprising: the driving device according to one of claims 1 to 6; and the irradiation detection device. 如請求項7所述的檢測系統,其中所述照射檢測裝置為雷射光束電阻異常偵測(OBIRCH)裝置或微光顯微鏡(EMMI)裝置。 The detection system of claim 7, wherein the irradiation detection device is a laser beam resistance abnormality detection (OBIRCH) device or a low-light microscope (EMMI) device. 一種記憶體裝置,包括:如請求項1至6其中一項的驅動裝置;以及所述記憶體模塊。 A memory device, comprising: a drive device according to one of claims 1 to 6; and the memory module. 如請求項9所述的記憶體裝置,其中所述驅動裝置更包括插槽(socket),且信號提供裝置透過所述插槽提供多個信號給所述字元線選擇器與所述位元線選擇器。 The memory device of claim 9, wherein the driving device further comprises a socket, and the signal providing means provides a plurality of signals to the word line selector and the bit through the socket Line selector.
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