TWI760737B - Flexible circuit substrate and chip on film package structure - Google Patents

Abstract

A flexible circuit substrate includes a flexible film, a plurality of leads, and a solder resist layer. The flexible film has two transmission areas located on both sides of the flexible film and a packaging area located between the two transmission areas. The packaging area has a chip bonding area, a coverage area surrounding the chip bonding area, and an external connection area located outside the coverage area. The plurality of leads are disposed on the flexible film and located in the packaging area. The plurality of leads includes a plurality of inner lead portions and a plurality of outer lead portions. The plurality of inner lead portions extend into the chip bonding area, and the plurality of outer lead portions extend from the coverage area to the external connection area and are arranged adjacent to each other between the two transmission areas, wherein each of the outermost outer lead portions has at least one hollow pattern. The solder resist layer is disposed on the flexible film and is located in the coverage area. The solder resist layer partially covers the plurality of leads and exposes the chip bonding area and the external connection area. A chip on film package structure is also provided.

Description

Flexible circuit substrate and thin film flip chip package structure

The present invention relates to a circuit substrate and a packaging structure, and more particularly, to a flexible circuit substrate and a film-on-chip packaging structure.

Chip-on-Film (COF) packaging structure is a packaging structure using tape and reel automatic bonding technology. Since the bonding between the film-on-chip package structure and other components (such as panels, etc.) needs to be high-density bonding, the blank area between the transmission area of the flexible film and the external pins is usually designed for external pins The alignment mark of the bonding operation, and the alignment mark is generally a solid metal pattern formed together with the lead forming process. By confirming that the alignment mark and the alignment pattern on other components are in shape and position The corresponding coincidence to ensure the accuracy of the outer pin bonding operation.

However, as the density of integrated circuits increases, the solid alignment marks on the blank area are getting closer and closer to the transfer area, and the mechanism on the machine that drives the flexible film to move or the gap between the film-on-chip packaging structure and the winding The bumps on the tape (Spacer) can easily cause damage to the solid alignment mark or discoloration by friction, which in turn causes the alignment mark to reflect light or The deformation leads to poor alignment accuracy of the alignment marks, and reduces the bonding yield between the thin film-on-chip package structure and other components.

The present invention provides a flexible circuit substrate and a chip-on-film packaging structure. The hollow pattern used as an alignment mark can have better alignment accuracy, so as to increase the bonding between the chip-on-film packaging structure and other components. Yield.

A flexible circuit substrate of the present invention comprises a flexible film, a plurality of pins and a solder resist layer. The flexible film has two transmission areas located on both sides of the flexible film and an encapsulation area located between the two transmission areas. The package area includes a die bonding area, a coverage area surrounding the die bonding area, and an external area outside the coverage area. A plurality of pins are arranged on the flexible film and located in the package area. The plurality of pins include a plurality of inner pin portions and a plurality of outer pin portions, the plurality of inner pin portions extend into the die bonding area, and the plurality of outer pin portions extend from the coverage area to the outer area and are located between the two The transmission areas are arranged adjacent to each other, wherein the outermost outer pin portions respectively have at least one hollow pattern. The solder mask is arranged on the flexible film and is located in the coverage area. The solder mask partially covers the plurality of pins and exposes the die bonding area and the external area.

In an embodiment of the present invention, the outermost outer lead portions are the two outer lead portions closest to the two transmission regions.

In an embodiment of the present invention, the above-mentioned at least one hollow pattern penetrates the outermost outer pin portion and exposes the flexible film.

In an embodiment of the present invention, the above-mentioned outermost outer pin portion is a dummy Set pins.

In an embodiment of the present invention, in a plan view, the shape of the at least one hollow pattern is a rectangle, a circle, a T-shape, a cross, or a combination thereof.

In an embodiment of the present invention, the above-mentioned at least one hollow pattern includes two hollow patterns.

In an embodiment of the present invention, the above-mentioned two hollow patterns are arranged along the extending direction of the outer lead portion.

In an embodiment of the present invention, the width of the outermost outer lead portion is greater than the width of the remaining outer lead portions.

In an embodiment of the present invention, the width of the outermost outer lead portion is between 100 μm and 350 μm.

In an embodiment of the present invention, the shortest distance from the outermost outer pin portion to the edge of the flexible film is not less than 3.5 mm.

A film-on-chip package structure of the present invention includes the above-mentioned flexible circuit substrate and a chip. The chip is disposed on the flexible circuit substrate, and is located in the chip bonding area, wherein the chip is electrically connected to the plurality of inner lead parts.

Based on the above, in the film-on-chip package structure of the present invention, at least one hollow pattern that transmits light is formed on the outermost lead portion of the flexible circuit substrate, and the auxiliary light source (positive light source or backlight source) is used. At the bottom, the alignment pattern on other components (such as a panel) located below can be seen through the hollow pattern, so it can be used as an alignment mark when the thin-film-on-chip package structure is bonded to other components. In addition, since the hollow pattern is located on the outermost pin part, it is more efficient than design in transmission For the solid alignment mark on the blank area between the area and the pin, the hollow pattern can be farther away from the transfer area, so it can avoid the alignment caused by the mechanism on the machine that drives the flexible circuit substrate or the bumps on the spacer belt. Mark damage or friction discoloration, thereby preventing the occurrence of the situation that the film-on-chip packaging structure and other components cannot be accurately aligned due to the damage and discoloration of the alignment mark. In other words, the hollow pattern used as the alignment mark on the flexible circuit substrate can have better alignment accuracy, so as to increase the bonding yield between the film-on-chip package structure and other components.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.

10: Transfer area

12: Transmission hole

20: Package area

202: Wafer Bonding Area

204: Coverage area

206: Outboard area

30: Other components

31: Alignment pattern

100, 100a, 100b: Thin film flip chip package structure

110: Flexible circuit substrate

112: Flexible film

114, 115: pins

1141: Inner pin part

1142, 1142': outer pin part

1142a, 1142a1, 1142a2: hollow pattern

1152: Solid registration mark

116: Solder mask

120: Wafer

A: area

A1: Blank area

D: extension direction

E: edge

w1, w2: width

L: shortest distance

FIG. 1A is a schematic top view of a chip on film packaging structure according to an embodiment of the present invention.

FIG. 1B is an enlarged schematic view of area A of FIG. 1A .

FIG. 1C is a partially enlarged schematic view of the chip on film package structure of FIG. 1A when it is bonded with other components.

FIG. 1D is a partial top plan view of a chip-on-film packaging structure of the prior art.

FIG. 2 is a partial top plan view of a chip on film packaging structure according to another embodiment of the present invention.

FIG. 3 is a partial top plan view of a chip on film packaging structure according to another embodiment of the present invention.

The present invention is more fully described with reference to the drawings of this embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thickness, size or size of layers or regions in the drawings may be exaggerated for clarity.

FIG. 1A is a schematic top view of a chip on film packaging structure according to an embodiment of the present invention. FIG. 1B is an enlarged schematic view of area A of FIG. 1A . FIG. 1C is a partially enlarged schematic view of the chip on film package structure of FIG. 1A when it is bonded with other components. FIG. 1D is a partial top plan view of a chip-on-film packaging structure of the prior art. 1A to FIG. 1C at the same time, in this embodiment, the chip on film package structure 100 includes a flexible circuit substrate 110 and a chip 120, wherein the flexible circuit substrate 110 includes a flexible film 112, a plurality of pins 114 and solder mask 116 .

Further, the flexible film 112 has two transmission areas 10 located on both sides and an encapsulation area 20 located between the two transmission areas 10, wherein the transmission area 10 may have transmission holes 12 for transmission and positioning . The package area 20 includes a die bonding area 202 , a coverage area 204 surrounding the die bonding area 202 , and an external area 206 located outside the coverage area 204 . In addition, the material of the flexible film 112 is, for example, polyethylene terephthalate (PET), polyimide (PI), polyethersulfone (PES), and carbonate (PC). ) or other suitable flexible material.

A plurality of pins 114 are disposed on the flexible film 112 and located in the package area 20 . The plurality of pins 114 include a plurality of inner pin parts 1141 and a plurality of outer pin parts 1142 , wherein a plurality of inner lead portions 1141 extend into the die bonding area 202 , and a plurality of outer lead portions 1142 extend from the coverage area 204 to the outer area 206 and are adjacently arranged between the two transfer areas 10 . In addition, the outermost outer pin portions 1142' respectively have at least one hollow pattern 1142a.

On the other hand, the solder mask layer 116 is disposed on the flexible film 112 and located in the cover area 204 , and the solder mask layer 116 partially covers the plurality of pins 114 and exposes the die bonding area 202 and the external area 206 . The chip 120 is disposed on the flexible circuit substrate 110 and located in the chip bonding area 202 , wherein the chip 120 is electrically connected to the plurality of inner lead portions 1141 . More specifically, the chip 120 is electrically connected to the plurality of inner lead portions 1141 through a plurality of metal bumps (not shown).

In the chip-on-film package structure 100 of the present embodiment, since the hollow pattern 1142a of the flexible circuit substrate 110 is light-transmitting, with the aid of a light source (positive light source or a backlight), the hollow pattern 1142a can be used to view the lower side. The pattern can be used as an alignment mark when the chip on film package structure 100 is bonded to other components (eg, a panel). More specifically, referring to FIG. 1C , when the external lead portion 1142 on the chip-on-film package structure 100 and the electrical terminals (not shown) on the other components 30 are joined together, the transparent transparent The shape of the hollow pattern 1142a corresponds to whether the shape of the hollow pattern 1142a coincides with the alignment pattern 31 on the other components 30, so that the outer pin portion 1142 and the electrical terminal can be accurately connected. In addition, since the hollow pattern 1142a is disposed on the outermost outer pin portion 1142', as a result, compared with the solid alignment mark designed on the blank area A1 between the transmission area 10 and the pin 115 in FIG. 1D For 1152, the hollow pattern 1142a can be farther away from the transmission area 10, so it can avoid the machine during the transmission process. The mechanism (such as a ratchet or roller) on the stage that drives the flexible circuit substrate 110 to move scratches the alignment marks, or when the flexible circuit substrate 110 is rolled up with the spacer belt, avoid the spacer belt near the corresponding transmission area 10 The provided bumps are rubbed to damage the alignment marks, thereby preventing the occurrence of a situation where the thin film chip-on-package structure 100 and other components cannot be accurately aligned due to damage to the alignment marks. In other words, the hollow pattern 1142a used as the alignment mark on the flexible circuit substrate 110 can have better alignment accuracy, so as to increase the bonding yield between the thin film on chip package structure and other components.

Further, the current solid alignment marks 1152 are usually formed in the same process as the pins 115, and the formation method is generally to etch the copper layer to form the respective separated pins 115 and the solid alignment marks 1152, and then the copper layer is formed. A tin plating layer is formed on the layer. If the solid alignment mark 1152 rubs with the driving mechanism on the machine or the bump on the spacer belt, it may also cause the solid alignment mark 1152 to change color and affect the interpretation of the image, thereby causing the inability to accurately align. Therefore, with the design of the hollow pattern 1142a in this embodiment, even if the tin layer on the outermost pin portion 1142' is rubbed and discolored, the interpretation of the hollow pattern 1142a will not be affected, so the occurrence of poor alignment can be avoided. .

In one embodiment, the outermost outer pin parts 1142' may be the two outer pin parts 1142 closest to the two transmission regions 10. However, the present invention is not limited thereto, and the number and position of the outermost outer pin portions 1142' may be determined according to actual design requirements.

In one embodiment, at least one hollow pattern 1142a may penetrate through the outermost pin portion 1142' and expose the flexible film 112, so the light source can be selected A positive light source or a backlight source is used to make the selection of the light source more flexible, but the present invention is not limited thereto.

In one embodiment, the outermost lead portion 1142' is, for example, a dummy lead, but the invention is not limited thereto. Here, the dummy pins are, for example, located on the flexible film 112 where no signal pins pass through, and are only provided to reinforce the structural strength of the flexible film 112 .

In one embodiment, as shown in FIGS. 1A and 1B , the hollow pattern 1142a may be a plurality of hollow patterns 1142a. For example, the hollow pattern 1142a may include two hollow patterns 1142a1 and 1142a2. In addition, in a top view, the shape of the hollow pattern 1142a may be a rectangle, a circle, a T-shape, a cross shape or a combination thereof. For example, the two hollow patterns 1142a1 and 1142a2 may be a combination of a circle and a rectangle, respectively. However, the present invention is not limited thereto, and in other embodiments, the number and shape of the plurality of hollow patterns 1142a may have different combinations.

In one embodiment, the two hollow patterns 1142a1 and 1142a2 may be arranged along the extending direction D of the outer lead portion 1142 . However, the present invention is not limited to this, and the two hollow patterns 1142a1 and 1142a2 may also have different arrangements according to actual design requirements.

In one embodiment, the width w1 of the outermost outer pin portion 1142 ′ may be greater than the width w2 of the remaining outer pin portions 1142 , so that the outermost outer pin portion 1142 ′ has a larger space for setting the hollow pattern. 1142a. For example, the width w1 of the outermost outer lead portion 1142' may be between 100 micrometers (micrometer, μm) to 350 micrometers, and the width w2 of the remaining outer lead portions 1142 may be between 20 micrometers to 40 microns. However, the present invention is not limited thereto, and the width w1 of the outermost outer pin portion 1142' and the width w2 of the remaining outer pin portions 1142 can be adjusted according to actual design requirements.

In one embodiment, the outermost outer pin portion 1142' to the edge E of the flexible film 112 may have the shortest distance L, so as to avoid scratching the outermost outer pin portion 1142' during the transmission process, thereby reducing the Bonding yield of the chip on film package structure 100 . For example, the shortest distance L may be not less than 3.5 millimeters (millimeter, mm), but the present invention is not limited thereto.

It must be noted here that the following embodiments use the element numbers and parts of the above-mentioned embodiments, wherein the same or similar numbers are used to represent the same or similar elements, and the description of the same technical content is omitted, and the description of the omitted part is omitted. Reference may be made to the foregoing embodiments, and detailed descriptions in the following embodiments will not be repeated.

FIG. 2 is a partial top plan view of a chip on film packaging structure according to another embodiment of the present invention. Referring to FIG. 2 , the chip-on-film package structure 100a of this embodiment is similar to the chip-on-film package structure 100 in the above-mentioned embodiment, but the difference is that the two hollow patterns 1142a1 and 1142a2 can be a combination of T-shape and rectangle, respectively.

FIG. 3 is a partial top plan view of a chip on film packaging structure according to another embodiment of the present invention. Referring to FIG. 3 , the chip on film package structure 100b of this embodiment is similar to the chip on film package structure 100 in the above-mentioned embodiment, and the difference is that the two hollow patterns 1142a1 and 1142a2 can be a combination of a cross shape and a T shape, respectively. .

It should be noted that the present invention does not limit the number, shape and arrangement of the hollow patterns 1142a in the foregoing embodiments, as long as the outermost pin portion is the outermost Each of 1142' having at least one hollow pattern 1142a belongs to the protection scope of the present invention.

To sum up, in the chip-on-film package structure of the present invention, at least one hollow pattern that transmits light is formed on the outermost pin portion of the flexible circuit substrate, and with the assistance of a light source, the hollow pattern can be transmitted through the hollow. The pattern sees the alignment pattern on other components (such as a panel) located below, so it can be used as an alignment mark when the thin-film-on-chip package structure is bonded to other components. In addition, since the hollow pattern is disposed on the outermost outer pin portion, the hollow pattern can be farther away from the transmission area than the solid alignment marks designed on the blank area between the transmission area and the lead. Therefore, it can avoid the alignment mark damage or friction discoloration caused by the mechanism on the machine that drives the flexible circuit substrate to move or the bumps on the spacer belt, thereby preventing the film-on-chip packaging structure and other components from being damaged and discolored due to the alignment mark. A situation where accurate alignment is not possible occurs. In other words, the hollow pattern used as the alignment mark on the flexible circuit substrate can have better alignment accuracy, so as to increase the bonding yield between the film-on-chip package structure and other components.

Although the present invention has been disclosed as above with examples, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the appended patent application.

10: Transfer area

12: Transmission hole

20: Package area

202: Wafer Bonding Area

204: Coverage area

206: Outboard area

100: Thin film flip chip package structure

110: Flexible circuit substrate

112: Flexible film

114: pin

1141: Inner pin part

1142, 1142': outer pin part

1142a, 1142a1, 1142a2: hollow pattern

116: Solder mask

120: Wafer

A: area

D: extension direction

E: edge

Claims (10)

A flexible circuit substrate, comprising: a flexible film, having two transmission areas located on both sides of the flexible film and an encapsulation area located between the two transmission areas, wherein the encapsulation area has a die bonding area, a covering area surrounding the die bonding area, and an external area located outside the covering area; a plurality of pins are disposed on the flexible film and located in the packaging area, the plurality of pins The lead includes a plurality of inner lead portions and a plurality of outer lead portions, the plurality of inner lead portions extend into the die bonding area, and the plurality of outer lead portions extend from the footprint area to The outer region is adjacently arranged between the two transmission regions, wherein the outermost pin portions respectively have at least one hollow pattern, wherein the at least one hollow pattern only penetrates the outermost outer portion. a lead portion, and the flexible film is exposed; and a solder resist layer, disposed on the flexible film and located in the coverage area, the solder resist layer partially covers the plurality of leads and exposes extracting the wafer bonding area and the external area. The flexible circuit substrate according to claim 1, wherein the outermost lead portions are the two outer lead portions closest to the two transmission regions. The flexible circuit substrate according to claim 1, wherein the outermost pin portion is a dummy pin. The flexible circuit substrate according to claim 1, wherein in a top view, the shape of the at least one hollow pattern is a rectangle, a circle, a T-shape, a cross shape or a combination thereof. The flexible circuit substrate of claim 1, wherein the at least one hollow pattern includes two hollow patterns. The flexible circuit substrate according to claim 5, wherein the two hollow patterns are arranged along the extending direction of the outer lead portion. The flexible wiring substrate according to claim 1, wherein the outermost lead portion has a width greater than that of the remaining outer lead portions. The flexible circuit substrate according to claim 7, wherein the width of the outermost lead portion is between 100 microns and 350 microns. The flexible circuit substrate according to claim 1, wherein the shortest distance from the outermost pin portion to the edge of the flexible film is not less than 3.5 mm. A film-on-chip package structure, comprising: the flexible circuit substrate according to any one of the first to ninth claims in the scope of application; and a chip, disposed on the flexible circuit substrate and located in the flexible circuit substrate in the die bonding area, wherein the die is electrically connected to the plurality of inner lead portions.

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