TWI745980B - Pixel structure - Google Patents

Pixel structure Download PDF

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TWI745980B
TWI745980B TW109117387A TW109117387A TWI745980B TW I745980 B TWI745980 B TW I745980B TW 109117387 A TW109117387 A TW 109117387A TW 109117387 A TW109117387 A TW 109117387A TW I745980 B TWI745980 B TW I745980B
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edge
width
slit
pixel
data line
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TW109117387A
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TW202144884A (en
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方翼銘
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凌巨科技股份有限公司
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)

Abstract

本發明提供一種畫素結構,其係利用一共用電極設置於一畫素電極之上方,該共用電極設置一第一狹縫,該第一狹縫具有一第一邊緣及一第二邊緣,該第一邊緣與該第二邊緣之間具有一第一寬度,該畫素電極具有一第一畫素邊緣位於該第一邊緣與該第二邊緣之間,該第二邊緣與該第一畫素邊緣之間具有一第二寬度,以該第一寬度大於等於該第二寬度,提升畫素結構之光線穿透度。The present invention provides a pixel structure, which uses a common electrode arranged above a pixel electrode, the common electrode is provided with a first slit, the first slit has a first edge and a second edge, the There is a first width between the first edge and the second edge, the pixel electrode has a first pixel edge located between the first edge and the second edge, the second edge and the first pixel There is a second width between the edges, and the first width is greater than or equal to the second width to improve the light penetration of the pixel structure.

Description

畫素結構Pixel structure

本發明是關於一種畫素結構,尤其係指一種提升光線穿透度之面板畫素結構。 The present invention relates to a pixel structure, in particular to a panel pixel structure that improves light penetration.

薄膜電晶體液晶顯示器(Thin film transistor liquid crystal display,常簡稱為TFT-LCD)是多數液晶顯示器的一種,它使用薄膜電晶體技術改善影象品質,薄膜電晶體液晶顯示器被統稱為LCD,是一種主動式矩陣LCD,常被應用在電視、平面顯示器及投影機上。 Thin film transistor liquid crystal display (Thin film transistor liquid crystal display, often referred to as TFT-LCD) is one of most liquid crystal displays. It uses thin film transistor technology to improve image quality. Thin film transistor liquid crystal displays are collectively referred to as LCDs. Active matrix LCDs are often used in TVs, flat-panel displays and projectors.

薄膜電晶體液晶顯示器面板可視為兩片玻璃基板中間夾著一層液晶,上層的玻璃基板是與彩色濾光片、而下層的玻璃則有電晶體鑲嵌於上。當電流通過電晶體產生電場變化,造成液晶分子偏轉,藉以改變光線的偏極性,再利用偏光片決定畫素的明暗狀態。此外,上層玻璃因與彩色濾光片貼合,形成每個畫素各包含紅藍綠三顏色,這些發出紅藍綠色彩的畫素便構成了面板上的影像畫面,薄膜電晶體液晶顯示器面板使用之包含多種,其中使用邊緣電場切換(FFS,Fringe Field Switching)廣視角技術之產品越來越多,於未來的開發也將越趨於頻繁。 The thin-film transistor liquid crystal display panel can be regarded as a layer of liquid crystal sandwiched between two glass substrates. The upper glass substrate is with a color filter, and the lower glass has a transistor inlaid on it. When the current passes through the transistor, the electric field changes, causing the liquid crystal molecules to deflect, thereby changing the polarization of the light, and then using the polarizer to determine the light and dark state of the pixel. In addition, the upper glass is laminated with the color filter, so that each pixel contains three colors of red, blue, and green. These red, blue, and green pixels constitute the image on the panel. The thin-film transistor liquid crystal display panel There are many kinds of products used. Among them, there are more and more products using Fringe Field Switching (Fringe Field Switching) wide viewing angle technology, and future developments will become more frequent.

邊緣電場切換(FFS,Fringe Field Switching)廣視角技術,又名為邊界電場切換廣視角技術,該廣視角技術是由橫向電場效應(IPS,In Plane Switching)顯示技術延伸而來,其具有低耗電、高透光率、高亮度、反應快速、無色偏、高色彩還原性等特性;邊緣電場切換廣視角技術與傳統 的顯示技術相比,具有驅動電壓低、可視角角度較大、反應速度快、亮度較高等,與橫向電場效應顯示技術比較,邊緣電場切換廣視角技術較為省電,且具有穿透率、解析度較高等優點。 Fringe Field Switching (FFS, Fringe Field Switching) wide viewing angle technology, also known as boundary electric field switching wide viewing angle technology, the wide viewing angle technology is extended from the lateral electric field effect (IPS, In Plane Switching) display technology, which has low power consumption Electricity, high light transmittance, high brightness, fast response, no color shift, high color reproduction and other characteristics; edge electric field switching wide viewing angle technology and traditional Compared with the display technology, it has the advantages of low driving voltage, larger viewing angle, fast response speed, and higher brightness. Compared with the lateral electric field effect display technology, the fringe electric field switching wide viewing angle technology is more power-saving, and has transmittance and resolution. Advantages such as higher degrees.

然而,習知技術於改善邊緣電場切換(FFS)廣視角技術顯示器在畫素電極對應電極狹縫的位置上未有過較為詳細以及整體的研究,但在先前的設計概念雖然有疑慮但無此項規範,故在面板光學上因出光不均產生的光斑問題(Mura)所產生之穿透度不足,其持續的影響面板廠商終端產品的效能表現以及信賴性,因此面板產業界急需一種可提升光線穿透度之面板畫素結構設計。 However, there has not been a more detailed and overall study on the position of the pixel electrode corresponding to the electrode slit in the conventional technology to improve the fringe field switching (FFS) wide viewing angle technology display. However, although there are doubts about the previous design concept, there is no such thing. Therefore, the lack of penetration caused by the spot problem (Mura) caused by uneven light output on the panel optics will continue to affect the performance and reliability of the panel manufacturers’ terminal products. Therefore, the panel industry urgently needs an improvement Panel pixel structure design for light penetration.

有鑑於上述習知技術之問題,本發明提供一種畫素結構,其係將畫素電極之邊緣設置於共用電極之狹縫內側,該狹縫具有第一寬度,該畫素電極之邊緣與該狹縫之邊緣具有第二寬度,該第一寬度大於等於該第二寬度,以此結構提供提升光線穿透度之設計。 In view of the above-mentioned problems of the prior art, the present invention provides a pixel structure in which the edge of the pixel electrode is arranged inside the slit of the common electrode, the slit has a first width, and the edge of the pixel electrode is connected to the The edge of the slit has a second width, and the first width is greater than or equal to the second width, and this structure provides a design for improving light penetration.

本發明之一目的在於提供一種畫素結構,其係將畫素電極之邊緣設置於共用電極之狹縫內側,該共用電極之狹縫具有第一寬度,而該畫素電極之邊緣與該狹縫之邊緣具有第二寬度,其中該第一寬度大於等於該第二寬度,以此結構提升光線穿透度。 An object of the present invention is to provide a pixel structure in which the edge of the pixel electrode is arranged inside the slit of the common electrode, the slit of the common electrode has a first width, and the edge of the pixel electrode is connected to the slit of the common electrode. The edge of the slit has a second width, wherein the first width is greater than or equal to the second width, so that the structure improves light penetration.

為達到上述所指稱之各目的與功效,本發明提供一種畫素結構,其包含:一基板、一第一資料線、一第二資料線、一畫素電極以及一共用電極,該第一資料線設置於該基板之一表面上,該第二資料線對應該第一資料線設置於該基板之該表面上,該畫素電極設置於該基板之該表面上,並位於該第一資料線與該第二資料線之間,該共用電極設置於該畫素電極之一上方,該共用電極設置一第一狹縫,該第一狹縫位於 該第一資料線之一側;其中,該第一狹縫具有靠近該第一資料線之一第一邊緣及遠離該第一資料線之一第二邊緣,且該第一邊緣與該第二邊緣之間具有一第一寬度,該畫素電極具有一第一畫素邊緣位於該第一邊緣與該第二邊緣之間,該第二邊緣與該第一畫素邊緣之間具有一第二寬度,該第一寬度大於等於該第二寬度;利用此結構減少面板,因製程偏移或設上的誤差所產生的穿透率下降之問題。 In order to achieve the aforementioned objectives and effects, the present invention provides a pixel structure, which includes: a substrate, a first data line, a second data line, a pixel electrode, and a common electrode. The first data The line is arranged on a surface of the substrate, the second data line is arranged on the surface of the substrate corresponding to the first data line, and the pixel electrode is arranged on the surface of the substrate and is located on the first data line And the second data line, the common electrode is disposed above one of the pixel electrodes, the common electrode is disposed with a first slit, and the first slit is located A side of the first data line; wherein, the first slit has a first edge close to the first data line and a second edge far away from the first data line, and the first edge and the second There is a first width between the edges, the pixel electrode has a first pixel edge located between the first edge and the second edge, and a second pixel edge is located between the second edge and the first pixel edge. Width, the first width is greater than or equal to the second width; the use of this structure reduces the problem of reduced transmittance of the panel due to process deviation or setting errors.

本發明之一實施例中,其中該第二寬度除以該第一寬度之百分比大於等於45%並小於等於100%。 In an embodiment of the present invention, the percentage of the second width divided by the first width is greater than or equal to 45% and less than or equal to 100%.

本發明之一實施例中,其中該第一寬度係大於等於2μm,且小於等於8μm。 In an embodiment of the present invention, the first width is greater than or equal to 2 μm and less than or equal to 8 μm.

本發明之一實施例中,其中該共用電極更設置一第二狹縫,該第二狹縫設置於該第一狹縫與該第二資料線之間。 In an embodiment of the present invention, the common electrode is further provided with a second slit, and the second slit is provided between the first slit and the second data line.

本發明之一實施例中,其中該第二狹縫具有靠近該第二資料線之一第三邊緣及遠離該第二資料線之一第四邊緣,且該第三邊緣與該第四邊緣之間具有一第三寬度,該畫素電極具有一第二畫素邊緣位於該第三邊緣與該第四邊緣之間,該第四邊緣至該第二畫素邊緣之間具有一第四寬度,該第三寬度大於等於該第四寬度。 In an embodiment of the present invention, the second slit has a third edge close to the second data line and a fourth edge far away from the second data line, and the third edge and the fourth edge are A third width between the pixel electrode, a second pixel edge located between the third edge and the fourth edge, and a fourth width between the fourth edge and the second pixel edge, The third width is greater than or equal to the fourth width.

本發明之一實施例中,其中該第四寬度除以該第三寬度之百分比大於等於45%並小於等於100%。 In an embodiment of the present invention, the percentage of the fourth width divided by the third width is greater than or equal to 45% and less than or equal to 100%.

本發明之一實施例中,其中該共用電極更設置至少一中間狹縫,該至少一中間狹縫設置於該第一狹縫與該第二狹縫之間。 In an embodiment of the present invention, the common electrode is further provided with at least one middle slit, and the at least one middle slit is disposed between the first slit and the second slit.

本發明之一實施例中,其中該第三寬度係大於等於2μm,且小於等於8μm。 In an embodiment of the present invention, the third width is greater than or equal to 2 μm and less than or equal to 8 μm.

1:畫素結構 1: Pixel structure

10:基板 10: substrate

12:表面 12: surface

20:第一資料線 20: The first data line

30:第二資料線 30: The second data line

40:畫素電極 40: Pixel electrode

402:第一畫素邊緣 402: first pixel edge

404:第二畫素邊緣 404: second pixel edge

50:共用電極 50: Common electrode

52:第一狹縫 52: The first slit

522:第一邊緣 522: first edge

524:第二邊緣 524: second edge

54:第二狹縫 54: second slit

542:第三邊緣 542: The Third Edge

544:第四邊緣 544: The Fourth Edge

56:中間狹縫 56: Middle slit

W1:第一寬度 W1: first width

W2:第二寬度 W2: second width

W3:第三寬度 W3: third width

W4:第四寬度 W4: Fourth width

第1圖:其為本發明之實施例之結構示意圖;第2圖:其為本發明之實施例之第一狹縫結構放大示意圖;第3圖:其為本發明之實施例之寬度與穿透度變化示意圖;第4圖:其為本發明之實施例之其他結構示意圖;以及第5圖:其為本發明之實施例之第二狹縫結構放大示意圖。 Figure 1: It is a schematic diagram of the structure of the embodiment of the present invention; Figure 2: It is an enlarged schematic view of the structure of the first slit of the embodiment of the present invention; Figure 3: It is the width and penetration of the embodiment of the present invention Schematic diagram of transparency change; Fig. 4: It is a schematic diagram of other structures of the embodiment of the present invention; and Fig. 5: It is an enlarged schematic diagram of the second slit structure of the embodiment of the present invention.

為使 貴審查委員對本發明之特徵及所達成之功效有更進一步之瞭解與認識,謹佐以實施例及配合說明,說明如後:本發明提供一種畫素結構,其係將一畫素電極之一第一畫素邊緣設置於一共用電極之一第一狹縫內側,該第一狹縫具有一第一寬度,該第一畫素邊緣與該第一狹縫之邊緣具有一第二寬度,該第一寬度大於等於該第二寬度,以此結構解決習知面板光線穿透度不足之問題。 In order to enable your reviewer to have a further understanding and understanding of the features of the present invention and the effects achieved, examples and accompanying descriptions are provided here. The description is as follows: The present invention provides a pixel structure that combines a pixel electrode A first pixel edge is disposed inside a first slit of a common electrode, the first slit has a first width, and the first pixel edge and the edge of the first slit have a second width , The first width is greater than or equal to the second width, and this structure solves the problem of insufficient light penetration of the conventional panel.

請參閱第1圖,其為本發明之實施例之結構示意圖,如圖所示,其係一種畫素結構1,其包含一基板10、一第一資料線20、一第二資料線30、一畫素電極40以及一共用電極50;其中,該基板10之一表面12上設置該第一資料線20、該第二資料線30及該畫素電極40,其更可將該第一資料線20、該第二資料線30、一畫素電極40以及一共用電極50,複數設置並間隔排列,以形成整體面板結構;於本實施例中,該畫素結構1係邊緣電場切換(FFS)之顯示面板。 Please refer to Figure 1, which is a schematic structural diagram of an embodiment of the present invention. As shown in the figure, it is a pixel structure 1, which includes a substrate 10, a first data line 20, a second data line 30, A pixel electrode 40 and a common electrode 50; wherein, the first data line 20, the second data line 30, and the pixel electrode 40 are provided on a surface 12 of the substrate 10, and the first data line The lines 20, the second data line 30, a pixel electrode 40, and a common electrode 50 are arranged in plural and arranged at intervals to form an overall panel structure; in this embodiment, the pixel structure 1 is a fringe electric field switching (FFS ) Of the display panel.

再次參閱第1圖,如圖所示,本實施例中,該第一資料線20設置於該基板10之該表面12上,該第二資料線30對應該第一資料線20之 位置設置於該基板10之該表面12上,使其二者互相對稱,該畫素電極40設置於該基板10之該表面12上,並位於該第一資料線20與該第二資料線30之間,而該共用電極50設置於該畫素電極40之一上方,該共用電極50設置一第一狹縫52對應該畫素電極40之位置,該第一狹縫52位於該第一資料線20之一側,其係該共用電極50最靠近該第一資料線20之狹縫,該第一狹縫52具有靠近該第一資料線20之一第一邊緣522及遠離該第一資料線20之一第二邊緣524,即該第二邊緣524相較該第一邊緣522靠近該第二資料線30。 Referring again to FIG. 1, as shown in the figure, in this embodiment, the first data line 20 is disposed on the surface 12 of the substrate 10, and the second data line 30 corresponds to the first data line 20 The pixel electrode 40 is arranged on the surface 12 of the substrate 10 so that the two are symmetrical to each other. The pixel electrode 40 is arranged on the surface 12 of the substrate 10 and located on the first data line 20 and the second data line 30 The common electrode 50 is disposed above one of the pixel electrodes 40, and the common electrode 50 is disposed with a first slit 52 corresponding to the position of the pixel electrode 40, and the first slit 52 is located in the first data One side of the line 20 is the slit where the common electrode 50 is closest to the first data line 20. The first slit 52 has a first edge 522 close to the first data line 20 and away from the first data A second edge 524 of the line 20, that is, the second edge 524 is closer to the second data line 30 than the first edge 522.

再次參閱第1圖及第2圖,第2圖為本發明之實施例之第一狹縫結構放大示意圖,如圖所示,於本實施例中,該第一邊緣522與該第二邊緣524之間具有一第一寬度W1,而該畫素電極40靠近該第一資料線20之一側具有一第一畫素邊緣402,該第一畫素邊緣402位於該第一邊緣522與該第二邊緣524之間,該第二邊緣524與該第一畫素邊緣402之間具有一第二寬度W2,習知之顯示面板因為製成過程中會有該畫素電極40或該共用電極50,於製程中偏移,產生面板於顯示上有所瑕疵,因此為了防止該畫素電極40或該共用電極50之位置偏移,而影響面板於顯示品質,本實施例更定義該第一寬度W1大於等於該第二寬度W2;其中,該第一狹縫52之該第一寬度W1可為大於等於2μm,且小於等於8μm。 Referring again to Figures 1 and 2, Figure 2 is an enlarged schematic view of the first slit structure of the embodiment of the present invention. As shown in the figure, in this embodiment, the first edge 522 and the second edge 524 There is a first width W1 therebetween, and a side of the pixel electrode 40 close to the first data line 20 has a first pixel edge 402. The first pixel edge 402 is located between the first edge 522 and the first edge Between the two edges 524, there is a second width W2 between the second edge 524 and the first pixel edge 402. Because the conventional display panel has the pixel electrode 40 or the common electrode 50 during the manufacturing process, The deviation in the manufacturing process causes the panel to have defects on the display. Therefore, in order to prevent the position deviation of the pixel electrode 40 or the common electrode 50 from affecting the display quality of the panel, this embodiment further defines the first width W1 It is greater than or equal to the second width W2; wherein, the first width W1 of the first slit 52 may be greater than or equal to 2 μm and less than or equal to 8 μm.

請參閱第3圖,其為本發明之實施例之寬度與穿透度變化示意圖,如圖所示,習知之顯示面板因為製成過程中會有該畫素電極40或該共用電極50,於製程中偏移,產生面板於顯示上有所瑕疵,因此為了防止該畫素電極40或該共用電極50之位置偏移,而影響面板於顯示品質,本實施例,更定義該畫素電極40與該共用電極50之邊緣關係,為 取得有效數據以及資訊,本實施例以3μm之該第一寬度W1做為標準進行分析,如第3圖所示,該畫素電極40於該第一狹縫52之光線穿透率係T%,而該第二寬度W2除以該第一寬度W1之百分比係S%,即式(一):

Figure 109117387-A0305-02-0008-1
,如圖所示,當S%於45%時,其穿透率T%約為93%,達到人眼難以分辨差異之光線穿透率,而當S%於100%時,穿透率T%開始些微下降並呈現趨緩,由此可知於一實施例中,該第二寬度W2除以該第一寬度W1之百分比大於等於45%並小於等於100%時,其可達到較佳之功效,再參閱圖示,當S%於70%時,其穿透率T%可達到接近100%,因此於另一實施例中,該第二寬度W2除以該第一寬度W1之百分比大於等於70%並小於等於100%,其可達到更佳之功效。 Please refer to FIG. 3, which is a schematic diagram of the width and transmittance changes of the embodiment of the present invention. As shown in the figure, the conventional display panel has the pixel electrode 40 or the common electrode 50 during the manufacturing process. The offset during the manufacturing process causes defects in the display of the panel. Therefore, in order to prevent the positional deviation of the pixel electrode 40 or the common electrode 50 from affecting the display quality of the panel, the pixel electrode 40 is further defined in this embodiment. The relationship with the edge of the common electrode 50, in order to obtain effective data and information, this embodiment uses the first width W1 of 3μm as a standard for analysis, as shown in Figure 3, the pixel electrode 40 is in the first narrow The light transmittance of the slit 52 is T%, and the percentage of the second width W2 divided by the first width W1 is S%, that is, formula (1):
Figure 109117387-A0305-02-0008-1
, As shown in the figure, when S% is at 45%, the transmittance T% is about 93%, reaching a light transmittance that is difficult for the human eye to distinguish, and when S% is at 100%, the transmittance T % Begins to decrease slightly and appears to slow down. It can be seen that in one embodiment, when the percentage of the second width W2 divided by the first width W1 is greater than or equal to 45% and less than or equal to 100%, it can achieve a better effect. Referring again to the figure, when S% is at 70%, the transmittance T% can reach close to 100%. Therefore, in another embodiment, the percentage of the second width W2 divided by the first width W1 is greater than or equal to 70 % Is less than or equal to 100%, which can achieve better effects.

本實施例係將該畫素電極40之該第一畫素邊緣402設置於該共用電極50設置之該第一狹縫52兩邊緣之間,使該第一狹縫52具有之該第一寬度W1,該第一畫素邊緣402與該第一狹縫52之該第二邊緣524具有該第二寬度W2,以該第一寬度W1大於等於該第二寬度W2,提升光線穿透度,以及減少出光不均之問題,從而提升面板之顯示品質。 In this embodiment, the first pixel edge 402 of the pixel electrode 40 is disposed between the two edges of the first slit 52 where the common electrode 50 is disposed, so that the first slit 52 has the first width W1, the first pixel edge 402 and the second edge 524 of the first slit 52 have the second width W2, and the first width W1 is greater than or equal to the second width W2 to improve light penetration, and Reduce the problem of uneven light output, thereby improving the display quality of the panel.

請參閱第4圖,其為本發明之實施例之其他結構示意圖,如圖所示,本實施例係基於上述實施例之結構,更於該共用電極50設置一第二狹縫54,該第二狹縫54設置於該第一狹縫52與該第二資料線30之間,該第二狹縫54位於該第二資料線30之一側,其係該共用電極50最靠近該第二資料線30之狹縫,該第二狹縫54具有靠近該第二資料線30之一第三邊緣542及遠離該第二資料線30之一第四邊緣544,即該第四邊緣544相較該第三邊緣542靠近該第一資料線20。 Please refer to FIG. 4, which is a schematic diagram of another structure of the embodiment of the present invention. As shown in the figure, this embodiment is based on the structure of the above-mentioned embodiment, and a second slit 54 is provided in the common electrode 50. Two slits 54 are provided between the first slit 52 and the second data line 30. The second slit 54 is located on one side of the second data line 30. The common electrode 50 is closest to the second data line 30. The slit of the data line 30, the second slit 54 has a third edge 542 close to the second data line 30 and a fourth edge 544 far from the second data line 30, that is, the fourth edge 544 is compared The third edge 542 is close to the first data line 20.

再次參閱第4圖及第5圖,第5圖為本發明之實施例之第二狹縫結構放大示意圖,如圖所示,於本實施例中,該第三邊緣542與該第 四邊緣544之間具有一第三寬度W3,而該畫素電極40靠近該第二資料線30之一側具有一第二畫素邊緣404,該第二畫素邊緣404位於該第三邊緣542與該第四邊緣544之間,該第四邊緣544與該第二畫素邊緣404之間具有一第四寬度W4,與該第一狹縫52及該畫素電極40之關係相同,該第二狹縫54之該第三寬度W3大於等於該第四寬度W4;於本實施例中,該第三寬度W3可為大於等於2μm,且小於等於8μm。 Referring again to Figures 4 and 5, Figure 5 is an enlarged schematic view of the second slit structure of the embodiment of the present invention. As shown in the figure, in this embodiment, the third edge 542 and the third edge There is a third width W3 between the four edges 544, and the pixel electrode 40 has a second pixel edge 404 on a side close to the second data line 30, and the second pixel edge 404 is located on the third edge 542 There is a fourth width W4 between the fourth edge 544 and the second pixel edge 404 between the fourth edge 544 and the second pixel edge 404, which is the same as the relationship between the first slit 52 and the pixel electrode 40. The third width W3 of the two slits 54 is greater than or equal to the fourth width W4; in this embodiment, the third width W3 may be greater than or equal to 2 μm and less than or equal to 8 μm.

接續上述,於本實施例中,該第三寬度W3與該第四寬度W4之關係與上述該第一狹縫52之實施例對應,其係該第三寬度W3對應該第一寬度W1,該第四寬度W4對應該第二寬度W2,如第3圖所示,該第四寬度W4除以該第三寬度W3之百分比係S%,即式(二):

Figure 109117387-A0305-02-0009-2
,該第二狹縫54與該第二畫素邊緣404之寬度及光線穿透率的關係,與上述該第一狹縫52之實施例相同,故不再贅述。 Following the above, in this embodiment, the relationship between the third width W3 and the fourth width W4 corresponds to the embodiment of the first slit 52, which is that the third width W3 corresponds to the first width W1. The fourth width W4 corresponds to the second width W2. As shown in Figure 3, the percentage of the fourth width W4 divided by the third width W3 is S%, that is, formula (2):
Figure 109117387-A0305-02-0009-2
The relationship between the width and the light transmittance of the second slit 54 and the second pixel edge 404 is the same as that of the first slit 52 described above, so it will not be repeated.

接續上述,於本實施例中,該第一狹縫52之該第一寬度W1與該第二狹縫54之該第三寬度W3可相同或相異,例如該第一寬度W1為3μm,該第三寬度W3為4μm,或該第一寬度W1與該第三寬度W3皆為5μm,本發明不在此限制。 Following the above, in this embodiment, the first width W1 of the first slit 52 and the third width W3 of the second slit 54 may be the same or different, for example, the first width W1 is 3 μm, the The third width W3 is 4 μm, or the first width W1 and the third width W3 are both 5 μm, and the present invention is not limited thereto.

接續上述,於本實施例中,該共用電極50更設置至少一中間狹縫56,該至少一中間狹縫56設置於該第一狹縫52與該第二狹縫54之間,該至少一中間狹縫56可隨面板之設計增加其數目,本實施例以一個中間狹縫56為舉例,本發明不在此限制;其中,本實施例之該至少一中間狹縫56為光線從該畫素電極40穿過該共用電極50之主要區域,即該畫素結構1之主要光線穿透來源。 Following the above, in this embodiment, the common electrode 50 is further provided with at least one middle slit 56 which is disposed between the first slit 52 and the second slit 54, and the at least one The number of middle slits 56 can be increased according to the design of the panel. In this embodiment, one middle slit 56 is taken as an example, and the present invention is not limited here. Among them, the at least one middle slit 56 in this embodiment is the light from the pixel The electrode 40 passes through the main area of the common electrode 50, that is, the main light source of the pixel structure 1.

綜上所述,本發明根據未來使用邊緣電場切換(FFS,Fringe Field Switching)廣視角技術之產品越來越多,市場普及越趨於平凡,解析度也 不斷加大,因此於面板之設計中,針對後續邊緣電場切換廣視角技術之產品定義更為詳細的設計規範,用以避免工廠製程偏移或是設計上所造成的穿透下降之問題,即本發明提供之一種畫素結構,其係將畫素電極之邊緣設置於共用電極包含之靠近資料線之狹縫內側,以定義該共用電極之狹縫具有之第一寬度,與該畫素電極之邊緣與該狹縫之邊緣具有之第二寬度提升光線穿透度,解決習知面板因出光不均(Mura)而產生光線穿透度不足之問題。 In summary, according to the present invention, there will be more and more products using Fringe Field Switching (FFS, Fringe Field Switching) wide viewing angle technology in the future. Increasingly, therefore, in the design of the panel, more detailed design specifications are defined for the products of the subsequent fringe electric field switching wide-view technology, in order to avoid the problem of factory process deviation or the penetration drop caused by the design, namely The present invention provides a pixel structure in which the edge of the pixel electrode is arranged inside the slit near the data line included in the common electrode to define the first width of the slit of the common electrode, and the pixel electrode The second width between the edge of the slit and the edge of the slit improves the light transmittance and solves the problem of insufficient light transmittance of the conventional panel due to uneven light emission (Mura).

故本發明實為一具有新穎性、進步性及可供產業上利用者,應符合我國專利法專利申請要件無疑,爰依法提出發明專利申請,祈 鈞局早日賜准專利,至感為禱。 Therefore, the present invention is really novel, progressive, and available for industrial use. It should meet the patent application requirements of my country's patent law. Undoubtedly, I filed an invention patent application in accordance with the law. I pray that the Bureau will grant the patent as soon as possible.

惟以上所述者,僅為本發明一實施例而已,並非用來限定本發明實施之範圍,故舉凡依本發明申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾,均應包括於本發明之申請專利範圍內。 However, the foregoing is only an embodiment of the present invention, and is not used to limit the scope of implementation of the present invention. Therefore, all the equivalent changes and modifications of the shape, structure, characteristics and spirit described in the scope of the patent application of the present invention are mentioned. All should be included in the scope of the patent application of the present invention.

1:畫素結構 1: Pixel structure

10:基板 10: substrate

12:表面 12: surface

20:第一資料線 20: The first data line

30:第二資料線 30: The second data line

40:畫素電極 40: Pixel electrode

402:第一畫素邊緣 402: first pixel edge

50:共用電極 50: Common electrode

52:第一狹縫 52: The first slit

522:第一邊緣 522: first edge

524:第二邊緣 524: second edge

54:第二狹縫 54: second slit

W1:第一寬度 W1: first width

W2:第二寬度 W2: second width

Claims (6)

一種畫素結構,其包含:一基板;一第一資料線,其設置於該基板之一表面上;一第二資料線,其對應該第一資料線設置於該基板之該表面上;一畫素電極,其設置於該基板之該表面上,並位於該第一資料線與該第二資料線之間;以及一共用電極,其設置於該畫素電極之一上方,該共用電極設置一第一狹縫,該第一狹縫位於該第一資料線之一側,該共用電極更設置一第二狹縫,該第二狹縫設置於該第一狹縫與該第二資料線之間;其中,該第一狹縫具有靠近該第一資料線之一第一邊緣及遠離該第一資料線之一第二邊緣,且該第一邊緣與該第二邊緣之間具有一第一寬度,該畫素電極具有一第一畫素邊緣位於該第一邊緣與該第二邊緣之間,該第二邊緣與該第一畫素邊緣之間具有一第二寬度,該第一寬度大於等於該第二寬度,該第二狹縫具有靠近該第二資料線之一第三邊緣及遠離該第二資料線之一第四邊緣,且該第三邊緣與該第四邊緣之間具有一第三寬度,該畫素電極具有一第二畫素邊緣位於該第三邊緣與該第四邊緣之間,該第四邊緣至該第二畫素邊緣之間具有一第四寬度,該第三寬度大於等於該第四寬度。 A pixel structure comprising: a substrate; a first data line arranged on a surface of the substrate; a second data line corresponding to the first data line arranged on the surface of the substrate; A pixel electrode disposed on the surface of the substrate and located between the first data line and the second data line; and a common electrode disposed above one of the pixel electrodes, and the common electrode is disposed A first slit, the first slit is located on one side of the first data line, the common electrode is further provided with a second slit, the second slit is provided between the first slit and the second data line Between; wherein, the first slit has a first edge close to the first data line and a second edge away from the first data line, and there is a first edge between the first edge and the second edge A width, the pixel electrode has a first pixel edge located between the first edge and the second edge, a second width between the second edge and the first pixel edge, the first width Greater than or equal to the second width, the second slit has a third edge close to the second data line and a fourth edge far away from the second data line, and there is between the third edge and the fourth edge A third width, the pixel electrode has a second pixel edge located between the third edge and the fourth edge, a fourth width between the fourth edge and the second pixel edge, and the first pixel edge The third width is greater than or equal to the fourth width. 如請求項1所述之畫素結構,其中該第二寬度除以該第一寬度之百分比大於等於45%並小於等於100%。 The pixel structure according to claim 1, wherein the percentage of the second width divided by the first width is greater than or equal to 45% and less than or equal to 100%. 如請求項1所述之畫素結構,其中該第一寬度係大於等於2μm,且小 於等於8μm。 The pixel structure according to claim 1, wherein the first width is greater than or equal to 2 μm and smaller It is equal to 8μm. 如請求項1所述之畫素結構,其中該第四寬度除以該第三寬度之百分比大於等於45%並小於等於100%。 The pixel structure according to claim 1, wherein the percentage of the fourth width divided by the third width is greater than or equal to 45% and less than or equal to 100%. 如請求項1所述之畫素結構,其中該共用電極更設置至少一中間狹縫,該至少一中間狹縫設置於該第一狹縫與該第二狹縫之間。 The pixel structure according to claim 1, wherein the common electrode is further provided with at least one middle slit, and the at least one middle slit is provided between the first slit and the second slit. 如請求項1所述之畫素結構,其中該第三寬度係大於等於2μm,且小於等於8μm。 The pixel structure according to claim 1, wherein the third width is greater than or equal to 2 μm and less than or equal to 8 μm.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201415146A (en) * 2012-10-08 2014-04-16 Au Optronics Corp Pixel array substrate
TW201512752A (en) * 2013-09-16 2015-04-01 Au Optronics Corp Pixel structure and manufacturing method thereof and display panel
US20150170981A1 (en) * 2013-12-12 2015-06-18 Chunghwa Picture Tubes, Ltd. Pixel array substrate and display panel
US20180004048A1 (en) * 2016-01-07 2018-01-04 Chunghwa Picture Tubes, Ltd. Method of manufacturing pixel structure of liquid crystal display panel
TW201918767A (en) * 2017-11-09 2019-05-16 中華映管股份有限公司 Pixel structure

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106597761B (en) * 2015-10-14 2020-01-14 群创光电股份有限公司 Display panel and electronic device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201415146A (en) * 2012-10-08 2014-04-16 Au Optronics Corp Pixel array substrate
TW201512752A (en) * 2013-09-16 2015-04-01 Au Optronics Corp Pixel structure and manufacturing method thereof and display panel
US20150170981A1 (en) * 2013-12-12 2015-06-18 Chunghwa Picture Tubes, Ltd. Pixel array substrate and display panel
US20180004048A1 (en) * 2016-01-07 2018-01-04 Chunghwa Picture Tubes, Ltd. Method of manufacturing pixel structure of liquid crystal display panel
TW201918767A (en) * 2017-11-09 2019-05-16 中華映管股份有限公司 Pixel structure

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