TWI744457B - 對混合記憶體模組進行存取元資料的方法及混合記憶體模組 - Google Patents

對混合記憶體模組進行存取元資料的方法及混合記憶體模組 Download PDF

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TWI744457B
TWI744457B TW107100584A TW107100584A TWI744457B TW I744457 B TWI744457 B TW I744457B TW 107100584 A TW107100584 A TW 107100584A TW 107100584 A TW107100584 A TW 107100584A TW I744457 B TWI744457 B TW I744457B
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cache
metadata
random access
dynamic random
access memory
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TW107100584A
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TW201832086A (zh
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張牧天
牛迪民
鄭宏忠
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南韓商三星電子股份有限公司
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    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
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    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
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    • G06F2212/28Using a specific disk cache architecture
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    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/28Using a specific disk cache architecture
    • G06F2212/283Plural cache memories
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    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/46Caching storage objects of specific type in disk cache
    • G06F2212/466Metadata, control data
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/50Control mechanisms for virtual memory, cache or TLB
    • G06F2212/507Control mechanisms for virtual memory, cache or TLB using speculative control
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/62Details of cache specific to multiprocessor cache arrangements
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
TW107100584A 2017-02-15 2018-01-08 對混合記憶體模組進行存取元資料的方法及混合記憶體模組 TWI744457B (zh)

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US201762459414P 2017-02-15 2017-02-15
US62/459,414 2017-02-15
US15/587,286 US10282294B2 (en) 2017-02-15 2017-05-04 Mitigating DRAM cache metadata access overhead with SRAM metadata cache and bloom filter
US15/587,286 2017-05-04

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US (1) US10282294B2 (enExample)
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US20180232310A1 (en) 2018-08-16
JP6916751B2 (ja) 2021-08-11
TW201832086A (zh) 2018-09-01
CN108427647A (zh) 2018-08-21
KR102231792B1 (ko) 2021-03-25
CN108427647B (zh) 2023-08-08
US10282294B2 (en) 2019-05-07
KR20180094469A (ko) 2018-08-23
JP2018133086A (ja) 2018-08-23

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