JP2018133086A5 - - Google Patents

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JP2018133086A5
JP2018133086A5 JP2018023874A JP2018023874A JP2018133086A5 JP 2018133086 A5 JP2018133086 A5 JP 2018133086A5 JP 2018023874 A JP2018023874 A JP 2018023874A JP 2018023874 A JP2018023874 A JP 2018023874A JP 2018133086 A5 JP2018133086 A5 JP 2018133086A5
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cache
metadata
dram
data
bloom filter
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JP2018023874A
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JP6916751B2 (ja
JP2018133086A (ja
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JP2018023874A 2017-02-15 2018-02-14 ハイブリッドメモリーモジュール及びその動作方法 Active JP6916751B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201762459414P 2017-02-15 2017-02-15
US62/459414 2017-02-15
US15/587286 2017-05-04
US15/587,286 US10282294B2 (en) 2017-02-15 2017-05-04 Mitigating DRAM cache metadata access overhead with SRAM metadata cache and bloom filter

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JP2018133086A JP2018133086A (ja) 2018-08-23
JP2018133086A5 true JP2018133086A5 (enExample) 2021-04-01
JP6916751B2 JP6916751B2 (ja) 2021-08-11

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JP2018023874A Active JP6916751B2 (ja) 2017-02-15 2018-02-14 ハイブリッドメモリーモジュール及びその動作方法

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US (1) US10282294B2 (enExample)
JP (1) JP6916751B2 (enExample)
KR (1) KR102231792B1 (enExample)
CN (1) CN108427647B (enExample)
TW (1) TWI744457B (enExample)

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CN114095585B (zh) * 2022-01-21 2022-05-20 武汉中科通达高新技术股份有限公司 数据传输方法、装置、存储介质及电子设备
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