TWI737363B - One-sided electrical measurement technology for packaging substrate - Google Patents

Abstract

A method of one-sided electrical measurement for a packaging substrate, including the following steps: providing a carrier; coating a conductive adhesive layer on the carrier; forming a redistribution layer (RDL) attached on the carrier through the conductive adhesive layer, the redistribution layer including a plurality of superimposed dielectric layers, each of which includes a plurality of conductive vias covered by a plurality of conductive patterns such that a multi-layered redistribution circuit connecting the conductive patterns on different dielectric layers; and providing a pair of measuring probes with opposite electrical polarities to measure the resistance between two conductive vias to determine the conductivity between the two conductive vias.

Description

Same-side electrical measurement technology of package substrate

The present invention relates to an electrical measurement technology for packaging substrates, and in particular to a packaging substrate and a same-side electrical measurement method for packaging substrates.

In the existing semiconductor manufacturing process, fan-out wafer level package (FOPLP) is considered to be a cost-effective next-generation highly integrated packaging IC technology. FIG. 1A shows a conventional fan-out wafer package package substrate 10, which includes a carrier 11 and a redistribution layer (RDL) 13. The redistribution layer 13 has one or a plurality of stacked dielectric layers 14 and 15, and each of the dielectric layers 14 and 15 has a plurality of conductive vias 16 and 17. The plurality of conductive vias 16, 17 are covered with conductive patterns 18, 19, thereby forming a multi-layer redistribution circuit to connect the conductive patterns of different dielectric layers. 1A and 1B, the packaging substrate 10 is then bonded to the wafer 20, and then the packaging material 30 is coated to complete the packaging of the wafer 20, as shown in FIG. 1B.

As mentioned above, if it is necessary to know whether the packaging substrate 10 is a good product, the electrical measurement can only be performed after the packaging substrate 10 and the chip 20 are bonded. As a result, once the redistribution circuit of the package substrate 10 does not work normally, it must be scrapped together with the bonded chip 20, and the loss is very large.

Therefore, how to detect the redistribution circuit of the package substrate 10 before the package substrate 10 and the chip 20 are bonded, so as to reduce the risk of the chip 20 being scrapped due to the failure of the package substrate 10, thereby improving the yield rate of the packaged chip , Has become one of the important research and development topics of the electronic packaging industry and its related electronic industries.

In view of this, the present invention provides an electrical measurement technology for a package substrate. By using a conductive adhesive layer, a package substrate and a same-side electrical measurement method for the package substrate can be realized.

In order to achieve the above objective, in one embodiment, the present invention provides a method for measuring the same-side electrical properties of a package substrate, which includes the following steps: providing a carrier; coating a conductive adhesive layer on the carrier; forming a redistribution layer , Bonded to the carrier through the conductive adhesive layer, the redistribution layer has one or more stacked dielectric layers, each dielectric layer has a plurality of conductive vias, and the plurality of conductive vias are covered with conductive patterns, thus forming Multi-layer redistribution circuit to connect the conductive patterns of different dielectric layers; and provide a pair of measurement probes with opposite polarity on the redistribution layer to measure any two conductions on the same side of the redistribution layer The resistance value between the holes is used to determine the continuity between any two conductive vias on the same side.

In one embodiment, the carrier board is formed of glass, plastic, printed circuit board or other dielectric materials.

In one embodiment, the plurality of conductive vias and the plurality of conductive patterns are formed by a deposition process, a photolithography process, and an etching process.

In one embodiment, the conductive adhesive layer can be peeled off to separate the redistribution layer from the carrier.

In one embodiment, the same-side electrical measurement method for the package substrate further includes the following steps: removing the conductive adhesive layer and the carrier; and providing a pair of measurement probes with opposite electrical polarity on the redistribution layer , To measure the resistance between any two conductive vias on the same side of the redistribution layer to determine the insulation between any two conductive vias on the same side.

In another embodiment, the present invention provides a package substrate including: a carrier; a conductive adhesive layer coated on the carrier; and a redistribution layer, which is adhered to the carrier through the conductive adhesive layer, and the redistribution layer With one or more stacked dielectric layers, each dielectric layer has a plurality of conductive vias, and the plurality of conductive vias are covered with conductive patterns, thus forming a multilayer redistribution circuit to connect the conductive patterns of different dielectric layers .

In summary, the present invention provides an electrical measurement technology for packaging substrates. Through the use of a conductive adhesive layer, a packaging substrate and a method for electrical measurement on the same side of the packaging substrate can be realized. Before chip bonding, the redistribution circuit of the package substrate is tested to reduce the risk that the chip will be scrapped due to the failure of the package substrate and improve the yield of the packaged chip.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

Please refer to FIG. 2A, which shows a schematic cross-sectional view of the package substrate 50 of the present invention and an embodiment of the same-side electrical measurement. In FIG. 2A, the carrier board 11 is provided first. Then, the conductive adhesive layer 12 is coated on the carrier board 11. After that, a redistribution layer 13 is formed, which is adhered to the carrier 11 through the conductive adhesive layer 12. The redistribution layer 13 has one or more stacked dielectric layers 14 and 15. In one embodiment, two dielectric layers 14, 15 may be used. However, the scope of the present invention is not limited to the number of laminated dielectric layers. In one embodiment, each dielectric layer has a plurality of conductive vias 16, 17, which are covered with conductive patterns 18, 19, thereby forming a multi-layer redistribution circuit to connect different media through the conductive vias 16, 17 Conductive patterns 18, 19 of the electrical layers 14, 15; Next, a pair of measurement probes 40 and 41 with opposite electrical polarity are provided on the redistribution layer 13. Based on the conductive properties of the conductive adhesive layer 12, the resistance between any two conductive vias on the same side of the redistribution layer can be measured to determine the conductivity between any two conductive vias 16 on the same side.

In one embodiment, the carrier 11 is formed of glass, plastic, printed circuit board or other dielectric materials. In one embodiment, the dielectric layers 14, 15 are formed by a deposition process, a lithography process, and an etching process. In detail, after the dielectric layer 14 is formed, a plurality of openings are formed, and then a plurality of conductive vias 16 are formed by deposition and grinding of conductive materials, and then a conductive pattern 18 is formed above them. In the same way, after the dielectric layer 15 is formed by the deposition process, a plurality of openings are formed, and then the conductive material is deposited and polished to form a plurality of conductive vias 17, and then a conductive pattern 19 is formed above them.

In short, the plurality of conductive vias 16, 17 and the plurality of conductive patterns 18, 19 are formed by a deposition process, a photolithography process, and an etching process. The above-mentioned related semiconductor manufacturing process is known to those in the art, and its detailed manufacturing process will not be repeated here.

In one embodiment, the conductive adhesive layer 12 can be peeled off to separate the redistribution layer 13 from the carrier 11. Based on the above characteristics, please refer to FIG. 2B, which shows a schematic cross-sectional view of the package substrate 60 of the present invention and another embodiment of the same-side electrical measurement. In one embodiment, the conductive adhesive layer 12 and the carrier 11 can be removed from the packaging substrate 60. Next, a pair of measuring probes 40 and 41 with opposite electrical polarity are provided on the redistribution layer 13 to measure the resistance between any two conductive vias on the same side of the redistribution layer. Since there is no conductive adhesive layer 12 to conduct the current on the other side at this time, the insulation between any two conductive vias 16 on the same side can be judged.

Therefore, in another embodiment, please refer to FIG. 2A. The present invention provides a package substrate 50 including a carrier 11; a conductive adhesive layer 12 coated on the carrier 11; and a redistribution layer 13 through conductive The adhesive layer 12 is adhered to the carrier board 11. The redistribution layer has one or more laminated dielectric layers 14, 15 each of which has a plurality of conductive vias 16, 17, and the upper part is covered with conductive The patterns 18 and 19 thus form a multilayer redistribution circuit to connect the conductive patterns of different dielectric layers. With the conductive properties of the conductive adhesive layer 12, a pair of measurement probes 40, 41 with opposite electrical polarity can be provided on the redistribution layer 13 to measure any two conductive vias 16 on the same side of the redistribution layer. The resistance value between the two to determine the continuity between any two conductive vias 16 on the same side.

In one embodiment, the conductive adhesive layer 12 can be peeled off to separate the redistribution layer 13 from the carrier 11 to form the package substrate 60 shown in FIG. 2B. Since there is no conductive adhesive layer 12 to conduct the current on the other side at this time, a pair of measuring probes 40, 41 with opposite polarities can be provided on the redistribution layer 13 to measure the current on the same side of the redistribution layer. The resistance value between any two conductive vias 16 is used to determine the insulation between any two conductive vias 16 on the same side.

In summary, the present invention provides an electrical measurement technology for packaging substrates. Through the use of a conductive adhesive layer, a packaging substrate and a method for electrical measurement on the same side of the packaging substrate can be realized. Before chip bonding, the redistribution circuit of the package substrate is tested to reduce the risk that the chip will be scrapped due to the failure of the package substrate and improve the yield of the packaged chip.

Although the technical content of the present invention has been disclosed in the preferred embodiments as above, it is not intended to limit the present invention. Anyone who is familiar with this technique and makes some changes and modifications without departing from the spirit of the present invention should be covered by the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the attached patent application.

10, 50, 60: package substrate

11: Carrier board

12: Conductive adhesive layer

13: Redistribution layer

14, 15: Dielectric layer

16, 17: conductive vias

18, 19: conductive pattern

20: chip

30: Packaging materials

40, 41: Measuring probe

Fig. 1A is a schematic cross-sectional view of a conventional package substrate; Figure 1B is a schematic cross-sectional view of a conventionally packaged chip; 2A is a schematic cross-sectional view of the package substrate of the present invention and an embodiment of performing electrical measurements on the same side; and 2B is a schematic cross-sectional view of the package substrate of the present invention and another embodiment of the same-side electrical measurement.

50: Package substrate

11: Carrier board

12: Conductive adhesive layer

13: Redistribution layer

14, 15: Dielectric layer

16, 17: conductive vias

18, 19: conductive pattern

40, 41: Measuring probe

Claims (7)

A method for measuring the same-side electrical properties of a package substrate includes the following steps: providing a carrier; coating a conductive adhesive layer on the carrier; forming a redistribution layer, which is adhered to the carrier through the conductive adhesive layer On the board, the redistribution layer has one or more stacked dielectric layers, each dielectric layer has a plurality of conductive vias, and the plurality of conductive vias are covered with a conductive pattern, thus forming a multilayer redistribution circuit, To connect the conductive patterns of different dielectric layers; and provide a pair of measurement probes with opposite electrical polarity on the redistribution layer to measure the gap between any two conductive vias on the same side of the redistribution layer The resistance value is used to determine the conductivity between any two conductive vias on the same side, wherein the conductive adhesive layer can be peeled off to separate the redistribution layer from the carrier board. The same-side electrical measurement method for a package substrate according to claim 1, wherein the carrier board is formed of glass, plastic, printed circuit board or other dielectric materials. The same-side electrical measurement method for a package substrate according to claim 1, wherein the plurality of conductive vias and the plurality of conductive patterns are formed by a deposition process, a photolithography process, and an etching process. The same-side electrical measurement method for a package substrate as described in claim 1, further comprising the following steps: removing the conductive adhesive layer and the carrier board; and Provide a pair of measuring probes with opposite electrical polarity on the redistribution layer to measure the resistance between any two conductive vias on the same side of the redistribution layer to determine the any Insulation between two conductive vias. A package substrate includes: a carrier board; a conductive adhesive layer coated on the carrier board; and a redistribution layer bonded to the carrier board through the conductive adhesive layer, the redistribution layer having one or more Stacked dielectric layers, each dielectric layer has a plurality of conductive vias, and the plurality of conductive vias are covered with a conductive pattern, thus forming a multi-layer redistribution circuit to connect the conductive patterns of different dielectric layers, wherein The conductive adhesive layer can be peeled off to separate the redistribution layer from the carrier board. The package substrate according to claim 5, wherein the carrier board is formed of glass, plastic, printed circuit board or other dielectric materials. The package substrate according to claim 5, wherein the plurality of conductive vias and the plurality of conductive patterns are formed by a deposition process, a photolithography process, and an etching process.

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