JP2010192637A - Multilayer wiring board and method of manufacturing the same, and wafer batch contact board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a wiring layer from being oxidized and to prevent a connection defect in a multilayer wiring board. <P>SOLUTION: In an in-line sputter filming method in which the temperature of a glass substrate is set to 11 to 200°C, a Cr film is formed to a film thickness of 700 Å, a Cu film is formed to 6 μm, and an Ni film is formed to 700 Å in sequence under 10<SP>-7</SP>Torr by using an Ar gas to which a hydrogen gas is added by 5 vol% as a sputter gas, thereby an Ni/Cu/Cr multilayer wiring layer 12 is formed. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a wafer batch contact board for collectively testing a plurality of semiconductor devices formed on a wafer, a multilayer wiring board constituting the wafer contact board, and a method of manufacturing the same.

  Inspection of a plurality of semiconductor devices formed on a wafer is roughly classified into product inspection (electrical characteristic test) using a probe card and burn-in test which is a reliability test performed thereafter. The burn-in test is one of screening tests performed to remove a semiconductor device having an inherent defect or a device causing a failure depending on time and stress from manufacturing variations. While the probe card inspection is an electrical characteristic test of the manufactured device, the burn-in test is a thermal acceleration test.

  Up to now, electrical characteristic tests have been performed for each chip on a wafer by a probe card attached to a tester device, and burn-in tests have been performed one by one after dicing and mounting. It was. However, due to recent demands such as COP mounting and bare chip mounting, a method of collectively testing wafers before dicing has been taken, and development of a probe card for that purpose, that is, a wafer batch contact board, is in progress ( Patent Document 1).

The wafer batch contact board has a structure in which a membrane ring with bumps is fixed on a multilayer wiring board via an anisotropic conductive rubber sheet. The membrane ring with bumps is composed of a ring, a hemispherical bump made of a conductive material provided on one surface of an insulating thin film stretched over the ring, and an electrically connected to the bump on the other surface. And a pad made of a conductive material. The number of metal bumps corresponding to pads (about 600 to 1000 pins) formed on the periphery or center line of each semiconductor chip on the wafer is multiplied by the number of chips on the insulating thin film. Is formed. The anisotropic conductive rubber sheet is an elastic body having conductivity only in the direction perpendicular to the main surface, and electrically connects the terminals on the multilayer wiring board and the pads of the membrane ring with bumps. The anisotropic conductive rubber sheet absorbs unevenness on the surface of the semiconductor wafer and the bump height variation by pressing against the pad on the bumped membrane with the convex portion formed on the surface, and the pad on the semiconductor wafer. And the bumps on the membrane ring with bumps are securely connected. The multilayer wiring board has a multilayer structure of wiring for applying a predetermined burn-in test signal to each bump isolated on the membrane ring with bumps via a pad. As a method for manufacturing a multilayer wiring board, a conductive layer is laminated on an insulating base material to form a desired pattern, then the insulating layer is laminated, a contact hole is formed in the insulating layer, and a conductive layer is formed thereon. There is a method of providing a plurality of wirings for sending electric signals to a large number of pads on a wafer by conducting a series of steps a plurality of times by conducting a series of steps a plurality of times by conducting layers with a conductive layer through contact holes. It has been taken.

JP 2000-164651 A

As the semiconductor elements are miniaturized and miniaturized, the wiring is multi-layered. Therefore, it is necessary to reduce the resistance of each wiring. In order to reduce the resistance, Cu is mainly used as a material, and the thickness of the layer is about 10 μm, and the thickness is increasing. As a wiring film forming method, a sputter film forming method is effective from the viewpoint of film quality and film thickness uniformity. However, in the sputter deposition method, since the target is small, in order to form a wiring layer of about 10 μm on a large substrate of about 320 mm square, it is necessary to perform sputter deposition a plurality of times by an in-line sputtering method. However, there is a problem that Cu is oxidized by a very small amount of oxygen or moisture in the chamber during each sputtering film formation. In particular, the contact hole has a large surface area due to its shape, so that the degree of oxidation is remarkable, and copper oxide is formed between the sputtered films in the Cu layer, resulting in cracks and poor connection. There is a problem. Furthermore, the presence of oxide in the contact hole increases the contact resistance and reduces the adhesion strength between the wirings, thereby causing a connection failure.
On the other hand, there is also a problem that the polyimide used for the insulating layer and the base substrate contain a small amount of moisture, and this moisture penetrates into the wiring layer and oxidizes or denatures the metal in the wiring layer. is there.

  The first of the present invention has been made in view of the above circumstances, and an object of the present invention is to provide a multilayer wiring board capable of preventing connection defects by eliminating oxides inside and on the surface of the wiring layer. It is another object of the present invention to provide a method for manufacturing a multilayer wiring board that can prevent oxidation inside and on the surface of the wiring layer and prevent connection failure. A third object of the present invention is to provide a highly reliable wafer batch contact board provided with a multilayer wiring board that can prevent oxidation inside the wiring layer and prevent poor connection as a component.

In order to solve the above problems, the present invention has the following configuration.
(Configuration 1)
A multilayer wiring board in which a plurality of wiring layers are laminated via an insulating layer on a substrate,
The multilayer wiring board, wherein the wiring layer contains hydrogen.
(Configuration 2)
The multilayer wiring board according to Configuration 1, wherein the content of hydrogen atoms in the wiring layer is 0.1 at% or more and 10 at% or less.
(Configuration 3)
The multilayer wiring board according to Configuration 1 or 2, wherein the wiring layer is formed by laminating a Cr layer, a Cu layer, and a Ni layer in this order by in-line sputtering film formation.
(Configuration 4)
A method of manufacturing a multilayer wiring board having a film forming step of forming a wiring layer made of a conductive material by sputtering film formation,
The sputtering gas used in the film forming process is a mixed gas containing a rare gas and a hydrogen gas, and the content of the hydrogen gas is 1 vol% or more and 30 vol% or less. Method.
(Configuration 5)
The method for manufacturing a multilayer wiring board according to Configuration 4, wherein the wiring layer is a laminated film, and the laminated film is formed by in-line sputtering film formation.
(Configuration 6)
A multilayer wiring board manufactured by the manufacturing method according to the configuration 4 or 5;
A wafer batch contact board comprising a membrane ring with bumps for handling a contact portion in direct contact with an element to be inspected.

According to the multilayer wiring board of the present invention, since the wiring layer contains hydrogen, no oxide exists in the wiring layer, and connection failure of the wiring layer can be prevented. In addition, since cracks due to oxides in the contact holes can be prevented, poor connection can be prevented, and high interlayer adhesion strength can be obtained. In particular, the content of hydrogen atoms contained in the wiring layer of the multilayer wiring board of the present invention is 0.1 at% or more and 10 at% or less, preferably 1 at% or more and 5 at% or less.
According to the method for manufacturing a multilayer wiring board of the present invention, the sputtering gas used when forming the wiring layer by sputtering film formation is a mixed gas containing a rare gas and hydrogen gas, and the hydrogen gas is 1 vol% or more and 30 vol. % Or less, oxygen in the sputtering chamber atmosphere and oxygen contained in the substrate or insulating layer can be reduced and removed, so that no oxide exists in the wiring layer, resulting in poor connection of the wiring layer. Can be prevented. In addition, since cracks due to oxides in the contact holes can be prevented, poor connection can be prevented, and high interlayer adhesion strength can be obtained.
According to the wafer batch contact board of the present invention, since the multilayer wiring board capable of preventing the connection failure of the wiring layer is used, high reliability can be obtained.

It is a schematic sectional drawing which shows the manufacture process of the multilayer wiring board of this invention. It is a schematic sectional drawing which shows the manufacture process of the multilayer wiring board of this invention. It is a schematic block diagram which shows one Embodiment of the wafer batch contact board of this invention.

Hereinafter, a method for manufacturing a multilayer wiring board according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2 are schematic cross-sectional views showing the manufacturing process of the multilayer wiring board.
As shown in step (1) of FIG. 1, a Cr film is formed on one side of a glass substrate 11 (made by HOYA: NA40, size 320 mm square, thickness 3 mm) whose surface is polished by in-line sputtering. About 700 mm, Cu film about 6 μm, Ni film about 700 mm thick in this order to form Ni / Cu / Cr (stacked in order of Ni, Cu and Cr from above) multilayer wiring layer 12 To do. An in-line sputtering apparatus is used, the substrate temperature is set to 200 ° C., an argon (Ar) gas containing 5 vol% of hydrogen (H ₂ ) gas is used as a sputtering gas in a high vacuum atmosphere, for example, 10 ⁻⁷ Torr. First, a Cr film is formed in a thickness of 700 mm by one continuous sputtering using a Cr target. Next, a Cu film is formed by using a Cu target, and one continuous sputtering that can form 3000 mm is repeated 20 times to form about 6 μm. Similarly, the Ni film is formed with 700 nm by one continuous sputtering using a Ni target. The Cu film has been overcoated 20 times. However, since the sputtering gas is an argon gas to which hydrogen gas is added, the inside and surface of the Cu film are not oxidized, and high purity Cu is used. A film is formed.
Here, the Cr film is provided for the purpose of strengthening the adhesion between the glass substrate and the Cu film. The Ni film also prevents the oxidation of the surface of the Cu film, the purpose of strengthening the adhesion between the Cu film and the resist film, and prevents the polyimide from remaining at the bottom of the contact hole due to the reaction between the Cu film and the polyimide. It is provided for the purpose.

  Next, as shown in step (2) of FIG. 1, a predetermined photolithography process (resist coating, exposure, development, etching) is performed to pattern the multilayer wiring layer 12 made of a Ni / Cu / Cr laminated film. Thus, the first wiring pattern 12a is formed. Specifically, first, a resist is coated to a thickness of 3 μm, baked at 90 ° C. for 30 minutes, and the resist is exposed and developed using a predetermined mask to form a desired resist pattern (not shown). Using this resist pattern as a mask, the multilayer wiring layer 12 is etched using an etching solution such as a ferric chloride aqueous solution, then the resist is stripped using a resist stripping solution, washed with water and dried to form a single layer. An eye wiring pattern 12a is formed.

  Next, as shown in step (3) of FIG. 1, a photosensitive polyimide precursor is applied to the first wiring pattern with a thickness of 10 μm using a spinner or the like to form a polyimide insulating layer 13. . Contact holes 14 are formed in the polyimide insulating layer 13. Specifically, the applied photosensitive polyimide precursor is baked at 80 ° C. for 30 minutes, exposed and developed using a predetermined mask, and the contact hole 14 is formed. A second wiring formed by curing in a nitrogen atmosphere at 350 ° C. for 4 hours to completely polyimide the photosensitive polyimide precursor, and then roughening the polyimide surface by oxygen plasma treatment to form in the next step In addition to enhancing the adhesion to the layer, organic substances such as polyimide, developer and other residues in the contact hole 14 are oxidized and removed.

Next, as shown in step (4) of FIG. 1, as in the above step (1), by in-line sputtering at 10 ⁻⁷ Torr, using Ar gas containing 5% of H ₂ gas as the sputtering gas, A multilayer wiring layer 15 made of a multilayer film of Ni (700Å) / Cu (6 μm) / Cr (700Å) of the second layer is formed. Next, as shown in step (5) of FIG. 1, the Ni (700Å) / Cu (6 μm) / Cr (700Å) multilayer wiring layer 15 is patterned in the same manner as in the above step (2) to form the second layer. The wiring pattern 15a is formed.

  Next, as shown in step (1) of FIG. 2, the steps of FIG. 1 (3) to FIG. (5) of the above step are repeated in the same manner to form the second polyimide insulating layer 16 and the contact hole 17. The wiring pattern 18a of the layer was formed in sequence to obtain a glass multilayer wiring board having a three-layer structure. However, the third-layer wiring pattern 18a is a multilayer wiring having a laminated structure of Au / Ni / Cu / Cr for the purpose of improving electrical contact with the anisotropic conductive film. Similar to the first wiring pattern except that an Au film is formed on the Ni film to a thickness of 0.5 μm by electrolytic plating and the Au film is etched using an aqueous solution of iodine and potassium iodide. Thus, a third layer wiring pattern was formed. The Ni film plays a role of enhancing the adhesion between the Au film and Cu. Although an Au film can be formed on the Ni film by electroless plating, the thickness of the Au film cannot be increased.

  Next, a predetermined portion of the third wiring pattern 18a having a laminated structure of Au / Ni / Cu / Cr is etched up to Au / Ni / Cu to form a Cr thin film resistance portion. This process will be described in detail. As shown in FIG. 2 (2), a resist 19 is coated on the third-layer wiring pattern 18a, and then a predetermined mask is used as shown in FIG. 2 (3). Then, exposure and development are performed to form a resist pattern 19a from which the resist is removed only at the portion where the Cr thin film resistor portion is to be formed. At this time, if the resist to be used is a positive type, only the resistance forming portion is unexposed and the resist of the resistance forming portion is removed. If the resist to be used is a negative type, only the resistance forming portion is exposed to expose the resistance forming portion. Remove the resist. Subsequently, as shown in FIG. 2 (4), using the resist pattern 19a as a mask, an etching solution such as a ferric chloride aqueous solution is used to etch up to Au / Ni / Cu, leaving a Cr film, and leaving Cr. A thin film resistor 18b is formed. The Cr thin film resistors are provided on all the I / O branch lines branched from all the I / O common lines. The resistance value of each Cr thin film resistor was set to a high resistance, for example, 50 to 200Ω. The Cr thin film resistor has a wiring length of 200 μm, a wiring width of 100 μm, and a thickness of 300 to 400 angstroms.

Next, as shown in FIG. 2 (5), after removing the resist, polyimide as an insulating film is applied on the substrate and patterned to form a protective insulating film 21 to obtain a multilayer wiring board. It was.
In the embodiment described above, the case where argon gas added with 5 vol% of hydrogen gas is used as the sputtering gas. However, the content of hydrogen gas is preferably 1 vol% or more and 30 vol% or less, and more preferably 5 vol%. % Or more and 10 vol% or less is desirable.
In the above-described embodiment, the multilayer wiring board having the three-layer structure in which the three wiring layers are laminated via the polyimide layer which is an insulating layer has been described. However, in the process of FIG. By repeating the steps shown in 3) to FIG. 1 (5), that is, the formation of the wiring layer and the insulating layer, a multilayer wiring structure having four or more layers can be obtained.

100 multilayer wiring boards having a five-layer structure were manufactured by the manufacturing method shown in the above embodiment, and the wiring resistance was measured. As a comparative example, 100 multilayer wiring boards having a five-layer structure in which a wiring layer was formed only with Ar gas without adding hydrogen gas to the sputtering gas were produced.
When hydrogen in the wiring layer of the multilayer wiring board in the example of the present invention was measured with a solid-state hydrogen analyzer, it was confirmed that hydrogen was contained. The hydrogen content was 0.2 at%.
On the other hand, in the multilayer wiring board of the comparative example, the hydrogen content in the wiring layer was 0 at%.
Further, the connection failure of the wiring layer of the multilayer wiring board in the example was 0 out of 100 sheets, but the connection failure of the wiring layer of the multilayer wiring board in the comparative example was 8 out of 100 sheets.
As described above, according to the method for manufacturing a multilayer wiring board of the present invention, the sputter gas when forming the wiring layer is a mixed gas of rare gas and hydrogen gas, thereby preventing poor connection of the wiring layer. Is possible. Further, according to the multilayer wiring board of the present invention, since there is almost no oxide in the wiring layer, connection failure can be prevented.

Next, an embodiment of the wafer batch contact board of the present invention will be described. FIG. 4 shows a schematic configuration diagram of the wafer batch contact board.
As shown in FIG. 4, the wafer batch contact board according to the present embodiment includes a membrane ring 40 with bumps, a multilayer wiring board 60 having a five-layer wiring structure manufactured as in the above example, a membrane ring with bumps and a multilayer. An anisotropic conductive rubber sheet 70 that electrically connects the wiring board is provided.

  The bumped membrane ring 40 is provided on the other surface of the ring 43, the metal bump 46 provided on one surface of the insulating thin film 42 stretched over the ring, and the bump electrically connected thereto. And a metal pad 41a. In the membrane ring with bumps, this number is multiplied by the number of chips corresponding to the pads 51 (about 600 to 1000 pins) formed on the periphery or center line of each semiconductor chip on the semiconductor wafer 50. Metal bumps are formed on the insulating thin film.

The multilayer wiring board 60 has a wiring layer for applying a power supply voltage and a predetermined burn-in test signal to each metal bump isolated on the membrane via a pad as a five-layer laminated structure.
The anisotropic conductive rubber sheet 70 is made of an elastic body having conductivity only in a direction perpendicular to the main surface, for example, silicon resin, and metal particles 71 are embedded in the pad electrode portion along the conduction direction. By electrically connecting the terminals on the multilayer wiring board and the metal pads 41a of the membrane with bumps and pressing them against the metal pads 41a on the membrane with bumps, the unevenness of the semiconductor wafer surface and the bump height variation are absorbed. Then, the pads 51 on the semiconductor wafer and the metal bumps 46 on the membrane ring with bumps are securely connected.

When the metal bumps 46 provided on the bumped membrane ring 40 are in contact with the metal pads 51 on the semiconductor wafer 50, the power supply voltage and burn-in applied from the power supply and signal source connected to the wiring layer of the multilayer wiring board. A test signal is sent to the metal pad 41a of the membrane ring with bumps through the anisotropic conductive rubber sheet 70, and sent to the semiconductor device on the wafer from the metal bumps 46 conducted to the metal pad 41a, and the burn-in test is performed. Is called.
The wafer batch contact board manufactured as described above has high adhesion strength between layers, and uses a multilayer wiring board that prevents connection failure of the wiring layer, and therefore has high reliability.

11 Glass substrate 12, 15, 18 Ni / Cu / Cr multilayer wiring layer 12 a, 15 a, 18 a Wiring pattern 13, 16 Polyimide insulating layer 14, 17 Contact hole 19 Resist 21 Protective insulating film 40 Bumped membrane ring 41 a Metal pad 42 Insulating thin film 43 SiC ring 46 Metal bump 60 Multilayer wiring board 70 Anisotropic conductive rubber sheet

Claims (6)

A multilayer wiring board in which a plurality of wiring layers are laminated via an insulating layer on a substrate,
The multilayer wiring board, wherein the wiring layer contains hydrogen.   2. The multilayer wiring board according to claim 1, wherein the content of hydrogen atoms in the wiring layer is 0.1 at% or more and 10 at% or less.   The multilayer wiring board according to claim 1 or 2, wherein the wiring layer is formed by in-line sputtering deposition, and a Cr layer, a Cu layer, and a Ni layer are laminated in this order. A method of manufacturing a multilayer wiring board having a film forming step of forming a wiring layer made of a conductive material by sputtering film formation,
The sputtering gas used in the film forming process is a mixed gas containing a rare gas and a hydrogen gas, and the content of the hydrogen gas is 1 vol% or more and 30 vol% or less. Method.   5. The method of manufacturing a multilayer wiring board according to claim 4, wherein the wiring layer is a laminated film, and the laminated film is formed by in-line sputtering film formation. A multilayer wiring board manufactured by the manufacturing method according to claim 4 or 5;
A wafer batch contact board comprising a membrane ring with bumps for handling a contact portion in direct contact with an element to be inspected.

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