TWI730489B - Circuit board and electronic device using same - Google Patents

Abstract

A circuit board and an electronic device using the circuit board are disclosed. The circuit board includes a first substrate layer, a plurality of first traces, a plurality of second traces, an electrical conductor, and a plurality of test pads. The first substrate layer has opposing first and second surfaces. The circuit board defines a plurality of vias extending through the first substrate layer. The first traces are on the first surface. The second traces are on the second surface. The electrical conductor is in each via to electrically connect one first trace to one second trace. Each test pad covers and electrically connects the electrical conductor in one via. Since each test pad of the circuit board is on a via, each test pad no longer occupies an area of the circuit board, thereby increasing an integration of the circuit board.

Description

Circuit board and electronic device using the same

The invention relates to the technical field of printed circuits, in particular to a circuit board and an electronic device using the circuit board.

With the increase in the integration of electronic products, the electronic components and wiring per unit area on the circuit board are becoming more and more dense, and the requirements for signal quality are becoming more stringent. Test pads are usually set on the circuit board to complete the measurement of the signals of the various electronic components on the circuit board.

The conventional method for setting the test pad is to set a pad on the original trace for testing or to pull an additional trace for testing. However, since each solder pad or test trace occupies a certain area of the circuit board, and the area of the circuit board is limited, there is a problem that the circuit board does not have enough space as a test pad.

One aspect of the present invention provides a circuit board comprising: a first substrate layer having a first surface and a second surface opposite to each other, the circuit board is defined with a via hole, and the via hole extends along the first surface to the The direction of the second surface penetrates the first substrate layer; a plurality of first traces are located on the first surface; A plurality of second traces are located on the second surface; an electrical conductor is located in the via hole to electrically connect one of the first traces and one of the second traces; and a test pad covering the parallel connection Sexually connect the conductor.

In the embodiment of the present invention, by arranging the test pads of the circuit board at the via hole, each test pad no longer separately occupies the area of the circuit board, and the via hole position can achieve The layer change between the first trace and the second trace also functions as a test pad. Thereby, the space of the circuit board is saved, and the integration degree of the circuit board is improved.

Another aspect of the present invention also provides an electronic device, which includes a first electronic component, a second electronic component, and a circuit board electrically connecting the first electronic component and the second electronic component, the circuit board being the above On the circuit board, the first electronic component is electrically connected to the first wiring, and the second electronic component is electrically connected to the second wiring.

Because the above-mentioned circuit board has the advantage of high integration, the structure of the electronic device using the circuit board is more compact.

100, 200, 300: circuit board

10: The first substrate layer

10a: first surface

10b: second surface

11: Via

12: The first trace

13: Second trace

14: Other routing

15: Conductor

16: test pad

20: The first solder mask

30: The second substrate layer

40: The third substrate layer

50: The second solder mask

D1: First direction

D2: second direction

A1: Signal input area

17: Input pin

172: The first input pin

174: second input pin

A2: Test area

A3: bending area

A4: Signal output area

18: output pin

182: The first output pin

184: second output pin

80: electronic device

60: The first electronic component

70: second electronic component

FIG. 1 is a schematic diagram of the first embodiment of the circuit board of the present invention.

Fig. 2 is a schematic cross-sectional view taken along the line II-II in Fig. 1.

3, 4, and 5 are projection views of the conductor on the first substrate layer of the modified embodiment of the circuit board of the present invention.

6 and 7 are schematic diagrams of the first wiring, the second wiring and the test pad of the modified embodiment of the circuit board of the present invention.

Fig. 8 is a cross-sectional view of the second embodiment of the circuit board of the present invention.

Fig. 9 is a cross-sectional view of the third embodiment of the circuit board of the present invention.

FIG. 10 is a schematic block diagram of an electronic device provided by an embodiment of the present invention.

As shown in FIG. 1, the circuit board 100 of the first embodiment of the present invention includes a first substrate layer 10, a plurality of first traces 12, a plurality of second traces 13, a plurality of via holes 11 and a plurality of test pads 16.

As shown in FIG. 2, the first substrate layer 10 has a first surface 10a and a second surface 10b opposite to each other. The first surface 10a and the second surface 10b are two surfaces that are substantially parallel and opposite to each other.

In one embodiment, the circuit board 100 is a flexible circuit board, such as an integrated flexible circuit board (Flexible Printed Circuit+Assembly, FPCA). The first substrate layer 10 is made of a flexible organic material, such as polyimide (PI) or polyethylene glycol terephthalate (PET). In other embodiments, the circuit board 100 may be a rigid circuit board, for example, an integrated printed circuit board (PCBA).

Please refer to FIG. 1 and FIG. 2 in combination, a plurality of first traces 12 are located on the first surface 10a. A plurality of second traces 13 are located on the second surface 10b. Each via hole 11 penetrates the first substrate layer 10 along the direction from the first surface 10 a to the second surface 10 b. The circuit board 100 further includes a conductor 15 located in the via hole 11. Each via 11 is electrically connected to a first trace 12 and a second trace 13 through a conductor 15 located in it, so that the first trace 12 and the second trace 13 in different layers are realized Electrical conduction. The test pad 16 covers and electrically connects the conductor 15 in the via 11.

In one embodiment, each of the first traces 12 is used to electrically connect to the first electronic component 60 (marked in FIG. 10), and each of the second traces 13 is used to electrically connect to the second electronic component 70 (marked In Figure 10). A first wiring 12 and a second wiring 13 are electrically connected to realize signal transmission between the first electronic component 60 and the second electronic component 70.

When the circuit board 100 has a fault and needs to be detected, the probe of the test instrument can be connected to the test pad 16 to obtain the signal transmitted between the first wire 12 and the second wire 13. According to whether the signal transmitted between the first wire 12 and the second wire 13 obtained by the test instrument meets the specification, the location of the circuit board 100 can be determined.

By arranging the test pad 16 at the via hole 11, each test pad 16 no longer occupies the area of the circuit board 100 separately, and the position of the via hole 11 can realize the first wiring in different wiring layers. The layer change between 12 and the second wiring 13 also has the function of the test pad 16. Compared with the method in the prior art that the via holes and the test pads are separately arranged, and the via holes and the test pad occupy the area of the circuit board 100 respectively, the space of the circuit board 100 is saved and the integration degree of the circuit board 100 is improved.

Please continue to refer to FIG. 1, the first substrate layer 10 defines a signal input area A1, a test area A2, a bending area A3, and a signal output area A4 that are sequentially connected along the first direction D1. The signal input area A1 and the test area A2 have approximately the same width along the second direction D2. The widths of the bending area A3 and the signal output area A4 along the second direction D2 are approximately the same. The second direction D2 crosses the first direction D1.

The signal input area A1 is provided with multiple input pins 17. The test pad 16 is located in the test area A2. The bending area A3 is substantially elongated along the first direction D1 to facilitate bending. Each second wire 13 extends along the first direction D1 in the bending area A3. The signal output area A4 is provided with a plurality of output pins 18.

Each first trace 12 extends substantially along the first direction D1, and the plurality of first traces 12 are arranged at intervals along the second direction D2. Each second wiring 13 is electrically connected to a first wiring 12 through a conductive body 15 disposed in a via hole 11. The connection between each first wire 12 and a second wire 13 is provided with One test pad 16. That is, the number of test pads 16 is equal to the number of via holes 11. A test pad 16 is provided corresponding to the position of each via hole 11. In other embodiments, the circuit board 100 may only be provided with a test pad 16 corresponding to a portion of the via hole 11. That is, not all via holes 11 on the circuit board 100 are provided with test pads 16 and there are still some via holes 11 that are only used for layer exchange in different film layers.

Each second trace 13 extends substantially along the first direction D1, and the plurality of second traces 13 are arranged at intervals along the second direction D2. After each first trace 12 is electrically connected to a test pad 16, it extends from the test area A2 to the signal input area A1, and is electrically connected to an input pin 17 in the signal input area A1. After each second trace 13 is electrically connected to a test pad 16, it extends from the test area A2 across the bending area A3, and is electrically connected to an output pin 18 in the signal output area A4. Each first wiring 12 can be electrically connected to the first electronic component 60 through an input pin 17, and each second wiring 13 can be electrically connected to the second electronic component 70 through an output pin 18.

In one embodiment, the input pin 17 includes a first input pin 172 and a second input pin 174. The second input pin 174 is farther away from the test area A2 than the first input pin 172. Each first input pin 172 and one second input pin 174 are arranged at intervals. Thereby, the arrangement of the first wires 12 in the signal input area A1 can be more compact, so as to reduce the width of the signal input area A1 of the circuit board 100 in the second direction D2, and improve the integration of the circuit board 100.

In one embodiment, in the test area A2, each of the first traces 12 and each of the second traces 13 is electrically connected to a test pad 16 and then all go to the middle of the first substrate layer 10 along the second direction D2. The area is close. Thereby, the arrangement of each first wiring 12 and each second wiring 13 in the test area A2 can be closer, so as to reduce the width of the test area A2 of the circuit board 100 in the second direction D2, and improve the circuit board. 100 degree of integration.

In an embodiment, the first substrate layer 10 is axisymmetric along the second direction D2, and the distribution of the test pads 16 may be symmetrically distributed with respect to the symmetry axis of the first substrate layer 10. Each test pad 16 can be divided into multiple groups (in FIG. 1, the middle test pad 16 is removed, and the remaining three test pads 16 are a group), and the test pads 16 in each group are arranged in an oblique straight line. That is, the connecting line of the test pads 16 in each group is a straight line or a curve, and forms a certain angle with the second direction D2 (or the first direction D1). It can be understood that the range of the angle and the grouping of the test pads 16 are based on the convenient wiring of the circuit board 100, and is not limited to the situation shown in FIG. 1.

In one embodiment, the output pin 18 includes a first output pin 182 and a second output pin 184. The first output pin 182 is farther away from the bending area A3 than the second output pin 184. Each first output pin 182 and a second output pin 184 are arranged at intervals. Thereby, the arrangement of the second wirings 13 in the signal output area A4 can be closer, so as to reduce the width of the signal output area A4 of the circuit board 100 in the second direction D2, and improve the integration of the circuit board 100.

Please refer to FIG. 2, the circuit board 100 is a double-layer circuit board. That is, the circuit board 100 includes two wiring layers. The via hole 11 is a through hole that penetrates the first substrate layer 10 substantially in a direction perpendicular to the first surface 10 a and the second surface 10 b. The conductor 15 has a substantially hollow cylindrical shape. The conductor 15 is embedded on the inner wall of the via hole 11 and partially extends to the first surface 10a and the second surface 10b of the first substrate. One end of the conductor 15 is electrically connected to the first trace 12 on the first surface 10a, and the other end is electrically connected to the second trace 13 on the second surface 10b, so as to realize the first trace 12 and the second trace 12 Signal transmission between the two traces 13. The material of the conductor 15 may be copper foil. In this embodiment, the via hole 11 is a round hole. The projection of the conductor 15 on the first substrate layer 10 is a circular ring.

As shown in FIGS. 3 to 5, in other embodiments, the via hole 11 may be an elliptical hole or a polygonal hole. As shown in FIG. 3, when the via hole 11 is an elliptical hole, the conductor 15 is on the first substrate layer 10 The projection is an ellipse ring. As shown in FIG. 4, when the via hole 11 is a trapezoidal hole, the projection of the conductor 15 on the first substrate layer 10 is a ring composed of two trapezoids of different sizes. As shown in FIG. 5, when the via hole 11 is a tetragonal hole, the projection of the conductor 15 on the first substrate layer 10 is a ring composed of two tetragons of different sizes.

Please continue to refer to FIG. 2, the first surface 10 a of the first substrate layer 10 is further provided with other wires 14 different from the first wires 12. The conductor 15 is spaced apart from and insulated from other traces 14 on the first surface 10a. The second surface 10b of the first substrate layer 10 is further provided with other wires 14 different from the second wires 13. The conductor 15 is spaced apart from and insulated from the other traces 14 on the second surface 10b. The test pad 16 covers and is electrically connected to the conductor 15. The test pad 16 partially extends to the hollow position surrounded by the conductor 15. The material of the test pad 16 can be solder paste, copper-tin alloy, or the like.

Please continue to refer to FIG. 2, the circuit board 100 further includes a first solder resist layer 20 and a second solder resist layer 50. Both the first solder resist layer 20 and the second solder resist layer 50 are the outermost layers of the circuit board 100. The first solder resist layer 20 covers the first trace 12 and other traces 14 on the first surface 10 a, and exposes the test pads 16. The second solder resist layer 50 covers the second trace 13 and other traces 14 located on the second surface 10b. The first solder resist layer 20 and the second solder resist layer 50 are used to prevent the traces covered by them from being exposed to air and oxidized. The material of the first solder resist layer 20 and the second solder resist layer 50 may be protective paint or three-proof glue.

As shown in FIG. 1, in the first embodiment, only one first wire 12 and one second wire 13 are needed between one input pin 17 and one output pin 18 to achieve electrical connection. That is, only one via hole 11 and one test pad 16 corresponding to the via hole 11 are provided between one input pin 17 and one output pin 18. In a modified embodiment, more than two vias 11 and more than two test pads 16 can be provided between one input pin 17 and one output pin 18.

As shown in FIG. 6, two via holes 11, two test pads 16, two first wires 12 and one second wire 13 can be provided between one input pin 17 and one output pin 18. Among them, one first wiring 12 is electrically connected to an input pin 17, and the other first wiring 12 is electrically connected to an output pin 18. The first wire 12 and the second wire 13 are exchanged between wires of different layers through the via 11 (test pad 16).

As shown in FIG. 7, two via holes 11, two test pads 16, two second traces 13 and one first trace 12 can be provided between one input pin 17 and one output pin 18. Among them, one second wiring 13 is electrically connected to an input pin 17, and the other second wiring 13 is electrically connected to an output pin 18. The first wire 12 and the second wire 13 are exchanged between wires of different layers through the via 11 (test pad 16).

As shown in FIG. 8, the circuit board 200 of the second embodiment of the present invention has basically the same structure as the circuit board 100 of the first embodiment. The difference is that: in the first embodiment, the circuit board 100 is a double-layer circuit board. It includes a substrate layer and two wiring layers. In the second embodiment, the circuit board 200 is a multi-layer circuit board, which further includes at least one side of the second wiring 13 away from the first substrate layer 10. A second substrate layer 30 and other traces 14 located on the surface of the second substrate layer 30. That is, in the second embodiment, the circuit board 200 includes at least two substrate layers and at least three wiring layers.

In the first embodiment, the via hole 11 is a through hole that penetrates all the substrate layers (the first substrate layer 10) of the circuit board 100. In the second embodiment, the via 11 is a blind hole that does not penetrate through all the substrate layers of the circuit board 200. As shown in FIG. 8, the via hole 11 only penetrates the first substrate layer 10 and does not penetrate the second substrate layer 30. With this design, it is possible to prevent the poor reliability of the electrical connection between the first trace 12 and the second trace 13 caused by moisture and the like entering the conductor 15 from one side of the test pad 16.

In the first embodiment, the conductive body 15 is embedded on the inner wall of the via hole 11 in a hollow column shape; in the second embodiment, the conductive body 15 completely fills the via hole 11.

It can be understood that the circuit board 200 may also be a four-layer circuit board including three substrate layers and four wiring layers. The specific structure may be that in the circuit board 200 shown in FIG. 8, a second substrate layer 30, other traces 14, a second substrate layer 30, and a second substrate layer 30 are sequentially arranged between the second trace 13 and the second solder resist layer 50. Other routing 14. That is, two substrate layers and two wiring layers are provided between the second wiring 13 and the second solder resist layer 50.

As shown in FIG. 9, the circuit board 300 in the third embodiment of the present invention has basically the same structure as the circuit board 100 in the first embodiment. The difference is that: in the first embodiment, the circuit board 100 is a double-layer circuit board. It includes a substrate layer and two wiring layers; and the circuit board 300 in the third embodiment is a multi-layer circuit board with more than two layers, and it also includes a substrate located at the first wiring 12 away from the first substrate. At least one third substrate layer 40 on one side of the layer 10 and other traces 14 located on the surface of the third substrate layer 40. That is, in the third embodiment, the circuit board 300 includes at least two substrate layers and at least three wiring layers.

As shown in FIG. 9, the circuit board 300 is a four-layer circuit board, which further includes two third substrate layers 40 located on the side of the first trace 12 away from the first substrate layer 10, and two third substrate layers located on the two layers. Other traces 14 between the layers 40 and other traces 14 between the first solder resist layer 20 and the third substrate layer 40. The via hole 11 is a through hole that penetrates all the substrate layers (the first substrate layer 10 and the two third substrate layers 40) of the circuit board. The other wires 14 are spaced apart and insulated from the first wires 12 provided on the same layer, the second wires 13 provided on the same layer, or other wires 14 provided on the same layer at the positions of the via holes 11.

It can be understood that the circuit board 300 may also be a three-layer circuit board including two substrate layers and three wiring layers. The specific structure may be that in the circuit board 300 shown in FIG. 9, a third substrate layer 40 and a layer of other wirings 14 are reduced between the first wiring 12 and the first solder resist layer 20. That is, only one substrate layer and one wiring layer are provided between the first wiring 12 and the first solder resist layer 20.

In the embodiment of the present invention, by arranging the test pads 16 in the via holes 11, each test pad 16 no longer occupies the area of the circuit board 100 separately, and the position corresponding to the via hole 11 can realize different wiring. The layer change of the routing of the layers also has the function of the test pad 16. Thereby, the space of the circuit board 100 is saved, and the integration degree of the circuit board 100 is improved.

Another embodiment of the present invention also provides an electronic device 80. The electronic device 80 includes a first electronic component 60 and a second electronic component 70 and the aforementioned circuit board 100 (200, 300). The first electronic component 60 is electrically connected to the first wiring 12 through the input pin 17. The second electronic component 70 is electrically connected to the second wiring 13 through the output pin 18. Since the above-mentioned circuit board 100 (200, 300) has the advantage of high integration, the structure of the electronic device 80 using the circuit board 100 (200, 300) is more compact.

In one embodiment, the electronic device 80 can be a display panel, the first electronic component 60 can be a display driver chip, and the second electronic component 70 can be a display electrode that receives signals from the display driver chip.

In another embodiment, the electronic device 80 may be a touch panel, the first electronic element 60 may be a touch drive chip, and the second electronic element 70 may be a touch drive electrode that receives signals on the touch drive chip.

The above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced. Without departing from the spirit and scope of the technical solution of the present invention.

100: circuit board

10: The first substrate layer

10a: first surface

10b: second surface

11: Via

12: The first trace

13: Second trace

14: Other routing

15: Conductor

16: test pad

20: The first solder mask

50: The second solder mask

Claims (10)

A circuit board is improved in that it comprises: a first substrate layer having a first surface and a second surface opposite to each other, the circuit board is defined with a via hole, and the via hole extends from the first surface to the second surface. The directions of the two surfaces pass through the first substrate layer; a plurality of first traces are located on the first surface; a plurality of second traces are located on the second surface; a conductor is located in the via hole to Electrically connected to one of the first wiring and one of the second wiring; and a test pad, covering and electrically connecting the conductor; wherein, the first surface of the first substrate layer is also Other traces different from the first trace are provided, and the conductor is spaced apart from the other traces and insulated from the other traces; the circuit board further includes a first solder resist layer, where the first solder resist layer is located The first trace is away from the side of the first substrate layer, the first solder resist layer covers the first trace and the other traces, and the first solder resist layer at least partially covers all the traces.述conductive body. The circuit board according to claim 1, wherein the conductor is provided on the inner wall of the via hole. The circuit board according to claim 1, wherein the conductive body completely fills the via hole. The circuit board according to claim 1, wherein the first solder resist layer exposes the test pad. The circuit board according to claim 4, wherein the circuit board further includes at least one second substrate layer, and the second substrate layer is located on a side of the second trace away from the first substrate layer , The via hole does not penetrate the second substrate layer. The circuit board according to claim 4, wherein the circuit board further includes at least one third substrate layer, and the third substrate layer is located between the first trace and the solder resist layer, so The via hole penetrates the first substrate layer and the third substrate layer. The circuit board according to claim 6, wherein the circuit board further includes a second solder resist layer, and the second solder resist layer covers the surface of the second trace. The circuit board according to claim 1, wherein the circuit board further includes an input pin for inputting a signal and an output pin for outputting a signal, and the input pin and the output pin are The first wiring and the second wiring are electrically connected. The circuit board according to claim 8, wherein the number of the test pads between the input pin and the output pin is one or two. An electronic device, comprising a first electronic element, a second electronic element, and a circuit board electrically connecting the first electronic element and the second electronic element, wherein the circuit board is any of claims 1 to 9 In the circuit board of item 1, the first electronic component is electrically connected to the first wiring, and the second electronic component is electrically connected to the second wiring.

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