TWI722172B - Cutting method - Google Patents

Cutting method Download PDF

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TWI722172B
TWI722172B TW106113259A TW106113259A TWI722172B TW I722172 B TWI722172 B TW I722172B TW 106113259 A TW106113259 A TW 106113259A TW 106113259 A TW106113259 A TW 106113259A TW I722172 B TWI722172 B TW I722172B
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cutting
packaging
cutting method
method described
item
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TW106113259A
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TW201839830A (en
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楊泰嘉
詹原旻
方君維
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矽品精密工業股份有限公司
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Priority to TW106113259A priority Critical patent/TWI722172B/en
Priority to CN201710307701.3A priority patent/CN108735592B/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

A cutting method performs at least one transversal and longitudinal cutting process on a carrying structure provided with a plurality of packaging units to separate the packaging units, wherein the entire cutting route of the at least one transversal and longitudinal cutting process is not a single line. Therefore, the cutting route can evade the packaging units based on demands, and the packaging units can be prevented from contacting with a cutting tool and be avoided from damaged.

Description

切割方法 Cutting method

本發明係有關一種封裝製程，尤指一種封裝切單方法。 The present invention relates to a packaging process, in particular to a packaging and singulation method.

隨著電子產業的發達，現今的電子產品已趨向輕薄短小與功能多樣化的方向設計，半導體封裝技術亦隨之開發出不同的封裝型態，其中，球柵陣列式(Ball grid array，簡稱BGA)，例如PBGA、EBGA、FCBGA等，為一種先進的半導體封裝技術，其採用一封裝基板安置半導體元件，並於該封裝基板背面植設複數個柵狀陣列排設之錫球，使相同單位面積之電路板上可容納更多輸入/輸出連接端以符合高度集積化之半導體晶片之需求，並藉該些錫球將整個封裝單元焊接並電性連接至外部電子裝置。 With the development of the electronics industry, today's electronic products have tended to design in the direction of light, thin, short and diversified functions. Semiconductor packaging technology has also developed different packaging types. Among them, the ball grid array (BGA) ), such as PBGA, EBGA, FCBGA, etc., is an advanced semiconductor packaging technology that uses a packaging substrate to place semiconductor elements, and a plurality of grid arrays of solder balls are planted on the back of the packaging substrate to make the same unit area The circuit board can accommodate more input/output connections to meet the requirements of highly integrated semiconductor chips, and the entire package unit is soldered and electrically connected to external electronic devices by the solder balls.

請參閱第1A及1B圖，係為習知覆晶封裝之整版面封裝結構1，其製法係先於一膠帶1c上陣列排設複數封裝基板10，接著放置半導體元件11於該封裝基板10上，再進行預烘烤，之後進行模壓作業以令封裝膠體12包覆該半導體元件11，使該封裝基板10、半導體元件11與封裝膠體12構成封裝單元1a，且各該封裝單元1a之間係以由該封 裝膠體12之材質構成的間隔部1b相互結合，其中，各該間隔部1b呈單一直線狀。最後，將該間隔部1b作為切割路徑S以連續直線進行切單作業，藉此分離各該封裝單元1a及該膠帶1c。 Please refer to Figures 1A and 1B, which is a full-page package structure 1 of a conventional flip-chip package. The manufacturing method is to arrange a plurality of package substrates 10 on an adhesive tape 1c, and then place semiconductor elements 11 on the package substrate 10. , And then pre-baking, and then performing a molding operation to make the packaging compound 12 cover the semiconductor element 11, so that the packaging substrate 10, the semiconductor element 11, and the packaging compound 12 form a packaging unit 1a, and the packaging units 1a are connected to each other. The spacers 1b made of the material of the encapsulant 12 are combined with each other, wherein each spacer 1b has a single linear shape. Finally, the partition 1b is used as a cutting path S to perform cutting operations in a continuous straight line, thereby separating each of the packaging unit 1a and the tape 1c.

惟，習知封裝製程中，因該封裝基板10黏於該膠帶1c上並經預烘烤後會產生偏移(如第1C圖所示)，故於切單作業時，直線型切割路徑S將使切割刀破壞該封裝單元1a(如第1C圖所示)，造成該封裝單元1a之報廢率提高。 However, in the conventional packaging process, because the packaging substrate 10 is adhered to the tape 1c and pre-baked, it will be offset (as shown in Figure 1C), so during the cutting operation, the linear cutting path S The dicing knife will damage the packaging unit 1a (as shown in Figure 1C), resulting in an increase in the rejection rate of the packaging unit 1a.

再者，若以人工切割取代切割機具，然因人工切割之精準度更低，將使該封裝單元1a之報廢率更高。 Furthermore, if manual cutting is used instead of cutting tools, the accuracy of manual cutting will be lower, which will result in a higher rejection rate of the packaging unit 1a.

因此，如何克服上述習知技術之種種問題，實已成為目前業界亟待克服之難題。 Therefore, how to overcome the various problems of the above-mentioned conventional technology has actually become a problem that the industry urgently needs to overcome.

鑑於上述習知技術之種種缺失，本發明係揭露一種切割方法，係包括：結合複數封裝單元至一承載結構上；以及沿任二該封裝單元間之間隔部進行至少一縱向及橫向之切割作業，以分離各該封裝單元，其中，至少一該縱向或橫向切割作業之整體切割路徑係為非單一直線。 In view of the various deficiencies of the above-mentioned conventional technologies, the present invention discloses a cutting method, which includes: combining a plurality of packaging units to a carrying structure; and performing at least one longitudinal and transverse cutting operation along the gap between any two of the packaging units , To separate each of the packaging units, wherein at least one of the overall cutting path of the longitudinal or transverse cutting operation is a non-single straight line.

前述之切割方法中，該承載結構係為膠帶。 In the aforementioned cutting method, the supporting structure is an adhesive tape.

前述之切割方法中，該封裝單元係包含電子元件、以及包覆該電子元件之封裝材。進一步，該封裝單元復包含用以承載該電子元件之承載件。 In the aforementioned cutting method, the packaging unit includes an electronic component and a packaging material covering the electronic component. Further, the packaging unit further includes a carrier for carrying the electronic component.

前述之切割方法中，該間隔部係為空氣通道，或該間隔部係由封裝材構成。 In the aforementioned cutting method, the spacer is an air channel, or the spacer is composed of a packaging material.

前述之切割方法中，該切割作業係對應該封裝單元預定位置設有虛擬位置表，並於該虛擬位置表中設定至少一辨識點，再擷取該封裝單元實際所對應之當前位置，以根據所設定的辨識點與對應的該封裝單元之當前位置計算出切割路徑。 In the aforementioned cutting method, the cutting operation is to set up a virtual position table corresponding to the predetermined position of the packaging unit, and set at least one identification point in the virtual position table, and then retrieve the actual current position corresponding to the packaging unit according to The set identification point and the corresponding current position of the packaging unit calculate the cutting path.

前述之切割方法中，該整體切割路徑係由復數直線切割線段所構成。 In the aforementioned cutting method, the overall cutting path is composed of a plurality of straight cutting line segments.

前述之切割方法中，該封裝單元係未設於該承載結構之預定位置上。例如，該封裝單元之偏移量係至多100微米。 In the aforementioned cutting method, the packaging unit is not arranged at a predetermined position of the carrying structure. For example, the offset of the package unit is at most 100 microns.

前述之切割方法中，該些封裝單元之尺寸係相同或不同。 In the aforementioned cutting method, the dimensions of the packaging units are the same or different.

前述之切割方法中，該切割作業係擷取該封裝單元實際所對應之當前位置，以根據對應的該封裝單元之當前位置計算出切割路徑。 In the aforementioned cutting method, the cutting operation captures the actual current position corresponding to the packaging unit to calculate the cutting path according to the corresponding current position of the packaging unit.

由上可知，本發明之切割方法，係藉由擷取該封裝單元實際所對應之當前位置，以根據對應的該封裝單元之當前位置所選出的辨識點計算出最佳的切割路徑，而令該切割路徑之整體係為非單一直線，以於該封裝單元產生位移時，該切割路徑能避開該些封裝單元，有效降低該封裝單元之報廢率。 It can be seen from the above that the cutting method of the present invention captures the actual current position corresponding to the packaging unit, and calculates the best cutting path based on the identification points selected corresponding to the current position of the packaging unit. The entire cutting path is a non-single straight line, so that when the packaging unit is displaced, the cutting path can avoid the packaging units, effectively reducing the rejection rate of the packaging unit.

1,2,4‧‧‧整版面封裝結構 1,2,4‧‧‧Full-page package structure

1a,2a,4a,4a’‧‧‧封裝單元 1a,2a,4a,4a’‧‧‧Packaging unit

1b,2b,2b’‧‧‧間隔部 1b,2b,2b’‧‧‧Spacer

1c‧‧‧膠帶 1c‧‧‧Tape

10‧‧‧封裝基板 10‧‧‧Packaging substrate

11‧‧‧半導體元件 11‧‧‧Semiconductor components

12‧‧‧封裝膠體 12‧‧‧Packaging gel

2c‧‧‧承載結構 2c‧‧‧Bearing structure

20‧‧‧承載件 20‧‧‧Carrier

21‧‧‧電子元件 21‧‧‧Electronic components

22‧‧‧封裝材 22‧‧‧Packaging material

3‧‧‧計算器 3‧‧‧Calculator

L,L’,L”‧‧‧切割路徑 L,L’,L”‧‧‧cutting path

L1,L2,L3,L4‧‧‧直線切割線段 L1, L2, L3, L4‧‧‧Straight cutting line segment

P‧‧‧辨識點 P‧‧‧Recognition point

P’,P”‧‧‧當前位置 P’,P”‧‧‧Current position

S‧‧‧切割路徑 S‧‧‧cutting path

Y‧‧‧偏移量 Y‧‧‧offset

第1A圖係為習知覆晶封裝的局部剖視示意圖；第1B圖係為習知覆晶封裝之局部上視示意圖； 第1C圖係為習知覆晶封裝之封裝基板呈現偏移狀態的上視示意圖；第2A圖係為本發明之切割方法省略封裝材之上視示意圖；第2B圖係為應用本發明之切割方法之封裝單元之局部上視示意圖；第2C圖係為本發明之切割方法所應用之計算器所配置對應封裝單元預定位置之虛擬位置表之示意圖；第2C’圖係為本發明之切割方法所應用之影像擷取單元所擷取該封裝單元所對應之當前位置之示意圖；第3圖係為本發明之切割方法之切割路徑之示意圖；以及第4圖係為對應第2A圖之另一實施例的上視示意圖。 Figure 1A is a schematic partial cross-sectional view of the conventional flip chip package; Figure 1B is a partial top schematic diagram of the conventional flip chip package; Figure 1C is a schematic view of the conventional flip chip package with the package substrate showing an offset state Top schematic view; Figure 2A is a schematic top view of the cutting method of the present invention omitting the packaging material; Figure 2B is a partial schematic top view of the packaging unit applying the cutting method of the present invention; Figure 2C is a schematic view of the packaging unit of the present invention A schematic diagram of the virtual position table corresponding to the predetermined position of the package unit configured by the calculator used in the cutting method; Figure 2C' is the current position corresponding to the package unit captured by the image capture unit used in the cutting method of the present invention Fig. 3 is a schematic diagram of the cutting path of the cutting method of the present invention; and Fig. 4 is a schematic top view of another embodiment corresponding to Fig. 2A.

以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The following specific examples illustrate the implementation of the present invention. Those familiar with the art can easily understand the other advantages and effects of the present invention from the content disclosed in this specification.

須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如 “上”及“一”等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。 It should be noted that the structure, ratio, size, etc. shown in the drawings in this manual are only used to match the content disclosed in the manual for the understanding and reading of those who are familiar with the art, and are not intended to limit the implementation of the present invention. Therefore, it does not have any technical significance. Any structural modification, proportional relationship change, or size adjustment should still fall within the scope of the present invention without affecting the effects and objectives that can be achieved by the present invention. The technical content disclosed by the invention can be covered. At the same time, the terms such as "上" and "一" cited in this specification are only for ease of description and are not used to limit the scope of implementation of the present invention. Changes or adjustments to their relative relationships are not Substantive changes to the technical content should also be regarded as the scope of the present invention can be implemented.

第2A圖係為本發明之切割方法省略封裝材之上視示意圖。於本實施例中，該切割方法係應用於半導體封裝製程(如封裝切單製程)中。 Figure 2A is a schematic top view of the cutting method of the present invention omitting the packaging material. In this embodiment, the cutting method is applied to a semiconductor packaging process (such as a package singulation process).

首先，提供一整版面封裝結構2，其係於一承載結構2c上設有複數封裝單元2a，該複數封裝單元2a係呈陣列排列，且各該封裝單元2a之間係以間隔部2b相互結合。接著，沿該間隔部2b進行切割作業(即沿該整版面封裝結構2之橫向及縱向分別進行多次或至少一切割作業)以分離各該封裝單元2a及該承載結構2c，且至少一該橫向或縱向之切割作業之整體之切割路徑L係為非單一直線。 First, a full-page package structure 2 is provided, which is provided with a plurality of package units 2a on a carrier structure 2c, the plurality of package units 2a are arranged in an array, and the package units 2a are connected to each other by a spacer 2b. . Then, a cutting operation is performed along the spacer 2b (that is, multiple or at least one cutting operation is performed along the transverse and longitudinal directions of the full-page package structure 2) to separate each of the packaging units 2a and the supporting structure 2c, and at least one of the The overall cutting path L of the horizontal or vertical cutting operation is a non-single straight line.

於本實施例中，該承載結構2c係為膠帶，且該些封裝單元2a之尺寸相同，並如第2B圖所示，該封裝單元2a係包含一承載件20、至少一設於該承載件20上之電子元件21、以及包覆該電子元件21之封裝材22。 In this embodiment, the supporting structure 2c is an adhesive tape, and the dimensions of the packaging units 2a are the same. As shown in FIG. 2B, the packaging unit 2a includes a supporting member 20, and at least one is disposed on the supporting member. The electronic component 21 on the 20 and the packaging material 22 covering the electronic component 21.

所述之承載件20係例如為具有核心層與線路結構之封裝基板(substrate)或無核心層(coreless)之線路結構，其具有複數線路層，如扇出(fan out)型重佈線路層(redistribution layer，簡稱RDL)。應可理解地，該承載件20亦可為其它可供承載如晶片等電子元件之承載單元，例如導線架(lead frame)，並不限於上述。 The carrier 20 is, for example, a package substrate with a core layer and a circuit structure or a coreless circuit structure, which has a plurality of circuit layers, such as a fan out type redistributed circuit layer (redistribution layer, RDL for short). It should be understood that the carrying member 20 can also be other carrying units capable of carrying electronic components such as chips, such as a lead frame, and is not limited to the above.

所述之電子元件21係為主動元件、被動元件或其組合者，且該主動元件係例如半導體晶片，而該被動元件係例如電阻、電容及電感。 The electronic component 21 is an active component, a passive component, or a combination thereof. The active component is a semiconductor chip, and the passive component is a resistor, a capacitor, and an inductor.

所述之封裝材22之材質係為聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)。 The material of the packaging material 22 is polyimide (PI for short), dry film, epoxy, or molding compound.

再者，該間隔部2b可為空氣通道，如第2A圖所示；或者，如第2B圖所示，將封裝材形成於該間隔部2b’。 Furthermore, the spacer 2b may be an air channel, as shown in Figure 2A; or, as shown in Figure 2B, a packaging material is formed on the spacer 2b'.

又，如第2A及2B圖所示，部分該封裝單元2a係未設於該承載結構2c之預定位置上，例如部分封裝單元2a偏移原本位於承載結構2c上的位置(其偏移量Y係至多100微米)，使部分相鄰之封裝單元2a之佈設位置未相互對齊。具體地，於形成該封裝材22前，會先進行預烘烤以固定該承載件20與該承載結構2c之間(或該承載件20與該電子元件21之間)的膠材，故部分該承載件20會受膠材的影響而產生位移，因而部分該些封裝單元2a之佈設位置沒有位於預定之位置上。 In addition, as shown in Figures 2A and 2B, part of the packaging unit 2a is not arranged at a predetermined position of the supporting structure 2c, for example, part of the packaging unit 2a is offset from the original position on the supporting structure 2c (the offset Y 100 microns at most), so that the placement positions of some adjacent package units 2a are not aligned with each other. Specifically, before the packaging material 22 is formed, pre-baking is performed to fix the adhesive between the carrier 20 and the carrier structure 2c (or between the carrier 20 and the electronic component 21), so some The supporting member 20 is affected by the plastic material to produce displacement, and therefore, the layout positions of some of the packaging units 2a are not located at predetermined positions.

另外，該切割作業係為切單作業，且該切割路徑L之整體係呈非單一直線。具體地，如2C圖所示，該切割作業所用之切割機的計算器3(如內建電腦)係預先配置一對應該封裝單元2a預定位置的虛擬正確位置表，並於該虛擬位置表中設定至少一辨識點P(封裝單元預定位置)，再使該切割機之影像擷取單元(或相機，圖未示)，如感光耦合元件(Charge-coupled Device，簡稱CCD)，擷取該封裝單 元2a實際所對應之當前位置P’，之後，令該計算器3根據其所設定的辨識點P判斷該當前位置P’是否位於虛擬正確位置表中之預定位置，故若該當前位置P’符合預定位置時，則該計算器3所計算出之最佳路徑為單一直線；若該當前位置P’不符合預定位置時，則該計算器3會根據該辨識點P與該當前位置P’計算出最佳的切割路徑L。 In addition, the cutting operation is a single cutting operation, and the entire cutting path L is a non-single straight line. Specifically, as shown in Figure 2C, the calculator 3 (such as a built-in computer) of the cutting machine used in the cutting operation is pre-configured with a virtual correct position table corresponding to the predetermined position of the packaging unit 2a, and in the virtual position table Set at least one identification point P (predetermined position of the package unit), and then make the image capture unit (or camera, not shown) of the cutting machine, such as a charge-coupled device (CCD), capture the package The current position P'actually corresponding to the unit 2a, and then the calculator 3 is asked to determine whether the current position P'is located in the predetermined position in the virtual correct position table according to the set identification point P, so if the current position P' When it meets the predetermined position, the best path calculated by the calculator 3 is a single straight line; if the current position P'does not meet the predetermined position, the calculator 3 will base on the identification point P and the current position P' Calculate the best cutting path L.

應可理解地，該切割作業所用之切割機的計算器3亦可不需配置虛擬正確位置表，使該切割機之影像擷取單元(圖未示)擷取該封裝單元2a實際所對應之當前位置P’之後，令該計算器3根據該些當前位置P’選取辨識點P”(如第2C’圖所示)，直接計算出最佳的切割路徑L。 It should be understood that the calculator 3 of the cutting machine used in the cutting operation does not need to be configured with a virtual correct position table, so that the image capturing unit (not shown) of the cutting machine can capture the actual current corresponding to the packaging unit 2a. After the position P′, the calculator 3 is asked to select the identification point P” (as shown in Fig. 2C′) according to the current positions P′, and directly calculate the optimal cutting path L.

因此，當該辨識點P,P”之數量設定越多時，該切單製程之切割精準度越高，故能降低切割刀具碰觸該封裝單元2a之機率，因而可減少該封裝單元2a之報廢數量，且根據該切割機的作動方式能定義出直線切割線段之數量。例如，該計算器3所計算出之最佳切割路徑包含複數直線切割線段，如第3圖所示之切割路徑L’，其整體切割路徑係由複數直線切割線段L1,L2,L3,L4所構成，亦即該整體切割路徑係分段完成。另外，該些直線切割線段L1,L2,L3,L4的各別切割路徑須大於切割刀具直徑，所以整體切割路徑須分成幾段會根據刀具尺寸做決定。 Therefore, when the number of identification points P, P" is set more, the cutting accuracy of the single cutting process is higher, so the probability that the cutting tool touches the packaging unit 2a can be reduced, and thus the packaging unit 2a can be reduced. The number of scraps, and the number of straight cutting line segments can be defined according to the operating mode of the cutting machine. For example, the optimal cutting path calculated by the calculator 3 includes multiple straight cutting line segments, such as the cutting path L shown in Figure 3 ', the overall cutting path is composed of a plurality of straight cutting line segments L1, L2, L3, L4, that is, the overall cutting path is completed in sections. In addition, the straight cutting line segments L1, L2, L3, L4 are respectively The cutting path must be larger than the diameter of the cutting tool, so the overall cutting path must be divided into several sections and will be determined according to the tool size.

應可理解地，由於該切割路徑L,L’之整體係為非單一直線，故本發明之切割方法亦能應用於包含不同尺寸之封裝單元4a,4a’的整版面封裝結構4，如第4圖所示之切 割路徑L”。 It should be understood that, since the entire cutting path L, L'is a non-single straight line, the cutting method of the present invention can also be applied to a full-page package structure 4 including package units 4a, 4a' of different sizes, such as 4 The cutting path L" shown in the figure.

綜上所述，本發明之切割方法係藉由擷取該封裝單元2a實際所對應之當前位置P’，以根據對應的該封裝單元2a之當前位置P’所選出的辨識點P”計算出最佳的切割路徑L,L’,L”，而令該切割路徑L,L’,L”之整體係為非單一直線，以於該承載件20產生位移時，該切割路徑L,L’,L”能避開該些封裝單元2a,4a,4a’，故相較於習知技術，本發明之切割方法能依需求令切割機具避開該些封裝單元2a,4a,4a’而不會碰觸該些封裝單元2a,4a,4a’，因而能避免該封裝單元2a,4a,4a’損壞，進而有效降低該封裝單元2a,4a,4a’之報廢率。 In summary, the cutting method of the present invention captures the actual current position P'corresponding to the packaging unit 2a, and calculates the identification point P" selected according to the current position P'of the corresponding packaging unit 2a The best cutting path L, L', L", and the entire cutting path L, L', L" is a non-single straight line, so that when the carrier 20 is displaced, the cutting path L, L' ,L" can avoid the packaging units 2a, 4a, 4a', so compared with the conventional technology, the cutting method of the present invention can make the cutting tool avoid the packaging units 2a, 4a, 4a' according to the requirements. The packaging units 2a, 4a, 4a' will be touched, so that the packaging units 2a, 4a, 4a' can be prevented from being damaged, and the rejection rate of the packaging units 2a, 4a, 4a' can be effectively reduced.

上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。 The above-mentioned embodiments are used to exemplify the principles and effects of the present invention, but not to limit the present invention. Anyone who is familiar with this technique can modify the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application described later.

2‧‧‧整版面封裝結構 2‧‧‧Full-page package structure

2a‧‧‧封裝單元 2a‧‧‧Packaging unit

2b‧‧‧間隔部 2b‧‧‧Spacer

2c‧‧‧承載結構 2c‧‧‧Bearing structure

L‧‧‧切割路徑 L‧‧‧cutting path

P’‧‧‧當前位置 P’‧‧‧Current position

Claims (10)

一種切割方法，係包括：結合複數封裝單元至一承載結構上，但該封裝單元係未設於該承載結構之預定位置上；擷取該封裝單元實際所對應之當前位置並根據該當前位置選出辨識點；根據該辨識點計算出切割路徑；以及沿任二該封裝單元間之間隔部進行至少一縱向及橫向之切割作業，以分離各該封裝單元，其中，至少一該縱向或橫向切割作業之整體切割路徑係為非單一直線。 A cutting method includes: combining a plurality of packaging units to a supporting structure, but the packaging unit is not set at a predetermined position of the supporting structure; capturing the actual current position corresponding to the packaging unit and selecting according to the current position Identification point; calculate the cutting path based on the identification point; and perform at least one longitudinal and transverse cutting operation along the interval between any two packaging units to separate each of the packaging units, wherein at least one of the longitudinal or transverse cutting operation The overall cutting path is a non-single straight line. 如申請專利範圍第1項所述之切割方法，其中，該承載結構係為膠帶。 According to the cutting method described in item 1 of the scope of patent application, the supporting structure is an adhesive tape. 如申請專利範圍第1項所述之切割方法，其中，該封裝單元係包含電子元件以及包覆該電子元件之封裝材。 According to the cutting method described in claim 1, wherein the packaging unit includes an electronic component and a packaging material covering the electronic component. 如申請專利範圍第3項所述之切割方法，其中，該封裝單元復包含用以承載該電子元件之承載件。 The cutting method described in item 3 of the scope of patent application, wherein the packaging unit further includes a carrier for carrying the electronic component. 如申請專利範圍第1項所述之切割方法，其中，該間隔部係為空氣通道。 The cutting method described in item 1 of the scope of patent application, wherein the spacer is an air channel. 如申請專利範圍第1項所述之切割方法，其中，該間隔部係由封裝材構成。 According to the cutting method described in item 1 of the scope of the patent application, the spacer is composed of a packaging material. 如申請專利範圍第1項所述之切割方法，其中，該切割路徑之計算更包括對應該封裝單元預定位置設有虛擬位置表，並於該虛擬位置表中設定至少一辨識點，以及 根據所設定的辨識點與對應的該封裝單元之當前位置選出之辨識點計算出切割路徑。 The cutting method described in item 1 of the scope of patent application, wherein the calculation of the cutting path further includes setting a virtual position table corresponding to the predetermined position of the packaging unit, and setting at least one identification point in the virtual position table, and The cutting path is calculated according to the set identification point and the identification point selected corresponding to the current position of the packaging unit. 如申請專利範圍第1項所述之切割方法，其中，該整體切割路徑係由複數直線切割線段所構成。 According to the cutting method described in item 1 of the scope of patent application, the overall cutting path is formed by a plurality of straight cutting line segments. 如申請專利範圍第1項所述之切割方法，其中，該封裝單元之偏移量係至多100微米。 As for the cutting method described in claim 1, wherein the offset of the package unit is at most 100 micrometers. 如申請專利範圍第1項所述之切割方法，其中，該些封裝單元之尺寸係相同或不同。 For the cutting method described in item 1 of the scope of patent application, the sizes of the packaging units are the same or different.
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