TWI719085B - 用以清潔砷化銦鎵(或三五族)基板的方法及解決方案 - Google Patents
用以清潔砷化銦鎵(或三五族)基板的方法及解決方案 Download PDFInfo
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Abstract
本文所述的實施例大致上有關於針對在III-V族通道材料之磊晶生長之前清潔基板的改善的方法及解決方案。使用第一處理氣體以從基板表面移除原生氧化物層,第一處理氣體包含惰性氣體及氫源。隨後使用第二處理氣體Ar/Cl2
/H2
以在基板表面上產生反應性表面層。最後,使用第三處理氣體進行氫烘烤以從基板表面移除反應性層,第三處理氣體包含氫源及胂源。
Description
本揭示案之實施例大致上有關於半導體裝置之製造。更具體而言,描述針對在磊晶生長之前清潔基板表面的改善的方法及解決方案。
磊晶生長廣泛用於製造半導體裝置、顯示裝置及其他裝置。在將磊晶層沉積在基板上之前,實行表面清潔處理以從沉積表面移除原生氧化物及/或其他雜質,並且提高所形成的磊晶層之品質。
III-V族元素之沉積在基於矽的裝置的某些應用中可能是有利的。舉例而言,由於低接觸電阻、優異的電子遷移率及較低的操作電壓,III-V族元素可用作次7奈米(nm)互補式金屬氧化物半導體(CMOS)裝置的通道或鰭(fin)材料。然而,存在於III-V族上生長III-V族材料之主要挑戰,例如晶格不匹配、價數差異、熱性質差異、導電性差異及反相缺陷(anti-phase defect)。
當前的濕式或乾式清潔處理可能不適用於具有III-V族材料(例如InP、InAs、GaAs及InGaAs)的下一代裝置之可靠製造,因為該等濕式或乾式清潔處理是高功率、高溫(>600℃)處理。此外,該等濕式或乾式清
潔處理並不適合在非常小的特徵結構(<7nm)內清潔材料,且該等濕式或乾式清潔處理產生損壞的表面層。
因此,在本領域中存在對於III-V族通道材料之磊晶生長之前清潔InGaAs或III-V族基板的改善的方法及解決方案的需求。
本文所述的實施例大致上提供清潔基板表面之方法。該方法包含將基板定位在腔室中的支撐件上,該基板具有原生氧化物層於該基板上。可將第一處理氣體引入腔室,第一處理氣體包含惰性氣體(noble gas)及氫源。可活化第一處理氣體。可將基板之原生氧化物層與活化的第一處理氣體接觸,以活化該原生氧化物層或部分移除該原生氧化物層。在活化該原生氧化物層或部分移除該原生氧化物層之後,可將第二處理氣體Ar/Cl2/H2引入腔室。可活化第二處理氣體。可將基板與第二處理氣體接觸,以產生反應性表面層。可將第三處理氣體引入腔室,第三處理氣體包含氫源及胂(arsine)源。最後,可將基板與第三處理氣體接觸,以移除反應性表面層。
在另一個實施例中,提供清潔基板表面之方法。該方法包含將基板定位在第一腔室中的支撐件上,該基板具有原生氧化物層於該基板上。可將第一處理氣體引入第一腔室,第一處理氣體包含惰性氣體及氫源。可活化第一處理氣體。可將基板之原生氧化物層與活化的第一處理氣體接觸,以活化該原生氧化物層或部分移除該原生氧
化物層。在活化該原生氧化物層或部分移除該原生氧化物層之後,可將第二處理氣體Ar/Cl2/H2引入第一腔室。可活化第二處理氣體。可將基板與第二處理氣體接觸,以產生反應性表面層。可將基板傳送至第二腔室。可將第三處理氣體引入第二腔室,第三處理氣體包含氫源及胂源。最後,可將基板與第三處理氣體接觸,以移除反應性表面層。
在又另一個實施例中,提供製造基板之方法。該方法包含將基板定位在第一腔室中的支撐件上,該基板具有原生氧化物層於該基板上。可將第一處理氣體Ar/H2引入第一腔室。可將第一處理氣體離子化。可將基板之原生氧化物層與活化的第一處理氣體接觸,以活化該原生氧化物層或部分移除該原生氧化物層。在活化該原生氧化物層或部分移除該原生氧化物層之後,可將第二處理氣體Ar/Cl2/H2引入第一腔室。可活化第二處理氣體。可將基板與第二處理氣體接觸,以產生反應性表面層。可將基板傳送至第二腔室。可將第三處理氣體H2/叔丁基胂(TertiarybutylArsine;TBA)引入第二腔室。可將基板與第三處理氣體接觸,以移除反應性表面層。最後,可在基板表面上方沉積III-V族通道材料。
100:方法
102:操作
104:操作
106:操作
108:操作
110:操作
112:操作
114:操作
116:操作
117:操作
118:操作
222:基板
224:介電質材料
226:緩衝材料
228:原生氧化物層
230:通道材料
340:設備
342:傳送腔室
344:晶圓傳送機制
346:裝載閘腔室
348:晶圓對準腔室
350:第一腔室/處理腔室
352:第二腔室/處理腔室
可藉由參照實施例,該等實施例中之一些實施例繪示於附圖中,可得到以上簡要總結的本揭示案之更具體敘述,如此可得到詳細地瞭解本揭示案之上述特徵的方
式。然而,應注意到,附圖僅繪示典型實施例,且因此不應被視為限制本揭示案之範疇,因為本揭示案可容許其他等效實施例。
第1圖為總結根據本文所述的一個實施例的方法的流程圖。
第2A圖~第2C圖描繪根據第1圖之方法的裝置結構之製造階段之示意剖面側視圖。
第3圖為用於實行根據本文所述的一個實施例的方法的設備之示意圖。
為了促進瞭解,已儘可能使用相同的元件符號來指稱圖式中共用的相同元件。可以預期一個實施例之元件及特徵在沒有進一步敘述的情況下可有益地併入其他實施例中。
本文所述的實施例大致上有關於用於在III-V族通道材料之磊晶生長之前清潔基板表面的方法及解決方案。用於該方法的示例性基板包含InGaAs基板。使用在較低溫度下的電漿乾式清潔及熱處理來管理基板表面污染及粗糙度的變異。將基板放置於第一處理腔室中。將第一前驅物流入第一處理腔室且用低能量及功率活化第一前驅物,從而在基板表面上產生反應性位點(reactive site)。隨後低能量電漿與基板表面反應以在基板表面上產生反應性層。隨後將基板傳送到具有低溫的第二處理腔室中。將第二前驅物注入第二處理腔室,從而
移除反應性層且留下非常乾淨的基板表面,該基板表面準備好用於III-V族通道材料的磊晶生長。第一處理腔室可為蝕刻腔室,且第二處理腔室可為磊晶沉積腔室。
第1圖為總結根據本文所述的一個實施例用於清潔基板表面的方法100的流程圖。方法100之示例性基板包含InGaAs(或III-V族)基板。第2A圖~第2C圖描繪根據第1圖之方法100的裝置結構之製造階段之示意剖面側視圖。以下根據第2A圖~第2C圖中繪示的裝置結構之製造階段描述方法100。
在操作102處,將基板222放置於第一腔室中。如第2A圖所示,在操作102之前,在基板222上形成由介電質材料224所製成的凹口,且將緩衝材料226沉積在該凹口中。在緩衝材料226上方可能具有原生氧化物層228。基板222可為裝置之一部分,例如具有關鍵尺寸低至3nm(例如5nm或7nm)的CMOS裝置。例如鰭型場效電晶體(FinFET)或類似者的其他裝置可與本文所提供的發明方法一起使用。
第一處理腔室為電漿處理腔室。在一個實施例中,第一處理腔室為蝕刻腔室。在另一個實施例中,第一處理腔室為氣相沉積腔室。蝕刻腔室可為市售處理腔室,例如可自加利福尼亞州聖克拉拉之應用材料公司購得的AdvantEdgeTM MesaTM硬體配置,或適於實行磊晶沉積處理的任何適合的半導體處理腔室。
基板222可為含矽基板。基板可進一步包括鍺(Ge)、碳(C)、硼(B)、磷(P)或其他可與矽材料共同生長、摻雜及/或伴生(associated)的已知的元素。形成凹口的介電質材料224可包括下列中之一或更多者:一氧化矽(SiO)、二氧化矽(SiO2)、氮化矽(SiN)、氮氧化矽(SiON)或其他可用以形成介電質材料的適合的材料。可藉由各種沉積處理沉積介電質材料224。舉例而言,可藉由化學氣相沉積(CVD)製程沉積介電質材料224,化學氣相沉積製程可為電漿增強的。可藉由舉例而言使用蝕刻處理圖案化介電質材料來形成在介電質材料224中所形成的凹口,以達成所需的凹口特徵。適合的蝕刻方法包含但不限於非等向性乾式蝕刻或原位乾式清潔處理。
緩衝材料226可包括一或更多III-V族元素。在一個實施例中,緩衝材料226包括InGaAs。有時候,原生氧化物層228形成在緩衝材料226之表面上。原生氧化物層228包含銦(In)、鎵(Ga)、砷(As)之氧化物(及次氧化物)。舉例而言,原生氧化物層可包含氧化銦(In2O3)、氧化鎵(Ga2O3)、三氧化二砷(As2O3)或五氧化二砷(As2O5)。
在操作104處,將第一處理氣體引入第一腔室,第一處理氣體包括惰性氣體(例如氬氣(Ar))及氫源氣體(例如氫氣(H2)或甲烷)。在一個實施例中,第一處理氣體可為Ar/H2。第一處理氣體連續地流入腔室中。在
另一個實施例中,將RF功率耦合進入第一處理氣體用於活化作用,該RF功率可經脈衝。進入第一腔室的氫源氣體(在一個實施例中為H2)之流量(flow rate)介於約5sccm與約300sccm之間。進入第一腔室的惰性氣體(在一個實施例中為Ar)之流量介於約100sccm與約1200sccm之間。可藉由在第一流量下引入惰性氣體且繼之以在第二流量下引入氫源氣體的方式引入第一處理氣體,或藉由在第二流量下引入氫源氣體且隨後在第一流量下引入惰性氣體的方式引入第一處理氣體。可將氫源氣體之流量上升(ramp)至第二流量,且可將惰性氣體之流量上升到第一流量。亦可藉由同時引入惰性氣體及氫源氣體作為混合物的方式引入第一處理氣體。於介於100sccm與1500sccm之間的總流量下提供第一處理氣體,且可將第一處理氣體之流量上升到總流量。
在操作106處,活化第一處理氣體。在活化之前建立約20mT的目標壓力。在此處理期間,腔室壓力介於約5mT與約100mT之間,且腔室內的溫度介於約30℃與約120℃之間。藉由於約50℃下加熱基板且於65℃下加熱反應性表面的方式控制溫度。將低射頻(RF)源及偏壓功率施加至腔室且耦合至第一處理氣體以活化第一處理氣體,從而在某些情況下產生離子及自由基。源功率可介於約150W與約1000W之間。偏壓功率可介於約10W與約50W之間。在操作中,Ar離子破壞In-O、Ga-O及As-O鍵結,從而產生反應性位點。氫自
由基與O原子反應。因此,於操作108處,如第2B圖中所示,移除原生氧化物層228。
在操作110處將第二處理氣體Ar/Cl2/H2引入第一腔室。將RF功率耦合進入第二處理氣體用於活化作用,該RF功率可經脈衝。脈衝頻率範圍可介於約1KHz與約10KHz之間。進入第一腔室的H2之流量介於約0sccm與約300sccm之間。進入第一腔室的Cl2之流量介於約5sccm與約300sccm之間。進入第一腔室的Ar之流量介於約100sccm與約1200sccm之間。
在操作112處,活化第二處理氣體。在此處理期間,腔室壓力介於約5mT與約100mT之間,且腔室內的溫度介於約30℃與約120℃之間。將低射頻(RF)源及偏壓功率施加至腔室。源功率介於約150W與約1000W之間。偏壓功率介於約0W與約30W之間。
在操作114處,將基板222與第二處理氣體接觸以產生反應性表面層。在操作中,低能量Ar/Cl2/H2第二處理氣體與晶圓表面反應(在一個實施例中為InGaAs),從而產生反應性表面層。具體而言,反應性表面層包含高反應性、未鍵結的氫化物分子及氯化物分子。
在操作116處,將基板222傳送至第二腔室。第二腔室是沉積腔室。沉積腔室可為可購自加利福尼亞州聖克拉拉之應用材料公司的處理腔室,例如Centura® RP EPI反應器,或任何適於實行磊晶沉積處理的適合
的半導體處理腔室。於操作117處,將第三處理氣體引入腔室,第三處理氣體包括氫源及胂源。在一個實施例中,第三處理氣體包括H2及叔丁基胂(TBA)。第二腔室具有介於約10T與約600T之間的壓力,及介於約300℃與約800℃之間的溫度。在較佳的實施例中,腔室溫度550℃。
在操作118處,將基板222與第三處理氣體接觸以移除反應性表面層。在操作中,將第三處理氣體引入第二腔室僅一段短時間。舉例而言,將處理氣體引入腔室介於約15秒與約300秒之間。在此短時間期間,H2與TBA迅速地反應且移除反應性表面層,從而留下乾淨的緩衝層(在一個實施例中為InGaAs)表面。
於方法100之結束處,如第2C圖中所示,通道材料230可在基板表面上方磊晶生長,具體而言在緩衝材料226的上方磊晶生長。通道材料230可包括至少第III族元素及第V族元素之任何組合。在一個實施例中,通道材料230包括砷化銦鎵(InGaAs)。在另一個實施例中,通道材料230可包括砷化鋁鎵(AlGaAs)、砷化銦(InAs)、銻化鎵(GaSb)或銻化銦(InSb)。在進一步實施例中,通道材料230可包括具有高電子遷移率及佳結晶(crystallographic)結構的III-V族材料。方法100之表面製備處理之結果為,通道材料230具有非常低的缺陷濃度。
第1圖圖示用於清潔基板的方法之一個實施例。在另一個實施例中,方法100之操作可在單一腔室中發生。如上所述,第2A圖~第2C圖描繪於方法100之各階段處具有凹口的裝置之示意剖面側視圖。或者,第2A圖~第2C圖可描繪具有特徵結構的裝置之示意剖面側視圖,該等特徵結構可為溝渠、接觸孔或其他類型的特徵結構。
本文所揭示的方法可在單一腔室中實行或在單一設備之多個腔室中實行。第3圖為用於實行根據本文所述的一個實施例的方法的設備340之示意圖。更具體而言,設備340為用於根據上述方法製造半導體裝置的群集工具。設備340之中心部分為傳送腔室342。在傳送腔室342內為晶圓傳送機制344。晶圓傳送機制344將晶圓從第一腔室350或第二腔室352傳送至裝載閘腔室346,反之亦然。第一腔室350及第二腔室352連接至傳送腔室342。裝載閘腔室346經由晶圓對準腔室348連接至傳送腔室342。在較佳的實施例中,第一腔室350為蝕刻腔室,且第二腔室352為沉積腔室。蝕刻腔室可為市售處理腔室,例如可自加利福尼亞州聖克拉拉之應用材料公司購得的AdvantEdgeTM MesaTM硬體配置,或適於實行磊晶沉積處理的任何適合的半導體處理腔室。沉積腔室可為市售處理腔室,例如可自加利福尼亞州聖克拉拉之應用材料公司購得的Centura® RP Epi反應器,或任何適於實行磊晶沉積處理的適合的半導體處理腔室。
如第2A圖中所示,藉由將基板222設置於第一腔室350中,方法100始於操作102。如在操作104及操作106中所述,將第一處理氣體引入第一腔室350,於第一腔室350處第一處理氣體被離子化。如在操作108中所解釋且在第2B圖中所示,第一處理氣體接觸基板222之原生氧化物層228且積極地或部分地移除原生氧化物層228。如在操作110及操作112中所述,將第二處理氣體引入第一腔室350,於第一腔室350處第二處理氣體被離子化。如在操作116中所解釋,第二處理氣體接觸基板222且產生反應性表面層。隨後如操作116中所述,經由晶圓傳送機制344將基板222從第一腔室350傳送至第二腔室352。如在操作117及操作118中所述且如第2C圖中所示,將第三處理氣體引入第二腔室,於第二腔室處第三處理氣體接觸基板以移除反應性表面層。
使用含有處理腔室350及處理腔室352的單一設備340允許第1圖之方法之各階段在不破壞真空的情況下發生。
儘管第3圖描繪具有用於實行本文所述的方法的兩個處理腔室的設備之一個實例,本文涵蓋用於實行方法的其他設備及腔室配置。舉例而言,可將多於兩個的處理腔室附著至設備340之傳送腔室342。設備340可進一步包含以任何順序關於傳送腔室242之位置設置的以下腔室中之一或更多者:沉積腔室、蝕刻腔室、清潔腔室、退火腔室、氧化腔室、電漿腔室、遠端電漿腔室、熱腔室、
化學氣相沉積(CVD)腔室、物理氣相沉積(PVD)腔室、電漿增強化學氣相沉積(PECVD)腔室、快速熱處理(RTP)腔室、原子層沉積(ALD)腔室,或原子層蝕刻(ALE)腔室。
因此,提供了用於在III-V族通道材料之磊晶生長之前清潔基板的方法及解決方案。所揭示的在磊晶生長前的清潔促使在次7nm CMOS裝置中III-V族材料於InGaAs基板上的高選擇性磊晶生長。本揭示案之優點包含將基板表面上的氧含量降低至小於5.0E+11原子/cm2而不損害表面平滑度。
儘管前述是針對本揭示案之實施例,在不脫離本揭示案之基本範疇的情況下,可設計本揭示案之其他及進一步實施例,且本揭示案之範疇由以下的申請專利範圍所決定。
222‧‧‧基板
224‧‧‧介電質材料
226‧‧‧緩衝材料
228‧‧‧原生氧化物層
230‧‧‧通道材料
Claims (20)
- 一種用於清潔一基板的方法,該方法包括以下步驟:將一基板定位在一腔室中的一支撐件上,該基板具有一原生氧化物層於該基板上;將一第一處理氣體引入該腔室,該第一處理氣體包括一惰性氣體及一氫源;活化該第一處理氣體;將該基板之該原生氧化物層與該第一處理氣體接觸,以活化該原生氧化物層或部分移除該原生氧化物層;在活化該原生氧化物層或部分移除該原生氧化物層之後,將一第二處理氣體引入該腔室,該第二處理氣體包括Ar、Cl2及H2;活化該第二處理氣體;將該基板與該第二處理氣體接觸,以產生一反應性表面層;將一第三處理氣體引入該腔室,該第三處理氣體包括一氫源及一胂源;及將該基板與該第三處理氣體接觸,以移除該反應性表面層。
- 如請求項1所述之方法,其中該第一處理氣體包括Ar及H2。
- 如請求項1所述之方法,其中該第三處理氣體包括H2及叔丁基胂(TertiarybutylArsine)。
- 如請求項2所述之方法,其中以介於約100sccm與約1200sccm之間的一流量下將Ar引入該腔室。
- 如請求項1所述之方法,其中活化該第一處理氣體與活化該第二處理氣體的步驟於介於約150W與約1000W之間的一源功率下發生。
- 如請求項1所述之方法,其中活化該第一處理氣體的步驟於介於約10W與約50W之間的一偏壓功率下發生。
- 如請求項1所述之方法,其中活化該第二處理氣體的步驟於介於約0W與約30W之間的一偏壓功率下發生。
- 一種用於清潔一基板的方法,該方法包括以下步驟:將一基板定位在一第一腔室中的一支撐件上,該基板具有一原生氧化物層於該基板上;將一第一處理氣體引入該第一腔室,該第一處理氣體包括一惰性氣體及一氫源;活化該第一處理氣體;將該基板之該原生氧化物層與該第一處理氣體接觸, 以活化該原生氧化物層或部分移除該原生氧化物層;在活化該原生氧化物層或部分移除該原生氧化物層之後,將一第二處理氣體引入該第一腔室,該第二處理氣體包括Ar、Cl2及H2;活化該第二處理氣體;將該基板與該第二處理氣體接觸,以產生一反應性表面層;將該基板傳送至一第二腔室;將一第三處理氣體引入該第二腔室,該第三處理氣體包括一氫源及一胂源;及將該基板與該第三處理氣體接觸,以移除該反應性表面層。
- 如請求項8所述之方法,其中該第一處理氣體包括Ar及H2。
- 如請求項8所述之方法,其中該第三處理氣體包括H2及叔丁基胂。
- 如請求項8所述之方法,其中該第一腔室之一溫度介於約30℃與約120℃之間。
- 如請求項8所述之方法,其中該第二腔室之一溫度介於約300℃與約800℃之間。
- 如請求項8所述之方法,其中該第一腔室中的一壓力介於約5mT與約100mT之間。
- 如請求項8所述之方法,其中該第二腔室中的一壓力介於約10T與約600T之間。
- 一種用於製造一基板的方法,該方法包括以下步驟:將一基板定位在一第一腔室中的一支撐件上,該基板具有一原生氧化物層於該基板上;將一第一處理氣體引入該第一腔室,該第一處理氣體包括Ar及H2;活化該第一處理氣體;將該基板之該原生氧化物層與該第一處理氣體接觸,以活化該原生氧化物層或部分移除該原生氧化物層;在活化該原生氧化物層或部分移除該原生氧化物層之後,將一第二處理氣體引入該第一腔室,該第二處理氣體包括Ar、Cl2及H2;活化該第二處理氣體;將該基板與該第二處理氣體接觸,以產生一反應性表面層;將該基板傳送至一第二腔室;將一第三處理氣體引入該第二腔室,該第三處理氣體包括H2及叔丁基胂;將該基板與該第三處理氣體接觸,以移除該反應性表面層;及 在該基板的表面上方沉積一通道材料。
- 如請求項15所述之方法,其中該第一腔室為一蝕刻腔室。
- 如請求項16所述之方法,其中該第二腔室為一沉積腔室。
- 如請求項15所述之方法,其中該通道材料為一III-V族材料。
- 如請求項15所述之方法,其中該通道材料為InAs。
- 如請求項15所述之方法,其中該第二腔室之一溫度為550℃。
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US10354887B2 (en) * | 2017-09-27 | 2019-07-16 | Lam Research Corporation | Atomic layer etching of metal oxide |
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