TWI714607B - 基板於基板上之封裝技術 - Google Patents

基板於基板上之封裝技術 Download PDF

Info

Publication number
TWI714607B
TWI714607B TW105122062A TW105122062A TWI714607B TW I714607 B TWI714607 B TW I714607B TW 105122062 A TW105122062 A TW 105122062A TW 105122062 A TW105122062 A TW 105122062A TW I714607 B TWI714607 B TW I714607B
Authority
TW
Taiwan
Prior art keywords
solder
substrate
solder paste
solder ball
degrees celsius
Prior art date
Application number
TW105122062A
Other languages
English (en)
Other versions
TW201709451A (zh
Inventor
卡比爾庫瑪J 麥布里
簡 克拉吉奈克
魏昱瑩
貝佛利J 肯漢
江宏津
陸炯心
卡爾L 迪皮夏
飛 華
穆庫爾P 里納維卡
Original Assignee
美商英特爾公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美商英特爾公司 filed Critical 美商英特爾公司
Publication of TW201709451A publication Critical patent/TW201709451A/zh
Application granted granted Critical
Publication of TWI714607B publication Critical patent/TWI714607B/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0008Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0016Brazing of electronic components
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06Solder feeding devices; Solder melting pans
    • B23K3/0607Solder feeding devices
    • B23K3/0623Solder feeding devices for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • B23K35/025Pastes, creams, slurries
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262Sn as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/264Bi as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3006Ag as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/302Cu as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/36Selection of non-metallic compositions, e.g. coatings, fluxes; Selection of soldering or welding materials, conjoint with selection of non-metallic compositions, both selections being of interest
    • B23K35/3612Selection of non-metallic compositions, e.g. coatings, fluxes; Selection of soldering or welding materials, conjoint with selection of non-metallic compositions, both selections being of interest with organic compounds as principal constituents
    • B23K35/3613Polymers, e.g. resins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10125Reinforcing structures
    • H01L2224/10126Bump collar
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/11848Thermal treatments, e.g. annealing, controlled cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/11848Thermal treatments, e.g. annealing, controlled cooling
    • H01L2224/11849Reflowing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13005Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13016Shape in side view
    • H01L2224/13017Shape in side view being non uniform along the bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13199Material of the matrix
    • H01L2224/13294Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/132 - H01L2224/13291
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298Fillers
    • H01L2224/13299Base material
    • H01L2224/133Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298Fillers
    • H01L2224/13299Base material
    • H01L2224/133Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13301Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13311Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298Fillers
    • H01L2224/13299Base material
    • H01L2224/1339Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/1356Disposition
    • H01L2224/13563Only on parts of the surface of the core, i.e. partial coating
    • H01L2224/13565Only outside the bonding interface of the bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/13599Material
    • H01L2224/136Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/13599Material
    • H01L2224/1369Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/1601Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/1605Shape
    • H01L2224/16057Shape in side view
    • H01L2224/16058Shape in side view being non uniform along the bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81499Material of the matrix
    • H01L2224/81594Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/815 - H01L2224/81591
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81598Fillers
    • H01L2224/81599Base material
    • H01L2224/816Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81598Fillers
    • H01L2224/81599Base material
    • H01L2224/816Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81601Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/81611Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81598Fillers
    • H01L2224/81599Base material
    • H01L2224/8169Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/8185Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/81855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/81862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20Parameters
    • H01L2924/201Temperature ranges
    • H01L2924/20104Temperature range 100 C=<T<150 C, 373.15 K =< T < 423.15K
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20Parameters
    • H01L2924/201Temperature ranges
    • H01L2924/20105Temperature range 150 C=<T<200 C, 423.15 K =< T < 473.15K
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20Parameters
    • H01L2924/201Temperature ranges
    • H01L2924/20106Temperature range 200 C=<T<250 C, 473.15 K =<T < 523.15K
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3512Cracking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/38Effects and problems related to the device integration
    • H01L2924/384Bump effects
    • H01L2924/3841Solder bridging
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits
    • H05K3/363Assembling flexible printed circuits with other printed circuits by soldering

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
  • Geometry (AREA)

Abstract

本案的具體例可關於在中介板上的插線板(PoINT)架構。在具體例中,該PoINT架構可包括介於插線板與中介板之間的複數個焊點。該焊點可包括相對高溫的焊球與至少部分地圍繞該焊球之相對低溫的焊膏。可說明及/或主張其他具體例。

Description

基板於基板上之封裝技術 發明領域
本揭示內容一般關於用於電子裝置之封裝技術的領域,且更明確地,關於基板至基板或基板至印刷電路板(PCB)封裝技術的領域。
發明背景
基板至基板的架構,舉例來說,在中介板上的插線板(PoINT)架構,可呈現低成本封裝的設計機會。作為一個特定的例子,PoINT架構可包括帶有基板的插線板,該基板經由一或多個焊點與中介板基板耦接。在傳統裝置中,該焊點可用底層填充材料強化,以提供強度和結構性支撐予該接點。假使缺少該底層填充材料,該焊點可能會經歷非所欲的不良徵狀,例如在封裝的溫度循環期間的接點開裂。
依據本發明之一實施例,係特地提出一種封裝體,其包含:一第一基板,其帶有一第一側與相對於該第一側的一第二側;一第二基板,其帶有一第一側與相對於 該第一側的一第二側,其中該第一基板的該等第一和第二側係大約平行於該第二基板的該等第一和第二側,且該第一基板和該第二基板界定一空間,該空間介於該第一基板的該第一側與該第二基板的該第一側之間;至少一焊球,其被設置在該空間內且與該第一基板的該第一側和該第二基板的該第一側實體地耦接;以及一焊膏,其位於該空間且與該至少一焊球、該第一基板的該第一側、和該第二基板的該第一側實體地耦接,其中該焊膏至少部分地圍繞該焊球且該空間實質上係為無底部填充材料。
100‧‧‧封裝體
105‧‧‧晶粒
110‧‧‧插線板
115‧‧‧中介板
120‧‧‧基板
125‧‧‧焊點
130‧‧‧焊點
135‧‧‧焊點
140‧‧‧焊球
145‧‧‧JRP
150‧‧‧焊球
155‧‧‧焊球
200‧‧‧PoINT架構
205‧‧‧插線板
210‧‧‧焊球
215‧‧‧中介板
220‧‧‧JRP
225‧‧‧墊
300‧‧‧起始架構
305‧‧‧插線板
310‧‧‧JRP
315‧‧‧焊球
320‧‧‧晶粒
325‧‧‧焊球
330‧‧‧焊點
400‧‧‧架構
405‧‧‧JRP
410‧‧‧焊球
500‧‧‧架構
505‧‧‧中介板
510‧‧‧JRP
600‧‧‧架構
605‧‧‧焊球
610‧‧‧JRP
615‧‧‧JRP
705‧‧‧PoINT
710‧‧‧PoINT
800‧‧‧製程
805‧‧‧方法
810‧‧‧方法
815‧‧‧方法
820‧‧‧方法
825‧‧‧方法
830‧‧‧方法
900‧‧‧計算裝置
902‧‧‧主機板
904‧‧‧處理器
906‧‧‧通信晶片
908‧‧‧儲存裝置
藉由下列詳細說明與附圖,將容易地理解具體例。為幫助本說明,相似的參考編號表示相似的結構元件。具體例是以舉例的方式,而非以限制的方式繪示於附圖的圖示中。
圖1根據各式具體例描繪可包括PoINT架構的封裝體的例子。
圖2根據各式具體例描繪PoINT架構的剖面圖。
圖3、4、5、和6根據各式具體例描繪產生圖2的PoINT架構的連續圖。
圖7根據各式具體例描繪在例如圖2描繪之PoINT封裝體中增加的球剪切強度的例子。
圖8係根據各式具體例用於製作圖2或6封裝體的方法的例子。
圖9係根據各式具體例可包括圖1、2、或6封裝體 的計算裝置的例子。
詳細說明
本案的具體例可包括PoINT架構,該架構可包括焊點,該焊點包括由帶有高延展性和高抗拉強度的合金、與帶有相對低回焊溫度的以環氧樹脂為基質之接點加強膏(JRP)所組成的焊球。在回焊期間,該JRP可在該焊球周圍流動並固化,其可幫助提供結構性支撐予該焊點。以此方式,該PoINT架構可具有增加的結構穩定性而無需互連層中的底層填充。
一般而言,術語「高溫」在本說明中將用於指稱在焊球中使用的合金。如本案使用,「高溫」一般指稱帶有相對高的回焊溫度的合金,以及進一步指示該合金在接近該回焊溫度之溫度時可具有相對高的延展性和抗拉強度。同樣地,術語「低溫」在本說明中可用於指稱JRP。如本案使用,「低溫」的合金或JRP可指稱帶有相對低回焊或固化溫度的合金或JRP。
本案說明的具體例在一些情況下可將焊球稱為「高溫」以及將該JRP稱為「低溫」。然而,此說明可能僅為了一具體例的例子,在其他具體例中,該JRP可為高溫。此外或另外地,在其他具體例中,該焊球可為低溫。
應理解的是,本案討論的JRP在可於JRP及/或封裝體上進行的回焊及/或固化製程之前與之後皆可說明為「膏狀物」。為了一致性與清晰的考慮,在討論建構各種 封裝體的不同階段的元件時,可使用本說明。術語並非旨在限制本案說明的JRP的特定階段或形式。
在下列詳細說明中,參照形成本案一部分的附圖,其中通篇相似的編號標示相似的部件,其中以例示方式顯示可實行本揭示內容標的之具體例。應理解的是,可利用其他具體例以及可進行結構上或邏輯的變化而不逸離本揭示內容的範疇。因此,下列詳細說明不應以限制性的意義理解,且具體例的範疇係由隨附申請專利範圍及其等效物界定。
就本揭示內容目的而言,用語「A及/或B」意指(A)、(B)、或(A與B)。就本揭示內容目的而言,用語「A、B、及/或C」意指(A)、(B)、(C)、(A與B)、(A與C)、(B與C)、或(A、B、與C)。
本說明可使用「在一具體例中(in an embodiment)」或「在具體例中(in embodiments)」的用語,其可各自指稱相同或不同具體例的一或多者。再者,術語「包含」、「包括」、「具有」、等等,當用於本揭示內容的具體例時是同義的。
術語「與...耦接(coupled with)」連同其衍生物可用於本案。「耦接」可意指下列一或多者。「耦接」可意指二或數個元件係直接實際地或電性接觸。然而,「耦接」亦可意指二或數個元件彼此間接地接觸,但仍彼此合作或相互作用,以及可意指一或多個其他元件在稱作彼此耦接的該元件之間耦接或連接。
在各式具體例中,用語「在一第二層上形成一第一層」可表示該第一層係形成在該第二層上方,以及該第一層的至少一部分可與該第二層的至少一部分直接接觸(譬如,直接實際及/或電性接觸)或間接接觸(譬如,具有介於該第一層與該第二層之間的一或多個其他層)。
圖1描繪封裝體100的例子,該封裝體可包括一PoINT架構。明確地說,晶粒105可經由一或多個焊點125與一插線板110耦接。在具體例中,該晶粒105可包括中央處理器(CPU)、記憶體、互連積體電路(IC)及/或一些其他組件。在具體例中,該焊點125可由焊球140組成,該焊球可包括錫、銀、和銅(在本案中稱為“SAC”)的合金。在具體例中,介於該晶粒105與該插線板110之間的焊點140可統稱為第一層互連(FLI)。
一般而言,在本案的具體例中,焊點125可討論為包括例如焊球140的焊球或以其為基質。然而,在其他具體例中,該焊點125可由帶有焊帽(solder cap)的銅凸塊或一些其他可焊接的材料構形所形成。
再者,該插線板110可經由複數個焊點130與該中介板115耦接,該焊點可包括一或多個相對高溫的(多個)焊球150與一相對低溫的JRP 145。在具體例中,該相對高溫的(多個)焊球150可由如上說明的SAC組成。在其他具體例中,該焊球140可由錫和鉍(Sn-Bi)的合金組成。在具體例中,該SAC及/或Sn-Bi合金可摻雜一或多個摻雜物,例如鎳(Ni)、錳(Mn)、銦(In)、銻(Sb)、鍶(Sr)、鉻(Cr)、及/ 或鈦/氧化鈦(Ti、TiO)。該相對高溫的(多個)焊球150與該相對低溫的JRP 145將參照下圖2更加詳細的說明。如上所述,相對高溫的(多個)焊球150與相對低溫的JRP 145的說明在本案中旨在做為一個例子,而其他具體例可具有相對低溫的(多個)焊球、相對高溫的JRP、或高溫和低溫的JRP及/或焊球的組合。
在一些具體例中,該焊球150可由SAC合金所組成,該合金係大約0-98%錫、0-5%銀、和0-5%銅。該Sn-Bi焊球可由大約0-95%錫和0-58%鉍所組成。焊球140的合金的其他調配物可在本案中討論。
一般而言,介於該插線板110與該中介板115之間的該焊點130可統稱為中層互連(MLI)。該插線板110、該焊點130、和該中介板115的組合一般可稱為PoINT架構。
最後,該中介板115可經由焊點135與基板120,例如計算裝置的印刷電路板(PCB)耦接,該焊點可由排列成如圖1描繪的球形陣列(BGA)的焊球155所組成。該焊點135可統稱為第二層互連(SLI)且可由與焊球140相同材料、或與其不同材料所組成。在其他具體例中(未顯示),該中介板115可經由平面網格陣列(LGA)、插針網格陣列(PGA)、及/或一些其他類型的互連結構與基板120耦接。
在具體例中,該插線板110可視為相對高密度,而中介板115可視為相對低密度。在一些具體例中,該插線板110可視為高密度,因為在與晶粒105耦接的該插線板 110第一側及與該中介板115耦接的該插線板110第二側之間,該插線板110可具有相對高數目的連接或線路(未顯示)。由於該插線板110相對小的外形,該連接可相對密集地封裝在一起,且可包括一或多個矽通孔(TSVs)。同樣地,該中介板115可視為低密度(或,另擇地,具有與傳統晶粒封裝體大約類似的密度),因為該中介板可具有類似於該插線板110之數目的連接或線路,但具有較大的外形115。因此,該中介板115的連接或線路可比該插線板110的連接或線路的密度小。
在一些具體例中,「低密度」可指稱具有每毫米(mm)大約10個或更少的輸入/輸出(I/O)連接。「低密度」亦可指稱具有大約50/50微米(μm)的線寬/線距測量值。相對地,「高密度」可指稱具有每mm大約20個或更多的I/O連接。「高密度」亦可指稱具有大約25/25μm的線寬/線距測量值。在其他具體例中,「低密度」可指稱具有大於大約20/20μm的線寬/線距測量值,而「高密度」可指稱具有小於大約20/20μm的線寬/線距測量值。在各式具體例中,高/低密度的名稱可指該插線板110和該中介板115的相對密度,而明確的I/O連接或線寬/線距的測量值可標示相對於另一者的密度。
通常來說,插線板110和中介板115的不同密度可能基於晶粒105與基板120。明確地說,可期望的是晶粒105與在基板120上的一插座以通信方式耦接,該插座可具有顯著地大於該晶粒面積的面積。為了使該晶粒105與基 板120的該插座以通信方式耦接,可期望的是晶粒105與插線板110及/或中介板115的一或兩者耦接。然而,當相較於晶粒105及/或插線板110時,該中介板115可視為具有相對大的外形(即,側面腳位(footprint)),所以在耦合製程期間,明確地說在回焊或固化製程期間,該中介板115可能翹曲。此翹曲可能因為回焊或固化一般涉及加熱,導致該焊球140、150、及/或155輕微變形,而使晶粒105、插線板110、中介板115、及/或基板120的各種基板實體地耦接在一起。隨著施加此熱,晶粒105、插線板110、中介板115、及/或基板120的各種基板可能變形。該翹曲可導致該插線板110與該中介板115之間的焊點130的一或多者比焊點130的另一者更靠近或更遠,其可造成非所欲的弱點,例如焊點130的開裂或橋接、或焊球的其中一者不與該插線板110及/或該中介板115的其中一者耦合。
為了減少或消除由翹曲導致之非所欲的弱點,傳統封裝體可使用底層填充,以提供焊點130結構性支撐。然而,該底層填充可能非所欲地昂貴及/或給製造製程增加一額外的步驟。藉由使用相對高溫的焊球150與相對低溫的JRP 145,在MLI中使用底層填充可非必要。
應注意的是,在封裝體100中的元件的相對尺寸和數目僅以示範的目的描繪。明確地說,各種元件,例如晶粒105、焊點125/130/125、插線板110、中介板115、和基板120的高度或長度可不按比例。此外,在不同的具體例中,元件的數目,舉例來說,焊點125、130、和135中 的焊球140、150、或155的數目可不同。
圖2描繪一PoINT架構200的剖面圖。該PoINT架構200可包括一插線板205與一中介板215,其可分別類似於插線板110與中介板115。該PoINT架構200可進一步包括一或多個焊球210,其可類似於焊球150。該PoINT架構200可進一步包括JRP 220,其可類似於JRP 145。在一些具體例中,該插線板205及/或中介板215可包括與該焊球210的一或多者實體地且電氣地耦接的一或多個墊225。在一些具體例中,一墊225僅可與一焊球210耦接,而在其他具體例中,一墊225可與複數個焊球210耦接。在一些具體例中,墊225的一或多者可與一或多個通信通道(舉例而言,TSVs)耦接,俾使信號從插線板205及/或中介板215的一側傳送至另一側,允許PoINT架構200及/或封裝體100的不同層之間通信。
在具體例中,該焊球210可由帶有相對低份量的銀的SAC合金所組成。舉例來說,在一些具體例中,該SAC合金可包括大約2.3重量百分比的銀。該焊球210的SAC合金可摻入,舉例來說,大約80每百萬份(ppm)的鈷與大約800ppm的鎳,以及具有介於大約221和大約225攝氏度之間的熔點。在其他具體例中,該焊球210可由帶有相對高溫性能的一些其他焊料合金所組成,例如帶有大約3%的銀、大約0.5%的銅、大約0.15%的鎳、和剩餘(大約96.35%)的錫的SAC合金。在一些具體例中,此類SAC合金可稱為SAC305+0.15Ni。其他具體例可使用具有類似於該 等SAC305+0.15Ni合金或一些其他適宜合金的特性之一些其他類型的焊料合金。在具體例中,該焊球210可由大約0-98%的錫、0-5%的銀、和0-5%的銅的SAC合金所組成。在其他具體例中,該焊球210可由大約0-95%的錫與0-58%的鉍的Sn-Bi合金所組成。在一些具體例中,該SAC及/或Sn-Bi合金可摻雜一或多個摻雜物,例如鎳(Ni)、錳(Mn)、銦(In)、銻(Sb)、鍶(Sr)、鉻(Cr)、及/或鈦/氧化鈦(Ti、TiO)。
此類摻雜的SAC合金或Sn-Bi合金可產生包括焊球210之焊點的溫度循環性能的顯著改良。明確地說,在溫度循環期間,包括焊球210的焊點可能經歷顯著降低的開裂位準。
一般來說,在焊料中存在鈷或一些其他摻雜物可藉由提供成核位置來幫助減少在PoINT架構200的回焊及/或溫度循環期間的過冷現象。該減少的過冷現象可產生較薄的介金屬化合物(IMC)。一般而言,IMC可指焊料的金屬原子與封裝金屬墊的原子混合的一層。在本具體例中,IMC的例子可包括(CuNi)6Sn5。較薄的IMC可顯著地加強PoINT架構200的溫度循環性能。再者,鎳摻雜物的存在可減少或消除在焊球210表面上相對易碎的銅-錫(Cu3Sn)晶體的形成。應意識的是,上述說明摻雜的SAC合金僅為合金的一個例子,其他具體例可利用由帶有不同材料及/或摻雜物之另擇相對高溫的合金所組成的焊球210。在具體例中,合金的選擇可基於下列因素,例如PoINT架構200 所欲的回焊-溫度、與下游加工步驟的相容性、最終的產率、在加速熱循環可靠性評估中的合金性能、及/或其他因素。在一些具體例中,合金的選擇可基於所欲的相對高的抗拉強度及/或相對高的延展性。
在具體例中,該JRP 220可為如上述說明的相對低溫焊膏。舉例來說,該JRP 220可具有大約160攝氏度的回焊點或熔點,儘管在其他具體例中,取決於PoINT200架構的參數與封裝結構認定的所欲回焊溫度,該回焊點可較高或較低。
儘管術語「高」和「低」溫度可大致上應用於該JRP 220,在明確的具體例中,該JRP 220可包括高和低熔點的焊粉,而加強組分(即,環氧樹脂助焊劑)可具有高或低溫固化動力學。舉例來說,就包括例如錫-鉍焊粉(即,42百分比的錫和58百分比的鉍)的合金的JRP而言,該焊粉的熔點可大約為140攝氏度,而該JRP 220的固化溫度可介於大約160度和190攝氏度之間。該合金的回焊溫度可介於大約130和200攝氏度之間。此類型的JRP可稱為「低溫」的JRP 220。
作為另一例子,「高溫」的JRP可具有介於大約220和240攝氏度之間的固化溫度。在一些具體例中,該JRP的焊料合金可具有相對低的熔點(譬如,140攝氏度),而在其他具體例中,該合金可具有大約217攝氏度的熔點。
在一些具體例中,該焊球210可同樣視為「低溫」 且具有介於大約130和200攝氏度之間的回焊溫度。如上所述,在一些具體例中,該焊球210可視為「高溫」且具有介於大約220和225攝氏度之間的回焊溫度。
一般而言,在一些具體例中,假使使用較低溫度的焊球,則使用在插線板上的JRP可為帶有高固化溫度與高溫或低溫焊料合金的JRP。使用在中介板上的JRP可為帶有高固化溫度與高溫或低溫焊料合金的JRP或帶有低固化溫度與低溫焊料合金的JRP。
另外,假使使用高溫焊球,則使用在插線板上的JRP可為帶有較高固化溫度與高溫或低溫焊料合金的JRP。使用在中介板上的JRP可為帶有較高固化溫度與高溫或低溫焊料合金或是低固化溫度與低溫焊料合金的JRP。
在一些具體例中,該JRP 220可類似於免洗類型的焊膏。明確地說,該JRP 220可以,在回焊製程期間,留下電惰性的殘留物,該殘留物並不造成結構的弱點或使焊球210之間橋接。在一些具體例中,該JRP 220可為以環氧樹脂為基質的膏狀物。在一些具體例中,該JRP 220可包括硬石膏及/或以催化劑為基質的固化劑。在一些具體例中,該JRP 220可進一步包括溶劑、有機酸、觸變劑/其他流變修飾劑與抗發泡劑或由其等所組成。
在具體例中,如將在下文中詳細說明,在回焊期間,該JRP 220可至少部分地熔融且在焊球210的一或多者的周圍流動,如圖2顯示。接續在該回焊製程之後,該JRP 220,且尤其是JRP 220的殘留物,可固化且至少部分 地圍繞該焊球210的一或多者,提供了包括該焊球210的焊點的結構性支撐。以此方式,該結構性支撐可來自該JRP 220,藉此取消插線板205和中介板215之間的底層填充材料的需求。
明確地說,在該JRP 220係以環氧樹脂為基質的膏狀物的具體例中,在回焊期間,該JRP 220的殘留物可至少部分地或完全地交聯,並使焊膏組分在該焊球210周圍的環氧樹脂凸環固化。此類凸環可提供包括焊球210的(多個)焊點抵抗熱和衝擊應力之一或兩者的強化作用。
在PoINT架構200的溫度循環期間,在該焊球210周圍的JRP 220的保護作用可在抑制開裂形成時扮演顯著的角色。此抑制可能是因為,在溫度循環期間,開裂的起始與擴展可能發生在該焊球220和墊225的介面(在許多情況下)。假使該接點係由保護性JRP 220,舉例而言,保護性硬化環氧樹脂包圍,由於該JRP 220提供之應力的減少/消耗,於是開裂的起始與擴展的傾向性可大幅地減少。
儘管圖2的例子係說明為一PoINT架構,在其他具體例中,該JRP 220和該焊球210可用於形成在PCB上或在基板於基板上之互連上的不同類型的基板。舉例來說,在一些具體例中,該JRP 220和焊球210可用於形成晶粒和插線板之間、一中介板與一PCT或基板之間、或不同封裝體的兩個其他類型基板之間的互連。
圖3-6說明用於生成PoINT架構,例如在圖2中的 PoINT架構200的連續步驟。應理解的是在其他具體例中,類似的製程可用於生成介於基板和PCB之間、或介於第一和第二基板的另一組合之間的類似架構。在具體例中,起始架構300可包括一插線板305,其可類似於插線板110或205。JRP 310,其可類似於JRP 145或220,可印刷在該插線板305的第一側上,而一或多個相對高溫焊球315,其可類似於焊球150或210,可位在該JRP 145上。
在一些具體例中,起始架構300可包括一晶粒320,其可類似於晶粒105。該晶粒320可經由焊點330與該插線板305耦接,該焊點330可類似於焊點125,以及包括一或多個焊球325,其可類似於焊球140。儘管該晶粒320、焊點330、和焊球325將經由圖3-6的其餘討論描繪,在其他具體例中,該晶粒320、焊點330、和焊球325可接續在完成生成PoINT架構200的製程之後添加,或可不添加該等。
在圖4中,回焊可在起始架構300上進行,以生成架構400。明確地說,該回焊可包括加熱至起始架構300,俾使JRP 310至少部分地變形並在焊球315的周圍流動。結果,該架構400可包括焊球410,其可類似於焊球315或可藉由回焊製程至少部分地變形,該焊球410至少部分地被JRP 405圍繞,該JRP 405可類似於JRP 310、145、或220。在一些具體例中,該回焊製程可在大約240-260攝氏度的溫度進行。
在圖5中,JRP膏狀物510,其可類似於JRP膏狀 物310、145、或220,可用印刷或其他方式施加至一中介板505,該中介板505可類似於中介板115或215。架構400可倒置,且焊球410可位在JRP 510上,以形成架構500。
接著,如圖6顯示,可在架構500上進行回焊,以生成架構600,其可包括類似於PoINT架構200的PoINT架構。明確地說,如上述說明,該回焊可包括加熱至架構400,俾使JRP 510至少部分地變形並在焊球410周圍流動。結果,該架構600可包括焊球605,該焊球605可類似於焊球410或可藉由回焊製程至少部分地變形。該焊球605可至少部分地被JRP 615圍繞,該JRP 615可類似於JRP 510、220、或145。在一些具體例中,JRP 405可在第二回焊製程期間進一步變形,藉此生成JRP 610。在其他具體例中,JRP 610可與JRP 405相同。在具體例中,該回焊製程可在大約160-185攝氏度的溫度進行。在其他具體例中,取決於所使用的特定架構或封裝體,該回焊溫度可較高或較低。舉例來說,該溫度可以各種板子、焊球材料、JRP材料、或其他材料的組成為基礎變化。在具體例中,該回焊溫度可高達240攝氏度。
圖7描繪在PoINT架構中的焊球剪切強度的例子,例如在圖2中描繪的該等PoINT架構。y軸可為以牛頓(N)計的剪切強度的測量值。PoINT 705可顯示在使用傳統松香型焊膏的焊點中的焊球帶有誤差範圍的剪切強度。PoINT 710可顯示使用例如JRP 145、220、610、或615的JRP的焊點中的焊球帶有誤差範圍的剪切強度。如可看 到,由PoINT 710標示的焊點的剪切強度係顯著地高於由PoINT 705所標示的焊點的剪切強度。
圖8描繪用於建構PoINT架構,例如在圖2中描繪的該等PoINT架構的製程800的一例子。圖8的元件可類似於參照圖3-6的該等上述說明。
起初,在805中,例如JRP 310的低溫焊膏可用印刷或其他方式施加至例如插線板305的插線板。接著在810中,例如焊球315的一或多個相對高溫焊球可與在該插線板上的該低溫焊膏耦接,以及在815中,可在該低溫焊膏上進行固化及/或回焊,如參照圖4的上述說明。
接著,在820中,例如低溫焊膏510的低溫焊膏可用印刷或其他方式施加至例如中介板505的中介板。在825中,例如焊球410的高溫焊球可與該低溫焊膏耦接,以及在830中,該低溫焊膏可固化及/或回焊,如參照圖6的上述說明。
本揭示內容的具體例可使用任何插線板、中介板、晶粒、基板、及/或封裝體實現成一系統,其可從帶有如本案所述增加的結構強度之簡化製程中受益。圖9以圖解例示根據一些實例的一計算裝置900,,其可包括一或多個PoINT架構,例如PoINT架構200。
計算裝置900可為,舉例來說,一移動通信裝置或桌上型或機架型(rack-based)計算裝置。該計算裝置900可容納一板,例如一主機板902。在具體例中,該主機板902可類似於基板120。該主機板902可包括數個組件,該 組件包括(但不限於)處理器904與至少一通信晶片906。在另外的實例中,該通信晶片906可為部分的處理器904。在一些具體例中,該組件的一或多者,例如該處理器904,可與一PoINT架構200耦接,其可依次與該主機板902耦接。即,在一些具體例中,該處理器904可類似於該晶粒105。在其他具體例中,該通信晶片906或該計算裝置900的一些其他元件可另外地或另擇地與該PoINT架構200耦接。
該計算裝置900可包括儲存裝置908。在一些具體例中,該儲存裝置908可包括一或多個固態硬碟。包括在儲存裝置908內的儲存裝置的例子可包括揮發性記憶體(譬如,動態隨機存取記憶體(DRAM))、非揮發性記憶體(譬如,唯讀記憶體,ROM)、快閃記憶體、與大容量儲存裝置(例如硬式磁碟機、光碟(CDs)、多樣化數位光碟(DVDs)等等)。
取決於其應用,該計算裝置900可包括其他組件,該組件可或可不實體地且電氣地耦接至主機板902。該等其他組件可包括,但不限於,繪圖處理器、數位信號處理器、密碼處理器、晶片組、天線、顯示器、觸控螢幕、觸控螢幕控制器、電池、音頻編碼解碼器、視頻編碼解碼器、功率放大器、全球定位系統(GPS)裝置、羅盤、蓋格計數器、加速計、陀螺儀、擴音器、與照相機。
通信晶片906與天線可啟用無線通信,將資料傳至計算裝置900及從計算裝置900輸出。術語「無線」及其 衍生詞可用於說明電路、裝置、系統、方法、技術、通信頻道、等等,其可經由使用調製的電磁輻射經由非固體介質傳送數據。該術語並不意味該關連裝置不含任何線路,儘管在一些具體例中,彼等可能沒有。通信晶片906可實施數個無線標準或協議的任一者,包括但不限於電氣及電子工程師學會(IEEE)標準,其包括Wi-Fi(IEEE 802.11家族)、IEEE 802.16標準(譬如,IEEE 802.16-2005修正案)、長期演進技術(LTE)計劃連同任何修正、更新、及/或改版(譬如,先進的LTE計劃、超行動寬頻(UMB)計劃(亦稱作"3GPP2"),等等)。IEEE 802.16相容的寬頻廣域(BWA)網路一般稱作WiMAX網路,首字母的縮寫代表全球互通微波存取,其係通過IEEE 802.16標準的一致性與互通性測試之產品的認證標誌。該通信晶片906可根據全球移動通信系統(GSM)、通用封包無線服務(GPRS)、通用移動通訊系統(UMTS)、高速封包存取(HSPA)、進化HSPA(E-HSPA)、或LTE網路操作。該通信晶片906可根據GSM進化加強數據(EDGE)、GSM EDGE無線存取網路(GERAN)、通用陸面無線存取網絡(UTRAN)、或進化的UTRAN(E-UTRAN)操作。該通信晶片906可根據分碼多重存取(CDMA)、分時多重存取(TDMA)、數位加強無線通訊(DECT)、最佳進化數據(EV-DO)、其等的衍生物,以及命名為3G、4G、5G、與以外的任何其他無線協議操作。在其他具體例中,該通信晶片906可根據其他無線協議操作。
計算裝置900可包括複數個通信晶片906。舉例 而言,一第一通信晶片906可專門用於較短範圍無線通信,例如Wi-Fi與藍芽,以及一第二通信晶片906可專門用於較長範圍無線通信,例如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、EV-DO、與其他。在一些具體例中,該通信晶片906可支援有線通信。舉例來說,該計算裝置900可包括一或多個有線伺服器。
計算裝置900的處理器904及/或通信晶片906可為或包括IC封裝體中的一或多個晶粒或其他組件。此類IC封裝體可使用本案揭示技術的任一者與一插線板、一中介板及/或一主機板902另一封裝體直接地或間接地耦接。術語「處理器」可指稱處理來自暫存器及/或記憶體的電子數據以將該電子數據轉變成可儲存於暫存器及/或記憶體的其他電子數據的任何裝置或裝置的一部分。
在各式實例中,計算裝置900可為膝上型電腦、輕省筆電、筆記型電腦、超輕薄電腦、智慧型手機、平板電腦、個人數位助理(PDA)、超便攜式PC、移動電話、桌上型電腦、伺服器、印表機、掃描器、螢幕、機上盒、娛樂控制單元、數位相機、便攜式音樂播放器或數位錄影機。在另外的實例中,該計算裝置900可為處理數據的任何其他電子裝置。在一些具體例中,本案揭示的凹入式傳導接點可在高效能的計算裝置中實施。
下列段落提供本案揭示的各種具體例的實施例。
實施例1可包括一封裝體,其包含:一第一基 板,其帶有一第一側與相對於該第一側的一第二側;一第二基板,其帶有一第一側與相對於該第一側的一第二側,其中該第一基板的該等第一和第二側係大約平行於該第二基板的該等第一和第二側,且該第一基板和該第二基板界定一空間,該空間介於該第一基板的該第一側與該第二基板的該第一側之間;至少一焊球,其被設置在該空間內且與該第一基板的第一側以及該第二基板的第一側實體地耦接;以及一焊膏,其位於該空間且與該至少一焊球、該第一基板的該第一側、以及該第二基板的該第一側實體地耦接,其中該焊膏至少部分地圍繞該焊球且該空間實質上係為無底部填充材料。
實施例2可包括實施例1的封裝體,其中該第一基板為一插線板且該第二基板為一中介板。
實施例3可包括實施例1的封裝體,其中該焊球包括錫、銀和銅或錫和鉍。
實施例4可包括實施例1的封裝體,其中該焊膏包括環氧樹脂。
實施例5可包括實施例1-4的任一者的封裝體,其中該第一基板為一高密度基板。
實施例6可包括實施例1-4的任一者的封裝體,其中該第二基板為一低密度基板。
實施例7可包括實施例1-4的任一者的封裝體,其中該第一基板包括一晶粒,該晶粒與該第一基板的該第二側耦接。
實施例8可包括一方法,其包含:在一第一基板的第一側上放置一焊膏,該第一基板包括該第一側與相對於該第一側的一第二側;使一焊球與該焊膏耦接且使在該第一基板的該第一側上的該焊膏回焊和固化,俾使在該第一基板的該第一側上的該焊膏至少部分地圍繞並結構性支撐該焊球;在一第二基板的一第一側上放置該焊膏,該第二基板包括一第一側與相對於該第一側的一第二側;使該焊球與在該第二基板的該第一側上的該焊膏耦接焊膏;以及使在該第二基板的該第一側上的該焊膏回焊和固化焊膏,俾使在該第二基板的該第一側上的該焊膏至少部分地圍繞並結構性支撐該高溫焊球。
實施例9可包括實施例8的方法,其中該焊膏係在一溫度下回焊與固化,該溫度高於該低溫焊膏的回焊溫度以及高於或低於該高溫焊球的回焊溫度。焊膏焊膏
實施例10可包括實施例9的方法,其中該焊球具有介於大約200攝氏度和大約225攝氏度之間的回焊溫度。
實施例11可包括實施例9的方法,其中該焊膏具有一合金,該合金帶有介於大約130攝氏度和大約200攝氏度之間的回焊溫度。
實施例12可包括實施例8-11的任一者的方法,其中該焊球包括錫、銀和銅或錫和鉍。
實施例13可包括實施例8-11的任一者的方法,其中該焊膏包括環氧樹脂。
實施例14可包括實施例8-11的任一者的方法, 其中該第一基板包括一高密度基板。
實施例15可包括實施例8-11的任一者的方法,其中該第二基板包括一低密度基板。
實施例16可包括實施例8-11的任一者的方法,其中該第一基板為一插線板以及該第二基板為一中介板。
實施例17可包括一封裝體,其包含:一晶粒,其與一插線板的第一側耦接,該插線板包括一高密度基板;一基板,其與一中介板的第一側耦接,該中介板包括一低密度基板;至少一高溫焊球,其被設置在相對於該插線板的該第一側之該插線板的一第二側與相對於該中介板的該第一側之該中介板的一第二側之間,且與該插線板的一第二側和該中介板的一第二側實體地耦接;以及一低溫焊膏,其被設置在該至少一高溫焊球、該插線板的該第二側、和該中介板的該第二側之間,且與該至少一高溫焊球、該插線板的該第二側、和該中介板的該第二側實體地耦接。
實施例18可包括實施例17的封裝體,其中介於該插線板的該第二側與該中介板的該第二側之間的區域實質上係為無底部填充材料。
實施例19可包括實施例17或18的封裝體,其中該高溫焊球包括錫、銀和銅或錫和鉍且具有介於大約200攝氏度和大約225攝氏度之間的回焊溫度。
實施例20可包括實施例17或18的封裝體,其中該低溫焊膏包括環氧樹脂且具有介於大約160攝氏度和190 攝氏度之間的固化溫度。
實施例21可包括實施例1-4的任一者的封裝體,其中該焊球為低溫焊球,其中該焊膏具有高固化溫度,其中該焊膏包括帶有高回焊溫度或低回焊溫度的焊料合金。
實施例22可包括實施例1-4的任一者的封裝體,其中該焊球為低溫焊球,其中該焊膏具有低固化溫度,其中該焊膏包括帶有低回焊溫度的焊料合金。
實施例23可包括實施例1-4的任一者的封裝體,其中該焊球為高溫焊球,其中該焊膏具有高固化溫度,其中該焊膏包括帶有高回焊溫度或低回焊溫度的焊料合金。
實施例24可包括實施例1-4的任一者的封裝體,其中該焊球為高溫焊球,其中該焊膏具有低固化溫度,其中該焊膏包括帶有低回焊溫度的焊料合金。
100‧‧‧封裝體
105‧‧‧晶粒
110‧‧‧插線板
115‧‧‧中介板
120‧‧‧基板
125‧‧‧焊點
130‧‧‧焊點
135‧‧‧焊點
140‧‧‧焊球
145‧‧‧JRP(接點加強膏)
150‧‧‧焊球
155‧‧‧焊球

Claims (15)

  1. 一種封裝體,其包含:一第一基板,其帶有一第一側與相對於該第一側的一第二側,其中一第一焊球係與該第一基板之該第二側實體地耦接,且該第一焊球係不與焊膏直接接觸;一第二基板,其帶有一第一側與相對於該第一側的一第二側,其中該第一基板和該第二基板界定一空間,該空間介於該第一基板的該第一側與該第二基板的該第一側之間;一第二焊球,其被設置在該空間內且與在該第一基板的該第一側之該第一基板內的一第一墊實體地耦接,並與該第二基板的該第一側之該第二基板內的一第二墊實體地耦接,其中該第二焊球具有介於大約200攝氏度和大約225攝氏度之間的回焊溫度;以及一第一焊膏,其位於該空間內且與該第二焊球、和該第一基板的該第一側實體地耦接,及一第二焊膏,其與該第二焊球和該第二基板的該第一側實體地耦接,其中該第一焊膏及該第二焊膏部分地圍繞該第二焊球,而該第二焊球的一部分係不被該第一焊膏及該第二焊膏所覆蓋,其中該第一焊膏和該第二焊膏具有介於大約160攝氏度和190攝氏度之間的固化溫度。
  2. 如請求項1的封裝體,其中該第二焊球包括一錫、銀和銅之合金或一錫和鉍之合金。
  3. 如請求項1的封裝體,其中該第一焊膏及該第二焊膏包括環氧樹脂或焊粉。
  4. 如請求項1的封裝體,其中該第一基板具有每毫米大約20個輸入或輸出連接或更多,或者具有小於大約20/20微米的線寬或線距測量值。
  5. 如請求項1的封裝體,其中該第二基板具有每毫米大約10個輸入或輸出連接或更少,或者具有大於大約20/20微米的線寬或線距測量值。
  6. 如請求項1的封裝體,其中該第一基板包括一晶粒,該晶粒藉由一焊點來與該第一基板的該第二側耦接而不與該焊膏接觸。
  7. 一種封裝方法,其包含:使第一焊球與一第一基板之一第二側實體地耦接,該第一基板包括一第一側與相對於該第一側的該第二側;在該第一基板的該第一側上放置一第一焊膏;使一第二焊球與該第一焊膏耦接且使在該第一基板的該第一側上的該第一焊膏回焊和固化,俾使在該第一基板的該第一側上的該第一焊膏至少部分地圍繞並結構性支撐該第二焊球;在一第二基板的一第一側上放置一第二焊膏,該第二基板包括一第一側與相對於該第一側的一第二側;使該第二焊球與在該第二基板的該第一側上的該第二焊膏耦接;以及 使在該第二基板的該第一側上的該第二焊膏回焊和固化,俾使在該第二基板的該第一側上的該第二焊膏至少部分地圍繞並結構性支撐該第二焊球,其中該第二焊球的一部分係不被該第一焊膏及該第二焊膏所覆蓋,且該第二焊球具有介於大約200攝氏度和大約225攝氏度之間的回焊溫度;並且其中該第一焊膏及該第二焊膏具有介於大約160攝氏度和190攝氏度之間的固化溫度。
  8. 如請求項7的方法,其中該第一焊膏及該第二焊膏具有一合金,該合金帶有介於大約130攝氏度和大約200攝氏度之間的回焊溫度。
  9. 如請求項7的方法,其中該第二焊球包括一錫、銀和銅之合金或一錫和鉍之合金。
  10. 如請求項7的方法,其中該第一焊膏及該第二焊膏包括環氧樹脂。
  11. 如請求項7的方法,其中該第一基板具有每毫米大約20個輸入或輸出連接或更多,或者具有小於大約20/20微米的線寬或線距測量值。
  12. 如請求項7的方法,其中該第二基板具有每毫米大約10個輸入或輸出連接或更少,或者具有大於大約20/20微米的線寬或線距測量值。
  13. 一種封裝體,其包含:一晶粒,其藉由一焊點與一插線板的一第一側耦接,其中該焊點係不與焊膏直接接觸; 具有一第一側和一第二側之一中介板;一焊球,其被設置於在相對於該插線板的該第一側之該插線板的一第二側之該插線板內的一第一墊與相對於該中介板的該第一側之該中介板的該第二側之該中介板內的一第二墊之間,並與該插線板內的該第一墊和該中介板內的該第二墊實體地耦接,其中該焊球具有介於大約200攝氏度和大約225攝氏度之間的回焊溫度;以及一第一焊膏,其與該焊球、和該插線板的該第二側實體地耦接,及一第二焊膏,其與該焊球和該中介板的該第二側實體地耦接,其中該第一焊膏及該第二焊膏部分地圍繞該焊球,而該焊球的一部分係不被該第一焊膏和該第二焊膏所覆蓋,其中該第一焊膏和該第二焊膏具有介於大約160攝氏度和190攝氏度之間的固化溫度。
  14. 如請求項14的封裝體,其中該焊球包括一錫、銀和銅之合金或一錫和鉍之合金。
  15. 如請求項14的封裝體,其中該焊膏包括環氧樹脂或焊粉。
TW105122062A 2015-08-20 2016-07-13 基板於基板上之封裝技術 TWI714607B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/831,528 2015-08-20
US14/831,528 US20170053858A1 (en) 2015-08-20 2015-08-20 Substrate on substrate package

Publications (2)

Publication Number Publication Date
TW201709451A TW201709451A (zh) 2017-03-01
TWI714607B true TWI714607B (zh) 2021-01-01

Family

ID=58051447

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105122062A TWI714607B (zh) 2015-08-20 2016-07-13 基板於基板上之封裝技術

Country Status (4)

Country Link
US (1) US20170053858A1 (zh)
DE (1) DE112016003782T5 (zh)
TW (1) TWI714607B (zh)
WO (1) WO2017030704A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170110392A1 (en) * 2015-10-15 2017-04-20 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same structure
US10586782B2 (en) * 2017-07-01 2020-03-10 International Business Machines Corporation Lead-free solder joining of electronic structures
CN109462028B (zh) * 2018-12-21 2022-07-12 中国电子科技集团公司第五十四研究所 一种射频微机电微带天线
US11830746B2 (en) * 2021-01-05 2023-11-28 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacture
US11721642B2 (en) 2021-06-17 2023-08-08 Nxp Usa, Inc. Semiconductor device package connector structure and method therefor

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5147084A (en) * 1990-07-18 1992-09-15 International Business Machines Corporation Interconnection structure and test method
US20040118586A1 (en) * 2002-12-20 2004-06-24 Fay Hua Low temperature microelectronic die to substrate interconnects
TW200711072A (en) * 2005-04-29 2007-03-16 Stats Chippac Ltd Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides
US20080115968A1 (en) * 2006-11-20 2008-05-22 Daewoong Suh Solder joint reliability in microelectronic packaging
TW200839968A (en) * 2007-01-31 2008-10-01 Tamura Kaken Corp Conductive ball-or pin-mounted semiconductor packaging substrate, method for manufacturing the same and conductive bonding material
TW200937539A (en) * 2008-02-28 2009-09-01 Lsi Corp Process of grounding heat spreader/stiffener to a flip chip package using solder and film adhesive
TW200949964A (en) * 2008-03-19 2009-12-01 Henkel Corp Method of fabricating a semiconductor package or circuit assembly using a fluxing underfill composition applied to solder contact points in a dip process
US20120002386A1 (en) * 2010-07-01 2012-01-05 Nokia Corporation Method and Apparatus for Improving the Reliability of Solder Joints
TW201413841A (zh) * 2012-09-17 2014-04-01 Zhen Ding Technology Co Ltd 晶片封裝基板和結構及其製作方法
TW201423851A (zh) * 2012-12-11 2014-06-16 Stats Chippac Ltd 形成具有垂直互連單元的低輪廓扇出封裝的半導體裝置及方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6297559B1 (en) * 1997-07-10 2001-10-02 International Business Machines Corporation Structure, materials, and applications of ball grid array interconnections
US7323360B2 (en) * 2001-10-26 2008-01-29 Intel Corporation Electronic assemblies with filled no-flow underfill
US7691670B2 (en) * 2008-05-01 2010-04-06 Gem Services, Inc. Interconnection of lead frame to die utilizing flip chip process
US8278752B2 (en) * 2009-12-23 2012-10-02 Intel Corporation Microelectronic package and method for a compression-based mid-level interconnect
US9064971B2 (en) * 2012-12-20 2015-06-23 Intel Corporation Methods of forming ultra thin package structures including low temperature solder and structures formed therby
US8920934B2 (en) * 2013-03-29 2014-12-30 Intel Corporation Hybrid solder and filled paste in microelectronic packaging

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5147084A (en) * 1990-07-18 1992-09-15 International Business Machines Corporation Interconnection structure and test method
US20040118586A1 (en) * 2002-12-20 2004-06-24 Fay Hua Low temperature microelectronic die to substrate interconnects
TW200711072A (en) * 2005-04-29 2007-03-16 Stats Chippac Ltd Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides
US20080115968A1 (en) * 2006-11-20 2008-05-22 Daewoong Suh Solder joint reliability in microelectronic packaging
TW200839968A (en) * 2007-01-31 2008-10-01 Tamura Kaken Corp Conductive ball-or pin-mounted semiconductor packaging substrate, method for manufacturing the same and conductive bonding material
TW200937539A (en) * 2008-02-28 2009-09-01 Lsi Corp Process of grounding heat spreader/stiffener to a flip chip package using solder and film adhesive
TW200949964A (en) * 2008-03-19 2009-12-01 Henkel Corp Method of fabricating a semiconductor package or circuit assembly using a fluxing underfill composition applied to solder contact points in a dip process
US20120002386A1 (en) * 2010-07-01 2012-01-05 Nokia Corporation Method and Apparatus for Improving the Reliability of Solder Joints
TW201413841A (zh) * 2012-09-17 2014-04-01 Zhen Ding Technology Co Ltd 晶片封裝基板和結構及其製作方法
TW201423851A (zh) * 2012-12-11 2014-06-16 Stats Chippac Ltd 形成具有垂直互連單元的低輪廓扇出封裝的半導體裝置及方法

Also Published As

Publication number Publication date
DE112016003782T5 (de) 2018-07-19
WO2017030704A1 (en) 2017-02-23
TW201709451A (zh) 2017-03-01
US20170053858A1 (en) 2017-02-23

Similar Documents

Publication Publication Date Title
TWI714607B (zh) 基板於基板上之封裝技術
US8920934B2 (en) Hybrid solder and filled paste in microelectronic packaging
US20240030086A1 (en) Bga stim package architecture for high performance systems
US9257405B2 (en) Multi-solder techniques and configurations for integrated circuit package assembly
US10128225B2 (en) Interconnect structures with polymer core
US10586779B2 (en) LPS solder paste based low cost fine pitch pop interconnect solutions
US9283641B2 (en) Flux materials for heated solder placement and associated techniques and configurations
TWI703692B (zh) 多晶粒封裝技術
JP2021048383A (ja) ボールを変えたボールグリッドアレイ(bga)パッケージ
US10321573B2 (en) Solder contacts for socket assemblies
CN107924904B (zh) 球珊阵列(bga)装置和方法
US11990395B2 (en) Joint connection of corner non-critical to function (NCTF) ball for BGA solder joint reliability (SJR) enhancement
US9953909B2 (en) Ball grid array (BGA) with anchoring pins
JP2017508293A (ja) 低温取付けのためのハイブリッドインターコネクト
US20190067176A1 (en) Void reduction in solder joints using off-eutectic solder
TWI704971B (zh) 高溫焊料膏及用於製造封裝體之方法
US11417592B2 (en) Methods of utilizing low temperature solder assisted mounting techniques for package structures
JP2019068043A (ja) マイクロ電子パッケージ構造におけるはんだ接合の信頼性のための基板アーキテクチャ
JP2012134265A (ja) 半導体装置