TWI702486B - Remote login method for server subsystem and remote login system - Google Patents

Abstract

A method for maintaining a correct time of a graphics processor unit board comprising: determining whether a graphics processor unit board is coupled to a backplane by the backplane; sending a control command to the graphics processor unit board to obtain a first time information from the graphics processor unit board by the backplane if the graphics processor mainboard is coupled to the backplane; determine whether the first time information is correct by the backplane; sending the control command to a common server board by the backplane for obtaining a second time information from the common server board if the first time information is incorrect; sending the second time information to the graphics processor unit board by the backplane if the second time information is correct. This allows the correct time of the graphics processor board to be maintained even if AC power is interrupted.

Description

The method to maintain the correct time of the graphics processor motherboard

The present invention relates to a method of maintaining the correct time of a servo system, in particular to a method of maintaining the correct time of a graphics processor motherboard in a servo system.

The server motherboard is provided with a baseboard management controller and a BIOS chip. The baseboard management controller and BIOS chip communicate through interfaces such as KCS or SSIF. The BIOS chip sends the time and time zone information to the baseboard management controller on the server motherboard through IPMI commands. When the baseboard management controller receives the time and time zone information for time maintenance, the time information recorded by the baseboard management controller is correct. Since the server motherboard is also equipped with a button battery that supplies power to the BIOS chip, even if the AC power supply to the server motherboard is interrupted, as long as the button battery still has power, the BIOS chip can still transmit the correct time and time zone information to the board. Management controller.

Conversely, because the graphics processor motherboard does not have a BIOS chip and button battery, when the AC power supply to the graphics processor motherboard is interrupted, the baseboard management controller on the graphics processor cannot obtain the correct time and time zone information, resulting in the graphics processor The recorded time information recorded by the baseboard management controller on the motherboard is all wrong, and it is impossible to know the correct time of each event recorded in the baseboard management controller, which causes troubles for the user in debugging procedures.

In view of this, there is indeed a need for an improved method of maintaining the correct time on the graphics processor.

According to an embodiment of the present invention, a method for maintaining the correct time of the graphics processor mainboard is provided, so that the baseboard management controller on the graphics processor mainboard can obtain the correct time information. In this way, each user can easily know the correct time of each event recorded in the baseboard management controller for future debugging procedures.

According to an embodiment of the present invention, there is provided a method for maintaining the correct time of the graphics processor motherboard, which includes: judging by the backplane whether there is a graphics processor motherboard coupled to the backplane; if there is a graphics processor motherboard and the backplane When coupled, use the backplane to send control commands to the graphics processor motherboard to obtain the first time information from the graphics processor motherboard; use the backplane to determine whether the first time information is correct; if the first time information is incorrect, use the backplane Send a control command to the general server main board to obtain the second time information from the general server main board; use the backboard to determine whether the second time information is correct; and if the second time information is correct, use the backboard to transmit the second time information To the graphics processor motherboard.

In the method for maintaining the correct time of the graphics processor motherboard, the backplane judging whether the first time information is correct includes: comparing the first time information with the threshold time of the backplane, if the first time information is earlier than the threshold time , It is judged that the first time information is wrong; if the first time information is later than the threshold time, it is judged that the first time information is correct.

In the method for maintaining the correct time of the graphics processor mainboard, the backplane judging whether the second time information is correct includes: comparing the second time information with the threshold time, and if the second time information is earlier than the threshold time, then judging The second time information is incorrect; if the second time information is later than the threshold time, it is judged that the second time information is correct.

The method for maintaining the correct time of the graphics processor mainboard, wherein the graphics processor mainboard has a first baseboard management controller, and the backplane sends control commands to the graphics processor mainboard to send control commands from the first baseboard management controller of the graphics processor mainboard Get the first time information.

The described method for maintaining the correct time of the graphics processor mainboard, wherein the general server mainboard has a second baseboard management controller, and the backboard sends control commands to the general server mainboard to control from the second baseboard management of the general server mainboard The device obtains the second time information.

According to the method for maintaining the correct time of the graphics processor mainboard provided by an embodiment of the present invention, even if the AC power supply to the graphics processor mainboard is accidentally interrupted, the backplane can also be used in the second baseboard management controller of the general server mainboard. The recorded correct time information is transmitted to the first baseboard management controller on the graphics processor mainboard to maintain the correct time information recorded by the first baseboard management controller on the graphics processor mainboard. In this way, each user can easily know the correct time of each event recorded in the baseboard management controller for future debugging procedures.

The above description of the content of the disclosure and the description of the following embodiments are used to demonstrate and explain the spirit and principle of the present invention, and to provide a further explanation of the patent application scope of the present invention.

The detailed features and advantages of the present invention are described in detail in the following embodiments, and the content is sufficient to enable anyone familiar with the relevant art to understand the technical content of the present invention and implement it accordingly, and according to the content disclosed in this specification, the scope of patent application and the drawings Anyone who is familiar with the relevant art can easily understand the related purpose and advantages of the present invention. The following examples further illustrate the viewpoints of the present invention in detail, but do not limit the scope of the present invention by any viewpoint.

FIG. 1 is a schematic diagram of the hardware architecture of a backplane, a graphics processor motherboard, and a general server motherboard according to an embodiment of the present invention. As shown in Figure 1, the backplane 10 is provided with a first electrical connection port 11 and a second electrical connection port 12, the graphics processor motherboard 20 is provided with a third electrical connection port 21, and the general server motherboard 30 is provided with a fourth electrical connection port. Connect port 31. The backplane 10 can be electrically connected to the third electrical port 21 of the graphics processor motherboard 20 and the fourth electrical port 31 of the general server motherboard 30 through the first electrical connection port 11 and the second electrical connection port 12, respectively. The first electrical connection port 11, the second electrical connection port 12, the third electrical connection port 21 and the fourth electrical connection port 32 are Inter-Integrated Circuit Bus. In other embodiments, the first electrical connection port 11, the second electrical connection port 12, the third electrical connection port 21, and the fourth electrical connection port 31 may be, for example, PCIE ports, Mini PCIE ports, or PCI ports.

The graphics processor motherboard 20 is also provided with a first baseboard management controller 22, and the first baseboard management controller 22 is electrically connected to the third electrical connection port 21. The universal server motherboard 30 is further provided with a second baseboard management controller 32, and the second baseboard management controller 32 is electrically connected to the fourth electrical connection port 31. Because the first baseboard management controller 22 on the graphics processor motherboard 20 does not have a central processor temperature sensor, when the graphics processor motherboard 20 is coupled to the backplane 10, the backplane 30 cannot obtain the CPU temperature According to the data, the backplane 10 can determine that the device coupled to it is the graphics processor motherboard 20 based on this. Conversely, because the second baseboard management controller 32 on the universal server mainboard 30 has a central processing unit temperature sensor, when the universal server mainboard 30 is coupled to the backboard 10, the backboard 10 can acquire the CPU Based on the temperature data, the backplane 10 can determine that the device coupled to it is the general server motherboard 30.

2 is a schematic diagram of the hardware architecture of a backplane, a graphics processor motherboard, and a general server motherboard according to another embodiment of the invention. The embodiment of FIG. 2 is mostly the same as the embodiment of FIG. 1, the difference is that the backplane 10 in FIG. 2 can also be provided with a field replaceable unit 13 (Field Replace Unit), based on the specific address of the field replaceable unit 13 Stored in a specific field can help the backplane 10 determine whether the device coupled to it is the graphics processor motherboard 20 or the general server motherboard 30, so that it can be known whether there are graphics in the device coupled to the backplane 10 Processor motherboard 20.

FIG. 3 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to an embodiment of the invention. As shown in FIG. 3, in step S301, the backplane 10 starts to work, and then goes to step S302. In step S302, since the first baseboard management controller 22 on the graphics processor mainboard 20 is not provided with a central processing unit temperature sensor, and the second baseboard management controller 32 on the general server mainboard 30 has a central processing unit Temperature sensor, so the backplane 10 can determine whether there is a graphics processor motherboard 20 among the devices coupled to it based on whether the CPU temperature information can be obtained. If the backplane 10 obtains the CPU temperature information, the backplane 10 determines that the device coupled to it is the general server motherboard 30. Conversely, if the backplane 10 does not obtain the CPU temperature data, the backplane 10 determines that the device coupled to it is the graphics processor motherboard 20. When there is a graphics processor motherboard 20 in the device coupled to the backplane 10, step S303 is entered. When the graphics processor motherboard 20 does not exist in the device coupled to the backplane 10, return to step S301 and restart the program to determine whether there is a graphics processor motherboard 20 and the backplane 10 coupled.

In step S303, the backplane 10 sends a control command to the graphics processor mainboard 20, where the control command is an Intelligent Platform Management Interface (IPMI) standard command used to retrieve time. The IPMI standard command can be, for example, Get SEL Time. The first time information of the first baseboard management controller 22 on the graphics processor motherboard 20 is obtained, and then step S304 is entered.

In step S304, the backplane 10 compares the first time information from the graphics processor mainboard 20 with the threshold time preset in the backplane 10 to determine whether the first time information is correct time information. The first time information of the motherboard 20 is earlier than the preset threshold time, and the backplane 10 determines that the first time information from the graphics processor motherboard 20 is wrong time information, and then proceeds to step S305. Conversely, if the first time information from the graphics processor mainboard 20 is later than the preset threshold time, the backplane 10 determines that the first time information from the graphics processor 20 is the correct time information, and then returns to step S301 to restart the determination Is there a program for coupling the graphics processor mainboard 20 and the backplane 10? For example, the preset threshold time on the backplane 10 is September 1, 2017 at 00:00:00, when the first time message from the graphics processor motherboard 20 is earlier than September 1, 2017 at 00:00:00 In minutes, zero seconds, the backboard 10 determines that the first time message from the graphics processor motherboard 20 is the wrong time message. If the first time message from the graphics processor mainboard 20 is later than 0:00:00:00 on September 1, 2017, the backplane 10 determines that the first time message from the graphics processor mainboard 20 is the correct time information.

In step S305, the backplane 10 sends a control command to the universal server mainboard 30, where the control command is an Intelligent Platform Management Interface (IPMI) standard command used to retrieve time. The IPMI standard command can be, for example, Get SEL Time. The second time information of the second baseboard management controller 32 on the general server mainboard 30 is obtained, and then step S306 is entered.

In step S306, the backplane 10 compares the second time information from the universal server mainboard 30 with the threshold time preset in the backplane 10 to determine whether the second time information is correct time information. If the second time information of the server main board 30 is later than the preset threshold time, the backboard 10 determines that the second time information from the general server main board 30 is correct time information, and then the process proceeds to step S307. Conversely, if the second time information from the universal server main board 30 is earlier than the preset threshold time, the backplane 10 determines that the second time information from the universal server main board 30 is wrong time information, and then returns to step S301 to restart It is determined whether there is a program for coupling the graphics processor mainboard 20 and the backplane 10. For example, the default threshold time on the backplane 10 is September 1, 2017, 00:00:00, when the second time message from the general server mainboard 30 is earlier than September 1, 2017, 00:00:00 In minutes, zero seconds, the backboard 10 determines that the second time message from the general server mainboard 30 is wrong time information. When the second time message from the general server main board 30 is later than 0:00:00:00 on September 1, 2017, the backboard 10 determines that the second time message from the general server main board 30 is the correct time information. The second time information of the second baseboard management controller 32 on the universal server motherboard 30 comes from the BIOS, and the time of the BIOS is set by the user. The second baseboard management controller 32 and the BIOS cannot determine whether the time set by the user is correct, so the user must set a correct time in the BIOS.

In step S307, the backplane 10 transmits the second time information to the first baseboard management controller 21 on the graphics processor mainboard 20. After the backplane 10 transmits the second time information to the graphics processor mainboard 20, step S301 is returned to restart the program for determining whether there is a graphics processor mainboard 20 and the backplane 10 coupled.

4 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to another embodiment of the invention. The content of steps S401, S403-S407 in FIG. 4 is the same as the content of steps S301, S303-S307 in FIG. 3, and the content of step S402 is different from the content of step S302. As shown in FIG. 4, in step S402, the specific address of the field replaceable unit 13 on the backplane 10 is stored in a specific field to determine whether there is a graphics processor motherboard in the device coupled to the backplane 10 20.

According to the method for maintaining the correct time of the graphics processor mainboard provided by an embodiment of the present invention, even if the AC power supply to the graphics processor mainboard is accidentally interrupted, the backplane can also be used in the second baseboard management controller of the general server mainboard. The recorded correct time information is transmitted to the first baseboard management controller on the graphics processor mainboard to maintain the correct time information recorded by the first baseboard management controller on the graphics processor mainboard. In this way, each user can easily know the correct time of each event recorded in the baseboard management controller for future debugging procedures.

Although the present invention is disclosed in the foregoing embodiments, it is not intended to limit the present invention. All changes and modifications made without departing from the spirit and scope of the present invention fall within the scope of patent protection of the present invention. For the scope of protection defined by the present invention, please refer to the attached patent scope.

10: Backplane 11: First electrical port 12: Second electrical port 13: Field replaceable unit 20: Graphics processor motherboard 21: Third electrical port 22: First baseboard management controller 30: Universal server Motherboard 31: Fourth electrical connection port 32: Second baseboard management controller

FIG. 1 is a schematic diagram of the hardware architecture of a backplane, a graphics processor motherboard, and a general server motherboard according to an embodiment of the present invention. 2 is a schematic diagram of the hardware architecture of a backplane, a graphics processor motherboard, and a general server motherboard according to another embodiment of the invention. FIG. 3 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to an embodiment of the invention. 4 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to another embodiment of the invention.

Method flow chart unlabeled

Claims (12)

A method for maintaining the correct time of the graphics processor mainboard includes: judging by a backplane whether there is a graphics processor mainboard coupled to the backplane; if there is a graphics processor mainboard coupled to the backplane , Using the backplane to send a control command to the graphics processor motherboard to obtain a first time information from the graphics processor motherboard; using the backplane to determine whether the first time information is correct; if the first time information is Error, send the control command to a general server main board through the backboard to obtain a second time information from the general server main board; use the backboard to determine whether the second time information is correct; and if the second time The information is correct, and the second time information is transmitted to the graphics processor mainboard through the backplane. The method for maintaining the correct time of the graphics processor mainboard according to claim 1, wherein the backplane judging whether the first time information is correct includes: performing a comparison between the first time information and a threshold time of the backplane, If the first time information is earlier than the threshold time, it is judged that the first time information is wrong; if the first time information is later than the threshold time, it is judged that the first time information is correct. The method for maintaining the correct time of the graphics processor mainboard according to claim 1, wherein the backplane judging whether the second time information is correct includes: comparing the second time information with the threshold time, if the second time information is If the time information is earlier than the threshold time, it is judged that the second time information is wrong; if the second time information is later than the threshold time, it is judged that the second time information is correct. The method for maintaining the correct time of the graphics processor mainboard as described in claim 1, wherein the control command is a standard command of the smart platform management interface for capturing time. The method for maintaining the correct time of the graphics processor motherboard according to claim 1, wherein the graphics processor motherboard has a first baseboard management controller, and the backplane sends the control command to the graphics processor motherboard to receive The first baseboard management controller of the processor motherboard obtains the first time information. The method for maintaining the correct time of the graphics processor mainboard according to claim 1, wherein the universal server mainboard has a second baseboard management controller, and the backplane sends the control command to the universal server mainboard from the The second baseboard management controller of the universal server mainboard obtains the second time information. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1, further includes restarting to determine whether the graphics processing is available if the backplane determines that there is no coupling between the graphics processor motherboard and the backplane The program for coupling the main board of the device to the backplane. The method for maintaining the correct time of the graphics processor mainboard as described in claim 1, further comprising, if the backplane determines that the first time information is correct, restarting to determine whether the graphics processor mainboard is coupled to the backplane program of. The method for maintaining the correct time of the graphics processor mainboard as described in claim 1, further comprising, if the backplane determines that the second time information is incorrect, restarting to determine whether the graphics processor mainboard and the backplane are coupled Connected procedures. The method for maintaining the correct time of the graphics processor mainboard as described in claim 1, further comprising if the second time information is correct, the backplane transmits the second time information to the graphics processor mainboard and restarts the judgment Whether there is a program for coupling the graphics processor motherboard and the backplane. The method for maintaining the correct time of the graphics processor mainboard according to claim 1, wherein the method of determining whether the graphics processor mainboard is coupled to the backboard by the backboard includes determining whether the backboard is available A CPU temperature information; if yes, it is determined that the backplane is coupled to the general server motherboard; if not, it is determined that the backplane is coupled to the graphics processor motherboard. The method for maintaining the correct time of the graphics processor mainboard according to claim 1, wherein the method of determining whether the graphics processor mainboard and the backboard are coupled by the backplane includes: being replaceable in a field The specific address of the unit is stored in a specific field to help the backplane to identify the graphics processor motherboard or the general server motherboard that is coupled to the backplane.

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