TW202011137A - Remote login method for server subsystem and remote login system - Google Patents

Abstract

A method for maintaining a correct time of a graphics processor unit board comprising: determining whether a graphics processor unit board is coupled to a backplane by the backplane; sending a control command to the graphics processor unit board to obtain a first time information from the graphics processor unit board by the backplane if the graphics processor mainboard is coupled to the backplane; determine whether the first time information is correct by the backplane; sending the control command to a common server board by the backplane for obtaining a second time information from the common server board if the first time information is incorrect; sending the second time information to the graphics processor unit board by the backplane if the second time information is correct. This allows the correct time of the graphics processor board to be maintained even if AC power is interrupted.

Description

How to maintain the correct time of the graphics processor motherboard

The present invention relates to a method for maintaining the correct time of the servo system, in particular to a method for maintaining the correct time of the graphics processor motherboard in the servo system.

The server motherboard is provided with a baseboard management controller and a BIOS chip. The baseboard management controller and the BIOS chip communicate through interfaces such as KCS or SSIF. The BIOS chip sends time and time zone information to the baseboard management controller on the server motherboard through IPMI commands. When the baseboard management controller receives the time and time zone information for time maintenance, the time information recorded by the baseboard management controller is correct. Since the server motherboard is also equipped with a button battery that supplies power to the BIOS chip, even after the AC power supply to the server motherboard is interrupted, as long as the button battery still has power, the BIOS chip can still transmit the correct time and time zone information to the substrate Management controller.

On the contrary, because the graphics processor motherboard is not equipped with a BIOS chip and a button battery, when the AC power supply to the graphics processor motherboard is interrupted, the substrate management controller on the graphics processor cannot obtain the correct time and time zone information, resulting in the graphics processor The recorded time information recorded by the baseboard management controller on the motherboard is all wrong, and it is impossible to know the correct time for each event recorded in the baseboard management controller, which causes troubles for the user to perform debugging procedures.

In view of this, there is indeed a need for an improved method of maintaining the correct time on the graphics processor.

According to an embodiment of the present invention, a method for maintaining a correct time of a graphics processor motherboard can enable a substrate management controller on a graphics processor motherboard to obtain correct time information. In this way, each user can easily know the correct time when each event recorded in the baseboard management controller occurs, so as to carry out the debugging process in the future.

According to an embodiment of the present invention, a method for maintaining the correct time of a graphics processor motherboard is provided, including: judging whether a graphics processor motherboard and a backplane are coupled by a backplane; if there is a graphics processor motherboard and a backplane When coupled, the backplane sends control commands to the graphics processor motherboard to obtain the first time information from the graphics processor motherboard; the backplane determines whether the first time information is correct; if the first time information is incorrect, the backplane Send control commands to the universal server motherboard to obtain the second time information from the universal server motherboard; use the backplane to determine whether the second time information is correct; and if the second time information is correct, send the second time information to the backplane To the graphics processor motherboard.

The method for maintaining the correct time of the mainboard of the graphics processor, wherein the backplane determines whether the first time information is correct includes: comparing the first time information with the threshold time of the backplane, if the first time information is earlier than the threshold time , The first time information is judged to be wrong; if the first time information is later than the threshold time, the first time information is judged to be correct.

The method for maintaining the correct time of the main board of the graphics processor, wherein the backplane judging whether the second time information is correct includes: comparing the second time information with the threshold time, if the second time information is earlier than the threshold time, it is judged The second time information is incorrect; if the second time information is later than the threshold time, it is determined that the second time information is correct.

The method for maintaining the correct time of the graphics processor motherboard, wherein the graphics processor motherboard has a first substrate management controller, and the backplane sends a control command to the graphics processor motherboard to manage the controller from the first substrate of the graphics processor motherboard Get the first time information.

The method for maintaining the correct time of the graphics processor motherboard, wherein the general server motherboard has a second baseboard management controller, and when the backplane sends a control command to the general server motherboard to manage control from the second substrate of the general server motherboard The device obtains the second time information.

According to the method for maintaining the correct time of the graphics processor motherboard according to an embodiment of the present invention, even if the AC power supply to the graphics processor motherboard is inadvertently interrupted, the backplane can also use the second substrate management controller of the general server motherboard The recorded correct time information is transmitted to the first baseboard management controller on the graphics processor mainboard to maintain that the time information recorded by the first baseboard management controller on the graphics processor mainboard is correct. In this way, each user can easily know the correct time when each event recorded in the baseboard management controller occurs, so as to carry out the debugging process in the future.

The above description of the disclosure and the following description of the embodiments are used to demonstrate and explain the spirit and principle of the present invention, and provide a further explanation of the scope of the patent application of the present invention.

The following describes in detail the detailed features and advantages of the present invention in the embodiments. The content is sufficient for any person skilled in the relevant art to understand and implement the technical content of the present invention, and according to the contents disclosed in this specification, the scope of patent application and the drawings Anyone skilled in the relevant art can easily understand the purpose and advantages of the present invention. The following examples further illustrate the views of the present invention in detail, but do not limit the scope of the present invention in any way.

FIG. 1 is a schematic diagram of hardware architectures of a backplane, a graphics processor motherboard, and a general-purpose server motherboard according to an embodiment of the invention. As shown in FIG. 1, the backplane 10 is provided with a first electrical port 11 and a second electrical port 12, the graphics processor motherboard 20 is provided with a third electrical port 21, and the universal server motherboard 30 is provided with a fourth electrical port Port 31. The backplane 10 can be electrically connected to the third electrical port 21 of the graphics processor motherboard 20 and the fourth electrical port 31 of the general server motherboard 30 through the first electrical port 11 and the second electrical port 12, respectively, wherein The first electrical connection port 11, the second electrical connection port 12, the third electrical connection port 21 and the fourth electrical connection port 32 are integrated circuit buses (Inter-Integrated Circuit Bus). In other embodiments, the first electrical port 11, the second electrical port 12, the third electrical port 21, and the fourth electrical port 31 may be, for example, PCIE ports, Mini PCIE ports, or PCI ports.

The graphics processor motherboard 20 is further provided with a first substrate management controller 22, and the first substrate management controller 22 is electrically connected to the third electrical connection port 21. The universal server motherboard 30 is further provided with a second substrate management controller 32, and the second substrate management controller 32 is electrically connected to the fourth electrical connection port 31. Because the first substrate management controller 22 on the graphics processor motherboard 20 is not provided with a CPU temperature sensor, when the graphics processor motherboard 20 is coupled to the backplane 10, the backplane 30 cannot obtain the CPU temperature According to the data, the backplane 10 can determine that the device coupled to it is the graphics processor motherboard 20. On the contrary, because the second substrate management controller 32 on the general server main board 30 has a CPU temperature sensor, when the general server main board 30 is coupled to the backplane 10, the backplane 10 can acquire the central processor According to the temperature data, the backplane 10 can determine that the device coupled to it is the general server motherboard 30.

2 is a schematic diagram of the hardware architecture of a backplane, a graphics processor motherboard, and a general server motherboard according to another embodiment of the invention. The embodiment of FIG. 2 is mostly the same as the embodiment of FIG. 1, the difference is that the backplane 10 in FIG. 2 can also be provided with a field replaceable unit 13 (Field Replace Unit), depending on the specific address of the replaceable unit 13 in the field Stored in a specific field to help the backplane 10 determine whether the device coupled to it is the graphics processor motherboard 20 or the general server motherboard 30, so as to know whether there is graphics in the device coupled to the backplane 10 Processor motherboard 20.

FIG. 3 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to an embodiment of the invention. As shown in FIG. 3, in step S301, the backplane 10 starts to work, and then proceeds to step S302. In step S302, since the first substrate management controller 22 on the graphics processor motherboard 20 is not provided with a CPU temperature sensor, and the second substrate management controller 32 on the general server motherboard 30 has a CPU The temperature sensor, so the backplane 10 can determine whether there is a graphics processor motherboard 20 in the device coupled to it according to whether the temperature information of the central processor can be obtained. If the backplane 10 obtains the temperature information of the central processing unit, the backplane 10 determines that the device coupled to it is the general server motherboard 30. Conversely, if the backplane 10 has not acquired the temperature data of the central processor, the backplane 10 determines that the device coupled to it is the graphics processor motherboard 20. When the graphics processor motherboard 20 exists in the device coupled to the backplane 10, step S303 is entered. When the graphics processor motherboard 20 does not exist in the device coupled to the backplane 10, return to step S301 to restart the process of determining whether there is a coupling between the graphics processor motherboard 20 and the backplane 10.

In step S303, the backplane 10 sends a control command to the graphics processor motherboard 20, where the control command is an intelligent platform management interface (IPMI) standard command for acquiring time, and the IPMI standard command may be, for example, Get SEL Time, to Obtain the first time information of the first substrate management controller 22 on the graphics processor motherboard 20, and then proceed to step S304.

In step S304, the backplane 10 compares the first time information from the graphics processor motherboard 20 with the preset threshold time on the backplane 10 to determine whether the first time information is the correct time information. If the first time information of the main board 20 is earlier than the preset threshold time, the backplane 10 determines that the first time information from the graphics processor main board 20 is the wrong time information, and then proceeds to step S305. Conversely, if the first time information from the graphics processor motherboard 20 is later than the preset threshold time, the backplane 10 determines that the first time information from the graphics processor 20 is the correct time information, and then returns to step S301 to restart the judgment Is there a program to couple the graphics processor motherboard 20 and the backplane 10? For example, the preset threshold time on the backplane 10 is 0:00:00 on September 1, 2017. When the first time message from the graphics processor motherboard 20 is earlier than 00:00 on September 1, 2017 Minute and zero seconds, the backplane 10 determines that the first time message from the graphics processor motherboard 20 is the wrong time message. If the first time message from the graphics processor motherboard 20 is later than 0:00:00 on September 1, 2017, the backplane 10 determines that the first time message from the graphics processor motherboard 20 is the correct time information.

In step S305, the backplane 10 sends a control command to the general server motherboard 30, wherein the control command is an intelligent platform management interface (IPMI) standard command for acquiring time, and the IPMI standard command may be, for example, Get SEL Time, to Obtain the second time information of the second board management controller 32 on the general server main board 30, and then proceed to step S306.

In step S306, the backplane 10 compares the second time information from the general server mainboard 30 with the preset threshold time on the backplane 10 to determine whether the second time information is the correct time information. If the second time information of the main board 30 is later than the preset threshold time, the backplane 10 determines that the second time information from the general server main board 30 is the correct time information, and then proceeds to step S307. On the contrary, if the second time information from the general server motherboard 30 is earlier than the preset threshold time, the backplane 10 determines that the second time information from the general server motherboard 30 is the wrong time information, and then returns to step S301 to restart Determine whether there is a program for coupling the graphics processor motherboard 20 and the backplane 10. For example, the default threshold time on the backplane 10 is September 1, 2017, zero hour, minute, and second. When the second time message from the general server motherboard 30 is earlier than September 1, 2017, zero hour and zero Minute zero second, the backplane 10 determines that the second time message from the general server motherboard 30 is the wrong time message. When the second time message from the general server motherboard 30 is later than 0:00:00 on September 1, 2017, the backplane 10 determines that the second time message from the general server motherboard 30 is the correct time information. The second time information of the second baseboard management controller 32 on the general server motherboard 30 comes from the BIOS, and the time of the BIOS is set by the user. The second baseboard management controller 32 and the BIOS cannot determine whether the time set by the user is correct, so the user must set a correct time in the BIOS.

In step S307, the backplane 10 transmits the second time information to the first substrate management controller 21 on the graphics processor motherboard 20. After the backplane 10 transmits the second time information to the graphics processor motherboard 20, it returns to step S301 to restart the process of determining whether there is a coupling between the graphics processor motherboard 20 and the backplane 10.

FIG. 4 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to another embodiment of the invention. The content of steps S401, S403-S407 of FIG. 4 is the same as the content of steps S301, S303-S307 of FIG. 3, and the content of step S402 is different from the content of step S302. As shown in FIG. 4, in step S402, the specific address of the field replaceable unit 13 on the backplane 10 is stored in a specific field to determine whether there is a graphics processor motherboard in the device coupled to the backplane 10 20.

According to the method for maintaining the correct time of the graphics processor motherboard according to an embodiment of the present invention, even if the AC power supply to the graphics processor motherboard is inadvertently interrupted, the backplane can also use the second substrate management controller of the general server motherboard The recorded correct time information is transmitted to the first baseboard management controller on the graphics processor mainboard to maintain that the time information recorded by the first baseboard management controller on the graphics processor mainboard is correct. In this way, each user can easily know the correct time when each event recorded in the baseboard management controller occurs, so as to carry out the debugging process in the future.

Although the present invention is disclosed as the foregoing embodiments, it is not intended to limit the present invention. Without departing from the spirit and scope of the present invention, all modifications and retouching are within the scope of patent protection of the present invention. For the protection scope defined by the present invention, please refer to the attached patent application scope.

10: backplane 11: first electrical port 12: second electrical port 13: field replaceable unit 20: graphics processor motherboard 21: third electrical port 22: first substrate management controller 30: general server Motherboard 31: fourth electrical port 32: second baseboard management controller

FIG. 1 is a schematic diagram of hardware architectures of a backplane, a graphics processor motherboard, and a general-purpose server motherboard according to an embodiment of the invention. 2 is a schematic diagram of the hardware architecture of a backplane, a graphics processor motherboard, and a general server motherboard according to another embodiment of the invention. FIG. 3 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to an embodiment of the invention. FIG. 4 is a flowchart of a method for maintaining the correct time of a graphics processor motherboard according to another embodiment of the invention.

Method flow chart without labels

Claims (12)

A method for maintaining the correct time of a graphics processor motherboard, including: judging whether a graphics processor motherboard is coupled to the backplane with a backplane; if there is a coupling between the graphics processor motherboard and the backplane , The backplane sends a control command to the graphics processor motherboard to obtain a first time information from the graphics processor motherboard; use the backplane to determine whether the first time information is correct; if the first time information has Error, the backplane sends the control command to a general server motherboard to obtain a second time information from the general server motherboard; the backplane determines whether the second time information is correct; and if the second time If the information is correct, the backplane transmits the second time information to the graphics processor motherboard. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1, wherein the backplane determining whether the first time information is correct includes: performing a comparison between the first time information and a threshold time of the backplane, If the first time information is earlier than the threshold time, it is determined that the first time information is incorrect; if the first time information is later than the threshold time, the first time information is determined to be correct. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1, wherein the backplane determines whether the second time information is correct includes: performing comparison between the second time information and the threshold time, if the second If the time information is earlier than the threshold time, the second time information is judged to be wrong; if the second time information is later than the threshold time, the second time information is judged to be correct. The method for maintaining the correct time of a graphics processor motherboard as described in claim 1, wherein the control command is a standard command of a smart platform management interface for acquiring time. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1, wherein the graphics processor motherboard has a first substrate management controller, and the backplane sends the control command to the graphics processor motherboard to remove the graphics The first baseboard management controller of the processor motherboard obtains the first time information. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1, wherein the general server motherboard has a second baseboard management controller, and the backplane sends the control command to the general server motherboard from the The second baseboard management controller of the universal server motherboard obtains the second time information. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1 further includes restarting to determine whether there is the graphics processing if the backplane determines that the graphics processor motherboard is not coupled to the backplane The process of coupling the motherboard to the backplane. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1 further includes if the backplane determines that the first time information is correct, restarting to determine whether the graphics processor motherboard is coupled to the backplane program of. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1 further includes restarting to determine whether the graphics processor motherboard is coupled to the backplane if the backplane determines that the second time information is incorrect Access procedure. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1 further includes: if the second time information is correct, the backplane transmits the second time information to the graphics processor motherboard and restarts the judgment Is there a program that couples the graphics processor motherboard with the backplane. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1, wherein the method of determining whether the graphics processor motherboard is coupled to the backplane by the backplane includes determining whether the backplane is available A central processor temperature information; if it is, it is determined that the backplane is coupled to the general server motherboard; if not, it is determined that the backplane is coupled to the graphics processor motherboard. The method for maintaining the correct time of the graphics processor motherboard as described in claim 1, wherein the method of determining whether the graphics processor motherboard is coupled to the backplane by the backplane includes: The specific address of the unit is stored in a specific field to help the backplane identify whether the graphics processor motherboard or the general server motherboard is coupled to the backplane.

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